From 7536ad8dbfcfd56cd04d005b76cd9ecf2036e220 Mon Sep 17 00:00:00 2001 From: Richard Gong Date: Tue, 14 Apr 2020 15:47:54 -0500 Subject: firmware: fpga: replace the error codes with the standard ones MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The Intel service layer driver has defined error codes for the specific services, which started from FPGA configuration then RSU (Remote Status Update). Intel service layer driver should define the standard error codes rather than keep adding more error codes for the new services. The standard error codes will be used by all the clients of Intel service layer driver. Replace FPGA and RSU specific error codes with Intel service layer’s Common error codes. Signed-off-by: Richard Gong Link: https://lore.kernel.org/r/1586897274-307-2-git-send-email-richard.gong@linux.intel.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/stratix10-rsu.c | 10 +++---- drivers/firmware/stratix10-svc.c | 62 ++++++++++++---------------------------- 2 files changed, 23 insertions(+), 49 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/stratix10-rsu.c b/drivers/firmware/stratix10-rsu.c index f8533338b018..4379475c99ed 100644 --- a/drivers/firmware/stratix10-rsu.c +++ b/drivers/firmware/stratix10-rsu.c @@ -72,7 +72,7 @@ static void rsu_status_callback(struct stratix10_svc_client *client, struct stratix10_rsu_priv *priv = client->priv; struct arm_smccc_res *res = (struct arm_smccc_res *)data->kaddr1; - if (data->status == BIT(SVC_STATUS_RSU_OK)) { + if (data->status == BIT(SVC_STATUS_OK)) { priv->status.version = FIELD_GET(RSU_VERSION_MASK, res->a2); priv->status.state = FIELD_GET(RSU_STATE_MASK, res->a2); @@ -108,9 +108,9 @@ static void rsu_command_callback(struct stratix10_svc_client *client, { struct stratix10_rsu_priv *priv = client->priv; - if (data->status == BIT(SVC_STATUS_RSU_NO_SUPPORT)) + if (data->status == BIT(SVC_STATUS_NO_SUPPORT)) dev_warn(client->dev, "Secure FW doesn't support notify\n"); - else if (data->status == BIT(SVC_STATUS_RSU_ERROR)) + else if (data->status == BIT(SVC_STATUS_ERROR)) dev_err(client->dev, "Failure, returned status is %lu\n", BIT(data->status)); @@ -133,9 +133,9 @@ static void rsu_retry_callback(struct stratix10_svc_client *client, struct stratix10_rsu_priv *priv = client->priv; unsigned int *counter = (unsigned int *)data->kaddr1; - if (data->status == BIT(SVC_STATUS_RSU_OK)) + if (data->status == BIT(SVC_STATUS_OK)) priv->retry_counter = *counter; - else if (data->status == BIT(SVC_STATUS_RSU_NO_SUPPORT)) + else if (data->status == BIT(SVC_STATUS_NO_SUPPORT)) dev_warn(client->dev, "Secure FW doesn't support retry\n"); else dev_err(client->dev, "Failed to get retry counter %lu\n", diff --git a/drivers/firmware/stratix10-svc.c b/drivers/firmware/stratix10-svc.c index d5f0769f3761..e0db8dbfc9d1 100644 --- a/drivers/firmware/stratix10-svc.c +++ b/drivers/firmware/stratix10-svc.c @@ -214,7 +214,7 @@ static void svc_thread_cmd_data_claim(struct stratix10_svc_controller *ctrl, complete(&ctrl->complete_status); break; } - cb_data->status = BIT(SVC_STATUS_RECONFIG_BUFFER_DONE); + cb_data->status = BIT(SVC_STATUS_BUFFER_DONE); cb_data->kaddr1 = svc_pa_to_va(res.a1); cb_data->kaddr2 = (res.a2) ? svc_pa_to_va(res.a2) : NULL; @@ -227,7 +227,7 @@ static void svc_thread_cmd_data_claim(struct stratix10_svc_controller *ctrl, __func__); } } while (res.a0 == INTEL_SIP_SMC_STATUS_OK || - res.a0 == INTEL_SIP_SMC_FPGA_CONFIG_STATUS_BUSY || + res.a0 == INTEL_SIP_SMC_STATUS_BUSY || wait_for_completion_timeout(&ctrl->complete_status, timeout)); } @@ -250,7 +250,7 @@ static void svc_thread_cmd_config_status(struct stratix10_svc_controller *ctrl, cb_data->kaddr1 = NULL; cb_data->kaddr2 = NULL; cb_data->kaddr3 = NULL; - cb_data->status = BIT(SVC_STATUS_RECONFIG_ERROR); + cb_data->status = BIT(SVC_STATUS_ERROR); pr_debug("%s: polling config status\n", __func__); @@ -259,7 +259,7 @@ static void svc_thread_cmd_config_status(struct stratix10_svc_controller *ctrl, ctrl->invoke_fn(INTEL_SIP_SMC_FPGA_CONFIG_ISDONE, 0, 0, 0, 0, 0, 0, 0, &res); if ((res.a0 == INTEL_SIP_SMC_STATUS_OK) || - (res.a0 == INTEL_SIP_SMC_FPGA_CONFIG_STATUS_ERROR)) + (res.a0 == INTEL_SIP_SMC_STATUS_ERROR)) break; /* @@ -271,7 +271,7 @@ static void svc_thread_cmd_config_status(struct stratix10_svc_controller *ctrl, } if (res.a0 == INTEL_SIP_SMC_STATUS_OK && count_in_sec) - cb_data->status = BIT(SVC_STATUS_RECONFIG_COMPLETED); + cb_data->status = BIT(SVC_STATUS_COMPLETED); p_data->chan->scl->receive_cb(p_data->chan->scl, cb_data); } @@ -294,24 +294,18 @@ static void svc_thread_recv_status_ok(struct stratix10_svc_data *p_data, switch (p_data->command) { case COMMAND_RECONFIG: - cb_data->status = BIT(SVC_STATUS_RECONFIG_REQUEST_OK); + case COMMAND_RSU_UPDATE: + case COMMAND_RSU_NOTIFY: + cb_data->status = BIT(SVC_STATUS_OK); break; case COMMAND_RECONFIG_DATA_SUBMIT: - cb_data->status = BIT(SVC_STATUS_RECONFIG_BUFFER_SUBMITTED); - break; - case COMMAND_NOOP: - cb_data->status = BIT(SVC_STATUS_RECONFIG_BUFFER_SUBMITTED); - cb_data->kaddr1 = svc_pa_to_va(res.a1); + cb_data->status = BIT(SVC_STATUS_BUFFER_SUBMITTED); break; case COMMAND_RECONFIG_STATUS: - cb_data->status = BIT(SVC_STATUS_RECONFIG_COMPLETED); - break; - case COMMAND_RSU_UPDATE: - case COMMAND_RSU_NOTIFY: - cb_data->status = BIT(SVC_STATUS_RSU_OK); + cb_data->status = BIT(SVC_STATUS_COMPLETED); break; case COMMAND_RSU_RETRY: - cb_data->status = BIT(SVC_STATUS_RSU_OK); + cb_data->status = BIT(SVC_STATUS_OK); cb_data->kaddr1 = &res.a1; break; default: @@ -430,9 +424,9 @@ static int svc_normal_to_secure_thread(void *data) if (pdata->command == COMMAND_RSU_STATUS) { if (res.a0 == INTEL_SIP_SMC_RSU_ERROR) - cbdata->status = BIT(SVC_STATUS_RSU_ERROR); + cbdata->status = BIT(SVC_STATUS_ERROR); else - cbdata->status = BIT(SVC_STATUS_RSU_OK); + cbdata->status = BIT(SVC_STATUS_OK); cbdata->kaddr1 = &res; cbdata->kaddr2 = NULL; @@ -445,7 +439,7 @@ static int svc_normal_to_secure_thread(void *data) case INTEL_SIP_SMC_STATUS_OK: svc_thread_recv_status_ok(pdata, cbdata, res); break; - case INTEL_SIP_SMC_FPGA_CONFIG_STATUS_BUSY: + case INTEL_SIP_SMC_STATUS_BUSY: switch (pdata->command) { case COMMAND_RECONFIG_DATA_SUBMIT: svc_thread_cmd_data_claim(ctrl, @@ -460,33 +454,13 @@ static int svc_normal_to_secure_thread(void *data) break; } break; - case INTEL_SIP_SMC_FPGA_CONFIG_STATUS_REJECTED: + case INTEL_SIP_SMC_STATUS_REJECTED: pr_debug("%s: STATUS_REJECTED\n", __func__); break; - case INTEL_SIP_SMC_FPGA_CONFIG_STATUS_ERROR: + case INTEL_SIP_SMC_STATUS_ERROR: case INTEL_SIP_SMC_RSU_ERROR: pr_err("%s: STATUS_ERROR\n", __func__); - switch (pdata->command) { - /* for FPGA mgr */ - case COMMAND_RECONFIG_DATA_CLAIM: - case COMMAND_RECONFIG: - case COMMAND_RECONFIG_DATA_SUBMIT: - case COMMAND_RECONFIG_STATUS: - cbdata->status = - BIT(SVC_STATUS_RECONFIG_ERROR); - break; - - /* for RSU */ - case COMMAND_RSU_STATUS: - case COMMAND_RSU_UPDATE: - case COMMAND_RSU_NOTIFY: - case COMMAND_RSU_RETRY: - cbdata->status = - BIT(SVC_STATUS_RSU_ERROR); - break; - } - - cbdata->status = BIT(SVC_STATUS_RECONFIG_ERROR); + cbdata->status = BIT(SVC_STATUS_ERROR); cbdata->kaddr1 = NULL; cbdata->kaddr2 = NULL; cbdata->kaddr3 = NULL; @@ -502,7 +476,7 @@ static int svc_normal_to_secure_thread(void *data) if ((pdata->command == COMMAND_RSU_RETRY) || (pdata->command == COMMAND_RSU_NOTIFY)) { cbdata->status = - BIT(SVC_STATUS_RSU_NO_SUPPORT); + BIT(SVC_STATUS_NO_SUPPORT); cbdata->kaddr1 = NULL; cbdata->kaddr2 = NULL; cbdata->kaddr3 = NULL; -- cgit v1.2.3 From b9b3a8be28b31a3dbcb0ced07aa0d869f45cdb69 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:43 -0700 Subject: firmware: xilinx: Remove eemi ops for get_api_version Use direct function calls instead of using eemi ops. So remove eemi ops for get_api_version and use direct function call. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-2-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp-debug.c | 2 +- drivers/firmware/xilinx/zynqmp.c | 4 ++-- drivers/soc/xilinx/zynqmp_power.c | 4 ++-- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 4 files changed, 10 insertions(+), 6 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp-debug.c b/drivers/firmware/xilinx/zynqmp-debug.c index 43bc6cfdab45..06a21efe6829 100644 --- a/drivers/firmware/xilinx/zynqmp-debug.c +++ b/drivers/firmware/xilinx/zynqmp-debug.c @@ -92,7 +92,7 @@ static int process_api_request(u32 pm_id, u64 *pm_api_arg, u32 *pm_api_ret) switch (pm_id) { case PM_GET_API_VERSION: - ret = eemi_ops->get_api_version(&pm_api_version); + ret = zynqmp_pm_get_api_version(&pm_api_version); sprintf(debugfs_buf, "PM-API Version = %d.%d\n", pm_api_version >> 16, pm_api_version & 0xffff); break; diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 41b65164a367..36dab68344df 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -219,7 +219,7 @@ static u32 pm_tz_version; * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_get_api_version(u32 *version) +int zynqmp_pm_get_api_version(u32 *version) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -237,6 +237,7 @@ static int zynqmp_pm_get_api_version(u32 *version) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version); /** * zynqmp_pm_get_chipid - Get silicon ID registers @@ -734,7 +735,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .get_api_version = zynqmp_pm_get_api_version, .get_chipid = zynqmp_pm_get_chipid, .query_data = zynqmp_pm_query_data, .clock_enable = zynqmp_pm_clock_enable, diff --git a/drivers/soc/xilinx/zynqmp_power.c b/drivers/soc/xilinx/zynqmp_power.c index 09227895d216..d327d9ef0e81 100644 --- a/drivers/soc/xilinx/zynqmp_power.c +++ b/drivers/soc/xilinx/zynqmp_power.c @@ -186,11 +186,11 @@ static int zynqmp_pm_probe(struct platform_device *pdev) if (IS_ERR(eemi_ops)) return PTR_ERR(eemi_ops); - if (!eemi_ops->get_api_version || !eemi_ops->init_finalize) + if (!eemi_ops->init_finalize) return -ENXIO; eemi_ops->init_finalize(); - eemi_ops->get_api_version(&pm_api_version); + zynqmp_pm_get_api_version(&pm_api_version); /* Check PM API version number */ if (pm_api_version < ZYNQMP_PM_VERSION) diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 8efa5ac22d7e..a21abcdb1020 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -294,7 +294,6 @@ struct zynqmp_pm_query_data { }; struct zynqmp_eemi_ops { - int (*get_api_version)(u32 *version); int (*get_chipid)(u32 *idcode, u32 *version); int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); @@ -331,11 +330,16 @@ int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, #if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE) const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void); +int zynqmp_pm_get_api_version(u32 *version); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { return ERR_PTR(-ENODEV); } +static inline int zynqmp_pm_get_api_version(u32 *version) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 21cd93bab92b2818c9391465123cd4be6431c69e Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:44 -0700 Subject: firmware: xilinx: Remove eemi ops for get_chipid Use direct function call instead of eemi ops for get_chipid. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-3-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 4 ++-- drivers/nvmem/zynqmp_nvmem.c | 11 +---------- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 3 files changed, 8 insertions(+), 13 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 36dab68344df..36ab9ac1729a 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -247,7 +247,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_get_api_version); * Return: Returns the status of the operation and the idcode and version * registers in @idcode and @version. */ -static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) +int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -261,6 +261,7 @@ static int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_get_chipid); /** * zynqmp_pm_get_trustzone_version() - Get secure trustzone firmware version @@ -735,7 +736,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .get_chipid = zynqmp_pm_get_chipid, .query_data = zynqmp_pm_query_data, .clock_enable = zynqmp_pm_clock_enable, .clock_disable = zynqmp_pm_clock_disable, diff --git a/drivers/nvmem/zynqmp_nvmem.c b/drivers/nvmem/zynqmp_nvmem.c index 5893543918c8..e28d7b133e11 100644 --- a/drivers/nvmem/zynqmp_nvmem.c +++ b/drivers/nvmem/zynqmp_nvmem.c @@ -16,8 +16,6 @@ struct zynqmp_nvmem_data { struct nvmem_device *nvmem; }; -static const struct zynqmp_eemi_ops *eemi_ops; - static int zynqmp_nvmem_read(void *context, unsigned int offset, void *val, size_t bytes) { @@ -25,10 +23,7 @@ static int zynqmp_nvmem_read(void *context, unsigned int offset, int idcode, version; struct zynqmp_nvmem_data *priv = context; - if (!eemi_ops->get_chipid) - return -ENXIO; - - ret = eemi_ops->get_chipid(&idcode, &version); + ret = zynqmp_pm_get_chipid(&idcode, &version); if (ret < 0) return ret; @@ -61,10 +56,6 @@ static int zynqmp_nvmem_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - eemi_ops = zynqmp_pm_get_eemi_ops(); - if (IS_ERR(eemi_ops)) - return PTR_ERR(eemi_ops); - priv->dev = dev; econfig.dev = dev; econfig.reg_read = zynqmp_nvmem_read; diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index a21abcdb1020..89f6a5394a65 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -294,7 +294,6 @@ struct zynqmp_pm_query_data { }; struct zynqmp_eemi_ops { - int (*get_chipid)(u32 *idcode, u32 *version); int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out); @@ -331,6 +330,7 @@ int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, #if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE) const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void); int zynqmp_pm_get_api_version(u32 *version); +int zynqmp_pm_get_chipid(u32 *idcode, u32 *version); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -340,6 +340,10 @@ static inline int zynqmp_pm_get_api_version(u32 *version) { return -ENODEV; } +static inline int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 6366c1bac3149c63752c03ea1c731d461d5349a7 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:45 -0700 Subject: firmware: xilinx: Remove eemi ops for query_data Use direct function call for query_data instead of using eemi ops. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-4-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/clk/zynqmp/clkc.c | 17 ++++++----------- drivers/clk/zynqmp/divider.c | 3 +-- drivers/firmware/xilinx/zynqmp-debug.c | 3 +-- drivers/firmware/xilinx/zynqmp.c | 4 ++-- include/linux/firmware/xlnx-zynqmp.h | 7 ++++++- 5 files changed, 16 insertions(+), 18 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/clk/zynqmp/clkc.c b/drivers/clk/zynqmp/clkc.c index 10e89f23880b..5eed5ce10179 100644 --- a/drivers/clk/zynqmp/clkc.c +++ b/drivers/clk/zynqmp/clkc.c @@ -134,7 +134,6 @@ static struct clk_hw *(* const clk_topology[]) (const char *name, u32 clk_id, static struct zynqmp_clock *clock; static struct clk_hw_onecell_data *zynqmp_data; static unsigned int clock_max_idx; -static const struct zynqmp_eemi_ops *eemi_ops; /** * zynqmp_is_valid_clock() - Check whether clock is valid or not @@ -206,7 +205,7 @@ static int zynqmp_pm_clock_get_num_clocks(u32 *nclocks) qdata.qid = PM_QID_CLOCK_GET_NUM_CLOCKS; - ret = eemi_ops->query_data(qdata, ret_payload); + ret = zynqmp_pm_query_data(qdata, ret_payload); *nclocks = ret_payload[1]; return ret; @@ -231,7 +230,7 @@ static int zynqmp_pm_clock_get_name(u32 clock_id, qdata.qid = PM_QID_CLOCK_GET_NAME; qdata.arg1 = clock_id; - eemi_ops->query_data(qdata, ret_payload); + zynqmp_pm_query_data(qdata, ret_payload); memcpy(response, ret_payload, sizeof(*response)); return 0; @@ -265,7 +264,7 @@ static int zynqmp_pm_clock_get_topology(u32 clock_id, u32 index, qdata.arg1 = clock_id; qdata.arg2 = index; - ret = eemi_ops->query_data(qdata, ret_payload); + ret = zynqmp_pm_query_data(qdata, ret_payload); memcpy(response, &ret_payload[1], sizeof(*response)); return ret; @@ -296,7 +295,7 @@ struct clk_hw *zynqmp_clk_register_fixed_factor(const char *name, u32 clk_id, qdata.qid = PM_QID_CLOCK_GET_FIXEDFACTOR_PARAMS; qdata.arg1 = clk_id; - ret = eemi_ops->query_data(qdata, ret_payload); + ret = zynqmp_pm_query_data(qdata, ret_payload); if (ret) return ERR_PTR(ret); @@ -339,7 +338,7 @@ static int zynqmp_pm_clock_get_parents(u32 clock_id, u32 index, qdata.arg1 = clock_id; qdata.arg2 = index; - ret = eemi_ops->query_data(qdata, ret_payload); + ret = zynqmp_pm_query_data(qdata, ret_payload); memcpy(response, &ret_payload[1], sizeof(*response)); return ret; @@ -364,7 +363,7 @@ static int zynqmp_pm_clock_get_attributes(u32 clock_id, qdata.qid = PM_QID_CLOCK_GET_ATTRIBUTES; qdata.arg1 = clock_id; - ret = eemi_ops->query_data(qdata, ret_payload); + ret = zynqmp_pm_query_data(qdata, ret_payload); memcpy(response, &ret_payload[1], sizeof(*response)); return ret; @@ -738,10 +737,6 @@ static int zynqmp_clock_probe(struct platform_device *pdev) int ret; struct device *dev = &pdev->dev; - eemi_ops = zynqmp_pm_get_eemi_ops(); - if (IS_ERR(eemi_ops)) - return PTR_ERR(eemi_ops); - ret = zynqmp_clk_setup(dev->of_node); return ret; diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c index 4be2cc76aa2e..e21f4ea421f5 100644 --- a/drivers/clk/zynqmp/divider.c +++ b/drivers/clk/zynqmp/divider.c @@ -258,7 +258,6 @@ static const struct clk_ops zynqmp_clk_divider_ops = { */ u32 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type) { - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); struct zynqmp_pm_query_data qdata = {0}; u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -266,7 +265,7 @@ u32 zynqmp_clk_get_max_divisor(u32 clk_id, u32 type) qdata.qid = PM_QID_CLOCK_GET_MAX_DIVISOR; qdata.arg1 = clk_id; qdata.arg2 = type; - ret = eemi_ops->query_data(qdata, ret_payload); + ret = zynqmp_pm_query_data(qdata, ret_payload); /* * To maintain backward compatibility return maximum possible value * (0xFFFF) if query for max divisor is not successful. diff --git a/drivers/firmware/xilinx/zynqmp-debug.c b/drivers/firmware/xilinx/zynqmp-debug.c index 06a21efe6829..99606b34975e 100644 --- a/drivers/firmware/xilinx/zynqmp-debug.c +++ b/drivers/firmware/xilinx/zynqmp-debug.c @@ -85,7 +85,6 @@ static int get_pm_api_id(char *pm_api_req, u32 *pm_id) static int process_api_request(u32 pm_id, u64 *pm_api_arg, u32 *pm_api_ret) { - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); u32 pm_api_version; int ret; struct zynqmp_pm_query_data qdata = {0}; @@ -102,7 +101,7 @@ static int process_api_request(u32 pm_id, u64 *pm_api_arg, u32 *pm_api_ret) qdata.arg2 = pm_api_arg[2]; qdata.arg3 = pm_api_arg[3]; - ret = eemi_ops->query_data(qdata, pm_api_ret); + ret = zynqmp_pm_query_data(qdata, pm_api_ret); if (ret) break; diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 36ab9ac1729a..3fbab2947c3b 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -326,7 +326,7 @@ static int get_set_conduit_method(struct device_node *np) * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) +int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) { int ret; @@ -340,6 +340,7 @@ static int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out) */ return qdata.qid == PM_QID_CLOCK_GET_NAME ? 0 : ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); /** * zynqmp_pm_clock_enable() - Enable the clock for given id @@ -736,7 +737,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .query_data = zynqmp_pm_query_data, .clock_enable = zynqmp_pm_clock_enable, .clock_disable = zynqmp_pm_clock_disable, .clock_getstate = zynqmp_pm_clock_getstate, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 89f6a5394a65..fa1195c72976 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*query_data)(struct zynqmp_pm_query_data qdata, u32 *out); int (*clock_enable)(u32 clock_id); int (*clock_disable)(u32 clock_id); int (*clock_getstate)(u32 clock_id, u32 *state); @@ -331,6 +330,7 @@ int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void); int zynqmp_pm_get_api_version(u32 *version); int zynqmp_pm_get_chipid(u32 *idcode, u32 *version); +int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -344,6 +344,11 @@ static inline int zynqmp_pm_get_chipid(u32 *idcode, u32 *version) { return -ENODEV; } +static inline int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, + u32 *out) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 3637e84cd2e910f84835fac9650316dce53218ef Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:46 -0700 Subject: firmware: xilinx: Remove eemi ops for clock_enable Use direct function call for clock_enable instead of eemi ops. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-5-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/clk/zynqmp/clk-gate-zynqmp.c | 2 +- drivers/clk/zynqmp/pll.c | 3 +-- drivers/firmware/xilinx/zynqmp.c | 4 ++-- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 4 files changed, 9 insertions(+), 6 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/clk/zynqmp/clk-gate-zynqmp.c b/drivers/clk/zynqmp/clk-gate-zynqmp.c index 83b236f20fff..437b921f33b7 100644 --- a/drivers/clk/zynqmp/clk-gate-zynqmp.c +++ b/drivers/clk/zynqmp/clk-gate-zynqmp.c @@ -39,7 +39,7 @@ static int zynqmp_clk_gate_enable(struct clk_hw *hw) int ret; const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_enable(clk_id); + ret = zynqmp_pm_clock_enable(clk_id); if (ret) pr_warn_once("%s() clock enabled failed for %s, ret = %d\n", diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index 89b599530105..153aa6720619 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -246,12 +246,11 @@ static int zynqmp_pll_enable(struct clk_hw *hw) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = clk->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); if (zynqmp_pll_is_enabled(hw)) return 0; - ret = eemi_ops->clock_enable(clk_id); + ret = zynqmp_pm_clock_enable(clk_id); if (ret) pr_warn_once("%s() clock enable failed for %s, ret = %d\n", __func__, clk_name, ret); diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 3fbab2947c3b..da13627c1ca1 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -351,10 +351,11 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_query_data); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_enable(u32 clock_id) +int zynqmp_pm_clock_enable(u32 clock_id) { return zynqmp_pm_invoke_fn(PM_CLOCK_ENABLE, clock_id, 0, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); /** * zynqmp_pm_clock_disable() - Disable the clock for given id @@ -737,7 +738,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_enable = zynqmp_pm_clock_enable, .clock_disable = zynqmp_pm_clock_disable, .clock_getstate = zynqmp_pm_clock_getstate, .clock_setdivider = zynqmp_pm_clock_setdivider, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index fa1195c72976..77365d1d246c 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_enable)(u32 clock_id); int (*clock_disable)(u32 clock_id); int (*clock_getstate)(u32 clock_id, u32 *state); int (*clock_setdivider)(u32 clock_id, u32 divider); @@ -331,6 +330,7 @@ const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void); int zynqmp_pm_get_api_version(u32 *version); int zynqmp_pm_get_chipid(u32 *idcode, u32 *version); int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out); +int zynqmp_pm_clock_enable(u32 clock_id); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -349,6 +349,10 @@ static inline int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, { return -ENODEV; } +static inline int zynqmp_pm_clock_enable(u32 clock_id) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From f5ccd54b67b3f029de9d3818efa70f210d189019 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:47 -0700 Subject: firmware: xilinx: Remove eemi ops for clock_disable Use direct function call for clock_disable instead using of eemi ops. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-6-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/clk/zynqmp/clk-gate-zynqmp.c | 4 +--- drivers/clk/zynqmp/pll.c | 3 +-- drivers/firmware/xilinx/zynqmp.c | 4 ++-- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 4 files changed, 9 insertions(+), 8 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/clk/zynqmp/clk-gate-zynqmp.c b/drivers/clk/zynqmp/clk-gate-zynqmp.c index 437b921f33b7..11f1b9718c3d 100644 --- a/drivers/clk/zynqmp/clk-gate-zynqmp.c +++ b/drivers/clk/zynqmp/clk-gate-zynqmp.c @@ -37,7 +37,6 @@ static int zynqmp_clk_gate_enable(struct clk_hw *hw) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = gate->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); ret = zynqmp_pm_clock_enable(clk_id); @@ -58,9 +57,8 @@ static void zynqmp_clk_gate_disable(struct clk_hw *hw) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = gate->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_disable(clk_id); + ret = zynqmp_pm_clock_disable(clk_id); if (ret) pr_warn_once("%s() clock disable failed for %s, ret = %d\n", diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index 153aa6720619..38b8dbc693f4 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -268,12 +268,11 @@ static void zynqmp_pll_disable(struct clk_hw *hw) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = clk->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); if (!zynqmp_pll_is_enabled(hw)) return; - ret = eemi_ops->clock_disable(clk_id); + ret = zynqmp_pm_clock_disable(clk_id); if (ret) pr_warn_once("%s() clock disable failed for %s, ret = %d\n", __func__, clk_name, ret); diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index da13627c1ca1..d884805b7d6b 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -366,10 +366,11 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_enable); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_disable(u32 clock_id) +int zynqmp_pm_clock_disable(u32 clock_id) { return zynqmp_pm_invoke_fn(PM_CLOCK_DISABLE, clock_id, 0, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); /** * zynqmp_pm_clock_getstate() - Get the clock state for given id @@ -738,7 +739,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_disable = zynqmp_pm_clock_disable, .clock_getstate = zynqmp_pm_clock_getstate, .clock_setdivider = zynqmp_pm_clock_setdivider, .clock_getdivider = zynqmp_pm_clock_getdivider, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 77365d1d246c..f9a84d974b5c 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_disable)(u32 clock_id); int (*clock_getstate)(u32 clock_id, u32 *state); int (*clock_setdivider)(u32 clock_id, u32 divider); int (*clock_getdivider)(u32 clock_id, u32 *divider); @@ -331,6 +330,7 @@ int zynqmp_pm_get_api_version(u32 *version); int zynqmp_pm_get_chipid(u32 *idcode, u32 *version); int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out); int zynqmp_pm_clock_enable(u32 clock_id); +int zynqmp_pm_clock_disable(u32 clock_id); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -353,6 +353,10 @@ static inline int zynqmp_pm_clock_enable(u32 clock_id) { return -ENODEV; } +static inline int zynqmp_pm_clock_disable(u32 clock_id) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 5e76731dd370ca3217fceaa3e2e84e992e6b7b7f Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:48 -0700 Subject: firmware: xilinx: Remove eemi ops for clock_getstate Use direct function call instead of eemi ops for clock_getstate. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-7-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/clk/zynqmp/clk-gate-zynqmp.c | 3 +-- drivers/clk/zynqmp/pll.c | 3 +-- drivers/firmware/xilinx/zynqmp.c | 4 ++-- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 4 files changed, 9 insertions(+), 7 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/clk/zynqmp/clk-gate-zynqmp.c b/drivers/clk/zynqmp/clk-gate-zynqmp.c index 11f1b9718c3d..10c9b889324f 100644 --- a/drivers/clk/zynqmp/clk-gate-zynqmp.c +++ b/drivers/clk/zynqmp/clk-gate-zynqmp.c @@ -77,9 +77,8 @@ static int zynqmp_clk_gate_is_enabled(struct clk_hw *hw) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = gate->clk_id; int state, ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_getstate(clk_id, &state); + ret = zynqmp_pm_clock_getstate(clk_id, &state); if (ret) { pr_warn_once("%s() clock get state failed for %s, ret = %d\n", __func__, clk_name, ret); diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index 38b8dbc693f4..41f376aad801 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -222,9 +222,8 @@ static int zynqmp_pll_is_enabled(struct clk_hw *hw) u32 clk_id = clk->clk_id; unsigned int state; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_getstate(clk_id, &state); + ret = zynqmp_pm_clock_getstate(clk_id, &state); if (ret) { pr_warn_once("%s() clock get state failed for %s, ret = %d\n", __func__, clk_name, ret); diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index d884805b7d6b..c11b528f4a37 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -382,7 +382,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_disable); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) +int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -393,6 +393,7 @@ static int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); /** * zynqmp_pm_clock_setdivider() - Set the clock divider for given id @@ -739,7 +740,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_getstate = zynqmp_pm_clock_getstate, .clock_setdivider = zynqmp_pm_clock_setdivider, .clock_getdivider = zynqmp_pm_clock_getdivider, .clock_setrate = zynqmp_pm_clock_setrate, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index f9a84d974b5c..e874f0c5e7ab 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_getstate)(u32 clock_id, u32 *state); int (*clock_setdivider)(u32 clock_id, u32 divider); int (*clock_getdivider)(u32 clock_id, u32 *divider); int (*clock_setrate)(u32 clock_id, u64 rate); @@ -331,6 +330,7 @@ int zynqmp_pm_get_chipid(u32 *idcode, u32 *version); int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out); int zynqmp_pm_clock_enable(u32 clock_id); int zynqmp_pm_clock_disable(u32 clock_id); +int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -357,6 +357,10 @@ static inline int zynqmp_pm_clock_disable(u32 clock_id) { return -ENODEV; } +static inline int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From fc9fb8fb985c092f9cf01c7c50269c132efc4d58 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:49 -0700 Subject: firmware: xilinx: Remove eemi ops for clock_setdivider Use direct function call instead of using eemi ops for clock_setdivider. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-8-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/clk/zynqmp/divider.c | 3 +-- drivers/clk/zynqmp/pll.c | 4 ++-- drivers/firmware/xilinx/zynqmp.c | 4 ++-- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 4 files changed, 10 insertions(+), 7 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c index e21f4ea421f5..13041cd93968 100644 --- a/drivers/clk/zynqmp/divider.c +++ b/drivers/clk/zynqmp/divider.c @@ -219,7 +219,6 @@ static int zynqmp_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, u32 div_type = divider->div_type; u32 value, div; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); value = zynqmp_divider_get_val(parent_rate, rate, divider->flags); if (div_type == TYPE_DIV1) { @@ -233,7 +232,7 @@ static int zynqmp_clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) div = __ffs(div); - ret = eemi_ops->clock_setdivider(clk_id, div); + ret = zynqmp_pm_clock_setdivider(clk_id, div); if (ret) pr_warn_once("%s() set divider failed for %s, ret = %d\n", diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index 41f376aad801..95fad06eb542 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -187,7 +187,7 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate, rate = parent_rate * m; frac = (parent_rate * f) / FRAC_DIV; - ret = eemi_ops->clock_setdivider(clk_id, m); + ret = zynqmp_pm_clock_setdivider(clk_id, m); if (ret == -EUSERS) WARN(1, "More than allowed devices are using the %s, which is forbidden\n", clk_name); @@ -201,7 +201,7 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate, fbdiv = DIV_ROUND_CLOSEST(rate, parent_rate); fbdiv = clamp_t(u32, fbdiv, PLL_FBDIV_MIN, PLL_FBDIV_MAX); - ret = eemi_ops->clock_setdivider(clk_id, fbdiv); + ret = zynqmp_pm_clock_setdivider(clk_id, fbdiv); if (ret) pr_warn_once("%s() set divider failed for %s, ret = %d\n", __func__, clk_name, ret); diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index c11b528f4a37..ef2412dc7d9f 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -405,11 +405,12 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getstate); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) +int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) { return zynqmp_pm_invoke_fn(PM_CLOCK_SETDIVIDER, clock_id, divider, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); /** * zynqmp_pm_clock_getdivider() - Get the clock divider for given id @@ -740,7 +741,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_setdivider = zynqmp_pm_clock_setdivider, .clock_getdivider = zynqmp_pm_clock_getdivider, .clock_setrate = zynqmp_pm_clock_setrate, .clock_getrate = zynqmp_pm_clock_getrate, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index e874f0c5e7ab..023f1f9807ed 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_setdivider)(u32 clock_id, u32 divider); int (*clock_getdivider)(u32 clock_id, u32 *divider); int (*clock_setrate)(u32 clock_id, u64 rate); int (*clock_getrate)(u32 clock_id, u64 *rate); @@ -331,6 +330,7 @@ int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out); int zynqmp_pm_clock_enable(u32 clock_id); int zynqmp_pm_clock_disable(u32 clock_id); int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state); +int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -361,6 +361,10 @@ static inline int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state) { return -ENODEV; } +static inline int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 0667a8d144bc830d0a752f079c9789735cd4f1f8 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:50 -0700 Subject: firmware: xilinx: Remove eemi ops for clock_getdivider Use direct function call instead of using eemi ops for clock_getdivider. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-9-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/clk/zynqmp/divider.c | 6 ++---- drivers/clk/zynqmp/pll.c | 2 +- drivers/firmware/xilinx/zynqmp.c | 4 ++-- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 4 files changed, 10 insertions(+), 8 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/clk/zynqmp/divider.c b/drivers/clk/zynqmp/divider.c index 13041cd93968..8eed715707e3 100644 --- a/drivers/clk/zynqmp/divider.c +++ b/drivers/clk/zynqmp/divider.c @@ -83,9 +83,8 @@ static unsigned long zynqmp_clk_divider_recalc_rate(struct clk_hw *hw, u32 div_type = divider->div_type; u32 div, value; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_getdivider(clk_id, &div); + ret = zynqmp_pm_clock_getdivider(clk_id, &div); if (ret) pr_warn_once("%s() get divider failed for %s, ret = %d\n", @@ -163,11 +162,10 @@ static long zynqmp_clk_divider_round_rate(struct clk_hw *hw, u32 div_type = divider->div_type; u32 bestdiv; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); /* if read only, just return current value */ if (divider->flags & CLK_DIVIDER_READ_ONLY) { - ret = eemi_ops->clock_getdivider(clk_id, &bestdiv); + ret = zynqmp_pm_clock_getdivider(clk_id, &bestdiv); if (ret) pr_warn_once("%s() get divider failed for %s, ret = %d\n", diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index 95fad06eb542..73fb5bb8eb55 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -141,7 +141,7 @@ static unsigned long zynqmp_pll_recalc_rate(struct clk_hw *hw, int ret; const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_getdivider(clk_id, &fbdiv); + ret = zynqmp_pm_clock_getdivider(clk_id, &fbdiv); if (ret) pr_warn_once("%s() get divider failed for %s, ret = %d\n", __func__, clk_name, ret); diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index ef2412dc7d9f..5782b5c3bf9e 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -422,7 +422,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setdivider); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) +int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -433,6 +433,7 @@ static int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider); /** * zynqmp_pm_clock_setrate() - Set the clock rate for given id @@ -741,7 +742,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_getdivider = zynqmp_pm_clock_getdivider, .clock_setrate = zynqmp_pm_clock_setrate, .clock_getrate = zynqmp_pm_clock_getrate, .clock_setparent = zynqmp_pm_clock_setparent, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 023f1f9807ed..3bda22f5262b 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_getdivider)(u32 clock_id, u32 *divider); int (*clock_setrate)(u32 clock_id, u64 rate); int (*clock_getrate)(u32 clock_id, u64 *rate); int (*clock_setparent)(u32 clock_id, u32 parent_id); @@ -331,6 +330,7 @@ int zynqmp_pm_clock_enable(u32 clock_id); int zynqmp_pm_clock_disable(u32 clock_id); int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state); int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider); +int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -365,6 +365,10 @@ static inline int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider) { return -ENODEV; } +static inline int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 7a1e10621a215dad4727aaa82396c4c19ce6593f Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:51 -0700 Subject: firmware: xilinx: Remove eemi ops for clock set/get rate Use direct function call instead of eemi ops for clock set/get rate. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-10-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 8 ++++---- include/linux/firmware/xlnx-zynqmp.h | 12 ++++++++++-- 2 files changed, 14 insertions(+), 6 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 5782b5c3bf9e..84622014601e 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -444,13 +444,14 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getdivider); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) +int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) { return zynqmp_pm_invoke_fn(PM_CLOCK_SETRATE, clock_id, lower_32_bits(rate), upper_32_bits(rate), 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setrate); /** * zynqmp_pm_clock_getrate() - Get the clock rate for given id @@ -462,7 +463,7 @@ static int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) +int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -473,6 +474,7 @@ static int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); /** * zynqmp_pm_clock_setparent() - Set the clock parent for given id @@ -742,8 +744,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_setrate = zynqmp_pm_clock_setrate, - .clock_getrate = zynqmp_pm_clock_getrate, .clock_setparent = zynqmp_pm_clock_setparent, .clock_getparent = zynqmp_pm_clock_getparent, .ioctl = zynqmp_pm_ioctl, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 3bda22f5262b..a71f52c6173e 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,8 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_setrate)(u32 clock_id, u64 rate); - int (*clock_getrate)(u32 clock_id, u64 *rate); int (*clock_setparent)(u32 clock_id, u32 parent_id); int (*clock_getparent)(u32 clock_id, u32 *parent_id); int (*ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 *out); @@ -331,6 +329,8 @@ int zynqmp_pm_clock_disable(u32 clock_id); int zynqmp_pm_clock_getstate(u32 clock_id, u32 *state); int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider); int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider); +int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate); +int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -369,6 +369,14 @@ static inline int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider) { return -ENODEV; } +static inline int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate) +{ + return -ENODEV; +} +static inline int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 70c0d36462ca5be8fc05176d11bec832dbb355b2 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:52 -0700 Subject: firmware: xilinx: Remove eemi ops for clock set/get parent Use direct function call instead of eemi ops for clock set/get parent. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-11-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/clk/zynqmp/clk-mux-zynqmp.c | 6 ++---- drivers/firmware/xilinx/zynqmp.c | 8 ++++---- include/linux/firmware/xlnx-zynqmp.h | 12 ++++++++++-- 3 files changed, 16 insertions(+), 10 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/clk/zynqmp/clk-mux-zynqmp.c b/drivers/clk/zynqmp/clk-mux-zynqmp.c index 0af8f74c5fa5..06194149be83 100644 --- a/drivers/clk/zynqmp/clk-mux-zynqmp.c +++ b/drivers/clk/zynqmp/clk-mux-zynqmp.c @@ -47,9 +47,8 @@ static u8 zynqmp_clk_mux_get_parent(struct clk_hw *hw) u32 clk_id = mux->clk_id; u32 val; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_getparent(clk_id, &val); + ret = zynqmp_pm_clock_getparent(clk_id, &val); if (ret) pr_warn_once("%s() getparent failed for clock: %s, ret = %d\n", @@ -71,9 +70,8 @@ static int zynqmp_clk_mux_set_parent(struct clk_hw *hw, u8 index) const char *clk_name = clk_hw_get_name(hw); u32 clk_id = mux->clk_id; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->clock_setparent(clk_id, index); + ret = zynqmp_pm_clock_setparent(clk_id, index); if (ret) pr_warn_once("%s() set parent failed for clock: %s, ret = %d\n", diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 84622014601e..b0aa967d9b7c 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -485,11 +485,12 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getrate); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) +int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) { return zynqmp_pm_invoke_fn(PM_CLOCK_SETPARENT, clock_id, parent_id, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_setparent); /** * zynqmp_pm_clock_getparent() - Get the clock parent for given id @@ -501,7 +502,7 @@ static int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) +int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -512,6 +513,7 @@ static int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); /** * zynqmp_is_valid_ioctl() - Check whether IOCTL ID is valid or not @@ -744,8 +746,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .clock_setparent = zynqmp_pm_clock_setparent, - .clock_getparent = zynqmp_pm_clock_getparent, .ioctl = zynqmp_pm_ioctl, .reset_assert = zynqmp_pm_reset_assert, .reset_get_status = zynqmp_pm_reset_get_status, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index a71f52c6173e..7abb68311f17 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,8 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*clock_setparent)(u32 clock_id, u32 parent_id); - int (*clock_getparent)(u32 clock_id, u32 *parent_id); int (*ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 *out); int (*reset_assert)(const enum zynqmp_pm_reset reset, const enum zynqmp_pm_reset_action assert_flag); @@ -331,6 +329,8 @@ int zynqmp_pm_clock_setdivider(u32 clock_id, u32 divider); int zynqmp_pm_clock_getdivider(u32 clock_id, u32 *divider); int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate); int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate); +int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id); +int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -377,6 +377,14 @@ static inline int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate) { return -ENODEV; } +static inline int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id) +{ + return -ENODEV; +} +static inline int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 426c8d85df7a7b8337e09eab2806e802311778fd Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:53 -0700 Subject: firmware: xilinx: Use APIs instead of IOCTLs Remove IOCTL API and use individual APIs for better readability. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-12-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/clk/zynqmp/pll.c | 14 ++--- drivers/firmware/xilinx/zynqmp.c | 118 ++++++++++++++++++++++++++--------- drivers/mmc/host/sdhci-of-arasan.c | 38 +---------- include/linux/firmware/xlnx-zynqmp.h | 31 ++++++++- 4 files changed, 126 insertions(+), 75 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/clk/zynqmp/pll.c b/drivers/clk/zynqmp/pll.c index 73fb5bb8eb55..92f449ed38e5 100644 --- a/drivers/clk/zynqmp/pll.c +++ b/drivers/clk/zynqmp/pll.c @@ -50,10 +50,8 @@ static inline enum pll_mode zynqmp_pll_get_mode(struct clk_hw *hw) const char *clk_name = clk_hw_get_name(hw); u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - ret = eemi_ops->ioctl(0, IOCTL_GET_PLL_FRAC_MODE, clk_id, 0, - ret_payload); + ret = zynqmp_pm_get_pll_frac_mode(clk_id, ret_payload); if (ret) pr_warn_once("%s() PLL get frac mode failed for %s, ret = %d\n", __func__, clk_name, ret); @@ -73,14 +71,13 @@ static inline void zynqmp_pll_set_mode(struct clk_hw *hw, bool on) const char *clk_name = clk_hw_get_name(hw); int ret; u32 mode; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); if (on) mode = PLL_MODE_FRAC; else mode = PLL_MODE_INT; - ret = eemi_ops->ioctl(0, IOCTL_SET_PLL_FRAC_MODE, clk_id, mode, NULL); + ret = zynqmp_pm_set_pll_frac_mode(clk_id, mode); if (ret) pr_warn_once("%s() PLL set frac mode failed for %s, ret = %d\n", __func__, clk_name, ret); @@ -139,7 +136,6 @@ static unsigned long zynqmp_pll_recalc_rate(struct clk_hw *hw, unsigned long rate, frac; u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); ret = zynqmp_pm_clock_getdivider(clk_id, &fbdiv); if (ret) @@ -148,8 +144,7 @@ static unsigned long zynqmp_pll_recalc_rate(struct clk_hw *hw, rate = parent_rate * fbdiv; if (zynqmp_pll_get_mode(hw) == PLL_MODE_FRAC) { - eemi_ops->ioctl(0, IOCTL_GET_PLL_FRAC_DATA, clk_id, 0, - ret_payload); + zynqmp_pm_get_pll_frac_data(clk_id, ret_payload); data = ret_payload[1]; frac = (parent_rate * data) / FRAC_DIV; rate = rate + frac; @@ -177,7 +172,6 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate, u32 fbdiv; long rate_div, frac, m, f; int ret; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); if (zynqmp_pll_get_mode(hw) == PLL_MODE_FRAC) { rate_div = (rate * FRAC_DIV) / parent_rate; @@ -194,7 +188,7 @@ static int zynqmp_pll_set_rate(struct clk_hw *hw, unsigned long rate, else if (ret) pr_warn_once("%s() set divider failed for %s, ret = %d\n", __func__, clk_name, ret); - eemi_ops->ioctl(0, IOCTL_SET_PLL_FRAC_DATA, clk_id, f, NULL); + zynqmp_pm_set_pll_frac_data(clk_id, f); return rate + frac; } diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index b0aa967d9b7c..94fd755b19c6 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -516,47 +516,108 @@ int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) EXPORT_SYMBOL_GPL(zynqmp_pm_clock_getparent); /** - * zynqmp_is_valid_ioctl() - Check whether IOCTL ID is valid or not - * @ioctl_id: IOCTL ID + * zynqmp_pm_set_pll_frac_mode() - PM API for set PLL mode * - * Return: 1 if IOCTL is valid else 0 + * @clk_id: PLL clock ID + * @mode: PLL mode (PLL_MODE_FRAC/PLL_MODE_INT) + * + * This function sets PLL mode + * + * Return: Returns status, either success or error+reason */ -static inline int zynqmp_is_valid_ioctl(u32 ioctl_id) +int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) { - switch (ioctl_id) { - case IOCTL_SD_DLL_RESET: - case IOCTL_SET_SD_TAPDELAY: - case IOCTL_SET_PLL_FRAC_MODE: - case IOCTL_GET_PLL_FRAC_MODE: - case IOCTL_SET_PLL_FRAC_DATA: - case IOCTL_GET_PLL_FRAC_DATA: - return 1; - default: - return 0; - } + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_MODE, + clk_id, mode, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_mode); /** - * zynqmp_pm_ioctl() - PM IOCTL API for device control and configs - * @node_id: Node ID of the device - * @ioctl_id: ID of the requested IOCTL - * @arg1: Argument 1 to requested IOCTL call - * @arg2: Argument 2 to requested IOCTL call - * @out: Returned output value + * zynqmp_pm_get_pll_frac_mode() - PM API for get PLL mode + * + * @clk_id: PLL clock ID + * @mode: PLL mode * - * This function calls IOCTL to firmware for device control and configuration. + * This function return current PLL mode * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_ioctl(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, - u32 *out) +int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) { - if (!zynqmp_is_valid_ioctl(ioctl_id)) - return -EINVAL; + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_MODE, + clk_id, 0, mode); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_mode); + +/** + * zynqmp_pm_set_pll_frac_data() - PM API for setting pll fraction data + * + * @clk_id: PLL clock ID + * @data: fraction data + * + * This function sets fraction data. + * It is valid for fraction mode only. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_PLL_FRAC_DATA, + clk_id, data, NULL); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_set_pll_frac_data); + +/** + * zynqmp_pm_get_pll_frac_data() - PM API for getting pll fraction data + * + * @clk_id: PLL clock ID + * @data: fraction data + * + * This function returns fraction data value. + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_GET_PLL_FRAC_DATA, + clk_id, 0, data); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_get_pll_frac_data); - return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, ioctl_id, - arg1, arg2, out); +/** + * zynqmp_pm_set_sd_tapdelay() - Set tap delay for the SD device + * + * @node_id Node ID of the device + * @type Type of tap delay to set (input/output) + * @value Value to set fot the tap delay + * + * This function sets input/output tap delay for the SD device. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, + type, value, NULL); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); + +/** + * zynqmp_pm_sd_dll_reset() - Reset DLL logic + * + * @node_id Node ID of the device + * @type Reset type + * + * This function resets DLL logic for the SD device. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, node_id, IOCTL_SET_SD_TAPDELAY, + type, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); /** * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) @@ -746,7 +807,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .ioctl = zynqmp_pm_ioctl, .reset_assert = zynqmp_pm_reset_assert, .reset_get_status = zynqmp_pm_reset_get_status, .init_finalize = zynqmp_pm_init_finalize, diff --git a/drivers/mmc/host/sdhci-of-arasan.c b/drivers/mmc/host/sdhci-of-arasan.c index d4905c106c06..d01f76223387 100644 --- a/drivers/mmc/host/sdhci-of-arasan.c +++ b/drivers/mmc/host/sdhci-of-arasan.c @@ -98,10 +98,6 @@ struct sdhci_arasan_clk_data { void *clk_of_data; }; -struct sdhci_arasan_zynqmp_clk_data { - const struct zynqmp_eemi_ops *eemi_ops; -}; - /** * struct sdhci_arasan_data * @host: Pointer to the main SDHCI host structure. @@ -630,9 +626,6 @@ static int sdhci_zynqmp_sdcardclk_set_phase(struct clk_hw *hw, int degrees) struct sdhci_arasan_data *sdhci_arasan = container_of(clk_data, struct sdhci_arasan_data, clk_data); struct sdhci_host *host = sdhci_arasan->host; - struct sdhci_arasan_zynqmp_clk_data *zynqmp_clk_data = - clk_data->clk_of_data; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_clk_data->eemi_ops; const char *clk_name = clk_hw_get_name(hw); u32 node_id = !strcmp(clk_name, "clk_out_sd0") ? NODE_SD_0 : NODE_SD_1; u8 tap_delay, tap_max = 0; @@ -672,8 +665,7 @@ static int sdhci_zynqmp_sdcardclk_set_phase(struct clk_hw *hw, int degrees) tap_delay = (degrees * tap_max) / 360; /* Set the Clock Phase */ - ret = eemi_ops->ioctl(node_id, IOCTL_SET_SD_TAPDELAY, - PM_TAPDELAY_OUTPUT, tap_delay, NULL); + ret = zynqmp_pm_set_sd_tapdelay(node_id, PM_TAPDELAY_OUTPUT, tap_delay); if (ret) pr_err("Error setting Output Tap Delay\n"); @@ -702,9 +694,6 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct clk_hw *hw, int degrees) struct sdhci_arasan_data *sdhci_arasan = container_of(clk_data, struct sdhci_arasan_data, clk_data); struct sdhci_host *host = sdhci_arasan->host; - struct sdhci_arasan_zynqmp_clk_data *zynqmp_clk_data = - clk_data->clk_of_data; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_clk_data->eemi_ops; const char *clk_name = clk_hw_get_name(hw); u32 node_id = !strcmp(clk_name, "clk_in_sd0") ? NODE_SD_0 : NODE_SD_1; u8 tap_delay, tap_max = 0; @@ -744,8 +733,7 @@ static int sdhci_zynqmp_sampleclk_set_phase(struct clk_hw *hw, int degrees) tap_delay = (degrees * tap_max) / 360; /* Set the Clock Phase */ - ret = eemi_ops->ioctl(node_id, IOCTL_SET_SD_TAPDELAY, - PM_TAPDELAY_INPUT, tap_delay, NULL); + ret = zynqmp_pm_set_sd_tapdelay(node_id, PM_TAPDELAY_INPUT, tap_delay); if (ret) pr_err("Error setting Input Tap Delay\n"); @@ -759,11 +747,6 @@ static const struct clk_ops zynqmp_sampleclk_ops = { static void arasan_zynqmp_dll_reset(struct sdhci_host *host, u32 deviceid) { - struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); - struct sdhci_arasan_data *sdhci_arasan = sdhci_pltfm_priv(pltfm_host); - struct sdhci_arasan_zynqmp_clk_data *zynqmp_clk_data = - sdhci_arasan->clk_data.clk_of_data; - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_clk_data->eemi_ops; u16 clk; clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); @@ -771,8 +754,7 @@ static void arasan_zynqmp_dll_reset(struct sdhci_host *host, u32 deviceid) sdhci_writew(host, clk, SDHCI_CLOCK_CONTROL); /* Issue DLL Reset */ - eemi_ops->ioctl(deviceid, IOCTL_SD_DLL_RESET, - PM_DLL_RESET_PULSE, 0, NULL); + zynqmp_pm_sd_dll_reset(deviceid, PM_DLL_RESET_PULSE); clk = sdhci_readw(host, SDHCI_CLOCK_CONTROL); @@ -1277,20 +1259,6 @@ static int sdhci_arasan_probe(struct platform_device *pdev) goto clk_disable_all; if (of_device_is_compatible(np, "xlnx,zynqmp-8.9a")) { - struct sdhci_arasan_zynqmp_clk_data *zynqmp_clk_data; - const struct zynqmp_eemi_ops *eemi_ops; - - zynqmp_clk_data = devm_kzalloc(&pdev->dev, - sizeof(*zynqmp_clk_data), - GFP_KERNEL); - eemi_ops = zynqmp_pm_get_eemi_ops(); - if (IS_ERR(eemi_ops)) { - ret = PTR_ERR(eemi_ops); - goto unreg_clk; - } - - zynqmp_clk_data->eemi_ops = eemi_ops; - sdhci_arasan->clk_data.clk_of_data = zynqmp_clk_data; host->mmc_host_ops.execute_tuning = arasan_zynqmp_execute_tuning; } diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 7abb68311f17..5aff8963c11a 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*ioctl)(u32 node_id, u32 ioctl_id, u32 arg1, u32 arg2, u32 *out); int (*reset_assert)(const enum zynqmp_pm_reset reset, const enum zynqmp_pm_reset_action assert_flag); int (*reset_get_status)(const enum zynqmp_pm_reset reset, u32 *status); @@ -331,6 +330,12 @@ int zynqmp_pm_clock_setrate(u32 clock_id, u64 rate); int zynqmp_pm_clock_getrate(u32 clock_id, u64 *rate); int zynqmp_pm_clock_setparent(u32 clock_id, u32 parent_id); int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id); +int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode); +int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode); +int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data); +int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data); +int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value); +int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -385,6 +390,30 @@ static inline int zynqmp_pm_clock_getparent(u32 clock_id, u32 *parent_id) { return -ENODEV; } +static inline int zynqmp_pm_set_pll_frac_mode(u32 clk_id, u32 mode) +{ + return -ENODEV; +} +static inline int zynqmp_pm_get_pll_frac_mode(u32 clk_id, u32 *mode) +{ + return -ENODEV; +} +static inline int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data) +{ + return -ENODEV; +} +static inline int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data) +{ + return -ENODEV; +} +static inline int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) +{ + return -ENODEV; +} +static inline int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From cf23ec3531462376ef48237235daea577e1194e7 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:54 -0700 Subject: firmware: xilinx: Remove eemi ops for reset_assert Use direct function call instead of using eemi ops for reset_assert. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-13-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 6 +++--- drivers/reset/reset-zynqmp.c | 18 ++++++------------ include/linux/firmware/xlnx-zynqmp.h | 9 +++++++-- 3 files changed, 16 insertions(+), 17 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 94fd755b19c6..2a790917ef8e 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -627,12 +627,13 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, - const enum zynqmp_pm_reset_action assert_flag) +int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, + const enum zynqmp_pm_reset_action assert_flag) { return zynqmp_pm_invoke_fn(PM_RESET_ASSERT, reset, assert_flag, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); /** * zynqmp_pm_reset_get_status - Get status of the reset @@ -807,7 +808,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .reset_assert = zynqmp_pm_reset_assert, .reset_get_status = zynqmp_pm_reset_get_status, .init_finalize = zynqmp_pm_init_finalize, .set_suspend_mode = zynqmp_pm_set_suspend_mode, diff --git a/drivers/reset/reset-zynqmp.c b/drivers/reset/reset-zynqmp.c index 0144075b11a6..4a01b7e94549 100644 --- a/drivers/reset/reset-zynqmp.c +++ b/drivers/reset/reset-zynqmp.c @@ -27,19 +27,15 @@ to_zynqmp_reset_data(struct reset_controller_dev *rcdev) static int zynqmp_reset_assert(struct reset_controller_dev *rcdev, unsigned long id) { - struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev); - - return priv->eemi_ops->reset_assert(ZYNQMP_RESET_ID + id, - PM_RESET_ACTION_ASSERT); + return zynqmp_pm_reset_assert(ZYNQMP_RESET_ID + id, + PM_RESET_ACTION_ASSERT); } static int zynqmp_reset_deassert(struct reset_controller_dev *rcdev, unsigned long id) { - struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev); - - return priv->eemi_ops->reset_assert(ZYNQMP_RESET_ID + id, - PM_RESET_ACTION_RELEASE); + return zynqmp_pm_reset_assert(ZYNQMP_RESET_ID + id, + PM_RESET_ACTION_RELEASE); } static int zynqmp_reset_status(struct reset_controller_dev *rcdev, @@ -58,10 +54,8 @@ static int zynqmp_reset_status(struct reset_controller_dev *rcdev, static int zynqmp_reset_reset(struct reset_controller_dev *rcdev, unsigned long id) { - struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev); - - return priv->eemi_ops->reset_assert(ZYNQMP_RESET_ID + id, - PM_RESET_ACTION_PULSE); + return zynqmp_pm_reset_assert(ZYNQMP_RESET_ID + id, + PM_RESET_ACTION_PULSE); } static const struct reset_control_ops zynqmp_reset_ops = { diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 5aff8963c11a..22b2bbe0faea 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,8 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*reset_assert)(const enum zynqmp_pm_reset reset, - const enum zynqmp_pm_reset_action assert_flag); int (*reset_get_status)(const enum zynqmp_pm_reset reset, u32 *status); int (*init_finalize)(void); int (*set_suspend_mode)(u32 mode); @@ -336,6 +334,8 @@ int zynqmp_pm_set_pll_frac_data(u32 clk_id, u32 data); int zynqmp_pm_get_pll_frac_data(u32 clk_id, u32 *data); int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value); int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type); +int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, + const enum zynqmp_pm_reset_action assert_flag); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -414,6 +414,11 @@ static inline int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) { return -ENODEV; } +static inline int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, + const enum zynqmp_pm_reset_action assert_flag) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 1b413581fe26404217a2160d444642440bb0e9e7 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:55 -0700 Subject: firmware: xilinx: Remove eemi ops for reset_get_status Use direct function call instead of using eemi ops for reset_get_status. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-14-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 5 ++--- drivers/reset/reset-zynqmp.c | 8 +------- include/linux/firmware/xlnx-zynqmp.h | 7 ++++++- 3 files changed, 9 insertions(+), 11 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 2a790917ef8e..4380853526eb 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -642,8 +642,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_reset_assert); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, - u32 *status) +int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -657,6 +656,7 @@ static int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status); /** * zynqmp_pm_fpga_load - Perform the fpga load @@ -808,7 +808,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .reset_get_status = zynqmp_pm_reset_get_status, .init_finalize = zynqmp_pm_init_finalize, .set_suspend_mode = zynqmp_pm_set_suspend_mode, .request_node = zynqmp_pm_request_node, diff --git a/drivers/reset/reset-zynqmp.c b/drivers/reset/reset-zynqmp.c index 4a01b7e94549..373ea8d4f7a1 100644 --- a/drivers/reset/reset-zynqmp.c +++ b/drivers/reset/reset-zynqmp.c @@ -15,7 +15,6 @@ struct zynqmp_reset_data { struct reset_controller_dev rcdev; - const struct zynqmp_eemi_ops *eemi_ops; }; static inline struct zynqmp_reset_data * @@ -41,10 +40,9 @@ static int zynqmp_reset_deassert(struct reset_controller_dev *rcdev, static int zynqmp_reset_status(struct reset_controller_dev *rcdev, unsigned long id) { - struct zynqmp_reset_data *priv = to_zynqmp_reset_data(rcdev); int val, err; - err = priv->eemi_ops->reset_get_status(ZYNQMP_RESET_ID + id, &val); + err = zynqmp_pm_reset_get_status(ZYNQMP_RESET_ID + id, &val); if (err) return err; @@ -73,10 +71,6 @@ static int zynqmp_reset_probe(struct platform_device *pdev) if (!priv) return -ENOMEM; - priv->eemi_ops = zynqmp_pm_get_eemi_ops(); - if (IS_ERR(priv->eemi_ops)) - return PTR_ERR(priv->eemi_ops); - platform_set_drvdata(pdev, priv); priv->rcdev.ops = &zynqmp_reset_ops; diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 22b2bbe0faea..200f9e0dc406 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*reset_get_status)(const enum zynqmp_pm_reset reset, u32 *status); int (*init_finalize)(void); int (*set_suspend_mode)(u32 mode); int (*request_node)(const u32 node, @@ -336,6 +335,7 @@ int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value); int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type); int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, const enum zynqmp_pm_reset_action assert_flag); +int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -419,6 +419,11 @@ static inline int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, { return -ENODEV; } +static inline int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, + u32 *status) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 9474da950d1e39f71cbfeaba87367fa146635a88 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:56 -0700 Subject: firmware: xilinx: Remove eemi ops for init_finalize Use direct function call instead of eemi ops for init_finalize. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-15-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 4 ++-- drivers/soc/xilinx/zynqmp_power.c | 9 +-------- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 3 files changed, 8 insertions(+), 11 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 4380853526eb..869366f3fbf7 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -710,10 +710,11 @@ static int zynqmp_pm_fpga_get_status(u32 *value) * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_init_finalize(void) +int zynqmp_pm_init_finalize(void) { return zynqmp_pm_invoke_fn(PM_PM_INIT_FINALIZE, 0, 0, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); /** * zynqmp_pm_set_suspend_mode() - Set system suspend mode @@ -808,7 +809,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .init_finalize = zynqmp_pm_init_finalize, .set_suspend_mode = zynqmp_pm_set_suspend_mode, .request_node = zynqmp_pm_request_node, .release_node = zynqmp_pm_release_node, diff --git a/drivers/soc/xilinx/zynqmp_power.c b/drivers/soc/xilinx/zynqmp_power.c index d327d9ef0e81..f4a937143098 100644 --- a/drivers/soc/xilinx/zynqmp_power.c +++ b/drivers/soc/xilinx/zynqmp_power.c @@ -182,14 +182,7 @@ static int zynqmp_pm_probe(struct platform_device *pdev) u32 pm_api_version; struct mbox_client *client; - eemi_ops = zynqmp_pm_get_eemi_ops(); - if (IS_ERR(eemi_ops)) - return PTR_ERR(eemi_ops); - - if (!eemi_ops->init_finalize) - return -ENXIO; - - eemi_ops->init_finalize(); + zynqmp_pm_init_finalize(); zynqmp_pm_get_api_version(&pm_api_version); /* Check PM API version number */ diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 200f9e0dc406..9aa5fe8acbea 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*init_finalize)(void); int (*set_suspend_mode)(u32 mode); int (*request_node)(const u32 node, const u32 capabilities, @@ -336,6 +335,7 @@ int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type); int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, const enum zynqmp_pm_reset_action assert_flag); int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status); +int zynqmp_pm_init_finalize(void); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -424,6 +424,10 @@ static inline int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, { return -ENODEV; } +static inline int zynqmp_pm_init_finalize(void) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 951d0a97e41caff96c180ca416093276bfd9a4fd Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:57 -0700 Subject: firmware: xilinx: Remove eemi ops for set_suspend_mode Use direct function call instead of eemi ops for set_suspend_mode. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-16-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 4 ++-- drivers/soc/xilinx/zynqmp_power.c | 6 +----- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 3 files changed, 8 insertions(+), 8 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 869366f3fbf7..cc74165b845b 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -724,10 +724,11 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_init_finalize); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_set_suspend_mode(u32 mode) +int zynqmp_pm_set_suspend_mode(u32 mode) { return zynqmp_pm_invoke_fn(PM_SET_SUSPEND_MODE, mode, 0, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); /** * zynqmp_pm_request_node() - Request a node with specific capabilities @@ -809,7 +810,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .set_suspend_mode = zynqmp_pm_set_suspend_mode, .request_node = zynqmp_pm_request_node, .release_node = zynqmp_pm_release_node, .set_requirement = zynqmp_pm_set_requirement, diff --git a/drivers/soc/xilinx/zynqmp_power.c b/drivers/soc/xilinx/zynqmp_power.c index f4a937143098..31ff49fcd078 100644 --- a/drivers/soc/xilinx/zynqmp_power.c +++ b/drivers/soc/xilinx/zynqmp_power.c @@ -30,7 +30,6 @@ struct zynqmp_pm_work_struct { static struct zynqmp_pm_work_struct *zynqmp_pm_init_suspend_work; static struct mbox_chan *rx_chan; -static const struct zynqmp_eemi_ops *eemi_ops; enum pm_suspend_mode { PM_SUSPEND_MODE_FIRST = 0, @@ -155,9 +154,6 @@ static ssize_t suspend_mode_store(struct device *dev, { int md, ret = -EINVAL; - if (!eemi_ops->set_suspend_mode) - return ret; - for (md = PM_SUSPEND_MODE_FIRST; md < ARRAY_SIZE(suspend_modes); md++) if (suspend_modes[md] && sysfs_streq(suspend_modes[md], buf)) { @@ -166,7 +162,7 @@ static ssize_t suspend_mode_store(struct device *dev, } if (!ret && md != suspend_mode) { - ret = eemi_ops->set_suspend_mode(md); + ret = zynqmp_pm_set_suspend_mode(md); if (likely(!ret)) suspend_mode = md; } diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 9aa5fe8acbea..761caede5a51 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*set_suspend_mode)(u32 mode); int (*request_node)(const u32 node, const u32 capabilities, const u32 qos, @@ -336,6 +335,7 @@ int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, const enum zynqmp_pm_reset_action assert_flag); int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status); int zynqmp_pm_init_finalize(void); +int zynqmp_pm_set_suspend_mode(u32 mode); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -428,6 +428,10 @@ static inline int zynqmp_pm_init_finalize(void) { return -ENODEV; } +static inline int zynqmp_pm_set_suspend_mode(u32 mode) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From bf8b27ed2324b5108439593dcfb9ab264a745ee7 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:58 -0700 Subject: firmware: xilinx: Remove eemi ops for request_node Use direct function call instead of using eemi ops for request_node. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-17-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 7 +++---- drivers/soc/xilinx/zynqmp_pm_domains.c | 5 +---- include/linux/firmware/xlnx-zynqmp.h | 12 ++++++++---- 3 files changed, 12 insertions(+), 12 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index cc74165b845b..e65ee76880ac 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -742,13 +742,13 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_suspend_mode); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_request_node(const u32 node, const u32 capabilities, - const u32 qos, - const enum zynqmp_pm_request_ack ack) +int zynqmp_pm_request_node(const u32 node, const u32 capabilities, + const u32 qos, const enum zynqmp_pm_request_ack ack) { return zynqmp_pm_invoke_fn(PM_REQUEST_NODE, node, capabilities, qos, ack, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); /** * zynqmp_pm_release_node() - Release a node @@ -810,7 +810,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .request_node = zynqmp_pm_request_node, .release_node = zynqmp_pm_release_node, .set_requirement = zynqmp_pm_set_requirement, .fpga_load = zynqmp_pm_fpga_load, diff --git a/drivers/soc/xilinx/zynqmp_pm_domains.c b/drivers/soc/xilinx/zynqmp_pm_domains.c index 23d90cb12ba9..cf4eed0e3011 100644 --- a/drivers/soc/xilinx/zynqmp_pm_domains.c +++ b/drivers/soc/xilinx/zynqmp_pm_domains.c @@ -163,16 +163,13 @@ static int zynqmp_gpd_attach_dev(struct generic_pm_domain *domain, int ret; struct zynqmp_pm_domain *pd; - if (!eemi_ops->request_node) - return -ENXIO; - pd = container_of(domain, struct zynqmp_pm_domain, gpd); /* If this is not the first device to attach there is nothing to do */ if (domain->device_count) return 0; - ret = eemi_ops->request_node(pd->node_id, 0, 0, + ret = zynqmp_pm_request_node(pd->node_id, 0, 0, ZYNQMP_PM_REQUEST_ACK_BLOCKING); /* If requesting a node fails print and return the error */ if (ret) { diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 761caede5a51..fb7e5c91c816 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,10 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*request_node)(const u32 node, - const u32 capabilities, - const u32 qos, - const enum zynqmp_pm_request_ack ack); int (*release_node)(const u32 node); int (*set_requirement)(const u32 node, const u32 capabilities, @@ -336,6 +332,8 @@ int zynqmp_pm_reset_assert(const enum zynqmp_pm_reset reset, int zynqmp_pm_reset_get_status(const enum zynqmp_pm_reset reset, u32 *status); int zynqmp_pm_init_finalize(void); int zynqmp_pm_set_suspend_mode(u32 mode); +int zynqmp_pm_request_node(const u32 node, const u32 capabilities, + const u32 qos, const enum zynqmp_pm_request_ack ack); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -432,6 +430,12 @@ static inline int zynqmp_pm_set_suspend_mode(u32 mode) { return -ENODEV; } +static inline int zynqmp_pm_request_node(const u32 node, const u32 capabilities, + const u32 qos, + const enum zynqmp_pm_request_ack ack) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 07fb1a4619fcb35f79d0adc13c8678f7726337ef Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:57:59 -0700 Subject: firmware: xilinx: Remove eemi ops for release_node Use direct function call instead of using eemi ops for release_node. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-18-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 4 ++-- drivers/soc/xilinx/zynqmp_pm_domains.c | 5 +---- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 3 files changed, 8 insertions(+), 7 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index e65ee76880ac..ce65bafd2fcf 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -760,10 +760,11 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_request_node); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_release_node(const u32 node) +int zynqmp_pm_release_node(const u32 node) { return zynqmp_pm_invoke_fn(PM_RELEASE_NODE, node, 0, 0, 0, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); /** * zynqmp_pm_set_requirement() - PM call to set requirement for PM slaves @@ -810,7 +811,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .release_node = zynqmp_pm_release_node, .set_requirement = zynqmp_pm_set_requirement, .fpga_load = zynqmp_pm_fpga_load, .fpga_get_status = zynqmp_pm_fpga_get_status, diff --git a/drivers/soc/xilinx/zynqmp_pm_domains.c b/drivers/soc/xilinx/zynqmp_pm_domains.c index cf4eed0e3011..20bee26535d1 100644 --- a/drivers/soc/xilinx/zynqmp_pm_domains.c +++ b/drivers/soc/xilinx/zynqmp_pm_domains.c @@ -196,16 +196,13 @@ static void zynqmp_gpd_detach_dev(struct generic_pm_domain *domain, int ret; struct zynqmp_pm_domain *pd; - if (!eemi_ops->release_node) - return; - pd = container_of(domain, struct zynqmp_pm_domain, gpd); /* If this is not the last device to detach there is nothing to do */ if (domain->device_count) return; - ret = eemi_ops->release_node(pd->node_id); + ret = zynqmp_pm_release_node(pd->node_id); /* If releasing a node fails print the error and return */ if (ret) { pr_err("%s() %s release failed for node %d: %d\n", diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index fb7e5c91c816..bfa8cca64455 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*release_node)(const u32 node); int (*set_requirement)(const u32 node, const u32 capabilities, const u32 qos, @@ -334,6 +333,7 @@ int zynqmp_pm_init_finalize(void); int zynqmp_pm_set_suspend_mode(u32 mode); int zynqmp_pm_request_node(const u32 node, const u32 capabilities, const u32 qos, const enum zynqmp_pm_request_ack ack); +int zynqmp_pm_release_node(const u32 node); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -436,6 +436,10 @@ static inline int zynqmp_pm_request_node(const u32 node, const u32 capabilities, { return -ENODEV; } +static inline int zynqmp_pm_release_node(const u32 node) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From cbbbda71fe37fe70e610d5ec3977fc6a096280ed Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:58:00 -0700 Subject: firmware: xilinx: Remove eemi ops for set_requirement Use direct function call instead of using eemi ops for set_requirement. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-19-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 8 ++++---- drivers/soc/xilinx/zynqmp_pm_domains.c | 16 ++-------------- include/linux/firmware/xlnx-zynqmp.h | 14 ++++++++++---- 3 files changed, 16 insertions(+), 22 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index ce65bafd2fcf..0c5c8bccbeba 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -778,13 +778,14 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_release_node); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, - const u32 qos, - const enum zynqmp_pm_request_ack ack) +int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, + const u32 qos, + const enum zynqmp_pm_request_ack ack) { return zynqmp_pm_invoke_fn(PM_SET_REQUIREMENT, node, capabilities, qos, ack, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); /** * zynqmp_pm_aes - Access AES hardware to encrypt/decrypt the data using @@ -811,7 +812,6 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) } static const struct zynqmp_eemi_ops eemi_ops = { - .set_requirement = zynqmp_pm_set_requirement, .fpga_load = zynqmp_pm_fpga_load, .fpga_get_status = zynqmp_pm_fpga_get_status, .aes = zynqmp_pm_aes_engine, diff --git a/drivers/soc/xilinx/zynqmp_pm_domains.c b/drivers/soc/xilinx/zynqmp_pm_domains.c index 20bee26535d1..226d343f0a6a 100644 --- a/drivers/soc/xilinx/zynqmp_pm_domains.c +++ b/drivers/soc/xilinx/zynqmp_pm_domains.c @@ -23,8 +23,6 @@ /* Flag stating if PM nodes mapped to the PM domain has been requested */ #define ZYNQMP_PM_DOMAIN_REQUESTED BIT(0) -static const struct zynqmp_eemi_ops *eemi_ops; - static int min_capability; /** @@ -76,11 +74,8 @@ static int zynqmp_gpd_power_on(struct generic_pm_domain *domain) int ret; struct zynqmp_pm_domain *pd; - if (!eemi_ops->set_requirement) - return -ENXIO; - pd = container_of(domain, struct zynqmp_pm_domain, gpd); - ret = eemi_ops->set_requirement(pd->node_id, + ret = zynqmp_pm_set_requirement(pd->node_id, ZYNQMP_PM_CAPABILITY_ACCESS, ZYNQMP_PM_MAX_QOS, ZYNQMP_PM_REQUEST_ACK_BLOCKING); @@ -111,9 +106,6 @@ static int zynqmp_gpd_power_off(struct generic_pm_domain *domain) u32 capabilities = min_capability; bool may_wakeup; - if (!eemi_ops->set_requirement) - return -ENXIO; - pd = container_of(domain, struct zynqmp_pm_domain, gpd); /* If domain is already released there is nothing to be done */ @@ -134,7 +126,7 @@ static int zynqmp_gpd_power_off(struct generic_pm_domain *domain) } } - ret = eemi_ops->set_requirement(pd->node_id, capabilities, 0, + ret = zynqmp_pm_set_requirement(pd->node_id, capabilities, 0, ZYNQMP_PM_REQUEST_ACK_NO); /** * If powering down of any node inside this domain fails, @@ -260,10 +252,6 @@ static int zynqmp_gpd_probe(struct platform_device *pdev) struct zynqmp_pm_domain *pd; struct device *dev = &pdev->dev; - eemi_ops = zynqmp_pm_get_eemi_ops(); - if (IS_ERR(eemi_ops)) - return PTR_ERR(eemi_ops); - pd = devm_kcalloc(dev, ZYNQMP_NUM_DOMAINS, sizeof(*pd), GFP_KERNEL); if (!pd) return -ENOMEM; diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index bfa8cca64455..5927f6f49980 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,10 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*set_requirement)(const u32 node, - const u32 capabilities, - const u32 qos, - const enum zynqmp_pm_request_ack ack); int (*aes)(const u64 address, u32 *out); }; @@ -334,6 +330,9 @@ int zynqmp_pm_set_suspend_mode(u32 mode); int zynqmp_pm_request_node(const u32 node, const u32 capabilities, const u32 qos, const enum zynqmp_pm_request_ack ack); int zynqmp_pm_release_node(const u32 node); +int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, + const u32 qos, + const enum zynqmp_pm_request_ack ack); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -440,6 +439,13 @@ static inline int zynqmp_pm_release_node(const u32 node) { return -ENODEV; } +static inline int zynqmp_pm_set_requirement(const u32 node, + const u32 capabilities, + const u32 qos, + const enum zynqmp_pm_request_ack ack) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From bc86f9c546160afce631fae223c3772d9375ee25 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:58:01 -0700 Subject: firmware: xilinx: Remove eemi ops for aes engine Use direct function call for aes engine instead of using eemi ops. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-20-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/crypto/xilinx/zynqmp-aes-gcm.c | 12 +----------- drivers/firmware/xilinx/zynqmp.c | 4 ++-- include/linux/firmware/xlnx-zynqmp.h | 6 +++++- 3 files changed, 8 insertions(+), 14 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/crypto/xilinx/zynqmp-aes-gcm.c b/drivers/crypto/xilinx/zynqmp-aes-gcm.c index 09f7f468eef8..d0a0daf3ea08 100644 --- a/drivers/crypto/xilinx/zynqmp-aes-gcm.c +++ b/drivers/crypto/xilinx/zynqmp-aes-gcm.c @@ -46,7 +46,6 @@ struct zynqmp_aead_drv_ctx { } alg; struct device *dev; struct crypto_engine *engine; - const struct zynqmp_eemi_ops *eemi_ops; }; struct zynqmp_aead_hw_req { @@ -92,9 +91,6 @@ static int zynqmp_aes_aead_cipher(struct aead_request *req) drv_ctx = container_of(alg, struct zynqmp_aead_drv_ctx, alg.aead); - if (!drv_ctx->eemi_ops->aes) - return -ENOTSUPP; - if (tfm_ctx->keysrc == ZYNQMP_AES_KUP_KEY) dma_size = req->cryptlen + ZYNQMP_AES_KEY_SIZE + GCM_AES_IV_SIZE; @@ -136,7 +132,7 @@ static int zynqmp_aes_aead_cipher(struct aead_request *req) hwreq->key = 0; } - drv_ctx->eemi_ops->aes(dma_addr_hw_req, &status); + zynqmp_pm_aes_engine(dma_addr_hw_req, &status); if (status) { switch (status) { @@ -388,12 +384,6 @@ static int zynqmp_aes_aead_probe(struct platform_device *pdev) else return -ENODEV; - aes_drv_ctx.eemi_ops = zynqmp_pm_get_eemi_ops(); - if (IS_ERR(aes_drv_ctx.eemi_ops)) { - dev_err(dev, "Failed to get ZynqMP EEMI interface\n"); - return PTR_ERR(aes_drv_ctx.eemi_ops); - } - err = dma_set_mask_and_coherent(dev, DMA_BIT_MASK(ZYNQMP_DMA_BIT_MASK)); if (err < 0) { dev_err(dev, "No usable DMA configuration\n"); diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 0c5c8bccbeba..e6e7b63cde98 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -795,7 +795,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_set_requirement); * * Return: Returns status, either success or error code. */ -static int zynqmp_pm_aes_engine(const u64 address, u32 *out) +int zynqmp_pm_aes_engine(const u64 address, u32 *out) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -810,11 +810,11 @@ static int zynqmp_pm_aes_engine(const u64 address, u32 *out) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); static const struct zynqmp_eemi_ops eemi_ops = { .fpga_load = zynqmp_pm_fpga_load, .fpga_get_status = zynqmp_pm_fpga_get_status, - .aes = zynqmp_pm_aes_engine, }; /** diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 5927f6f49980..11d7aef2cc3c 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -296,7 +296,6 @@ struct zynqmp_pm_query_data { struct zynqmp_eemi_ops { int (*fpga_load)(const u64 address, const u32 size, const u32 flags); int (*fpga_get_status)(u32 *value); - int (*aes)(const u64 address, u32 *out); }; int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, @@ -333,6 +332,7 @@ int zynqmp_pm_release_node(const u32 node); int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, const u32 qos, const enum zynqmp_pm_request_ack ack); +int zynqmp_pm_aes_engine(const u64 address, u32 *out); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -446,6 +446,10 @@ static inline int zynqmp_pm_set_requirement(const u32 node, { return -ENODEV; } +static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 4db8180ffe7c07bc4a602c82d6d9c1c04751583d Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:58:02 -0700 Subject: firmware: xilinx: Remove eemi ops for fpga related APIs Use direct function call instead of using eemi ops for fpga related APIs. Also remove eemi ops structure. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-21-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 30 ++---------------------------- drivers/fpga/zynqmp-fpga.c | 14 +++----------- drivers/spi/spi-zynqmp-gqspi.c | 5 ----- include/linux/firmware/xlnx-zynqmp.h | 16 +++++++++++----- 4 files changed, 16 insertions(+), 49 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index e6e7b63cde98..ef7ba32e017a 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -24,8 +24,6 @@ #include #include "zynqmp-debug.h" -static const struct zynqmp_eemi_ops *eemi_ops_tbl; - static bool feature_check_enabled; static u32 zynqmp_pm_features[PM_API_MAX]; @@ -671,8 +669,7 @@ EXPORT_SYMBOL_GPL(zynqmp_pm_reset_get_status); * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_fpga_load(const u64 address, const u32 size, - const u32 flags) +int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) { return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address), upper_32_bits(address), size, flags, NULL); @@ -687,7 +684,7 @@ static int zynqmp_pm_fpga_load(const u64 address, const u32 size, * * Return: Returns status, either success or error+reason */ -static int zynqmp_pm_fpga_get_status(u32 *value) +int zynqmp_pm_fpga_get_status(u32 *value) { u32 ret_payload[PAYLOAD_ARG_CNT]; int ret; @@ -812,26 +809,6 @@ int zynqmp_pm_aes_engine(const u64 address, u32 *out) } EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); -static const struct zynqmp_eemi_ops eemi_ops = { - .fpga_load = zynqmp_pm_fpga_load, - .fpga_get_status = zynqmp_pm_fpga_get_status, -}; - -/** - * zynqmp_pm_get_eemi_ops - Get eemi ops functions - * - * Return: Pointer of eemi_ops structure - */ -const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) -{ - if (eemi_ops_tbl) - return eemi_ops_tbl; - else - return ERR_PTR(-EPROBE_DEFER); - -} -EXPORT_SYMBOL_GPL(zynqmp_pm_get_eemi_ops); - static int zynqmp_firmware_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -878,9 +855,6 @@ static int zynqmp_firmware_probe(struct platform_device *pdev) pr_info("%s Trustzone version v%d.%d\n", __func__, pm_tz_version >> 16, pm_tz_version & 0xFFFF); - /* Assign eemi_ops_table */ - eemi_ops_tbl = &eemi_ops; - zynqmp_pm_api_debugfs_init(); ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, diff --git a/drivers/fpga/zynqmp-fpga.c b/drivers/fpga/zynqmp-fpga.c index b8a88d21d038..4a1139e05280 100644 --- a/drivers/fpga/zynqmp-fpga.c +++ b/drivers/fpga/zynqmp-fpga.c @@ -40,16 +40,12 @@ static int zynqmp_fpga_ops_write_init(struct fpga_manager *mgr, static int zynqmp_fpga_ops_write(struct fpga_manager *mgr, const char *buf, size_t size) { - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); struct zynqmp_fpga_priv *priv; dma_addr_t dma_addr; u32 eemi_flags = 0; char *kbuf; int ret; - if (IS_ERR_OR_NULL(eemi_ops) || !eemi_ops->fpga_load) - return -ENXIO; - priv = mgr->priv; kbuf = dma_alloc_coherent(priv->dev, size, &dma_addr, GFP_KERNEL); @@ -63,7 +59,7 @@ static int zynqmp_fpga_ops_write(struct fpga_manager *mgr, if (priv->flags & FPGA_MGR_PARTIAL_RECONFIG) eemi_flags |= XILINX_ZYNQMP_PM_FPGA_PARTIAL; - ret = eemi_ops->fpga_load(dma_addr, size, eemi_flags); + ret = zynqmp_pm_fpga_load(dma_addr, size, eemi_flags); dma_free_coherent(priv->dev, size, kbuf, dma_addr); @@ -78,13 +74,9 @@ static int zynqmp_fpga_ops_write_complete(struct fpga_manager *mgr, static enum fpga_mgr_states zynqmp_fpga_ops_state(struct fpga_manager *mgr) { - const struct zynqmp_eemi_ops *eemi_ops = zynqmp_pm_get_eemi_ops(); - u32 status; - - if (IS_ERR_OR_NULL(eemi_ops) || !eemi_ops->fpga_get_status) - return FPGA_MGR_STATE_UNKNOWN; + u32 status = 0; - eemi_ops->fpga_get_status(&status); + zynqmp_pm_fpga_get_status(&status); if (status & IXR_FPGA_DONE_MASK) return FPGA_MGR_STATE_OPERATING; diff --git a/drivers/spi/spi-zynqmp-gqspi.c b/drivers/spi/spi-zynqmp-gqspi.c index 7412a3042a8d..811c97a7c858 100644 --- a/drivers/spi/spi-zynqmp-gqspi.c +++ b/drivers/spi/spi-zynqmp-gqspi.c @@ -135,7 +135,6 @@ #define SPI_AUTOSUSPEND_TIMEOUT 3000 enum mode_type {GQSPI_MODE_IO, GQSPI_MODE_DMA}; -static const struct zynqmp_eemi_ops *eemi_ops; /** * struct zynqmp_qspi - Defines qspi driver instance @@ -1015,10 +1014,6 @@ static int zynqmp_qspi_probe(struct platform_device *pdev) struct zynqmp_qspi *xqspi; struct device *dev = &pdev->dev; - eemi_ops = zynqmp_pm_get_eemi_ops(); - if (IS_ERR(eemi_ops)) - return PTR_ERR(eemi_ops); - master = spi_alloc_master(&pdev->dev, sizeof(*xqspi)); if (!master) return -ENOMEM; diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 11d7aef2cc3c..44ffb4f0d8be 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -293,16 +293,11 @@ struct zynqmp_pm_query_data { u32 arg3; }; -struct zynqmp_eemi_ops { - int (*fpga_load)(const u64 address, const u32 size, const u32 flags); - int (*fpga_get_status)(u32 *value); -}; int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload); #if IS_REACHABLE(CONFIG_ZYNQMP_FIRMWARE) -const struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void); int zynqmp_pm_get_api_version(u32 *version); int zynqmp_pm_get_chipid(u32 *idcode, u32 *version); int zynqmp_pm_query_data(struct zynqmp_pm_query_data qdata, u32 *out); @@ -333,6 +328,8 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, const u32 qos, const enum zynqmp_pm_request_ack ack); int zynqmp_pm_aes_engine(const u64 address, u32 *out); +int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags); +int zynqmp_pm_fpga_get_status(u32 *value); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -450,6 +447,15 @@ static inline int zynqmp_pm_aes_engine(const u64 address, u32 *out) { return -ENODEV; } +static inline int zynqmp_pm_fpga_load(const u64 address, const u32 size, + const u32 flags) +{ + return -ENODEV; +} +static inline int zynqmp_pm_fpga_get_status(u32 *value) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 4f680b72ea07a3e161ce1167a97ee09b1369f7de Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:58:03 -0700 Subject: firmware: xilinx: Add APIs to read/write GGS/PGGS registers Add APIs to read/write PGGS and GGS registers. Signed-off-by: Rajan Vaja Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-22-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 66 ++++++++++++++++++++++++++++++++++++ include/linux/firmware/xlnx-zynqmp.h | 24 +++++++++++++ 2 files changed, 90 insertions(+) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index ef7ba32e017a..3518456bf73d 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -617,6 +617,72 @@ int zynqmp_pm_sd_dll_reset(u32 node_id, u32 type) } EXPORT_SYMBOL_GPL(zynqmp_pm_sd_dll_reset); +/** + * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) + * @index GGS register index + * @value Register value to be written + * + * This function writes value to GGS register. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_write_ggs(u32 index, u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS, + index, value, NULL); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); + +/** + * zynqmp_pm_write_ggs() - PM API for reading global general storage (ggs) + * @index GGS register index + * @value Register value to be written + * + * This function returns GGS register value. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_read_ggs(u32 index, u32 *value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS, + index, 0, value); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); + +/** + * zynqmp_pm_write_pggs() - PM API for writing persistent global general + * storage (pggs) + * @index PGGS register index + * @value Register value to be written + * + * This function writes value to PGGS register. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_write_pggs(u32 index, u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value, + NULL); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); + +/** + * zynqmp_pm_write_pggs() - PM API for reading persistent global general + * storage (pggs) + * @index PGGS register index + * @value Register value to be written + * + * This function returns PGGS register value. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_read_pggs(u32 index, u32 *value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0, + value); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); + /** * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) * @reset: Reset to be configured diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 44ffb4f0d8be..e23251d93176 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -107,6 +107,10 @@ enum pm_ioctl_id { IOCTL_GET_PLL_FRAC_MODE, IOCTL_SET_PLL_FRAC_DATA, IOCTL_GET_PLL_FRAC_DATA, + IOCTL_WRITE_GGS = 12, + IOCTL_READ_GGS = 13, + IOCTL_WRITE_PGGS = 14, + IOCTL_READ_PGGS = 15, }; enum pm_query_id { @@ -330,6 +334,10 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, int zynqmp_pm_aes_engine(const u64 address, u32 *out); int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags); int zynqmp_pm_fpga_get_status(u32 *value); +int zynqmp_pm_write_ggs(u32 index, u32 value); +int zynqmp_pm_read_ggs(u32 index, u32 *value); +int zynqmp_pm_write_pggs(u32 index, u32 value); +int zynqmp_pm_read_pggs(u32 index, u32 *value); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -456,6 +464,22 @@ static inline int zynqmp_pm_fpga_get_status(u32 *value) { return -ENODEV; } +static inline int zynqmp_pm_write_ggs(u32 index, u32 value) +{ + return -ENODEV; +} +static inline int zynqmp_pm_read_ggs(u32 index, u32 *value) +{ + return -ENODEV; +} +static inline int zynqmp_pm_write_pggs(u32 index, u32 value) +{ + return -ENODEV; +} +static inline int zynqmp_pm_read_pggs(u32 index, u32 *value) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From ae5c961da6483b413dcb36d8bf6a881ffd2fb33f Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:58:04 -0700 Subject: firmware: xilinx: Add sysfs interface Add firmware-ggs sysfs interface which provides read/write interface to global storage registers. Signed-off-by: Rajan Vaja Signed-off-by: Michal Simek Signed-off-by: Tejas Patel Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-23-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- .../ABI/stable/sysfs-driver-firmware-zynqmp | 50 ++++++ drivers/firmware/xilinx/zynqmp.c | 167 ++++++++++++++++++++- include/linux/firmware/xlnx-zynqmp.h | 2 + 3 files changed, 218 insertions(+), 1 deletion(-) create mode 100644 Documentation/ABI/stable/sysfs-driver-firmware-zynqmp (limited to 'drivers/firmware') diff --git a/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp new file mode 100644 index 000000000000..2e3aebd01d16 --- /dev/null +++ b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp @@ -0,0 +1,50 @@ +What: /sys/devices/platform/firmware\:zynqmp-firmware/ggs* +Date: March 2020 +KernelVersion: 5.6 +Contact: "Jolly Shah" +Description: + Read/Write PMU global general storage register value, + GLOBAL_GEN_STORAGE{0:3}. + Global general storage register that can be used + by system to pass information between masters. + + The register is reset during system or power-on + resets. Three registers are used by the FSBL and + other Xilinx software products: GLOBAL_GEN_STORAGE{4:6}. + + Usage: + # cat /sys/devices/platform/firmware\:zynqmp-firmware/ggs0 + # echo > /sys/devices/platform/firmware\:zynqmp-firmware/ggs0 + + Example: + # cat /sys/devices/platform/firmware\:zynqmp-firmware/ggs0 + # echo 0x1234ABCD > /sys/devices/platform/firmware\:zynqmp-firmware/ggs0 + +Users: Xilinx + +What: /sys/devices/platform/firmware\:zynqmp-firmware/pggs* +Date: March 2020 +KernelVersion: 5.6 +Contact: "Jolly Shah" +Description: + Read/Write PMU persistent global general storage register + value, PERS_GLOB_GEN_STORAGE{0:3}. + Persistent global general storage register that + can be used by system to pass information between + masters. + + This register is only reset by the power-on reset + and maintains its value through a system reset. + Four registers are used by the FSBL and other Xilinx + software products: PERS_GLOB_GEN_STORAGE{4:7}. + Register is reset only by a POR reset. + + Usage: + # cat /sys/devices/platform/firmware\:zynqmp-firmware/pggs0 + # echo > /sys/devices/platform/firmware\:zynqmp-firmware/pggs0 + + Example: + # cat /sys/devices/platform/firmware\:zynqmp-firmware/pggs0 + # echo 0x1234ABCD > /sys/devices/platform/firmware\:zynqmp-firmware/pggs0 + +Users: Xilinx diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 3518456bf73d..2fe4f57c005a 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -2,7 +2,7 @@ /* * Xilinx Zynq MPSoC Firmware layer * - * Copyright (C) 2014-2018 Xilinx, Inc. + * Copyright (C) 2014-2020 Xilinx, Inc. * * Michal Simek * Davorin Mista @@ -875,6 +875,170 @@ int zynqmp_pm_aes_engine(const u64 address, u32 *out) } EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); +static ssize_t ggs_show(struct device *device, + struct device_attribute *attr, + char *buf, + u32 reg) +{ + int ret; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + ret = zynqmp_pm_read_ggs(reg, ret_payload); + if (ret) + return ret; + + return sprintf(buf, "0x%x\n", ret_payload[1]); +} + +static ssize_t ggs_store(struct device *device, + struct device_attribute *attr, + const char *buf, size_t count, + u32 reg) +{ + long value; + int ret; + + if (reg >= GSS_NUM_REGS) + return -EINVAL; + + ret = kstrtol(buf, 16, &value); + if (ret) { + count = -EFAULT; + goto err; + } + + ret = zynqmp_pm_write_ggs(reg, value); + if (ret) + count = -EFAULT; + +err: + return count; +} + +/* GGS register show functions */ +#define GGS0_SHOW(N) \ + ssize_t ggs##N##_show(struct device *device, \ + struct device_attribute *attr, \ + char *buf) \ + { \ + return ggs_show(device, attr, buf, N); \ + } + +static GGS0_SHOW(0); +static GGS0_SHOW(1); +static GGS0_SHOW(2); +static GGS0_SHOW(3); + +/* GGS register store function */ +#define GGS0_STORE(N) \ + ssize_t ggs##N##_store(struct device *device, \ + struct device_attribute *attr, \ + const char *buf, \ + size_t count) \ + { \ + return ggs_store(device, attr, buf, count, N); \ + } + +static GGS0_STORE(0); +static GGS0_STORE(1); +static GGS0_STORE(2); +static GGS0_STORE(3); + +static ssize_t pggs_show(struct device *device, + struct device_attribute *attr, + char *buf, + u32 reg) +{ + int ret; + u32 ret_payload[PAYLOAD_ARG_CNT]; + + ret = zynqmp_pm_read_pggs(reg, ret_payload); + if (ret) + return ret; + + return sprintf(buf, "0x%x\n", ret_payload[1]); +} + +static ssize_t pggs_store(struct device *device, + struct device_attribute *attr, + const char *buf, size_t count, + u32 reg) +{ + long value; + int ret; + + if (reg >= GSS_NUM_REGS) + return -EINVAL; + + ret = kstrtol(buf, 16, &value); + if (ret) { + count = -EFAULT; + goto err; + } + + ret = zynqmp_pm_write_pggs(reg, value); + if (ret) + count = -EFAULT; + +err: + return count; +} + +#define PGGS0_SHOW(N) \ + ssize_t pggs##N##_show(struct device *device, \ + struct device_attribute *attr, \ + char *buf) \ + { \ + return pggs_show(device, attr, buf, N); \ + } + +#define PGGS0_STORE(N) \ + ssize_t pggs##N##_store(struct device *device, \ + struct device_attribute *attr, \ + const char *buf, \ + size_t count) \ + { \ + return pggs_store(device, attr, buf, count, N); \ + } + +/* PGGS register show functions */ +static PGGS0_SHOW(0); +static PGGS0_SHOW(1); +static PGGS0_SHOW(2); +static PGGS0_SHOW(3); + +/* PGGS register store functions */ +static PGGS0_STORE(0); +static PGGS0_STORE(1); +static PGGS0_STORE(2); +static PGGS0_STORE(3); + +/* GGS register attributes */ +static DEVICE_ATTR_RW(ggs0); +static DEVICE_ATTR_RW(ggs1); +static DEVICE_ATTR_RW(ggs2); +static DEVICE_ATTR_RW(ggs3); + +/* PGGS register attributes */ +static DEVICE_ATTR_RW(pggs0); +static DEVICE_ATTR_RW(pggs1); +static DEVICE_ATTR_RW(pggs2); +static DEVICE_ATTR_RW(pggs3); + +static struct attribute *zynqmp_firmware_attrs[] = { + &dev_attr_ggs0.attr, + &dev_attr_ggs1.attr, + &dev_attr_ggs2.attr, + &dev_attr_ggs3.attr, + &dev_attr_pggs0.attr, + &dev_attr_pggs1.attr, + &dev_attr_pggs2.attr, + &dev_attr_pggs3.attr, + NULL, +}; + +ATTRIBUTE_GROUPS(zynqmp_firmware); + static int zynqmp_firmware_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; @@ -952,6 +1116,7 @@ static struct platform_driver zynqmp_firmware_driver = { .driver = { .name = "zynqmp_firmware", .of_match_table = zynqmp_firmware_of_match, + .dev_groups = zynqmp_firmware_groups, }, .probe = zynqmp_firmware_probe, .remove = zynqmp_firmware_remove, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index e23251d93176..c1356e93dcb2 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -42,6 +42,8 @@ #define ZYNQMP_PM_MAX_QOS 100U +#define GSS_NUM_REGS (4) + /* Node capabilities */ #define ZYNQMP_PM_CAPABILITY_ACCESS 0x1U #define ZYNQMP_PM_CAPABILITY_CONTEXT 0x2U -- cgit v1.2.3 From fdd2ed88ca971376669bce145f1a1bcf028d775e Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:58:05 -0700 Subject: firmware: xilinx: Add system shutdown API interface Add system shutdown API interface which asks firmware to perform system shutdown/restart. Signed-off-by: Rajan Vaja Signed-off-by: Michal Simek Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-24-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 13 +++++++++++++ include/linux/firmware/xlnx-zynqmp.h | 6 ++++++ 2 files changed, 19 insertions(+) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 2fe4f57c005a..9ba376cfc81f 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -875,6 +875,19 @@ int zynqmp_pm_aes_engine(const u64 address, u32 *out) } EXPORT_SYMBOL_GPL(zynqmp_pm_aes_engine); +/** + * zynqmp_pm_system_shutdown - PM call to request a system shutdown or restart + * @type: Shutdown or restart? 0 for shutdown, 1 for restart + * @subtype: Specifies which system should be restarted or shut down + * + * Return: Returns status, either success or error+reason + */ +int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) +{ + return zynqmp_pm_invoke_fn(PM_SYSTEM_SHUTDOWN, type, subtype, + 0, 0, NULL); +} + static ssize_t ggs_show(struct device *device, struct device_attribute *attr, char *buf, diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index c1356e93dcb2..2254c7cc3362 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -64,6 +64,7 @@ enum pm_api_id { PM_GET_API_VERSION = 1, + PM_SYSTEM_SHUTDOWN = 12, PM_REQUEST_NODE = 13, PM_RELEASE_NODE, PM_SET_REQUIREMENT, @@ -340,6 +341,7 @@ int zynqmp_pm_write_ggs(u32 index, u32 value); int zynqmp_pm_read_ggs(u32 index, u32 *value); int zynqmp_pm_write_pggs(u32 index, u32 value); int zynqmp_pm_read_pggs(u32 index, u32 *value); +int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -482,6 +484,10 @@ static inline int zynqmp_pm_read_pggs(u32 index, u32 *value) { return -ENODEV; } +static inline int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From b3ae24c44848c6403fb2333d7cbe494565058352 Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:58:06 -0700 Subject: firmware: xilinx: Add sysfs to set shutdown scope The Linux shutdown functionality implemented via PSCI system_off does not include an option to set a scope, i.e. which parts of the system to shut down. This patch creates sysfs that allows to set the shutdown scope for the next shutdown request. When the next shutdown is performed, the platform specific portion of PSCI-system_off can use the chosen shutdown scope. Signed-off-by: Rajan Vaja Signed-off-by: Stefan Krsmanovic Signed-off-by: Michal Simek Signed-off-by: Tejas Patel Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-25-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- .../ABI/stable/sysfs-driver-firmware-zynqmp | 32 +++++++ drivers/firmware/xilinx/zynqmp.c | 98 +++++++++++++++++++++- include/linux/firmware/xlnx-zynqmp.h | 12 +++ 3 files changed, 141 insertions(+), 1 deletion(-) (limited to 'drivers/firmware') diff --git a/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp index 2e3aebd01d16..554f30c3b398 100644 --- a/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp +++ b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp @@ -48,3 +48,35 @@ Description: # echo 0x1234ABCD > /sys/devices/platform/firmware\:zynqmp-firmware/pggs0 Users: Xilinx + +What: /sys/devices/platform/firmware\:zynqmp-firmware/shutdown_scope +Date: March 2020 +KernelVersion: 5.6 +Contact: "Jolly Shah" +Description: + This sysfs interface allows to set the shutdown scope for the + next shutdown request. When the next shutdown is performed, the + platform specific portion of PSCI-system_off can use the chosen + shutdown scope. + + Following are available shutdown scopes(subtypes): + + subsystem: Only the APU along with all of its peripherals + not used by other processing units will be + shut down. This may result in the FPD power + domain being shut down provided that no other + processing unit uses FPD peripherals or DRAM. + ps_only: The complete PS will be shut down, including the + RPU, PMU, etc. Only the PL domain (FPGA) + remains untouched. + system: The complete system/device is shut down. + + Usage: + # cat /sys/devices/platform/firmware\:zynqmp-firmware/shutdown_scope + # echo > /sys/devices/platform/firmware\:zynqmp-firmware/shutdown_scope + + Example: + # cat /sys/devices/platform/firmware\:zynqmp-firmware/shutdown_scope + # echo "subsystem" > /sys/devices/platform/firmware\:zynqmp-firmware/shutdown_scope + +Users: Xilinx diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 9ba376cfc81f..8d3661877670 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -888,6 +888,102 @@ int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) 0, 0, NULL); } +/** + * struct zynqmp_pm_shutdown_scope - Struct for shutdown scope + * @subtype: Shutdown subtype + * @name: Matching string for scope argument + * + * This struct encapsulates mapping between shutdown scope ID and string. + */ +struct zynqmp_pm_shutdown_scope { + const enum zynqmp_pm_shutdown_subtype subtype; + const char *name; +}; + +static struct zynqmp_pm_shutdown_scope shutdown_scopes[] = { + [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM] = { + .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM, + .name = "subsystem", + }, + [ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY] = { + .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY, + .name = "ps_only", + }, + [ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM] = { + .subtype = ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM, + .name = "system", + }, +}; + +static struct zynqmp_pm_shutdown_scope *selected_scope = + &shutdown_scopes[ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM]; + +/** + * zynqmp_pm_is_shutdown_scope_valid - Check if shutdown scope string is valid + * @scope_string: Shutdown scope string + * + * Return: Return pointer to matching shutdown scope struct from + * array of available options in system if string is valid, + * otherwise returns NULL. + */ +static struct zynqmp_pm_shutdown_scope* + zynqmp_pm_is_shutdown_scope_valid(const char *scope_string) +{ + int count; + + for (count = 0; count < ARRAY_SIZE(shutdown_scopes); count++) + if (sysfs_streq(scope_string, shutdown_scopes[count].name)) + return &shutdown_scopes[count]; + + return NULL; +} + +static ssize_t shutdown_scope_show(struct device *device, + struct device_attribute *attr, + char *buf) +{ + int i; + + for (i = 0; i < ARRAY_SIZE(shutdown_scopes); i++) { + if (&shutdown_scopes[i] == selected_scope) { + strcat(buf, "["); + strcat(buf, shutdown_scopes[i].name); + strcat(buf, "]"); + } else { + strcat(buf, shutdown_scopes[i].name); + } + strcat(buf, " "); + } + strcat(buf, "\n"); + + return strlen(buf); +} + +static ssize_t shutdown_scope_store(struct device *device, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret; + struct zynqmp_pm_shutdown_scope *scope; + + scope = zynqmp_pm_is_shutdown_scope_valid(buf); + if (!scope) + return -EINVAL; + + ret = zynqmp_pm_system_shutdown(ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY, + scope->subtype); + if (ret) { + pr_err("unable to set shutdown scope %s\n", buf); + return ret; + } + + selected_scope = scope; + + return count; +} + +static DEVICE_ATTR_RW(shutdown_scope); + static ssize_t ggs_show(struct device *device, struct device_attribute *attr, char *buf, @@ -923,7 +1019,6 @@ static ssize_t ggs_store(struct device *device, ret = zynqmp_pm_write_ggs(reg, value); if (ret) count = -EFAULT; - err: return count; } @@ -1047,6 +1142,7 @@ static struct attribute *zynqmp_firmware_attrs[] = { &dev_attr_pggs1.attr, &dev_attr_pggs2.attr, &dev_attr_pggs3.attr, + &dev_attr_shutdown_scope.attr, NULL, }; diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 2254c7cc3362..c297333677d4 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -286,6 +286,18 @@ enum dll_reset_type { PM_DLL_RESET_PULSE, }; +enum zynqmp_pm_shutdown_type { + ZYNQMP_PM_SHUTDOWN_TYPE_SHUTDOWN, + ZYNQMP_PM_SHUTDOWN_TYPE_RESET, + ZYNQMP_PM_SHUTDOWN_TYPE_SETSCOPE_ONLY, +}; + +enum zynqmp_pm_shutdown_subtype { + ZYNQMP_PM_SHUTDOWN_SUBTYPE_SUBSYSTEM, + ZYNQMP_PM_SHUTDOWN_SUBTYPE_PS_ONLY, + ZYNQMP_PM_SHUTDOWN_SUBTYPE_SYSTEM, +}; + /** * struct zynqmp_pm_query_data - PM query data * @qid: query ID -- cgit v1.2.3 From a2cc220a9a9227b2c5c9b39f57340bce64f040fd Mon Sep 17 00:00:00 2001 From: Rajan Vaja Date: Fri, 24 Apr 2020 13:58:07 -0700 Subject: firmware: xilinx: Add sysfs and API to set boot health status Add sysfs interface to set boot health status from user space. Add API used by this interface to communicate with firmware. If PMUFW is compiled with CHECK_HEALTHY_BOOT, it will check the healthy bit on FPD WDT expiration. If healthy bit is set by a user application running in Linux, PMUFW will do APU only restart. If healthy bit is not set during FPD WDT expiration, PMUFW will do system restart. Signed-off-by: Rajan Vaja Signed-off-by: Michal Simek Signed-off-by: Tejas Patel Signed-off-by: Jolly Shah Link: https://lore.kernel.org/r/1587761887-4279-26-git-send-email-jolly.shah@xilinx.com Signed-off-by: Greg Kroah-Hartman --- .../ABI/stable/sysfs-driver-firmware-zynqmp | 21 ++++++++++++ drivers/firmware/xilinx/zynqmp.c | 39 ++++++++++++++++++++++ include/linux/firmware/xlnx-zynqmp.h | 7 ++++ 3 files changed, 67 insertions(+) (limited to 'drivers/firmware') diff --git a/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp index 554f30c3b398..00fa04c76ff3 100644 --- a/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp +++ b/Documentation/ABI/stable/sysfs-driver-firmware-zynqmp @@ -80,3 +80,24 @@ Description: # echo "subsystem" > /sys/devices/platform/firmware\:zynqmp-firmware/shutdown_scope Users: Xilinx + +What: /sys/devices/platform/firmware\:zynqmp-firmware/health_status +Date: March 2020 +KernelVersion: 5.6 +Contact: "Jolly Shah" +Description: + This sysfs interface allows to set the health status. If PMUFW + is compiled with CHECK_HEALTHY_BOOT, it will check the healthy + bit on FPD WDT expiration. If healthy bit is set by a user + application running in Linux, PMUFW will do APU only restart. If + healthy bit is not set during FPD WDT expiration, PMUFW will do + system restart. + + Usage: + Set healthy bit + # echo 1 > /sys/devices/platform/firmware\:zynqmp-firmware/health_status + + Unset healthy bit + # echo 0 > /sys/devices/platform/firmware\:zynqmp-firmware/health_status + +Users: Xilinx diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 8d3661877670..bfaf29a58eac 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -683,6 +683,21 @@ int zynqmp_pm_read_pggs(u32 index, u32 *value) } EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); +/** + * zynqmp_pm_set_boot_health_status() - PM API for setting healthy boot status + * @value Status value to be written + * + * This function sets healthy bit value to indicate boot health status + * to firmware. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_set_boot_health_status(u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_SET_BOOT_HEALTH_STATUS, + value, 0, NULL); +} + /** * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) * @reset: Reset to be configured @@ -984,6 +999,29 @@ static ssize_t shutdown_scope_store(struct device *device, static DEVICE_ATTR_RW(shutdown_scope); +static ssize_t health_status_store(struct device *device, + struct device_attribute *attr, + const char *buf, size_t count) +{ + int ret; + unsigned int value; + + ret = kstrtouint(buf, 10, &value); + if (ret) + return ret; + + ret = zynqmp_pm_set_boot_health_status(value); + if (ret) { + dev_err(device, "unable to set healthy bit value to %u\n", + value); + return ret; + } + + return count; +} + +static DEVICE_ATTR_WO(health_status); + static ssize_t ggs_show(struct device *device, struct device_attribute *attr, char *buf, @@ -1143,6 +1181,7 @@ static struct attribute *zynqmp_firmware_attrs[] = { &dev_attr_pggs2.attr, &dev_attr_pggs3.attr, &dev_attr_shutdown_scope.attr, + &dev_attr_health_status.attr, NULL, }; diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index c297333677d4..5968df82b991 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -114,6 +114,8 @@ enum pm_ioctl_id { IOCTL_READ_GGS = 13, IOCTL_WRITE_PGGS = 14, IOCTL_READ_PGGS = 15, + /* Set healthy bit value */ + IOCTL_SET_BOOT_HEALTH_STATUS = 17, }; enum pm_query_id { @@ -354,6 +356,7 @@ int zynqmp_pm_read_ggs(u32 index, u32 *value); int zynqmp_pm_write_pggs(u32 index, u32 value); int zynqmp_pm_read_pggs(u32 index, u32 *value); int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype); +int zynqmp_pm_set_boot_health_status(u32 value); #else static inline struct zynqmp_eemi_ops *zynqmp_pm_get_eemi_ops(void) { @@ -500,6 +503,10 @@ static inline int zynqmp_pm_system_shutdown(const u32 type, const u32 subtype) { return -ENODEV; } +static inline int zynqmp_pm_set_boot_health_status(u32 value) +{ + return -ENODEV; +} #endif #endif /* __FIRMWARE_ZYNQMP_H__ */ -- cgit v1.2.3 From 56a9a8068637b624f6724f58c6137f4410616558 Mon Sep 17 00:00:00 2001 From: Nathan Chancellor Date: Fri, 1 May 2020 19:59:58 -0700 Subject: firmware: xilinx: Export zynqmp_pm_fpga_{get_status,load} When building arm64 allmodconfig: ERROR: modpost: "zynqmp_pm_fpga_load" [drivers/fpga/zynqmp-fpga.ko] undefined! ERROR: modpost: "zynqmp_pm_fpga_get_status" [drivers/fpga/zynqmp-fpga.ko] undefined! These functions were added to drivers/fpga/zynqmp-fpga.c but not exported so the module build breaks. Export them so that they can be used in modules properly. Fixes: 4db8180ffe7c ("firmware: xilinx: Remove eemi ops for fpga related APIs") Signed-off-by: Nathan Chancellor Reported-by: "kernelci.org bot" Reported-by: Stephen Rothwell Link: https://lore.kernel.org/r/20200502025958.2714249-1-natechancellor@gmail.com Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index bfaf29a58eac..8095fa84d5d7 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -755,6 +755,7 @@ int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags) return zynqmp_pm_invoke_fn(PM_FPGA_LOAD, lower_32_bits(address), upper_32_bits(address), size, flags, NULL); } +EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_load); /** * zynqmp_pm_fpga_get_status - Read value from PCAP status register @@ -778,6 +779,7 @@ int zynqmp_pm_fpga_get_status(u32 *value) return ret; } +EXPORT_SYMBOL_GPL(zynqmp_pm_fpga_get_status); /** * zynqmp_pm_init_finalize() - PM call to inform firmware that the caller -- cgit v1.2.3 From 65f0539b1d063a186723c5c9a7eb17d1962c84a0 Mon Sep 17 00:00:00 2001 From: Christophe JAILLET Date: Sun, 10 May 2020 15:03:57 +0200 Subject: firmware: xilinx: Fix an error handling path in 'zynqmp_firmware_probe()' If 'mfd_add_devices()' fails, we must undo 'zynqmp_pm_api_debugfs_init()' otherwise some debugfs directory and files will be left. Just move the call to 'zynqmp_pm_api_debugfs_init()' a few lines below to fix the issue. Fixes: e23d9c6d0d49 ("drivers: soc: xilinx: Add ZynqMP power domain driver") Signed-off-by: Christophe JAILLET Reviewed-by: Jolly Shah Link: https://lore.kernel.org/r/20200510130357.233364-1-christophe.jaillet@wanadoo.fr Signed-off-by: Greg Kroah-Hartman --- drivers/firmware/xilinx/zynqmp.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'drivers/firmware') diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 8095fa84d5d7..8d1ff2454e2e 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -1235,8 +1235,6 @@ static int zynqmp_firmware_probe(struct platform_device *pdev) pr_info("%s Trustzone version v%d.%d\n", __func__, pm_tz_version >> 16, pm_tz_version & 0xFFFF); - zynqmp_pm_api_debugfs_init(); - ret = mfd_add_devices(&pdev->dev, PLATFORM_DEVID_NONE, firmware_devs, ARRAY_SIZE(firmware_devs), NULL, 0, NULL); if (ret) { @@ -1244,6 +1242,8 @@ static int zynqmp_firmware_probe(struct platform_device *pdev) return ret; } + zynqmp_pm_api_debugfs_init(); + return of_platform_populate(dev->of_node, NULL, NULL, dev); } -- cgit v1.2.3