From b82e8005af14b51600714971e0c6420c4e334a50 Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Mon, 29 May 2006 08:42:34 +1000 Subject: ppc: Fix typo in TI_LOCAL_FLAGS definition A typo crept in with commit ea1e847cc202e805769c3c46ba5e5c53714068a1 which defined TI_LOCAL_FLAGS to be the offset of the `flags' field of struct thread_info, rather than the `local_flags' field. This fixes it. The typo was pointed out by Guennadi Liakhovetski. Signed-off-by: Paul Mackerras --- arch/ppc/kernel/asm-offsets.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c index cc7c4aea9397..2f5c5e157617 100644 --- a/arch/ppc/kernel/asm-offsets.c +++ b/arch/ppc/kernel/asm-offsets.c @@ -134,7 +134,7 @@ main(void) DEFINE(TI_TASK, offsetof(struct thread_info, task)); DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain)); DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); - DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, flags)); + DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags)); DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); -- cgit v1.2.3 From 6ae53cd496d36db5f25e6f84b8b9fe7e675999a1 Mon Sep 17 00:00:00 2001 From: Andi Kleen Date: Tue, 30 May 2006 22:47:45 +0200 Subject: [PATCH] x86_64: Fix stack/mmap randomization for compat tasks ia32_setup_arg_pages would ignore the passed in random stack top and use its own static value. Now it uses the 8bit of randomness native i386 would use too. This indirectly fixes mmap randomization for 32bit processes too, which depends on the stack randomization. Should also give slightly better virtual cache colouring and possibly better performance with HyperThreading. Signed-off-by: Andi Kleen Acked-by: Ingo Molnar Signed-off-by: Linus Torvalds --- arch/x86_64/ia32/ia32_binfmt.c | 4 ++-- include/asm-x86_64/elf.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/x86_64/ia32/ia32_binfmt.c b/arch/x86_64/ia32/ia32_binfmt.c index e776139afb20..926c4743d13b 100644 --- a/arch/x86_64/ia32/ia32_binfmt.c +++ b/arch/x86_64/ia32/ia32_binfmt.c @@ -339,7 +339,7 @@ int ia32_setup_arg_pages(struct linux_binprm *bprm, unsigned long stack_top, struct mm_struct *mm = current->mm; int i, ret; - stack_base = IA32_STACK_TOP - MAX_ARG_PAGES * PAGE_SIZE; + stack_base = stack_top - MAX_ARG_PAGES * PAGE_SIZE; mm->arg_start = bprm->p + stack_base; bprm->p += stack_base; @@ -357,7 +357,7 @@ int ia32_setup_arg_pages(struct linux_binprm *bprm, unsigned long stack_top, { mpnt->vm_mm = mm; mpnt->vm_start = PAGE_MASK & (unsigned long) bprm->p; - mpnt->vm_end = IA32_STACK_TOP; + mpnt->vm_end = stack_top; if (executable_stack == EXSTACK_ENABLE_X) mpnt->vm_flags = VM_STACK_FLAGS | VM_EXEC; else if (executable_stack == EXSTACK_DISABLE_X) diff --git a/include/asm-x86_64/elf.h b/include/asm-x86_64/elf.h index c98633af07d2..b4f8f4a41a6e 100644 --- a/include/asm-x86_64/elf.h +++ b/include/asm-x86_64/elf.h @@ -159,7 +159,7 @@ extern int dump_task_fpu (struct task_struct *, elf_fpregset_t *); #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) dump_task_fpu(tsk, elf_fpregs) /* 1GB for 64bit, 8MB for 32bit */ -#define STACK_RND_MASK (is_compat_task() ? 0x7ff : 0x3fffff) +#define STACK_RND_MASK (test_thread_flag(TIF_IA32) ? 0x7ff : 0x3fffff) #endif -- cgit v1.2.3 From dc9a719528d782777b86936b817cc0913d5f0b42 Mon Sep 17 00:00:00 2001 From: Andi Kleen Date: Tue, 30 May 2006 22:47:48 +0200 Subject: [PATCH] x86_64: Fix no IOMMU warning in PCI-GART driver Complaining about the IOMMU not compiled in doesn't make sense here because it is clearly compiled in. Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- arch/x86_64/kernel/pci-gart.c | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/x86_64/kernel/pci-gart.c b/arch/x86_64/kernel/pci-gart.c index 2480d3f08a47..82a7c9bfdfa0 100644 --- a/arch/x86_64/kernel/pci-gart.c +++ b/arch/x86_64/kernel/pci-gart.c @@ -631,10 +631,8 @@ static int __init pci_iommu_init(void) printk(KERN_INFO "PCI-DMA: Disabling IOMMU.\n"); if (end_pfn > MAX_DMA32_PFN) { printk(KERN_ERR "WARNING more than 4GB of memory " - "but IOMMU not compiled in.\n" - KERN_ERR "WARNING 32bit PCI may malfunction.\n" - KERN_ERR "You might want to enable " - "CONFIG_GART_IOMMU\n"); + "but IOMMU not available.\n" + KERN_ERR "WARNING 32bit PCI may malfunction.\n"); } return -1; } -- cgit v1.2.3 From 2ba567cbd7626700b800d4ce9503bd3cd78ed7ef Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Tue, 30 May 2006 22:47:51 +0200 Subject: [PATCH] i386: apic= command line option should always be From: "Jan Beulich" When using apic= on the kernel command line, this had no effect for machines matched by either the ACPI MADT or the MPS OEM table scan. However, when such option is specified, it should also take effect for this set of systems. Signed-off-by: Jan Beulich Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- arch/i386/mach-generic/probe.c | 16 ++++++++++------ 1 file changed, 10 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/i386/mach-generic/probe.c b/arch/i386/mach-generic/probe.c index cea5b3ce4b57..d55fa7b187ab 100644 --- a/arch/i386/mach-generic/probe.c +++ b/arch/i386/mach-generic/probe.c @@ -93,9 +93,11 @@ int __init mps_oem_check(struct mp_config_table *mpc, char *oem, char *productid int i; for (i = 0; apic_probe[i]; ++i) { if (apic_probe[i]->mps_oem_check(mpc,oem,productid)) { - genapic = apic_probe[i]; - printk(KERN_INFO "Switched to APIC driver `%s'.\n", - genapic->name); + if (!cmdline_apic) { + genapic = apic_probe[i]; + printk(KERN_INFO "Switched to APIC driver `%s'.\n", + genapic->name); + } return 1; } } @@ -107,9 +109,11 @@ int __init acpi_madt_oem_check(char *oem_id, char *oem_table_id) int i; for (i = 0; apic_probe[i]; ++i) { if (apic_probe[i]->acpi_madt_oem_check(oem_id, oem_table_id)) { - genapic = apic_probe[i]; - printk(KERN_INFO "Switched to APIC driver `%s'.\n", - genapic->name); + if (!cmdline_apic) { + genapic = apic_probe[i]; + printk(KERN_INFO "Switched to APIC driver `%s'.\n", + genapic->name); + } return 1; } } -- cgit v1.2.3 From b2468e525f29882f866cb0b832956e69328f9647 Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Tue, 30 May 2006 22:47:54 +0200 Subject: [PATCH] x86_64: fix last_tsc calculation of PM timer From: "Jan Beulich" The PM timer code updates vxtime.last_tsc, but this update was done incorrectly in two ways: - offset_delay being in microseconds requires multiplying with cpu_mhz rather than cpu_khz - the multiplication of offset_delay and cpu_khz (both being 32-bit values) on most current CPUs would overflow (observed value of the delay was approximately 4000us, yielding an overflow for frequencies starting a little above 1GHz) Signed-off-by: Jan Beulich Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- arch/x86_64/kernel/pmtimer.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/x86_64/kernel/pmtimer.c b/arch/x86_64/kernel/pmtimer.c index b0444a415bd6..bf421ed26808 100644 --- a/arch/x86_64/kernel/pmtimer.c +++ b/arch/x86_64/kernel/pmtimer.c @@ -68,7 +68,7 @@ int pmtimer_mark_offset(void) offset_delay = delta % (USEC_PER_SEC / HZ); rdtscll(tsc); - vxtime.last_tsc = tsc - offset_delay * cpu_khz; + vxtime.last_tsc = tsc - offset_delay * (u64)cpu_khz / 1000; /* don't calculate delay for first run, or if we've got less then a tick */ -- cgit v1.2.3 From 0d01532451710110a93891ae152d1dd1ee006ccf Mon Sep 17 00:00:00 2001 From: Daniel Yeisley Date: Tue, 30 May 2006 22:47:57 +0200 Subject: [PATCH] x86_64: Handle empty node zero From: Daniel Yeisley It is possible to boot a Unisys ES7000 with CPUs from multiple cells, and not also include the memory from those cells. This can create a scenario where node 0 has cpus, but no associated memory. The system will boot fine in a configuration where node 0 has memory, but nodes 2 and 3 do not. [AK: I rechecked the code and generic code seems to indeed handle that already. Dan's original patch had a change for mm/slab.c that seems to be already in now.] Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- arch/x86_64/kernel/pci-dma.c | 4 ++++ arch/x86_64/kernel/setup.c | 2 +- arch/x86_64/mm/srat.c | 4 +++- 3 files changed, 8 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/x86_64/kernel/pci-dma.c b/arch/x86_64/kernel/pci-dma.c index af035ede70cd..a9275c9557cf 100644 --- a/arch/x86_64/kernel/pci-dma.c +++ b/arch/x86_64/kernel/pci-dma.c @@ -54,6 +54,10 @@ dma_alloc_pages(struct device *dev, gfp_t gfp, unsigned order) else #endif node = numa_node_id(); + + if (node < first_node(node_online_map)) + node = first_node(node_online_map); + page = alloc_pages_node(node, gfp, order); return page ? page_address(page) : NULL; } diff --git a/arch/x86_64/kernel/setup.c b/arch/x86_64/kernel/setup.c index f0870bef24d1..655b9192eeb3 100644 --- a/arch/x86_64/kernel/setup.c +++ b/arch/x86_64/kernel/setup.c @@ -1051,7 +1051,7 @@ static void srat_detect_node(void) for now. */ node = apicid_to_node[hard_smp_processor_id()]; if (node == NUMA_NO_NODE) - node = 0; + node = first_node(node_online_map); numa_set_node(cpu, node); if (acpi_numa > 0) diff --git a/arch/x86_64/mm/srat.c b/arch/x86_64/mm/srat.c index e1513532df29..474df22c6ed2 100644 --- a/arch/x86_64/mm/srat.c +++ b/arch/x86_64/mm/srat.c @@ -399,8 +399,10 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end) /* First clean up the node list */ for (i = 0; i < MAX_NUMNODES; i++) { cutoff_node(i, start, end); - if ((nodes[i].end - nodes[i].start) < NODE_MIN_SIZE) + if ((nodes[i].end - nodes[i].start) < NODE_MIN_SIZE) { unparse_node(i); + node_set_offline(i); + } } if (acpi_numa <= 0) -- cgit v1.2.3 From 7ca97c6131dac9f06b1856a95a2ec89d43844286 Mon Sep 17 00:00:00 2001 From: Robert Hentosh Date: Tue, 30 May 2006 22:48:00 +0200 Subject: [PATCH] x86_64: Fix off by one in bad_addr checking in find_e820_area From: Robert Hentosh Actually, we just stumbled on a different bug found in find_e820_area() in e820.c. The following code does not handle the edge condition correctly: while (bad_addr(&addr, size) && addr+size < ei->addr + ei->size) ; last = addr + size; if ( last > ei->addr + ei->size ) continue; The second statement in the while loop needs to be a <= b so that it is the logical negavite of the if (a > b) outside it. It needs to read: while (bad_addr(&addr, size) && addr+size <= ei->addr + ei->size) ; In the case that failed bad_addr was returning an address that is exactly size bellow the end of the e820 range. AK: Again together with the earlier avoid edma fix this fixes boot on a Dell PE6850/16GB Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- arch/x86_64/kernel/e820.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/x86_64/kernel/e820.c b/arch/x86_64/kernel/e820.c index 222b5b46d2b2..1ef6028f721e 100644 --- a/arch/x86_64/kernel/e820.c +++ b/arch/x86_64/kernel/e820.c @@ -149,7 +149,7 @@ unsigned long __init find_e820_area(unsigned long start, unsigned long end, unsi addr = start; if (addr > ei->addr + ei->size) continue; - while (bad_addr(&addr, size) && addr+size < ei->addr + ei->size) + while (bad_addr(&addr, size) && addr+size <= ei->addr+ei->size) ; last = addr + size; if (last > ei->addr + ei->size) -- cgit v1.2.3 From 822ff019f72ae01baef1893e86735f1a5e36be7d Mon Sep 17 00:00:00 2001 From: Andi Kleen Date: Tue, 30 May 2006 22:48:03 +0200 Subject: [PATCH] x86_64: Don't do syscall exit tracing twice int_ret_from_syscall already does syscall exit tracing, so no need to do it again in the caller. This caused problems for UML and some other special programs doing syscall interception. Signed-off-by: Andi Kleen Signed-off-by: Linus Torvalds --- arch/x86_64/kernel/entry.S | 7 +------ 1 file changed, 1 insertion(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/x86_64/kernel/entry.S b/arch/x86_64/kernel/entry.S index c946e4fe67a7..586b34c00c48 100644 --- a/arch/x86_64/kernel/entry.S +++ b/arch/x86_64/kernel/entry.S @@ -281,12 +281,7 @@ tracesys: ja 1f movq %r10,%rcx /* fixup for C */ call *sys_call_table(,%rax,8) - movq %rax,RAX-ARGOFFSET(%rsp) -1: SAVE_REST - movq %rsp,%rdi - call syscall_trace_leave - RESTORE_TOP_OF_STACK %rbx - RESTORE_REST +1: movq %rax,RAX-ARGOFFSET(%rsp) /* Use IRET because user could have changed frame */ jmp int_ret_from_sys_call CFI_ENDPROC -- cgit v1.2.3 From 9a8fca0499c611ab37b5c0d4481ca09d3f6e8101 Mon Sep 17 00:00:00 2001 From: Linus Torvalds Date: Tue, 30 May 2006 20:32:15 -0700 Subject: Revert "[PATCH] i386/x86_64: Force pci=noacpi on HP XW9300" This reverts commit 5491d0f3e206beb95eeb506510d62a1dab462df1. As per Andi: "After some discussion with people who have the affected system it seems best to revert for 2.6.17. It broke a common BIOS workaround and PCI-X still doesn't work. Alternative is for people to change the BIOS which seems to be better right now." Signed-off-by: Linus Torvalds --- arch/i386/kernel/acpi/boot.c | 8 -------- 1 file changed, 8 deletions(-) (limited to 'arch') diff --git a/arch/i386/kernel/acpi/boot.c b/arch/i386/kernel/acpi/boot.c index daee69579b1c..40e5aba3ad3d 100644 --- a/arch/i386/kernel/acpi/boot.c +++ b/arch/i386/kernel/acpi/boot.c @@ -1066,14 +1066,6 @@ static struct dmi_system_id __initdata acpi_dmi_table[] = { DMI_MATCH(DMI_PRODUCT_NAME, "TravelMate 360"), }, }, - { - .callback = disable_acpi_pci, - .ident = "HP xw9300", - .matches = { - DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"), - DMI_MATCH(DMI_PRODUCT_NAME, "HP xw9300 Workstation"), - }, - }, {} }; -- cgit v1.2.3 From e6ed89ac9f5da16fea5111651b6de0ff0a76a5c2 Mon Sep 17 00:00:00 2001 From: Deepak Saxena Date: Tue, 30 May 2006 14:36:49 -0700 Subject: [PATCH] ARM: explicitly disable BTB on ixp2350 We don't enable the BTB on the ixp2350 as that can cause weird crashes (erratum #42.) However, some bootloaders enable the BTB, which means that we have to disable the BTB explicitly. Found thanks to Tom Rini. Signed-off-by: Lennert Buytenhek Signed-off-by: Deepak Saxena Signed-off-by: Linus Torvalds --- arch/arm/mm/proc-xsc3.S | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index 80873b36c3f7..8d32e21fe151 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S @@ -427,12 +427,13 @@ __xsc3_setup: #endif mcr p15, 0, r0, c1, c0, 1 @ set auxiliary control reg mrc p15, 0, r0, c1, c0, 0 @ get control register - bic r0, r0, #0x0200 @ .... ..R. .... .... bic r0, r0, #0x0002 @ .... .... .... ..A. orr r0, r0, #0x0005 @ .... .... .... .C.M #if BTB_ENABLE + bic r0, r0, #0x0200 @ .... ..R. .... .... orr r0, r0, #0x3900 @ ..VI Z..S .... .... #else + bic r0, r0, #0x0a00 @ .... Z.R. .... .... orr r0, r0, #0x3100 @ ..VI ...S .... .... #endif #if L2_CACHE_ENABLE -- cgit v1.2.3 From 951bc82c53f30ec6b4c2d04a051e74ea9a89b669 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Wed, 31 May 2006 01:24:02 -0700 Subject: [SPARC64]: Make smp_processor_id() functional before start_kernel() Uses of smp_processor_id() get pushed earlier and earlier in the start_kernel() sequence. So just get it working before we call start_kernel() to avoid all possible problems. Signed-off-by: David S. Miller --- arch/sparc64/kernel/head.S | 30 ++++++++++++++++++++++++++++++ arch/sparc64/kernel/setup.c | 23 +++++++++++------------ arch/sparc64/kernel/smp.c | 16 +++------------- 3 files changed, 44 insertions(+), 25 deletions(-) (limited to 'arch') diff --git a/arch/sparc64/kernel/head.S b/arch/sparc64/kernel/head.S index 3eadac5e171e..31c5892f5acc 100644 --- a/arch/sparc64/kernel/head.S +++ b/arch/sparc64/kernel/head.S @@ -10,6 +10,7 @@ #include #include #include +#include #include #include #include @@ -493,6 +494,35 @@ tlb_fixup_done: call prom_init mov %l7, %o0 ! OpenPROM cif handler + /* Initialize current_thread_info()->cpu as early as possible. + * In order to do that accurately we have to patch up the get_cpuid() + * assembler sequences. And that, in turn, requires that we know + * if we are on a Starfire box or not. While we're here, patch up + * the sun4v sequences as well. + */ + call check_if_starfire + nop + call per_cpu_patch + nop + call sun4v_patch + nop + +#ifdef CONFIG_SMP + call hard_smp_processor_id + nop + cmp %o0, NR_CPUS + blu,pt %xcc, 1f + nop + call boot_cpu_id_too_large + nop + /* Not reached... */ + +1: +#else + mov 0, %o0 +#endif + stb %o0, [%g6 + TI_CPU] + /* Off we go.... */ call start_kernel nop diff --git a/arch/sparc64/kernel/setup.c b/arch/sparc64/kernel/setup.c index 005167f82419..9cf1c88cd774 100644 --- a/arch/sparc64/kernel/setup.c +++ b/arch/sparc64/kernel/setup.c @@ -220,7 +220,7 @@ char reboot_command[COMMAND_LINE_SIZE]; static struct pt_regs fake_swapper_regs = { { 0, }, 0, 0, 0, 0 }; -static void __init per_cpu_patch(void) +void __init per_cpu_patch(void) { struct cpuid_patch_entry *p; unsigned long ver; @@ -280,7 +280,7 @@ static void __init per_cpu_patch(void) } } -static void __init sun4v_patch(void) +void __init sun4v_patch(void) { struct sun4v_1insn_patch_entry *p1; struct sun4v_2insn_patch_entry *p2; @@ -315,6 +315,15 @@ static void __init sun4v_patch(void) } } +#ifdef CONFIG_SMP +void __init boot_cpu_id_too_large(int cpu) +{ + prom_printf("Serious problem, boot cpu id (%d) >= NR_CPUS (%d)\n", + cpu, NR_CPUS); + prom_halt(); +} +#endif + void __init setup_arch(char **cmdline_p) { /* Initialize PROM console and command line. */ @@ -332,16 +341,6 @@ void __init setup_arch(char **cmdline_p) conswitchp = &prom_con; #endif - /* Work out if we are starfire early on */ - check_if_starfire(); - - /* Now we know enough to patch the get_cpuid sequences - * used by trap code. - */ - per_cpu_patch(); - - sun4v_patch(); - boot_flags_init(*cmdline_p); idprom_init(); diff --git a/arch/sparc64/kernel/smp.c b/arch/sparc64/kernel/smp.c index 90eaca3ec9a6..4e8cd79156e0 100644 --- a/arch/sparc64/kernel/smp.c +++ b/arch/sparc64/kernel/smp.c @@ -1264,7 +1264,6 @@ void __init smp_tick_init(void) boot_cpu_id = hard_smp_processor_id(); current_tick_offset = timer_tick_offset; - cpu_set(boot_cpu_id, cpu_online_map); prof_counter(boot_cpu_id) = prof_multiplier(boot_cpu_id) = 1; } @@ -1345,18 +1344,6 @@ void __init smp_setup_cpu_possible_map(void) void __devinit smp_prepare_boot_cpu(void) { - int cpu = hard_smp_processor_id(); - - if (cpu >= NR_CPUS) { - prom_printf("Serious problem, boot cpu id >= NR_CPUS\n"); - prom_halt(); - } - - current_thread_info()->cpu = cpu; - __local_per_cpu_offset = __per_cpu_offset(cpu); - - cpu_set(smp_processor_id(), cpu_online_map); - cpu_set(smp_processor_id(), phys_cpu_present_map); } int __devinit __cpu_up(unsigned int cpu) @@ -1433,4 +1420,7 @@ void __init setup_per_cpu_areas(void) for (i = 0; i < NR_CPUS; i++, ptr += size) memcpy(ptr, __per_cpu_start, __per_cpu_end - __per_cpu_start); + + /* Setup %g5 for the boot cpu. */ + __local_per_cpu_offset = __per_cpu_offset(smp_processor_id()); } -- cgit v1.2.3 From 5a47d749e3d067e057d276075fed1d91749d3841 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Tue, 30 May 2006 21:26:51 -0700 Subject: [PATCH] powerpc: Fix boot on eMac From: Benjamin Herrenschmidt Prevent calling of some platform functions on the clock chips of the eMac as it seems to cause it to lockup at boot. For now, add a quirk to prevent that from happening. Later, I might find out what's wrong and fix it but that doesn't seem to be important as the machine appear to work fine without running those. It's possible that Darwin doesn't run them. Signed-off-by: Benjamin Herrenschmidt Cc: Nathan Pilatzke Cc: Paul Mackerras Cc: Jean Delvare Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/powerpc/platforms/powermac/low_i2c.c | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch') diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c index df2343e1956b..c896ce83d412 100644 --- a/arch/powerpc/platforms/powermac/low_i2c.c +++ b/arch/powerpc/platforms/powermac/low_i2c.c @@ -1157,6 +1157,7 @@ EXPORT_SYMBOL_GPL(pmac_i2c_xfer); /* some quirks for platform function decoding */ enum { pmac_i2c_quirk_invmask = 0x00000001u, + pmac_i2c_quirk_skip = 0x00000002u, }; static void pmac_i2c_devscan(void (*callback)(struct device_node *dev, @@ -1172,6 +1173,15 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev, /* XXX Study device-tree's & apple drivers are get the quirks * right ! */ + /* Workaround: It seems that running the clockspreading + * properties on the eMac will cause lockups during boot. + * The machine seems to work fine without that. So for now, + * let's make sure i2c-hwclock doesn't match about "imic" + * clocks and we'll figure out if we really need to do + * something special about those later. + */ + { "i2c-hwclock", "imic5002", pmac_i2c_quirk_skip }, + { "i2c-hwclock", "imic5003", pmac_i2c_quirk_skip }, { "i2c-hwclock", NULL, pmac_i2c_quirk_invmask }, { "i2c-cpu-voltage", NULL, 0}, { "temp-monitor", NULL, 0 }, @@ -1198,6 +1208,8 @@ static void pmac_i2c_devscan(void (*callback)(struct device_node *dev, if (p->compatible && !device_is_compatible(np, p->compatible)) continue; + if (p->quirks & pmac_i2c_quirk_skip) + break; callback(np, p->quirks); break; } -- cgit v1.2.3 From 5cedae9ca752a43cfb1074907d12c9f01fbebd45 Mon Sep 17 00:00:00 2001 From: Deepak Saxena Date: Wed, 31 May 2006 16:14:05 -0700 Subject: [PATCH] ARM: Fix XScale PMD setting The ARM Architecture Reference Manual lists bit 4 of the PMD as "implementation defined" and it must be set to zero on Intel XScale CPUs or the cache does not behave properly. Found by Mike Rapoport while debugging a flash issue on the PXA255: http://marc.10east.com/?l=linux-arm-kernel&m=114845287600782&w=1 Signed-off-by: Deepak Saxena Signed-off-by: Linus Torvalds --- arch/arm/mm/mm-armv.c | 4 ++-- include/asm-arm/system.h | 6 ++++++ 2 files changed, 8 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/arm/mm/mm-armv.c b/arch/arm/mm/mm-armv.c index f14b2d0f3690..95273de4f772 100644 --- a/arch/arm/mm/mm-armv.c +++ b/arch/arm/mm/mm-armv.c @@ -376,7 +376,7 @@ void __init build_mem_type_table(void) ecc_mask = 0; } - if (cpu_arch <= CPU_ARCH_ARMv5TEJ) { + if (cpu_arch <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) { for (i = 0; i < ARRAY_SIZE(mem_types); i++) { if (mem_types[i].prot_l1) mem_types[i].prot_l1 |= PMD_BIT4; @@ -631,7 +631,7 @@ void setup_mm_for_reboot(char mode) pgd = init_mm.pgd; base_pmdval = PMD_SECT_AP_WRITE | PMD_SECT_AP_READ | PMD_TYPE_SECT; - if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ) + if (cpu_architecture() <= CPU_ARCH_ARMv5TEJ && !cpu_is_xscale()) base_pmdval |= PMD_BIT4; for (i = 0; i < FIRST_USER_PGD_NR + USER_PTRS_PER_PGD; i++, pgd++) { diff --git a/include/asm-arm/system.h b/include/asm-arm/system.h index 95b3abf4851b..7c9568d30307 100644 --- a/include/asm-arm/system.h +++ b/include/asm-arm/system.h @@ -127,6 +127,12 @@ static inline int cpu_is_xsc3(void) } #endif +#if !defined(CONFIG_CPU_XSCALE) && !defined(CONFIG_CPU_XSC3) +#define cpu_is_xscale() 0 +#else +#define cpu_is_xscale() 1 +#endif + #define set_cr(x) \ __asm__ __volatile__( \ "mcr p15, 0, %0, c1, c0, 0 @ set CR" \ -- cgit v1.2.3 From 477654fc5d5078d2213817609e68e8c968293261 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Thu, 27 Apr 2006 15:44:50 +0100 Subject: [MIPS] Fix typo Found by Chris Dearman (chris@mips.com). Signed-off-by: Ralf Baechle --- arch/mips/kernel/entry.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S index d101d2fb24ca..a9c6de1b9542 100644 --- a/arch/mips/kernel/entry.S +++ b/arch/mips/kernel/entry.S @@ -101,7 +101,7 @@ FEXPORT(restore_all) # restore full frame EMT 1: mfc0 v1, CP0_TCSTATUS - /* We set IXMT above, XOR should cler it here */ + /* We set IXMT above, XOR should clear it here */ xori v1, v1, TCSTATUS_IXMT or v1, v0, v1 mtc0 v1, CP0_TCSTATUS -- cgit v1.2.3 From 343fdc39713d9c2fe836523e8f2dfc6a3ac39122 Mon Sep 17 00:00:00 2001 From: Herbert Valerio Riedel Date: Wed, 12 Apr 2006 09:03:08 +0200 Subject: [MIPS] AU1xxx mips_timer_interrupt() fixes common/au1000/irq.c was missing a mips_timer_interrupt() prototype, whereas in common/au1000/time.c the actual mips_timer_interrupt() implementation was missing an irq_exit() invocation, causing a preempt_count() leak. Signed-off-by: Herbert Valerio Riedel Signed-off-by: Ralf Baechle --- arch/mips/au1000/common/irq.c | 1 + arch/mips/au1000/common/time.c | 1 + 2 files changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/mips/au1000/common/irq.c b/arch/mips/au1000/common/irq.c index da61de776154..afe05ec12c27 100644 --- a/arch/mips/au1000/common/irq.c +++ b/arch/mips/au1000/common/irq.c @@ -68,6 +68,7 @@ extern void set_debug_traps(void); extern irq_cpustat_t irq_stat [NR_CPUS]; +extern void mips_timer_interrupt(struct pt_regs *regs); static void setup_local_irq(unsigned int irq, int type, int int_req); static unsigned int startup_irq(unsigned int irq); diff --git a/arch/mips/au1000/common/time.c b/arch/mips/au1000/common/time.c index f85f1524b366..f74d66a58a21 100644 --- a/arch/mips/au1000/common/time.c +++ b/arch/mips/au1000/common/time.c @@ -116,6 +116,7 @@ void mips_timer_interrupt(struct pt_regs *regs) null: ack_r4ktimer(0); + irq_exit(); } #ifdef CONFIG_PM -- cgit v1.2.3 From 98a41de99a4e4febe99b22c3a28d434caeb3165c Mon Sep 17 00:00:00 2001 From: Nigel Stephens Date: Thu, 27 Apr 2006 15:50:32 +0100 Subject: [MIPS] Add missing 34K processor IDs The 34K is very much like a 24K on steroids. Signed-off-by: Ralf Baechle --- arch/mips/kernel/traps.c | 1 + arch/mips/mm/c-r4k.c | 1 + 2 files changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 4901f0a37fca..35cb08da3820 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -902,6 +902,7 @@ static inline void parity_protection_init(void) { switch (current_cpu_data.cputype) { case CPU_24K: + case CPU_34K: case CPU_5KC: write_c0_ecc(0x80000000); back_to_back_c0_hazard(); diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 4182e1176fae..4420191795f3 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -968,6 +968,7 @@ static void __init probe_pcache(void) case CPU_SB1: break; case CPU_24K: + case CPU_34K: if (!(read_c0_config7() & (1 << 16))) default: if (c->dcache.waysize > PAGE_SIZE) -- cgit v1.2.3 From c620953c32d301c2a7bc73f9f780301e110b7d7c Mon Sep 17 00:00:00 2001 From: Chris Dearman Date: Tue, 2 May 2006 14:08:46 +0100 Subject: [MIPS] Fix detection and handling of the 74K processor. Nothing exciting; Linux just didn't know it yet so this is most adding a value to a case statement. Signed-off-by: Chris Dearman Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-probe.c | 4 ++++ arch/mips/kernel/proc.c | 1 + arch/mips/mm/tlbex.c | 1 + arch/mips/oprofile/common.c | 1 + arch/mips/oprofile/op_model_mipsxx.c | 4 ++++ include/asm-mips/cpu.h | 4 +++- 6 files changed, 14 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 58b3b14873cb..17184921b71d 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -121,6 +121,7 @@ static inline void check_wait(void) case CPU_24K: case CPU_25KF: case CPU_34K: + case CPU_74K: case CPU_PR4450: cpu_wait = r4k_wait; printk(" available.\n"); @@ -593,6 +594,9 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c) case PRID_IMP_34K: c->cputype = CPU_34K; break; + case PRID_IMP_74K: + c->cputype = CPU_74K; + break; } } diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 84ab959f924a..197952c44467 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -74,6 +74,7 @@ static const char *cpu_name[] = { [CPU_24K] = "MIPS 24K", [CPU_25KF] = "MIPS 25Kf", [CPU_34K] = "MIPS 34K", + [CPU_74K] = "MIPS 74K", [CPU_VR4111] = "NEC VR4111", [CPU_VR4121] = "NEC VR4121", [CPU_VR4122] = "NEC VR4122", diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 053dbacac56b..4ff07e2efcb3 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -906,6 +906,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, case CPU_4KEC: case CPU_24K: case CPU_34K: + case CPU_74K: i_ehb(p); tlbw(p); break; diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c index f2b4862aaae5..91b799d2cd88 100644 --- a/arch/mips/oprofile/common.c +++ b/arch/mips/oprofile/common.c @@ -80,6 +80,7 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) case CPU_24K: case CPU_25KF: case CPU_34K: + case CPU_74K: case CPU_SB1: case CPU_SB1A: lmodel = &op_model_mipsxx; diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index 95d488ca0754..e7ce92391303 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -205,6 +205,10 @@ static int __init mipsxx_init(void) case CPU_34K: op_model_mipsxx.cpu_type = "mips/34K"; break; + + case CPU_74K: + op_model_mipsxx.cpu_type = "mips/74K"; + break; #endif case CPU_5KC: diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index 818b9a97e214..0117138149bc 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -87,6 +87,7 @@ #define PRID_IMP_24K 0x9300 #define PRID_IMP_34K 0x9500 #define PRID_IMP_24KE 0x9600 +#define PRID_IMP_74K 0x9700 /* * These are the PRID's for when 23:16 == PRID_COMP_SIBYTE @@ -196,7 +197,8 @@ #define CPU_34K 60 #define CPU_PR4450 61 #define CPU_SB1A 62 -#define CPU_LAST 62 +#define CPU_74K 63 +#define CPU_LAST 63 /* * ISA Level encodings -- cgit v1.2.3 From 235a9d3eee9a9588c17d39efff8373d0513549b5 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 3 May 2006 02:27:40 +0100 Subject: [MIPS] Remove support for sysmips(2) SETNAME and MIPS_RDNVRAM operations. SETNAME only had a minor defect but probably never had a user and MIPS_RDNVRAM was unimplemented anyway. Signed-off-by: Ralf Baechle --- arch/mips/kernel/syscall.c | 24 ------------------------ 1 file changed, 24 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index 2aeaa2fd4b32..8f4fdd94dbd0 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c @@ -280,27 +280,6 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3) char __user *name; switch(cmd) { - case SETNAME: { - char nodename[__NEW_UTS_LEN + 1]; - - if (!capable(CAP_SYS_ADMIN)) - return -EPERM; - - name = (char __user *) arg1; - - len = strncpy_from_user(nodename, name, __NEW_UTS_LEN); - if (len < 0) - return -EFAULT; - - down_write(&uts_sem); - strncpy(system_utsname.nodename, nodename, len); - nodename[__NEW_UTS_LEN] = '\0'; - strlcpy(system_utsname.nodename, nodename, - sizeof(system_utsname.nodename)); - up_write(&uts_sem); - return 0; - } - case MIPS_ATOMIC_SET: printk(KERN_CRIT "How did I get here?\n"); return -EINVAL; @@ -313,9 +292,6 @@ asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3) case FLUSH_CACHE: __flush_cache_all(); return 0; - - case MIPS_RDNVRAM: - return -EIO; } return -EINVAL; -- cgit v1.2.3 From 1c0c1ae4f3d5057d091677d0ef7dbaeb28122ded Mon Sep 17 00:00:00 2001 From: Daniel Jacobowitz Date: Mon, 8 May 2006 15:28:22 -0400 Subject: [MIPS] Update struct sigcontext member names Rename the 64-bit sc_hi and sc_lo arrays to use the same names as the 32-bit struct sigcontext (sc_mdhi, sc_hi1, et cetera). Signed-off-by: Daniel Jacobowitz Signed-off-by: Ralf Baechle --- arch/mips/kernel/asm-offsets.c | 4 ++-- arch/mips/kernel/signal-common.h | 30 ------------------------------ include/asm-mips/sigcontext.h | 10 ++++++++-- 3 files changed, 10 insertions(+), 34 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c index 92b28b674d6f..0facfaf4e950 100644 --- a/arch/mips/kernel/asm-offsets.c +++ b/arch/mips/kernel/asm-offsets.c @@ -272,8 +272,8 @@ void output_sc_defines(void) text("/* Linux sigcontext offsets. */"); offset("#define SC_REGS ", struct sigcontext, sc_regs); offset("#define SC_FPREGS ", struct sigcontext, sc_fpregs); - offset("#define SC_MDHI ", struct sigcontext, sc_hi); - offset("#define SC_MDLO ", struct sigcontext, sc_lo); + offset("#define SC_MDHI ", struct sigcontext, sc_mdhi); + offset("#define SC_MDLO ", struct sigcontext, sc_mdlo); offset("#define SC_PC ", struct sigcontext, sc_pc); offset("#define SC_FPC_CSR ", struct sigcontext, sc_fpc_csr); linefeed; diff --git a/arch/mips/kernel/signal-common.h b/arch/mips/kernel/signal-common.h index 3ca786215d48..ce6cb915c0a7 100644 --- a/arch/mips/kernel/signal-common.h +++ b/arch/mips/kernel/signal-common.h @@ -31,7 +31,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) save_gp_reg(31); #undef save_gp_reg -#ifdef CONFIG_32BIT err |= __put_user(regs->hi, &sc->sc_mdhi); err |= __put_user(regs->lo, &sc->sc_mdlo); if (cpu_has_dsp) { @@ -43,20 +42,6 @@ setup_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) err |= __put_user(mflo3(), &sc->sc_lo3); err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp); } -#endif -#ifdef CONFIG_64BIT - err |= __put_user(regs->hi, &sc->sc_hi[0]); - err |= __put_user(regs->lo, &sc->sc_lo[0]); - if (cpu_has_dsp) { - err |= __put_user(mfhi1(), &sc->sc_hi[1]); - err |= __put_user(mflo1(), &sc->sc_lo[1]); - err |= __put_user(mfhi2(), &sc->sc_hi[2]); - err |= __put_user(mflo2(), &sc->sc_lo[2]); - err |= __put_user(mfhi3(), &sc->sc_hi[3]); - err |= __put_user(mflo3(), &sc->sc_lo[3]); - err |= __put_user(rddsp(DSP_MASK), &sc->sc_dsp); - } -#endif err |= __put_user(!!used_math(), &sc->sc_used_math); @@ -92,7 +77,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) current_thread_info()->restart_block.fn = do_no_restart_syscall; err |= __get_user(regs->cp0_epc, &sc->sc_pc); -#ifdef CONFIG_32BIT err |= __get_user(regs->hi, &sc->sc_mdhi); err |= __get_user(regs->lo, &sc->sc_mdlo); if (cpu_has_dsp) { @@ -104,20 +88,6 @@ restore_sigcontext(struct pt_regs *regs, struct sigcontext __user *sc) err |= __get_user(treg, &sc->sc_lo3); mtlo3(treg); err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK); } -#endif -#ifdef CONFIG_64BIT - err |= __get_user(regs->hi, &sc->sc_hi[0]); - err |= __get_user(regs->lo, &sc->sc_lo[0]); - if (cpu_has_dsp) { - err |= __get_user(treg, &sc->sc_hi[1]); mthi1(treg); - err |= __get_user(treg, &sc->sc_lo[1]); mthi1(treg); - err |= __get_user(treg, &sc->sc_hi[2]); mthi2(treg); - err |= __get_user(treg, &sc->sc_lo[2]); mthi2(treg); - err |= __get_user(treg, &sc->sc_hi[3]); mthi3(treg); - err |= __get_user(treg, &sc->sc_lo[3]); mthi3(treg); - err |= __get_user(treg, &sc->sc_dsp); wrdsp(treg, DSP_MASK); - } -#endif #define restore_gp_reg(i) do { \ err |= __get_user(regs->regs[i], &sc->sc_regs[i]); \ diff --git a/include/asm-mips/sigcontext.h b/include/asm-mips/sigcontext.h index 8edabb0be23f..cefa657dd04a 100644 --- a/include/asm-mips/sigcontext.h +++ b/include/asm-mips/sigcontext.h @@ -55,8 +55,14 @@ struct sigcontext { struct sigcontext { unsigned long sc_regs[32]; unsigned long sc_fpregs[32]; - unsigned long sc_hi[4]; - unsigned long sc_lo[4]; + unsigned long sc_mdhi; + unsigned long sc_hi1; + unsigned long sc_hi2; + unsigned long sc_hi3; + unsigned long sc_mdlo; + unsigned long sc_lo1; + unsigned long sc_lo2; + unsigned long sc_lo3; unsigned long sc_pc; unsigned int sc_fpc_csr; unsigned int sc_used_math; -- cgit v1.2.3 From 867a521b4cd6c9d26cd736d85bfe84e10c0c05ac Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 9 May 2006 20:23:49 +0900 Subject: [MIPS] Fix kgdb exception handler from user mode. Fix a calculation of saved vector address in trap_low. (damage done by lmo f4c72cc737561aab0d9c7f877abbc0a853f1c465) Signed-off-by: Ralf Baechle --- arch/mips/kernel/gdb-low.S | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/gdb-low.S b/arch/mips/kernel/gdb-low.S index 10f28fb9f008..5fd7a8af0c62 100644 --- a/arch/mips/kernel/gdb-low.S +++ b/arch/mips/kernel/gdb-low.S @@ -54,9 +54,11 @@ */ mfc0 k0, CP0_CAUSE andi k0, k0, 0x7c - add k1, k1, k0 - PTR_L k0, saved_vectors(k1) - jr k0 +#ifdef CONFIG_64BIT + dsll k0, k0, 1 +#endif + PTR_L k1, saved_vectors(k0) + jr k1 nop 1: move k0, sp -- cgit v1.2.3 From 04b6b3b651b2147ab7e94c0d302b5cab07dfab4c Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Wed, 10 May 2006 15:36:04 +0900 Subject: [MIPS] Use generic DWARF_DEBUG When debugging a kernel compiled by gcc 4.1 with gdb 6.4, gdb could not show filename, linenumber, etc. It seems fixed if I used generic DWARF_DEBUG macro. Although gcc 3.x seems work without this change, it would be better to use the generic macro unless there were something MIPS specific. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/kernel/vmlinux.lds.S | 13 +++---------- 1 file changed, 3 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S index 14fa00e3cdfa..73f7acae8b25 100644 --- a/arch/mips/kernel/vmlinux.lds.S +++ b/arch/mips/kernel/vmlinux.lds.S @@ -155,16 +155,9 @@ SECTIONS converted to the new style linker. */ .stab 0 : { *(.stab) } .stabstr 0 : { *(.stabstr) } - /* DWARF debug sections. - Symbols in the .debug DWARF section are relative to the beginning of the - section so we begin .debug at 0. It's not clear yet what needs to happen - for the others. */ - .debug 0 : { *(.debug) } - .debug_srcinfo 0 : { *(.debug_srcinfo) } - .debug_aranges 0 : { *(.debug_aranges) } - .debug_pubnames 0 : { *(.debug_pubnames) } - .debug_sfnames 0 : { *(.debug_sfnames) } - .line 0 : { *(.line) } + + DWARF_DEBUG + /* These must appear regardless of . */ .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } -- cgit v1.2.3 From 3fa986faad2bb015c3ad6d09a0686016482bc01c Mon Sep 17 00:00:00 2001 From: Martin Michlmayr Date: Tue, 9 May 2006 23:34:53 +0200 Subject: [MIPS] Create consistency in "system type" selection. The "system type" Kconfig options on MIPS are not consistent. For some platforms, only the name is listed while other entries are prepended with "Support for". Remove this as it doesn't make sense when describing the "system type". Signed-off-by: Martin Michlmayr Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 86 +++++++++++++++++++++++++++---------------------------- 1 file changed, 43 insertions(+), 43 deletions(-) (limited to 'arch') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index ee5fbb02b28f..ceca3bcaa9bc 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -13,7 +13,7 @@ choice default SGI_IP22 config MIPS_MTX1 - bool "Support for 4G Systems MTX-1 board" + bool "4G Systems MTX-1 board" select DMA_NONCOHERENT select HW_HAS_PCI select SOC_AU1500 @@ -120,7 +120,7 @@ config MIPS_MIRAGE select SYS_SUPPORTS_LITTLE_ENDIAN config MIPS_COBALT - bool "Support for Cobalt Server" + bool "Cobalt Server" select DMA_NONCOHERENT select HW_HAS_PCI select I8259 @@ -132,7 +132,7 @@ config MIPS_COBALT select SYS_SUPPORTS_LITTLE_ENDIAN config MACH_DECSTATION - bool "Support for DECstations" + bool "DECstations" select BOOT_ELF32 select DMA_NONCOHERENT select EARLY_PRINTK @@ -158,7 +158,7 @@ config MACH_DECSTATION otherwise choose R3000. config MIPS_EV64120 - bool "Support for Galileo EV64120 Evaluation board (EXPERIMENTAL)" + bool "Galileo EV64120 Evaluation board (EXPERIMENTAL)" depends on EXPERIMENTAL select DMA_NONCOHERENT select HW_HAS_PCI @@ -175,7 +175,7 @@ config MIPS_EV64120 kernel for this platform. config MIPS_EV96100 - bool "Support for Galileo EV96100 Evaluation board (EXPERIMENTAL)" + bool "Galileo EV96100 Evaluation board (EXPERIMENTAL)" depends on EXPERIMENTAL select DMA_NONCOHERENT select HW_HAS_PCI @@ -195,7 +195,7 @@ config MIPS_EV96100 here if you wish to build a kernel for this platform. config MIPS_IVR - bool "Support for Globespan IVR board" + bool "Globespan IVR board" select DMA_NONCOHERENT select HW_HAS_PCI select ITE_BOARD_GEN @@ -211,7 +211,7 @@ config MIPS_IVR build a kernel for this platform. config MIPS_ITE8172 - bool "Support for ITE 8172G board" + bool "ITE 8172G board" select DMA_NONCOHERENT select HW_HAS_PCI select ITE_BOARD_GEN @@ -228,7 +228,7 @@ config MIPS_ITE8172 a kernel for this platform. config MACH_JAZZ - bool "Support for the Jazz family of machines" + bool "Jazz family of machines" select ARC select ARC32 select ARCH_MAY_HAVE_PC_FDC @@ -246,7 +246,7 @@ config MACH_JAZZ Olivetti M700-10 workstations. config LASAT - bool "Support for LASAT Networks platforms" + bool "LASAT Networks platforms" select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_GT64120 @@ -258,7 +258,7 @@ config LASAT select SYS_SUPPORTS_LITTLE_ENDIAN config MIPS_ATLAS - bool "Support for MIPS Atlas board" + bool "MIPS Atlas board" select BOOT_ELF32 select DMA_NONCOHERENT select IRQ_CPU @@ -283,7 +283,7 @@ config MIPS_ATLAS board. config MIPS_MALTA - bool "Support for MIPS Malta board" + bool "MIPS Malta board" select ARCH_MAY_HAVE_PC_FDC select BOOT_ELF32 select HAVE_STD_PC_SERIAL_PORT @@ -311,7 +311,7 @@ config MIPS_MALTA board. config MIPS_SEAD - bool "Support for MIPS SEAD board (EXPERIMENTAL)" + bool "MIPS SEAD board (EXPERIMENTAL)" depends on EXPERIMENTAL select IRQ_CPU select DMA_NONCOHERENT @@ -328,7 +328,7 @@ config MIPS_SEAD board. config MIPS_SIM - bool 'Support for MIPS simulator (MIPSsim)' + bool 'MIPS simulator (MIPSsim)' select DMA_NONCOHERENT select IRQ_CPU select SYS_HAS_CPU_MIPS32_R1 @@ -341,7 +341,7 @@ config MIPS_SIM emulator. config MOMENCO_JAGUAR_ATX - bool "Support for Momentum Jaguar board" + bool "Momentum Jaguar board" select BOOT_ELF32 select DMA_NONCOHERENT select HW_HAS_PCI @@ -361,7 +361,7 @@ config MOMENCO_JAGUAR_ATX Momentum Computer . config MOMENCO_OCELOT - bool "Support for Momentum Ocelot board" + bool "Momentum Ocelot board" select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU @@ -378,7 +378,7 @@ config MOMENCO_OCELOT Momentum Computer . config MOMENCO_OCELOT_3 - bool "Support for Momentum Ocelot-3 board" + bool "Momentum Ocelot-3 board" select BOOT_ELF32 select DMA_NONCOHERENT select HW_HAS_PCI @@ -397,7 +397,7 @@ config MOMENCO_OCELOT_3 PMC-Sierra Rm79000 core. config MOMENCO_OCELOT_C - bool "Support for Momentum Ocelot-C board" + bool "Momentum Ocelot-C board" select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU @@ -414,7 +414,7 @@ config MOMENCO_OCELOT_C Momentum Computer . config MOMENCO_OCELOT_G - bool "Support for Momentum Ocelot-G board" + bool "Momentum Ocelot-G board" select DMA_NONCOHERENT select HW_HAS_PCI select IRQ_CPU @@ -431,23 +431,23 @@ config MOMENCO_OCELOT_G Momentum Computer . config MIPS_XXS1500 - bool "Support for MyCable XXS1500 board" + bool "MyCable XXS1500 board" select DMA_NONCOHERENT select SOC_AU1500 select SYS_SUPPORTS_LITTLE_ENDIAN config PNX8550_V2PCI - bool "Support for Philips PNX8550 based Viper2-PCI board" + bool "Philips PNX8550 based Viper2-PCI board" select PNX8550 select SYS_SUPPORTS_LITTLE_ENDIAN config PNX8550_JBS - bool "Support for Philips PNX8550 based JBS board" + bool "Philips PNX8550 based JBS board" select PNX8550 select SYS_SUPPORTS_LITTLE_ENDIAN config DDB5074 - bool "Support for NEC DDB Vrc-5074 (EXPERIMENTAL)" + bool "NEC DDB Vrc-5074 (EXPERIMENTAL)" depends on EXPERIMENTAL select DDB5XXX_COMMON select DMA_NONCOHERENT @@ -465,7 +465,7 @@ config DDB5074 evaluation board. config DDB5476 - bool "Support for NEC DDB Vrc-5476" + bool "NEC DDB Vrc-5476" select DDB5XXX_COMMON select DMA_NONCOHERENT select HAVE_STD_PC_SERIAL_PORT @@ -486,7 +486,7 @@ config DDB5476 IDE controller, PS2 keyboard, PS2 mouse, etc. config DDB5477 - bool "Support for NEC DDB Vrc-5477" + bool "NEC DDB Vrc-5477" select DDB5XXX_COMMON select DMA_NONCOHERENT select HW_HAS_PCI @@ -504,13 +504,13 @@ config DDB5477 ether port USB, AC97, PCI, etc. config MACH_VR41XX - bool "Support for NEC VR4100 series based machines" + bool "NEC VR41XX-based machines" select SYS_HAS_CPU_VR41XX select SYS_SUPPORTS_32BIT_KERNEL select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL config PMC_YOSEMITE - bool "Support for PMC-Sierra Yosemite eval board" + bool "PMC-Sierra Yosemite eval board" select DMA_COHERENT select HW_HAS_PCI select IRQ_CPU @@ -527,7 +527,7 @@ config PMC_YOSEMITE manufactured by PMC-Sierra. config QEMU - bool "Support for Qemu" + bool "Qemu" select DMA_COHERENT select GENERIC_ISA_DMA select HAVE_STD_PC_SERIAL_PORT @@ -547,7 +547,7 @@ config QEMU can be found at http://www.linux-mips.org/wiki/Qemu. config SGI_IP22 - bool "Support for SGI IP22 (Indy/Indigo2)" + bool "SGI IP22 (Indy/Indigo2)" select ARC select ARC32 select BOOT_ELF32 @@ -567,7 +567,7 @@ config SGI_IP22 that runs on these, say Y here. config SGI_IP27 - bool "Support for SGI IP27 (Origin200/2000)" + bool "SGI IP27 (Origin200/2000)" select ARC select ARC64 select BOOT_ELF64 @@ -583,7 +583,7 @@ config SGI_IP27 here. config SGI_IP32 - bool "Support for SGI IP32 (O2) (EXPERIMENTAL)" + bool "SGI IP32 (O2) (EXPERIMENTAL)" depends on EXPERIMENTAL select ARC select ARC32 @@ -604,7 +604,7 @@ config SGI_IP32 If you want this kernel to run on SGI O2 workstation, say Y here. config SIBYTE_BIGSUR - bool "Support for Sibyte BCM91480B-BigSur" + bool "Sibyte BCM91480B-BigSur" select BOOT_ELF32 select DMA_COHERENT select PCI_DOMAINS @@ -615,7 +615,7 @@ config SIBYTE_BIGSUR select SYS_SUPPORTS_LITTLE_ENDIAN config SIBYTE_SWARM - bool "Support for Sibyte BCM91250A-SWARM" + bool "Sibyte BCM91250A-SWARM" select BOOT_ELF32 select DMA_COHERENT select SIBYTE_SB1250 @@ -626,7 +626,7 @@ config SIBYTE_SWARM select SYS_SUPPORTS_LITTLE_ENDIAN config SIBYTE_SENTOSA - bool "Support for Sibyte BCM91250E-Sentosa" + bool "Sibyte BCM91250E-Sentosa" depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT @@ -637,7 +637,7 @@ config SIBYTE_SENTOSA select SYS_SUPPORTS_LITTLE_ENDIAN config SIBYTE_RHONE - bool "Support for Sibyte BCM91125E-Rhone" + bool "Sibyte BCM91125E-Rhone" depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT @@ -648,7 +648,7 @@ config SIBYTE_RHONE select SYS_SUPPORTS_LITTLE_ENDIAN config SIBYTE_CARMEL - bool "Support for Sibyte BCM91120x-Carmel" + bool "Sibyte BCM91120x-Carmel" depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT @@ -659,7 +659,7 @@ config SIBYTE_CARMEL select SYS_SUPPORTS_LITTLE_ENDIAN config SIBYTE_PTSWARM - bool "Support for Sibyte BCM91250PT-PTSWARM" + bool "Sibyte BCM91250PT-PTSWARM" depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT @@ -671,7 +671,7 @@ config SIBYTE_PTSWARM select SYS_SUPPORTS_LITTLE_ENDIAN config SIBYTE_LITTLESUR - bool "Support for Sibyte BCM91250C2-LittleSur" + bool "Sibyte BCM91250C2-LittleSur" depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT @@ -683,7 +683,7 @@ config SIBYTE_LITTLESUR select SYS_SUPPORTS_LITTLE_ENDIAN config SIBYTE_CRHINE - bool "Support for Sibyte BCM91120C-CRhine" + bool "Sibyte BCM91120C-CRhine" depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT @@ -694,7 +694,7 @@ config SIBYTE_CRHINE select SYS_SUPPORTS_LITTLE_ENDIAN config SIBYTE_CRHONE - bool "Support for Sibyte BCM91125C-CRhone" + bool "Sibyte BCM91125C-CRhone" depends on EXPERIMENTAL select BOOT_ELF32 select DMA_COHERENT @@ -706,7 +706,7 @@ config SIBYTE_CRHONE select SYS_SUPPORTS_LITTLE_ENDIAN config SNI_RM200_PCI - bool "Support for SNI RM200 PCI" + bool "SNI RM200 PCI" select ARC select ARC32 select ARCH_MAY_HAVE_PC_FDC @@ -732,7 +732,7 @@ config SNI_RM200_PCI support this machine type. config TOSHIBA_JMR3927 - bool "Support for Toshiba JMR-TX3927 board" + bool "Toshiba JMR-TX3927 board" select DMA_NONCOHERENT select HW_HAS_PCI select MIPS_TX3927 @@ -743,7 +743,7 @@ config TOSHIBA_JMR3927 select TOSHIBA_BOARDS config TOSHIBA_RBTX4927 - bool "Support for Toshiba TBTX49[23]7 board" + bool "Toshiba TBTX49[23]7 board" select DMA_NONCOHERENT select HAS_TXX9_SERIAL select HW_HAS_PCI @@ -760,7 +760,7 @@ config TOSHIBA_RBTX4927 support this machine type config TOSHIBA_RBTX4938 - bool "Support for Toshiba RBTX4938 board" + bool "Toshiba RBTX4938 board" select HAVE_STD_PC_SERIAL_PORT select DMA_NONCOHERENT select GENERIC_ISA_DMA -- cgit v1.2.3 From 78665aaa96fe62b4cee6c226680801c4480aa407 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 11 May 2006 00:41:26 +0900 Subject: [MIPS] Use generic STABS_DEBUG macro. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/kernel/vmlinux.lds.S | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S index 73f7acae8b25..b84d1f9ce28e 100644 --- a/arch/mips/kernel/vmlinux.lds.S +++ b/arch/mips/kernel/vmlinux.lds.S @@ -151,16 +151,13 @@ SECTIONS /* This is the MIPS specific mdebug section. */ .mdebug : { *(.mdebug) } - /* These are needed for ELF backends which have not yet been - converted to the new style linker. */ - .stab 0 : { *(.stab) } - .stabstr 0 : { *(.stabstr) } + + STABS_DEBUG DWARF_DEBUG /* These must appear regardless of . */ .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } - .comment : { *(.comment) } .note : { *(.note) } } -- cgit v1.2.3 From 7f3f1d01a9020cff2cb2390aaee3f8df0d70e203 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Fri, 12 May 2006 13:20:06 +0100 Subject: [MIPS] Fix deadlock on MP with cache aliases. A proper fix would involve introducing the notion of shared caches but at this stage of 2.6.17 that's going to be too intrusive and not needed for current hardware; aside I think some discussion will be needed. So for now on the affected SMP configurations which happen to suffer from cache aliases we make use of the fact that a single cache will be shared by all processors. This solves the deadlock issue and will improve performance by getting rid of the smp_call_function overhead. Signed-off-by: Ralf Baechle --- arch/mips/mm/c-r4k.c | 39 ++++++++++++++++++++++++++++++--------- 1 file changed, 30 insertions(+), 9 deletions(-) (limited to 'arch') diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 4420191795f3..570bc4e30fd5 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -29,6 +29,27 @@ #include #include /* for run_uncached() */ + +/* + * Special Variant of smp_call_function for use by cache functions: + * + * o No return value + * o collapses to normal function call on UP kernels + * o collapses to normal function call on systems with a single shared + * primary cache. + */ +static inline void r4k_on_each_cpu(void (*func) (void *info), void *info, + int retry, int wait) +{ + preempt_disable(); + +#if !defined(CONFIG_MIPS_MT_SMP) && !defined(CONFIG_MIPS_MT_SMTC) + smp_call_function(func, info, retry, wait); +#endif + func(info); + preempt_enable(); +} + /* * Must die. */ @@ -299,7 +320,7 @@ static void r4k_flush_cache_all(void) if (!cpu_has_dc_aliases) return; - on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1); + r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1); } static inline void local_r4k___flush_cache_all(void * args) @@ -320,7 +341,7 @@ static inline void local_r4k___flush_cache_all(void * args) static void r4k___flush_cache_all(void) { - on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1); + r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1, 1); } static inline void local_r4k_flush_cache_range(void * args) @@ -341,7 +362,7 @@ static inline void local_r4k_flush_cache_range(void * args) static void r4k_flush_cache_range(struct vm_area_struct *vma, unsigned long start, unsigned long end) { - on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1); + r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1); } static inline void local_r4k_flush_cache_mm(void * args) @@ -370,7 +391,7 @@ static void r4k_flush_cache_mm(struct mm_struct *mm) if (!cpu_has_dc_aliases) return; - on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1); + r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1); } struct flush_cache_page_args { @@ -461,7 +482,7 @@ static void r4k_flush_cache_page(struct vm_area_struct *vma, args.addr = addr; args.pfn = pfn; - on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1); + r4k_on_each_cpu(local_r4k_flush_cache_page, &args, 1, 1); } static inline void local_r4k_flush_data_cache_page(void * addr) @@ -471,7 +492,7 @@ static inline void local_r4k_flush_data_cache_page(void * addr) static void r4k_flush_data_cache_page(unsigned long addr) { - on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1); + r4k_on_each_cpu(local_r4k_flush_data_cache_page, (void *) addr, 1, 1); } struct flush_icache_range_args { @@ -514,7 +535,7 @@ static void r4k_flush_icache_range(unsigned long start, unsigned long end) args.start = start; args.end = end; - on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1); + r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1); instruction_hazard(); } @@ -590,7 +611,7 @@ static void r4k_flush_icache_page(struct vm_area_struct *vma, args.vma = vma; args.page = page; - on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1); + r4k_on_each_cpu(local_r4k_flush_icache_page, &args, 1, 1); } @@ -689,7 +710,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg) static void r4k_flush_cache_sigtramp(unsigned long addr) { - on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1); + r4k_on_each_cpu(local_r4k_flush_cache_sigtramp, (void *) addr, 1, 1); } static void r4k_flush_icache_all(void) -- cgit v1.2.3 From 714bfad60f3a127147aba76e9c57860c26b1450d Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 17 May 2006 14:04:30 +0100 Subject: [MIPS] Remove EXPERIMENTAL from PAGE_SIZE_16KB This is known to be working fine for a while. While at it also update and fix the help texts. Signed-off-by: Ralf Baechle --- arch/mips/Kconfig | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) (limited to 'arch') diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index ceca3bcaa9bc..e8ff09fe73d9 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -1411,13 +1411,12 @@ config PAGE_SIZE_8KB config PAGE_SIZE_16KB bool "16kB" - depends on EXPERIMENTAL && !CPU_R3000 && !CPU_TX39XX + depends on !CPU_R3000 && !CPU_TX39XX help Using 16kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available on - all non-R3000 family processor. Not that at the time of this - writing this option is still high experimental; there are also - issues with compatibility of user applications. + all non-R3000 family processors. Note that you will need a suitable + Linux distribution to support this. config PAGE_SIZE_64KB bool "64kB" @@ -1426,8 +1425,7 @@ config PAGE_SIZE_64KB Using 64kB page size will result in higher performance kernel at the price of higher memory consumption. This option is available on all non-R3000 family processor. Not that at the time of this - writing this option is still high experimental; there are also - issues with compatibility of user applications. + writing this option is still high experimental. endchoice -- cgit v1.2.3 From 44d921b246923380f26b8010e47ac5dfe48fcec5 Mon Sep 17 00:00:00 2001 From: Kumba Date: Tue, 16 May 2006 22:23:59 -0400 Subject: [MIPS] Treat R14000 like R10000. Signed-off-by: Joshua Kinard Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-probe.c | 9 +++++++++ arch/mips/kernel/proc.c | 1 + arch/mips/mm/c-r4k.c | 4 ++++ arch/mips/mm/pg-r4k.c | 1 + arch/mips/mm/tlbex.c | 1 + include/asm-mips/cpu.h | 4 +++- 6 files changed, 19 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 17184921b71d..bef3e2dc7c52 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -433,6 +433,15 @@ static inline void cpu_probe_legacy(struct cpuinfo_mips *c) MIPS_CPU_LLSC; c->tlbsize = 64; break; + case PRID_IMP_R14000: + c->cputype = CPU_R14000; + c->isa_level = MIPS_CPU_ISA_IV; + c->options = MIPS_CPU_TLB | MIPS_CPU_4K_CACHE | MIPS_CPU_4KEX | + MIPS_CPU_FPU | MIPS_CPU_32FPR | + MIPS_CPU_COUNTER | MIPS_CPU_WATCH | + MIPS_CPU_LLSC; + c->tlbsize = 64; + break; } } diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c index 197952c44467..9def554f335b 100644 --- a/arch/mips/kernel/proc.c +++ b/arch/mips/kernel/proc.c @@ -42,6 +42,7 @@ static const char *cpu_name[] = { [CPU_R8000] = "R8000", [CPU_R10000] = "R10000", [CPU_R12000] = "R12000", + [CPU_R14000] = "R14000", [CPU_R4300] = "R4300", [CPU_R4650] = "R4650", [CPU_R4700] = "R4700", diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 570bc4e30fd5..6b3541769602 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -335,6 +335,7 @@ static inline void local_r4k___flush_cache_all(void * args) case CPU_R4400MC: case CPU_R10000: case CPU_R12000: + case CPU_R14000: r4k_blast_scache(); } } @@ -833,6 +834,7 @@ static void __init probe_pcache(void) case CPU_R10000: case CPU_R12000: + case CPU_R14000: icache_size = 1 << (12 + ((config & R10K_CONF_IC) >> 29)); c->icache.linesz = 64; c->icache.ways = 2; @@ -986,6 +988,7 @@ static void __init probe_pcache(void) c->dcache.flags |= MIPS_CACHE_PINDEX; case CPU_R10000: case CPU_R12000: + case CPU_R14000: case CPU_SB1: break; case CPU_24K: @@ -1113,6 +1116,7 @@ static void __init setup_scache(void) case CPU_R10000: case CPU_R12000: + case CPU_R14000: scache_size = 0x80000 << ((config & R10K_CONF_SS) >> 16); c->scache.linesz = 64 << ((config >> 13) & 1); c->scache.ways = 2; diff --git a/arch/mips/mm/pg-r4k.c b/arch/mips/mm/pg-r4k.c index e4390dc3eb48..b7c749232ffe 100644 --- a/arch/mips/mm/pg-r4k.c +++ b/arch/mips/mm/pg-r4k.c @@ -357,6 +357,7 @@ void __init build_clear_page(void) case CPU_R10000: case CPU_R12000: + case CPU_R14000: pref_src_mode = Pref_LoadStreamed; pref_dst_mode = Pref_StoreStreamed; break; diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index 4ff07e2efcb3..54507be2ab5b 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c @@ -875,6 +875,7 @@ static __init void build_tlb_write_entry(u32 **p, struct label **l, case CPU_R10000: case CPU_R12000: + case CPU_R14000: case CPU_4KC: case CPU_SB1: case CPU_SB1A: diff --git a/include/asm-mips/cpu.h b/include/asm-mips/cpu.h index 0117138149bc..dff2a0a52f8f 100644 --- a/include/asm-mips/cpu.h +++ b/include/asm-mips/cpu.h @@ -51,6 +51,7 @@ #define PRID_IMP_R4300 0x0b00 #define PRID_IMP_VR41XX 0x0c00 #define PRID_IMP_R12000 0x0e00 +#define PRID_IMP_R14000 0x0f00 #define PRID_IMP_R8000 0x1000 #define PRID_IMP_PR4450 0x1200 #define PRID_IMP_R4600 0x2000 @@ -198,7 +199,8 @@ #define CPU_PR4450 61 #define CPU_SB1A 62 #define CPU_74K 63 -#define CPU_LAST 63 +#define CPU_R14000 64 +#define CPU_LAST 64 /* * ISA Level encodings -- cgit v1.2.3 From ec8510f6fe57f59e42484809679af31ca7896dcf Mon Sep 17 00:00:00 2001 From: Lennert Buytenhek Date: Fri, 2 Jun 2006 19:51:51 +0100 Subject: [ARM] 3540/1: ixp23xx: deal with gap in interrupt bitmasks Patch from Lennert Buytenhek On the ixp23xx, the microengine thread interrupt sources are numbered 56..119, but their mask/status bits are located in bit positions 64..127 in the various registers in the interrupt controller (bit positions 56..63 are unused.) We don't deal with this, so currently, when asked to enable IRQ 64, we will enable IRQ 56 instead. The only interrupts >= 64 are the thread interrupt sources, and there are no in-tree users of those yet, so this is fortunately not a big problem, but this needs fixing anyway. Signed-off-by: Lennert Buytenhek Signed-off-by: Russell King --- arch/arm/mach-ixp23xx/core.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-ixp23xx/core.c b/arch/arm/mach-ixp23xx/core.c index 092ee12ced42..affd1d5d7440 100644 --- a/arch/arm/mach-ixp23xx/core.c +++ b/arch/arm/mach-ixp23xx/core.c @@ -178,8 +178,12 @@ static int ixp23xx_irq_set_type(unsigned int irq, unsigned int type) static void ixp23xx_irq_mask(unsigned int irq) { - volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32); + volatile unsigned long *intr_reg; + if (irq >= 56) + irq += 8; + + intr_reg = IXP23XX_INTR_EN1 + (irq / 32); *intr_reg &= ~(1 << (irq % 32)); } @@ -199,17 +203,25 @@ static void ixp23xx_irq_ack(unsigned int irq) */ static void ixp23xx_irq_level_unmask(unsigned int irq) { - volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32); + volatile unsigned long *intr_reg; ixp23xx_irq_ack(irq); + if (irq >= 56) + irq += 8; + + intr_reg = IXP23XX_INTR_EN1 + (irq / 32); *intr_reg |= (1 << (irq % 32)); } static void ixp23xx_irq_edge_unmask(unsigned int irq) { - volatile unsigned long *intr_reg = IXP23XX_INTR_EN1 + (irq / 32); + volatile unsigned long *intr_reg; + + if (irq >= 56) + irq += 8; + intr_reg = IXP23XX_INTR_EN1 + (irq / 32); *intr_reg |= (1 << (irq % 32)); } -- cgit v1.2.3 From c41045a43a08f898ef5490036f761c87a43dcddc Mon Sep 17 00:00:00 2001 From: Egry Gabor Date: Sun, 4 Jun 2006 21:22:11 +0100 Subject: [ARM] Trivial typo fixes Trivial typo fixes in Kconfig files (ARM). Signed-off-by: Egry Gabor Signed-off-by: Russell King --- arch/arm/Kconfig.debug | 2 +- arch/arm/mach-ixp4xx/Kconfig | 2 +- arch/arm/mach-s3c2410/Kconfig | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5d3acff8c596..d22f38b957db 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -101,7 +101,7 @@ config DEBUG_S3C2410_UART help Choice for UART for kernel low-level using S3C2410 UARTS, should be between zero and two. The port must have been - initalised by the boot-loader before use. + initialised by the boot-loader before use. The uncompressor code port configuration is now handled by CONFIG_S3C2410_LOWLEVEL_UART_PORT. diff --git a/arch/arm/mach-ixp4xx/Kconfig b/arch/arm/mach-ixp4xx/Kconfig index 2a39f9e481ad..3b23f43cb160 100644 --- a/arch/arm/mach-ixp4xx/Kconfig +++ b/arch/arm/mach-ixp4xx/Kconfig @@ -141,7 +141,7 @@ config IXP4XX_INDIRECT_PCI 2) If > 64MB of memory space is required, the IXP4xx can be configured to use indirect registers to access PCI This allows for up to 128MB (0x48000000 to 0x4fffffff) of memory on the bus. - The disadvantadge of this is that every PCI access requires + The disadvantage of this is that every PCI access requires three local register accesses plus a spinlock, but in some cases the performance hit is acceptable. In addition, you cannot mmap() PCI devices in this case due to the indirect nature diff --git a/arch/arm/mach-s3c2410/Kconfig b/arch/arm/mach-s3c2410/Kconfig index ce7d81000695..970f98dadffc 100644 --- a/arch/arm/mach-s3c2410/Kconfig +++ b/arch/arm/mach-s3c2410/Kconfig @@ -170,7 +170,7 @@ config S3C2410_PM_DEBUG depends on ARCH_S3C2410 && PM help Say Y here if you want verbose debugging from the PM Suspend and - Resume code. See `Documentation/arm/Samsing-S3C24XX/Suspend.txt` + Resume code. See for more information. config S3C2410_PM_CHECK -- cgit v1.2.3 From ae5de0ff0bc24664a053109c6caa782ba2ad7c53 Mon Sep 17 00:00:00 2001 From: "David S. Miller" Date: Sun, 4 Jun 2006 21:32:01 -0700 Subject: [SPARC64]: Fix missing fold at end of checksums. Both csum_partial() and the csum_partial_copy*() family of routines forget to do a final fold on the computed checksum value on sparc64. So do the standard Sparc "add + set condition codes, add carry" sequence, then make sure the high 32-bits of the return value are clear. Based upon some excellent detective work and debugging done by Richard Braun and Samuel Thibault. Signed-off-by: David S. Miller --- arch/sparc64/lib/checksum.S | 5 +++-- arch/sparc64/lib/csum_copy.S | 5 +++-- 2 files changed, 6 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/sparc64/lib/checksum.S b/arch/sparc64/lib/checksum.S index ba9cd3ccc2b2..1d230f693dc4 100644 --- a/arch/sparc64/lib/checksum.S +++ b/arch/sparc64/lib/checksum.S @@ -165,8 +165,9 @@ csum_partial_end_cruft: sll %g1, 8, %g1 or %o5, %g1, %o4 -1: add %o2, %o4, %o2 +1: addcc %o2, %o4, %o2 + addc %g0, %o2, %o2 csum_partial_finish: retl - mov %o2, %o0 + srl %o2, 0, %o0 diff --git a/arch/sparc64/lib/csum_copy.S b/arch/sparc64/lib/csum_copy.S index 71af48839064..e566c770a0f6 100644 --- a/arch/sparc64/lib/csum_copy.S +++ b/arch/sparc64/lib/csum_copy.S @@ -221,11 +221,12 @@ FUNC_NAME: /* %o0=src, %o1=dst, %o2=len, %o3=sum */ sll %g1, 8, %g1 or %o5, %g1, %o4 -1: add %o3, %o4, %o3 +1: addcc %o3, %o4, %o3 + addc %g0, %o3, %o3 70: retl - mov %o3, %o0 + srl %o3, 0, %o0 95: mov 0, GLOBAL_SPARE brlez,pn %o2, 4f -- cgit v1.2.3 From e853534e6b94f87e48f29e1701c3f6f8a63669c5 Mon Sep 17 00:00:00 2001 From: Horst Schirmeier Date: Mon, 5 Jun 2006 10:45:30 +0100 Subject: [SERIAL] typo: buad -> baud Replacing mistyped "buad" with "baud" where applicable. Signed-off-by: Horst Schirmeier Signed-off-by: Russell King --- arch/mips/ddb5xxx/ddb5476/dbg_io.c | 2 +- arch/mips/ddb5xxx/ddb5477/kgdb_io.c | 2 +- arch/mips/gt64120/ev64120/serialGT.c | 2 +- arch/mips/gt64120/momenco_ocelot/dbg_io.c | 2 +- arch/mips/ite-boards/generic/dbg_io.c | 2 +- arch/mips/momentum/jaguar_atx/dbg_io.c | 2 +- arch/mips/momentum/ocelot_c/dbg_io.c | 2 +- arch/mips/momentum/ocelot_g/dbg_io.c | 2 +- include/asm-arm/arch-l7200/serial_l7200.h | 2 +- include/asm-arm/arch-l7200/uncompress.h | 2 +- 10 files changed, 10 insertions(+), 10 deletions(-) (limited to 'arch') diff --git a/arch/mips/ddb5xxx/ddb5476/dbg_io.c b/arch/mips/ddb5xxx/ddb5476/dbg_io.c index 85e9e5013679..f2296a999953 100644 --- a/arch/mips/ddb5xxx/ddb5476/dbg_io.c +++ b/arch/mips/ddb5xxx/ddb5476/dbg_io.c @@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) /* disable interrupts */ UART16550_WRITE(OFS_INTR_ENABLE, 0); - /* set up buad rate */ + /* set up baud rate */ { uint32 divisor; diff --git a/arch/mips/ddb5xxx/ddb5477/kgdb_io.c b/arch/mips/ddb5xxx/ddb5477/kgdb_io.c index 1d18d590495b..385bbdb10170 100644 --- a/arch/mips/ddb5xxx/ddb5477/kgdb_io.c +++ b/arch/mips/ddb5xxx/ddb5477/kgdb_io.c @@ -86,7 +86,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) /* disable interrupts */ UART16550_WRITE(OFS_INTR_ENABLE, 0); - /* set up buad rate */ + /* set up baud rate */ { uint32 divisor; diff --git a/arch/mips/gt64120/ev64120/serialGT.c b/arch/mips/gt64120/ev64120/serialGT.c index 16e34a546e54..8f0d835491ff 100644 --- a/arch/mips/gt64120/ev64120/serialGT.c +++ b/arch/mips/gt64120/ev64120/serialGT.c @@ -149,7 +149,7 @@ void serial_set(int channel, unsigned long baud) #else /* * Note: Set baud rate, hardcoded here for rate of 115200 - * since became unsure of above "buad rate" algorithm (??). + * since became unsure of above "baud rate" algorithm (??). */ outreg(channel, LCR, 0x83); outreg(channel, DLM, 0x00); // See note above diff --git a/arch/mips/gt64120/momenco_ocelot/dbg_io.c b/arch/mips/gt64120/momenco_ocelot/dbg_io.c index 8720bccfdea2..f0a6a38fcf4d 100644 --- a/arch/mips/gt64120/momenco_ocelot/dbg_io.c +++ b/arch/mips/gt64120/momenco_ocelot/dbg_io.c @@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) /* disable interrupts */ UART16550_WRITE(OFS_INTR_ENABLE, 0); - /* set up buad rate */ + /* set up baud rate */ { uint32 divisor; diff --git a/arch/mips/ite-boards/generic/dbg_io.c b/arch/mips/ite-boards/generic/dbg_io.c index c4f8530fd07e..6a7ccaf93502 100644 --- a/arch/mips/ite-boards/generic/dbg_io.c +++ b/arch/mips/ite-boards/generic/dbg_io.c @@ -72,7 +72,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) /* disable interrupts */ UART16550_WRITE(OFS_INTR_ENABLE, 0); - /* set up buad rate */ + /* set up baud rate */ { uint32 divisor; diff --git a/arch/mips/momentum/jaguar_atx/dbg_io.c b/arch/mips/momentum/jaguar_atx/dbg_io.c index 542eac82b63c..d7dea0a136aa 100644 --- a/arch/mips/momentum/jaguar_atx/dbg_io.c +++ b/arch/mips/momentum/jaguar_atx/dbg_io.c @@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) /* disable interrupts */ UART16550_WRITE(OFS_INTR_ENABLE, 0); - /* set up buad rate */ + /* set up baud rate */ { uint32 divisor; diff --git a/arch/mips/momentum/ocelot_c/dbg_io.c b/arch/mips/momentum/ocelot_c/dbg_io.c index 8720bccfdea2..f0a6a38fcf4d 100644 --- a/arch/mips/momentum/ocelot_c/dbg_io.c +++ b/arch/mips/momentum/ocelot_c/dbg_io.c @@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) /* disable interrupts */ UART16550_WRITE(OFS_INTR_ENABLE, 0); - /* set up buad rate */ + /* set up baud rate */ { uint32 divisor; diff --git a/arch/mips/momentum/ocelot_g/dbg_io.c b/arch/mips/momentum/ocelot_g/dbg_io.c index 8720bccfdea2..f0a6a38fcf4d 100644 --- a/arch/mips/momentum/ocelot_g/dbg_io.c +++ b/arch/mips/momentum/ocelot_g/dbg_io.c @@ -73,7 +73,7 @@ void debugInit(uint32 baud, uint8 data, uint8 parity, uint8 stop) /* disable interrupts */ UART16550_WRITE(OFS_INTR_ENABLE, 0); - /* set up buad rate */ + /* set up baud rate */ { uint32 divisor; diff --git a/include/asm-arm/arch-l7200/serial_l7200.h b/include/asm-arm/arch-l7200/serial_l7200.h index 238c595d97ea..b1008a9d23e5 100644 --- a/include/asm-arm/arch-l7200/serial_l7200.h +++ b/include/asm-arm/arch-l7200/serial_l7200.h @@ -28,7 +28,7 @@ #define UARTDR 0x00 /* Tx/Rx data */ #define RXSTAT 0x04 /* Rx status */ #define H_UBRLCR 0x08 /* mode register high */ -#define M_UBRLCR 0x0C /* mode reg mid (MSB of buad)*/ +#define M_UBRLCR 0x0C /* mode reg mid (MSB of baud)*/ #define L_UBRLCR 0x10 /* mode reg low (LSB of baud)*/ #define UARTCON 0x14 /* control register */ #define UARTFLG 0x18 /* flag register */ diff --git a/include/asm-arm/arch-l7200/uncompress.h b/include/asm-arm/arch-l7200/uncompress.h index 9fcd40aee3e3..04be2a088639 100644 --- a/include/asm-arm/arch-l7200/uncompress.h +++ b/include/asm-arm/arch-l7200/uncompress.h @@ -6,7 +6,7 @@ * Changelog: * 05-01-2000 SJH Created * 05-13-2000 SJH Filled in function bodies - * 07-26-2000 SJH Removed hard coded buad rate + * 07-26-2000 SJH Removed hard coded baud rate */ #include -- cgit v1.2.3 From a7d14f875f03cb78992da8387be81a4c9197f101 Mon Sep 17 00:00:00 2001 From: Steve Yang Date: Mon, 5 Jun 2006 19:47:17 +0100 Subject: [ARM] 3543/1: [Fwd: PXA270 bootparams address not set] Patch from Steve Yang MACHINE_START struct doesn't have any bootargs location for the mainstone. Result is no kernel command args get passed; no serial driver is selected for console and results in a silent boot failure. Signed-off-by: Steve Yang Signed-off-by: Russell King --- arch/arm/mach-pxa/mainstone.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch') diff --git a/arch/arm/mach-pxa/mainstone.c b/arch/arm/mach-pxa/mainstone.c index 02e188d98e7d..b307f11951df 100644 --- a/arch/arm/mach-pxa/mainstone.c +++ b/arch/arm/mach-pxa/mainstone.c @@ -493,6 +493,7 @@ static void __init mainstone_map_io(void) MACHINE_START(MAINSTONE, "Intel HCDDBBVA0 Development Platform (aka Mainstone)") /* Maintainer: MontaVista Software Inc. */ .phys_io = 0x40000000, + .boot_params = 0xa0000100, /* BLOB boot parameter setting */ .io_pg_offst = (io_p2v(0x40000000) >> 18) & 0xfffc, .map_io = mainstone_map_io, .init_irq = mainstone_init_irq, -- cgit v1.2.3 From c7d2d28b9851d0ffc9924b0e36bac806d18ebf25 Mon Sep 17 00:00:00 2001 From: Ivan Kokshaysky Date: Sun, 4 Jun 2006 02:51:34 -0700 Subject: [PATCH] alpha: SMP IRQ routing fix From: Ivan Kokshaysky After removal of fixup_cpu_present_map() function Alpha ended up with an empty cpu_present_map, so secondary CPUs on SMP systems are not being started. Worse, on some platforms we route interrupts to secondary CPUs using cpu_possible_map which is still populated properly. As a result, these interrupts go nowhere so the machines like DP264 aren't able to boot even with a primary CPU. Fixed basically by s/cpu_present_mask/cpu_present_map/. Thanks to Ernst Herzberg for reporting the bug and testing the fix. Cc: Ernst Herzberg Cc: Richard Henderson Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/alpha/kernel/alpha_ksyms.c | 1 - arch/alpha/kernel/process.c | 6 +++--- arch/alpha/kernel/smp.c | 14 ++++---------- arch/alpha/kernel/sys_titan.c | 2 +- include/asm-alpha/smp.h | 4 +--- 5 files changed, 9 insertions(+), 18 deletions(-) (limited to 'arch') diff --git a/arch/alpha/kernel/alpha_ksyms.c b/arch/alpha/kernel/alpha_ksyms.c index c645c5e14786..2b245ad731ee 100644 --- a/arch/alpha/kernel/alpha_ksyms.c +++ b/arch/alpha/kernel/alpha_ksyms.c @@ -182,7 +182,6 @@ EXPORT_SYMBOL(smp_num_cpus); EXPORT_SYMBOL(smp_call_function); EXPORT_SYMBOL(smp_call_function_on_cpu); EXPORT_SYMBOL(_atomic_dec_and_lock); -EXPORT_SYMBOL(cpu_present_mask); #endif /* CONFIG_SMP */ /* diff --git a/arch/alpha/kernel/process.c b/arch/alpha/kernel/process.c index 9924fd07743a..c760a831fd1a 100644 --- a/arch/alpha/kernel/process.c +++ b/arch/alpha/kernel/process.c @@ -94,7 +94,7 @@ common_shutdown_1(void *generic_ptr) if (cpuid != boot_cpuid) { flags |= 0x00040000UL; /* "remain halted" */ *pflags = flags; - clear_bit(cpuid, &cpu_present_mask); + cpu_clear(cpuid, cpu_present_map); halt(); } #endif @@ -120,8 +120,8 @@ common_shutdown_1(void *generic_ptr) #ifdef CONFIG_SMP /* Wait for the secondaries to halt. */ - cpu_clear(boot_cpuid, cpu_possible_map); - while (cpus_weight(cpu_possible_map)) + cpu_clear(boot_cpuid, cpu_present_map); + while (cpus_weight(cpu_present_map)) barrier(); #endif diff --git a/arch/alpha/kernel/smp.c b/arch/alpha/kernel/smp.c index 185255416e85..4dc273e537fd 100644 --- a/arch/alpha/kernel/smp.c +++ b/arch/alpha/kernel/smp.c @@ -68,7 +68,6 @@ enum ipi_message_type { static int smp_secondary_alive __initdata = 0; /* Which cpus ids came online. */ -cpumask_t cpu_present_mask; cpumask_t cpu_online_map; EXPORT_SYMBOL(cpu_online_map); @@ -439,7 +438,7 @@ setup_smp(void) if ((cpu->flags & 0x1cc) == 0x1cc) { smp_num_probed++; /* Assume here that "whami" == index */ - cpu_set(i, cpu_present_mask); + cpu_set(i, cpu_present_map); cpu->pal_revision = boot_cpu_palrev; } @@ -450,11 +449,10 @@ setup_smp(void) } } else { smp_num_probed = 1; - cpu_set(boot_cpuid, cpu_present_mask); } - printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_mask = %lx\n", - smp_num_probed, cpu_possible_map.bits[0]); + printk(KERN_INFO "SMP: %d CPUs probed -- cpu_present_map = %lx\n", + smp_num_probed, cpu_present_map.bits[0]); } /* @@ -473,7 +471,7 @@ smp_prepare_cpus(unsigned int max_cpus) /* Nothing to do on a UP box, or when told not to. */ if (smp_num_probed == 1 || max_cpus == 0) { - cpu_present_mask = cpumask_of_cpu(boot_cpuid); + cpu_present_map = cpumask_of_cpu(boot_cpuid); printk(KERN_INFO "SMP mode deactivated.\n"); return; } @@ -486,10 +484,6 @@ smp_prepare_cpus(unsigned int max_cpus) void __devinit smp_prepare_boot_cpu(void) { - /* - * Mark the boot cpu (current cpu) as online - */ - cpu_set(smp_processor_id(), cpu_online_map); } int __devinit diff --git a/arch/alpha/kernel/sys_titan.c b/arch/alpha/kernel/sys_titan.c index 5f84417eeb7b..2551fb49ae09 100644 --- a/arch/alpha/kernel/sys_titan.c +++ b/arch/alpha/kernel/sys_titan.c @@ -66,7 +66,7 @@ titan_update_irq_hw(unsigned long mask) register int bcpu = boot_cpuid; #ifdef CONFIG_SMP - cpumask_t cpm = cpu_present_mask; + cpumask_t cpm = cpu_present_map; volatile unsigned long *dim0, *dim1, *dim2, *dim3; unsigned long mask0, mask1, mask2, mask3, dummy; diff --git a/include/asm-alpha/smp.h b/include/asm-alpha/smp.h index 9950706abdf8..e1432102be05 100644 --- a/include/asm-alpha/smp.h +++ b/include/asm-alpha/smp.h @@ -45,10 +45,8 @@ extern struct cpuinfo_alpha cpu_data[NR_CPUS]; #define hard_smp_processor_id() __hard_smp_processor_id() #define raw_smp_processor_id() (current_thread_info()->cpu) -extern cpumask_t cpu_present_mask; -extern cpumask_t cpu_online_map; extern int smp_num_cpus; -#define cpu_possible_map cpu_present_mask +#define cpu_possible_map cpu_present_map int smp_call_function_on_cpu(void (*func) (void *info), void *info,int retry, int wait, cpumask_t cpu); -- cgit v1.2.3 From 78b86e579f11e7d7bd45acd90b6a87cd4b7c5a54 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Sun, 4 Jun 2006 02:51:38 -0700 Subject: [PATCH] pmf_register_irq_client() gives sleep with locks held warning From: Benjamin Herrenschmidt This fixes request_irq() potentially called from atomic context. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/powerpc/platforms/powermac/pfunc_core.c | 18 +++++++++++------- 1 file changed, 11 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/powerpc/platforms/powermac/pfunc_core.c b/arch/powerpc/platforms/powermac/pfunc_core.c index 4baa75b1d36f..f08173b0f065 100644 --- a/arch/powerpc/platforms/powermac/pfunc_core.c +++ b/arch/powerpc/platforms/powermac/pfunc_core.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -546,6 +547,7 @@ struct pmf_device { static LIST_HEAD(pmf_devices); static spinlock_t pmf_lock = SPIN_LOCK_UNLOCKED; +static DEFINE_MUTEX(pmf_irq_mutex); static void pmf_release_device(struct kref *kref) { @@ -864,15 +866,17 @@ int pmf_register_irq_client(struct device_node *target, spin_lock_irqsave(&pmf_lock, flags); func = __pmf_find_function(target, name, PMF_FLAGS_INT_GEN); - if (func == NULL) { - spin_unlock_irqrestore(&pmf_lock, flags); + if (func) + func = pmf_get_function(func); + spin_unlock_irqrestore(&pmf_lock, flags); + if (func == NULL) return -ENODEV; - } + mutex_lock(&pmf_irq_mutex); if (list_empty(&func->irq_clients)) func->dev->handlers->irq_enable(func); list_add(&client->link, &func->irq_clients); client->func = func; - spin_unlock_irqrestore(&pmf_lock, flags); + mutex_unlock(&pmf_irq_mutex); return 0; } @@ -881,16 +885,16 @@ EXPORT_SYMBOL_GPL(pmf_register_irq_client); void pmf_unregister_irq_client(struct pmf_irq_client *client) { struct pmf_function *func = client->func; - unsigned long flags; BUG_ON(func == NULL); - spin_lock_irqsave(&pmf_lock, flags); + mutex_lock(&pmf_irq_mutex); client->func = NULL; list_del(&client->link); if (list_empty(&func->irq_clients)) func->dev->handlers->irq_disable(func); - spin_unlock_irqrestore(&pmf_lock, flags); + mutex_unlock(&pmf_irq_mutex); + pmf_put_function(func); } EXPORT_SYMBOL_GPL(pmf_unregister_irq_client); -- cgit v1.2.3 From 5cb38bc47bf370570fce81f89e05e5250169060f Mon Sep 17 00:00:00 2001 From: Jeff Dike Date: Sun, 4 Jun 2006 02:51:46 -0700 Subject: [PATCH] uml: fix wall_to_monotonic initialization From: Jeff Dike Initialize wall_to_monotonic correctly. This fixes a problem where sleeps lasted about one secone less than they should. This also called for a bit of code restructuring, following a patch which Blaisorblade had been keeping. Signed-off-by: Jeff Dike Cc: Paolo 'Blaisorblade' Giarrusso Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/um/include/kern_util.h | 13 ++----------- arch/um/kernel/time_kern.c | 10 ++++++++++ arch/um/os-Linux/time.c | 10 +--------- 3 files changed, 13 insertions(+), 20 deletions(-) (limited to 'arch') diff --git a/arch/um/include/kern_util.h b/arch/um/include/kern_util.h index efa3d33c0be6..310980b32173 100644 --- a/arch/um/include/kern_util.h +++ b/arch/um/include/kern_util.h @@ -120,20 +120,11 @@ extern int is_syscall(unsigned long addr); extern void free_irq(unsigned int, void *); extern int cpu(void); +extern void time_init_kern(void); + /* Are we disallowed to sleep? Used to choose between GFP_KERNEL and GFP_ATOMIC. */ extern int __cant_sleep(void); extern void segv_handler(int sig, union uml_pt_regs *regs); extern void sigio_handler(int sig, union uml_pt_regs *regs); #endif - -/* - * Overrides for Emacs so that we follow Linus's tabbing style. - * Emacs will notice this stuff at the end of the file and automatically - * adjust the settings for this buffer only. This must remain at the end - * of the file. - * --------------------------------------------------------------------------- - * Local variables: - * c-file-style: "linux" - * End: - */ diff --git a/arch/um/kernel/time_kern.c b/arch/um/kernel/time_kern.c index 528cf623f8b4..86f51d04c98d 100644 --- a/arch/um/kernel/time_kern.c +++ b/arch/um/kernel/time_kern.c @@ -84,6 +84,16 @@ void timer_irq(union uml_pt_regs *regs) } } + +void time_init_kern(void) +{ + unsigned long long nsecs; + + nsecs = os_nsecs(); + set_normalized_timespec(&wall_to_monotonic, -nsecs / BILLION, + -nsecs % BILLION); +} + void do_boot_timer_handler(struct sigcontext * sc) { struct pt_regs regs; diff --git a/arch/um/os-Linux/time.c b/arch/um/os-Linux/time.c index 6f7626775acb..280c4fb9b585 100644 --- a/arch/um/os-Linux/time.c +++ b/arch/um/os-Linux/time.c @@ -81,20 +81,12 @@ void uml_idle_timer(void) set_interval(ITIMER_REAL); } -extern void ktime_get_ts(struct timespec *ts); -#define do_posix_clock_monotonic_gettime(ts) ktime_get_ts(ts) - void time_init(void) { - struct timespec now; - if(signal(SIGVTALRM, boot_timer_handler) == SIG_ERR) panic("Couldn't set SIGVTALRM handler"); set_interval(ITIMER_VIRTUAL); - - do_posix_clock_monotonic_gettime(&now); - wall_to_monotonic.tv_sec = -now.tv_sec; - wall_to_monotonic.tv_nsec = -now.tv_nsec; + time_init_kern(); } unsigned long long os_nsecs(void) -- cgit v1.2.3 From f218312582350900443125137e6c5fc484dc1de1 Mon Sep 17 00:00:00 2001 From: Jeff Dike Date: Sun, 4 Jun 2006 02:51:47 -0700 Subject: [PATCH] uml: fix a typo in do_uml_initcalls From: Jeff Dike We had a spurious semicolon somehow. Signed-off-by: Jeff Dike Cc: Paolo 'Blaisorblade' Giarrusso Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/um/os-Linux/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/um/os-Linux/main.c b/arch/um/os-Linux/main.c index 3a0ac38e978b..90912aaca7aa 100644 --- a/arch/um/os-Linux/main.c +++ b/arch/um/os-Linux/main.c @@ -59,7 +59,7 @@ static __init void do_uml_initcalls(void) initcall_t *call; call = &__uml_initcall_start; - while (call < &__uml_initcall_end){; + while (call < &__uml_initcall_end){ (*call)(); call++; } -- cgit v1.2.3 From ca34fb1a8786af43457ec4f1bfc101a66d1160e0 Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 4 Jun 2006 02:51:47 -0700 Subject: [PATCH] uml: __user annotation in arch_prctl From: Al Viro fix uml/amd64 prctl() put_user() there should go to (long __user *)addr, not &addr Signed-off-by: Al Viro Signed-off-by: Jeff Dike Cc: Paolo 'Blaisorblade' Giarrusso Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/um/sys-x86_64/syscalls.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/um/sys-x86_64/syscalls.c b/arch/um/sys-x86_64/syscalls.c index 6acee5c4ada6..6fce9f45dfdc 100644 --- a/arch/um/sys-x86_64/syscalls.c +++ b/arch/um/sys-x86_64/syscalls.c @@ -45,7 +45,7 @@ static long arch_prctl_tt(int code, unsigned long addr) case ARCH_GET_GS: ret = arch_prctl(code, (unsigned long) &tmp); if(!ret) - ret = put_user(tmp, &addr); + ret = put_user(tmp, (long __user *)addr); break; default: ret = -EINVAL; -- cgit v1.2.3 From b8719c31a30a4a1054d99fbd51a88c2f6444392a Mon Sep 17 00:00:00 2001 From: Al Viro Date: Sun, 4 Jun 2006 02:51:48 -0700 Subject: [PATCH] uml: more __user annotations From: Al Viro uml __user annotations Signed-off-by: Al Viro Signed-off-by: Jeff Dike Cc: Paolo 'Blaisorblade' Giarrusso Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/um/sys-i386/syscalls.c | 9 +++++---- arch/um/sys-x86_64/signal.c | 24 ++++++++++++++---------- include/asm-um/uaccess.h | 6 +++--- 3 files changed, 22 insertions(+), 17 deletions(-) (limited to 'arch') diff --git a/arch/um/sys-i386/syscalls.c b/arch/um/sys-i386/syscalls.c index 749dd1bfe60f..710d5fb807e1 100644 --- a/arch/um/sys-i386/syscalls.c +++ b/arch/um/sys-i386/syscalls.c @@ -99,11 +99,12 @@ long sys_ipc (uint call, int first, int second, switch (call) { case SEMOP: - return sys_semtimedop(first, (struct sembuf *) ptr, second, - NULL); + return sys_semtimedop(first, (struct sembuf __user *) ptr, + second, NULL); case SEMTIMEDOP: - return sys_semtimedop(first, (struct sembuf *) ptr, second, - (const struct timespec *) fifth); + return sys_semtimedop(first, (struct sembuf __user *) ptr, + second, + (const struct timespec __user *) fifth); case SEMGET: return sys_semget (first, second, third); case SEMCTL: { diff --git a/arch/um/sys-x86_64/signal.c b/arch/um/sys-x86_64/signal.c index a4c46a8af008..9edf114faf79 100644 --- a/arch/um/sys-x86_64/signal.c +++ b/arch/um/sys-x86_64/signal.c @@ -21,7 +21,7 @@ #include "skas.h" static int copy_sc_from_user_skas(struct pt_regs *regs, - struct sigcontext *from) + struct sigcontext __user *from) { int err = 0; @@ -54,7 +54,8 @@ static int copy_sc_from_user_skas(struct pt_regs *regs, return(err); } -int copy_sc_to_user_skas(struct sigcontext *to, struct _fpstate *to_fp, +int copy_sc_to_user_skas(struct sigcontext __user *to, + struct _fpstate __user *to_fp, struct pt_regs *regs, unsigned long mask, unsigned long sp) { @@ -106,10 +107,11 @@ int copy_sc_to_user_skas(struct sigcontext *to, struct _fpstate *to_fp, #endif #ifdef CONFIG_MODE_TT -int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext *from, +int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext __user *from, int fpsize) { - struct _fpstate *to_fp, *from_fp; + struct _fpstate *to_fp; + struct _fpstate __user *from_fp; unsigned long sigs; int err; @@ -124,13 +126,14 @@ int copy_sc_from_user_tt(struct sigcontext *to, struct sigcontext *from, return(err); } -int copy_sc_to_user_tt(struct sigcontext *to, struct _fpstate *fp, +int copy_sc_to_user_tt(struct sigcontext __user *to, struct _fpstate __user *fp, struct sigcontext *from, int fpsize, unsigned long sp) { - struct _fpstate *to_fp, *from_fp; + struct _fpstate __user *to_fp; + struct _fpstate *from_fp; int err; - to_fp = (fp ? fp : (struct _fpstate *) (to + 1)); + to_fp = (fp ? fp : (struct _fpstate __user *) (to + 1)); from_fp = from->fpstate; err = copy_to_user(to, from, sizeof(*to)); /* The SP in the sigcontext is the updated one for the signal @@ -158,7 +161,8 @@ static int copy_sc_from_user(struct pt_regs *to, void __user *from) return(ret); } -static int copy_sc_to_user(struct sigcontext *to, struct _fpstate *fp, +static int copy_sc_to_user(struct sigcontext __user *to, + struct _fpstate __user *fp, struct pt_regs *from, unsigned long mask, unsigned long sp) { @@ -169,7 +173,7 @@ static int copy_sc_to_user(struct sigcontext *to, struct _fpstate *fp, struct rt_sigframe { - char *pretcode; + char __user *pretcode; struct ucontext uc; struct siginfo info; }; @@ -188,7 +192,7 @@ int setup_signal_stack_si(unsigned long stack_top, int sig, frame = (struct rt_sigframe __user *) round_down(stack_top - sizeof(struct rt_sigframe), 16) - 8; - frame = (struct rt_sigframe *) ((unsigned long) frame - 128); + frame = (struct rt_sigframe __user *) ((unsigned long) frame - 128); if (!access_ok(VERIFY_WRITE, fp, sizeof(struct _fpstate))) goto out; diff --git a/include/asm-um/uaccess.h b/include/asm-um/uaccess.h index bea5a015f667..16c734af9193 100644 --- a/include/asm-um/uaccess.h +++ b/include/asm-um/uaccess.h @@ -41,11 +41,11 @@ #define __get_user(x, ptr) \ ({ \ - const __typeof__(ptr) __private_ptr = ptr; \ + const __typeof__(*(ptr)) __user *__private_ptr = (ptr); \ __typeof__(x) __private_val; \ int __private_ret = -EFAULT; \ (x) = (__typeof__(*(__private_ptr)))0; \ - if (__copy_from_user((void *) &__private_val, (__private_ptr), \ + if (__copy_from_user((__force void *)&__private_val, (__private_ptr),\ sizeof(*(__private_ptr))) == 0) { \ (x) = (__typeof__(*(__private_ptr))) __private_val; \ __private_ret = 0; \ @@ -62,7 +62,7 @@ #define __put_user(x, ptr) \ ({ \ - __typeof__(ptr) __private_ptr = ptr; \ + __typeof__(*(ptr)) __user *__private_ptr = ptr; \ __typeof__(*(__private_ptr)) __private_val; \ int __private_ret = -EFAULT; \ __private_val = (__typeof__(*(__private_ptr))) (x); \ -- cgit v1.2.3 From fec468b0c9e0a75b89514408e3b35b1576b57071 Mon Sep 17 00:00:00 2001 From: Jeff Dike Date: Sun, 4 Jun 2006 02:51:49 -0700 Subject: [PATCH] uml: add -ffreestanding to CFLAGS From: Jeff Dike This fixes the undefined reference to strcpy seen when building modules on i386. Tracked down by Al Viro. Signed-off-by: Jeff Dike Cc: Paolo 'Blaisorblade' Giarrusso Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/um/Makefile-i386 | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch') diff --git a/arch/um/Makefile-i386 b/arch/um/Makefile-i386 index 7a0e04e34bf9..b65ca115ef77 100644 --- a/arch/um/Makefile-i386 +++ b/arch/um/Makefile-i386 @@ -33,5 +33,9 @@ include $(srctree)/arch/i386/Makefile.cpu # prevent gcc from keeping the stack 16 byte aligned. Taken from i386. cflags-y += $(call cc-option,-mpreferred-stack-boundary=2) +# Prevent sprintf in nfsd from being converted to strcpy and resulting in +# an unresolved reference. +cflags-y += -ffreestanding + CFLAGS += $(cflags-y) USER_CFLAGS += $(cflags-y) -- cgit v1.2.3 From 320e6aba26892b016293190e079f15e83a5c28b9 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 22 May 2006 14:24:04 +0100 Subject: [MIPS] Fix SMP now that fixup_cpu_present_map is gone. Signed-off-by: Ralf Baechle --- arch/mips/kernel/smp.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index d42f358754ad..298f82fe8440 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c @@ -247,6 +247,9 @@ void __init smp_prepare_cpus(unsigned int max_cpus) current_thread_info()->cpu = 0; smp_tune_scheduling(); plat_prepare_cpus(max_cpus); +#ifndef CONFIG_HOTPLUG_CPU + cpu_present_map = cpu_possible_map; +#endif } /* preload SMP state for boot cpu */ @@ -442,7 +445,7 @@ static int __init topology_init(void) int cpu; int ret; - for_each_cpu(cpu) { + for_each_present_cpu(cpu) { ret = register_cpu(&per_cpu(cpu_devices, cpu), cpu, NULL); if (ret) printk(KERN_WARNING "topology_init: register_cpu %d " -- cgit v1.2.3 From f3bf07b9a367c342bcbc9f47d525d3cf5e8b4f3b Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 23 May 2006 00:45:07 +0900 Subject: [MIPS] Ignore unresolved weak symbols in modules. Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/kernel/module.c | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch') diff --git a/arch/mips/kernel/module.c b/arch/mips/kernel/module.c index e54a7f442f8a..d7bf0215bc1d 100644 --- a/arch/mips/kernel/module.c +++ b/arch/mips/kernel/module.c @@ -288,6 +288,9 @@ int apply_relocate(Elf_Shdr *sechdrs, const char *strtab, sym = (Elf_Sym *)sechdrs[symindex].sh_addr + ELF_MIPS_R_SYM(rel[i]); if (!sym->st_value) { + /* Ignore unresolved weak symbol */ + if (ELF_ST_BIND(sym->st_info) == STB_WEAK) + continue; printk(KERN_WARNING "%s: Unknown symbol %s\n", me->name, strtab + sym->st_name); return -ENOENT; @@ -325,6 +328,9 @@ int apply_relocate_add(Elf_Shdr *sechdrs, const char *strtab, sym = (Elf_Sym *)sechdrs[symindex].sh_addr + ELF_MIPS_R_SYM(rel[i]); if (!sym->st_value) { + /* Ignore unresolved weak symbol */ + if (ELF_ST_BIND(sym->st_info) == STB_WEAK) + continue; printk(KERN_WARNING "%s: Unknown symbol %s\n", me->name, strtab + sym->st_name); return -ENOENT; -- cgit v1.2.3 From 1acf1ca7e906cf7453d76d76a6c953996295c220 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Tue, 23 May 2006 16:42:38 +0900 Subject: [MIPS] Fix modpost warning: Rename op_model_xxx to op_model_xxx_ops. The modpost uses a whitelist for commonly used suffix on checking the section mismatch. Adding "_ops" suffix to op_modex_xxx get rid of this modpost warning. WARNING: arch/mips/oprofile/oprofile.o - Section mismatch: reference to .init.text: from .data after 'op_model_mipsxx' (at offset 0x528) Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/oprofile/common.c | 8 ++++---- arch/mips/oprofile/op_model_mipsxx.c | 32 ++++++++++++++++---------------- arch/mips/oprofile/op_model_rm9000.c | 2 +- 3 files changed, 21 insertions(+), 21 deletions(-) (limited to 'arch') diff --git a/arch/mips/oprofile/common.c b/arch/mips/oprofile/common.c index 91b799d2cd88..c31e4cff64e0 100644 --- a/arch/mips/oprofile/common.c +++ b/arch/mips/oprofile/common.c @@ -14,8 +14,8 @@ #include "op_impl.h" -extern struct op_mips_model op_model_mipsxx __attribute__((weak)); -extern struct op_mips_model op_model_rm9000 __attribute__((weak)); +extern struct op_mips_model op_model_mipsxx_ops __attribute__((weak)); +extern struct op_mips_model op_model_rm9000_ops __attribute__((weak)); static struct op_mips_model *model; @@ -83,11 +83,11 @@ int __init oprofile_arch_init(struct oprofile_operations *ops) case CPU_74K: case CPU_SB1: case CPU_SB1A: - lmodel = &op_model_mipsxx; + lmodel = &op_model_mipsxx_ops; break; case CPU_RM9000: - lmodel = &op_model_rm9000; + lmodel = &op_model_rm9000_ops; break; }; diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index e7ce92391303..f26a00e13204 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -23,7 +23,7 @@ #define M_COUNTER_OVERFLOW (1UL << 31) -struct op_mips_model op_model_mipsxx; +struct op_mips_model op_model_mipsxx_ops; static struct mipsxx_register_config { unsigned int control[4]; @@ -34,7 +34,7 @@ static struct mipsxx_register_config { static void mipsxx_reg_setup(struct op_counter_config *ctr) { - unsigned int counters = op_model_mipsxx.num_counters; + unsigned int counters = op_model_mipsxx_ops.num_counters; int i; /* Compute the performance counter control word. */ @@ -62,7 +62,7 @@ static void mipsxx_reg_setup(struct op_counter_config *ctr) static void mipsxx_cpu_setup (void *args) { - unsigned int counters = op_model_mipsxx.num_counters; + unsigned int counters = op_model_mipsxx_ops.num_counters; switch (counters) { case 4: @@ -83,7 +83,7 @@ static void mipsxx_cpu_setup (void *args) /* Start all counters on current CPU */ static void mipsxx_cpu_start(void *args) { - unsigned int counters = op_model_mipsxx.num_counters; + unsigned int counters = op_model_mipsxx_ops.num_counters; switch (counters) { case 4: @@ -100,7 +100,7 @@ static void mipsxx_cpu_start(void *args) /* Stop all counters on current CPU */ static void mipsxx_cpu_stop(void *args) { - unsigned int counters = op_model_mipsxx.num_counters; + unsigned int counters = op_model_mipsxx_ops.num_counters; switch (counters) { case 4: @@ -116,7 +116,7 @@ static void mipsxx_cpu_stop(void *args) static int mipsxx_perfcount_handler(struct pt_regs *regs) { - unsigned int counters = op_model_mipsxx.num_counters; + unsigned int counters = op_model_mipsxx_ops.num_counters; unsigned int control; unsigned int counter; int handled = 0; @@ -187,37 +187,37 @@ static int __init mipsxx_init(void) reset_counters(counters); - op_model_mipsxx.num_counters = counters; + op_model_mipsxx_ops.num_counters = counters; switch (current_cpu_data.cputype) { case CPU_20KC: - op_model_mipsxx.cpu_type = "mips/20K"; + op_model_mipsxx_ops.cpu_type = "mips/20K"; break; case CPU_24K: - op_model_mipsxx.cpu_type = "mips/24K"; + op_model_mipsxx_ops.cpu_type = "mips/24K"; break; case CPU_25KF: - op_model_mipsxx.cpu_type = "mips/25K"; + op_model_mipsxx_ops.cpu_type = "mips/25K"; break; #ifndef CONFIG_SMP case CPU_34K: - op_model_mipsxx.cpu_type = "mips/34K"; + op_model_mipsxx_ops.cpu_type = "mips/34K"; break; case CPU_74K: - op_model_mipsxx.cpu_type = "mips/74K"; + op_model_mipsxx_ops.cpu_type = "mips/74K"; break; #endif case CPU_5KC: - op_model_mipsxx.cpu_type = "mips/5K"; + op_model_mipsxx_ops.cpu_type = "mips/5K"; break; case CPU_SB1: case CPU_SB1A: - op_model_mipsxx.cpu_type = "mips/sb1"; + op_model_mipsxx_ops.cpu_type = "mips/sb1"; break; default: @@ -233,12 +233,12 @@ static int __init mipsxx_init(void) static void mipsxx_exit(void) { - reset_counters(op_model_mipsxx.num_counters); + reset_counters(op_model_mipsxx_ops.num_counters); perf_irq = null_perf_irq; } -struct op_mips_model op_model_mipsxx = { +struct op_mips_model op_model_mipsxx_ops = { .reg_setup = mipsxx_reg_setup, .cpu_setup = mipsxx_cpu_setup, .init = mipsxx_init, diff --git a/arch/mips/oprofile/op_model_rm9000.c b/arch/mips/oprofile/op_model_rm9000.c index 9b75e41c78ef..b7063fefa65b 100644 --- a/arch/mips/oprofile/op_model_rm9000.c +++ b/arch/mips/oprofile/op_model_rm9000.c @@ -126,7 +126,7 @@ static void rm9000_exit(void) free_irq(rm9000_perfcount_irq, NULL); } -struct op_mips_model op_model_rm9000 = { +struct op_mips_model op_model_rm9000_ops = { .reg_setup = rm9000_reg_setup, .cpu_setup = rm9000_cpu_setup, .init = rm9000_init, -- cgit v1.2.3 From cac4bcbce0e800f2219a27b66aaeb4a33f2e3dbc Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Wed, 24 May 2006 16:51:02 +0100 Subject: [MIPS] Print more information if we're struck by a machine check exception. Signed-off-by: Ralf Baechle --- arch/mips/kernel/traps.c | 19 +++++++++++++++++-- 1 file changed, 17 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 35cb08da3820..a7564b08eb4d 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c @@ -819,15 +819,30 @@ asmlinkage void do_watch(struct pt_regs *regs) asmlinkage void do_mcheck(struct pt_regs *regs) { + const int field = 2 * sizeof(unsigned long); + int multi_match = regs->cp0_status & ST0_TS; + show_regs(regs); - dump_tlb_all(); + + if (multi_match) { + printk("Index : %0x\n", read_c0_index()); + printk("Pagemask: %0x\n", read_c0_pagemask()); + printk("EntryHi : %0*lx\n", field, read_c0_entryhi()); + printk("EntryLo0: %0*lx\n", field, read_c0_entrylo0()); + printk("EntryLo1: %0*lx\n", field, read_c0_entrylo1()); + printk("\n"); + dump_tlb_all(); + } + + show_code((unsigned int *) regs->cp0_epc); + /* * Some chips may have other causes of machine check (e.g. SB1 * graduation timer) */ panic("Caught Machine Check exception - %scaused by multiple " "matching entries in the TLB.", - (regs->cp0_status & ST0_TS) ? "" : "not "); + (multi_match) ? "" : "not "); } asmlinkage void do_mt(struct pt_regs *regs) -- cgit v1.2.3 From 9370b35175ca43fad7d24bc7b391473f3becbee8 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 26 May 2006 19:44:54 +0400 Subject: [MIPS] Save write-only Config.OD from being clobbered Save the Config.OD bit from being clobbered by coherency_setup(). This bit, when set, fixes various errata in the early steppings of Au1x00 SOCs. Unfortunately, the bit was write-only on the most early of them. In addition, also restore the bit after a wakeup from sleep. Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- arch/mips/au1000/common/sleeper.S | 5 +++++ arch/mips/mm/c-r4k.c | 34 ++++++++++++++++++++++++++++++++++ 2 files changed, 39 insertions(+) (limited to 'arch') diff --git a/arch/mips/au1000/common/sleeper.S b/arch/mips/au1000/common/sleeper.S index 44dac3b0df3b..683d9da84b66 100644 --- a/arch/mips/au1000/common/sleeper.S +++ b/arch/mips/au1000/common/sleeper.S @@ -112,6 +112,11 @@ sdsleep: mtc0 k0, CP0_PAGEMASK lw k0, 0x14(sp) mtc0 k0, CP0_CONFIG + + /* We need to catch the ealry Alchemy SOCs with + * the write-only Config[OD] bit and set it back to one... + */ + jal au1x00_fixup_config_od lw $1, PT_R1(sp) lw $2, PT_R2(sp) lw $3, PT_R3(sp) diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c index 6b3541769602..4a43924cd4fc 100644 --- a/arch/mips/mm/c-r4k.c +++ b/arch/mips/mm/c-r4k.c @@ -1161,6 +1161,31 @@ static void __init setup_scache(void) c->options |= MIPS_CPU_SUBSET_CACHES; } +void au1x00_fixup_config_od(void) +{ + /* + * c0_config.od (bit 19) was write only (and read as 0) + * on the early revisions of Alchemy SOCs. It disables the bus + * transaction overlapping and needs to be set to fix various errata. + */ + switch (read_c0_prid()) { + case 0x00030100: /* Au1000 DA */ + case 0x00030201: /* Au1000 HA */ + case 0x00030202: /* Au1000 HB */ + case 0x01030200: /* Au1500 AB */ + /* + * Au1100 errata actually keeps silence about this bit, so we set it + * just in case for those revisions that require it to be set according + * to arch/mips/au1000/common/cputable.c + */ + case 0x02030200: /* Au1100 AB */ + case 0x02030201: /* Au1100 BA */ + case 0x02030202: /* Au1100 BC */ + set_c0_config(1 << 19); + break; + } +} + static inline void coherency_setup(void) { change_c0_config(CONF_CM_CMASK, CONF_CM_DEFAULT); @@ -1181,6 +1206,15 @@ static inline void coherency_setup(void) case CPU_R4400MC: clear_c0_config(CONF_CU); break; + /* + * We need to catch the ealry Alchemy SOCs with + * the write-only co_config.od bit and set it back to one... + */ + case CPU_AU1000: /* rev. DA, HA, HB */ + case CPU_AU1100: /* rev. AB, BA, BC ?? */ + case CPU_AU1500: /* rev. AB */ + au1x00_fixup_config_od(); + break; } } -- cgit v1.2.3 From fef6d6a73a3985e4fdb5ab1910909c0c73539829 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Sat, 27 May 2006 23:36:41 +0400 Subject: [MIPS] Au1xx0: fix prom_getenv() to handle YAMON style environment Alchemy boards use YAMON which passes the environment variables as the tuples of strings (the name followed by the value) unlike PMON which passes "name=" strings. Signed-off-by: Sergei Shtylyov Signed-off-by: Ralf Baechle --- arch/mips/au1000/common/prom.c | 24 +++++++++--------------- 1 file changed, 9 insertions(+), 15 deletions(-) (limited to 'arch') diff --git a/arch/mips/au1000/common/prom.c b/arch/mips/au1000/common/prom.c index 9c171afd9a53..ae7d8c57bf3f 100644 --- a/arch/mips/au1000/common/prom.c +++ b/arch/mips/au1000/common/prom.c @@ -1,10 +1,9 @@ /* * * BRIEF MODULE DESCRIPTION - * PROM library initialisation code, assuming a version of - * pmon is the boot code. + * PROM library initialisation code, assuming YAMON is the boot loader. * - * Copyright 2000,2001 MontaVista Software Inc. + * Copyright 2000, 2001, 2006 MontaVista Software Inc. * Author: MontaVista Software, Inc. * ppopov@mvista.com or source@mvista.com * @@ -49,9 +48,9 @@ extern char **prom_argv, **prom_envp; typedef struct { - char *name; -/* char *val; */ -}t_env_var; + char *name; + char *val; +} t_env_var; char * prom_getcmdline(void) @@ -85,21 +84,16 @@ char *prom_getenv(char *envname) { /* * Return a pointer to the given environment variable. - * Environment variables are stored in the form of "memsize=64". */ t_env_var *env = (t_env_var *)prom_envp; - int i; - - i = strlen(envname); - while(env->name) { - if(strncmp(envname, env->name, i) == 0) { - return(env->name + strlen(envname) + 1); - } + while (env->name) { + if (strcmp(envname, env->name) == 0) + return env->val; env++; } - return(NULL); + return NULL; } inline unsigned char str2hexnum(unsigned char c) -- cgit v1.2.3 From 7155262e180d3b50fdea0f58f3329d9ae81ef80b Mon Sep 17 00:00:00 2001 From: Thiemo Seufer Date: Sun, 28 May 2006 15:02:53 +0100 Subject: [MIPS] open() forces O_LARGEFILE for o32 on 64bit kernels open() always sets the O_LARGEFILE flag for the o32 ABI implementation of a 64bit kernel. The appended patch fixes it. Signed-off-by: Thiemo Seufer Signed-off-by: Ralf Baechle --- arch/mips/kernel/scall64-o32.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index b53a9207f530..8efb23a84131 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S @@ -209,7 +209,7 @@ sys_call_table: PTR sys_fork PTR sys_read PTR sys_write - PTR sys_open /* 4005 */ + PTR compat_sys_open /* 4005 */ PTR sys_close PTR sys_waitpid PTR sys_creat -- cgit v1.2.3 From aa32374aaa2e516a9b0719477efae0782a62a79e Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Mon, 29 May 2006 00:02:12 +0100 Subject: [MIPS] SB1: Only pass1 FPUs are broken beyond recovery. The wrong revision number in the check was forcing a fallback to FPU emulation for all SB1 cores in 2.6. Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-probe.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index bef3e2dc7c52..8c2c359a05f4 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c @@ -655,7 +655,7 @@ static inline void cpu_probe_sibyte(struct cpuinfo_mips *c) case PRID_IMP_SB1: c->cputype = CPU_SB1; /* FPU in pass1 is known to have issues. */ - if ((c->processor_id & 0xff) < 0x20) + if ((c->processor_id & 0xff) < 0x02) c->options &= ~(MIPS_CPU_FPU | MIPS_CPU_32FPR); break; case PRID_IMP_SB1A: -- cgit v1.2.3 From b6d7c7a91138c883f890c204cd5300172145b0b3 Mon Sep 17 00:00:00 2001 From: Ralf Baechle Date: Tue, 30 May 2006 02:13:16 +0100 Subject: [MIPS] IP32: Fix warnings. The expressions are volatile; no need for temporary variables. Signed-off-by: Ralf Baechle --- arch/mips/sgi-ip32/ip32-irq.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/mips/sgi-ip32/ip32-irq.c b/arch/mips/sgi-ip32/ip32-irq.c index de01c9815bdd..8ba08047d164 100644 --- a/arch/mips/sgi-ip32/ip32-irq.c +++ b/arch/mips/sgi-ip32/ip32-irq.c @@ -31,12 +31,12 @@ /* issue a PIO read to make sure no PIO writes are pending */ static void inline flush_crime_bus(void) { - volatile unsigned long junk = crime->control; + crime->control; } static void inline flush_mace_bus(void) { - volatile unsigned long junk = mace->perif.ctrl.misc; + mace->perif.ctrl.misc; } #undef DEBUG_IRQ -- cgit v1.2.3 From 460c0422c3861ab63a14c2be600a96a9e68b89f2 Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 1 Jun 2006 01:00:39 +0900 Subject: [MIPS] Fix sparse warnings about too big constants. Fix following warnings: linux/arch/mips/kernel/setup.c:249:12: warning: constant 0xffffffff00000000 is so big it is unsigned long linux/arch/mips/kernel/cpu-bugs64.c:209:10: warning: constant 0xffffffffffffdb9a is so big it is unsigned long linux/arch/mips/kernel/cpu-bugs64.c:227:10: warning: constant 0xffffffffffffdb9a is so big it is unsigned long linux/arch/mips/kernel/cpu-bugs64.c:283:10: warning: constant 0xffffffffffffdb9a is so big it is unsigned long linux/arch/mips/kernel/cpu-bugs64.c:299:10: warning: constant 0xffffffffffffdb9a is so big it is unsigned long Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/kernel/cpu-bugs64.c | 8 ++++---- arch/mips/kernel/setup.c | 2 +- 2 files changed, 5 insertions(+), 5 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c index 47a087b6c11b..d268827c62bd 100644 --- a/arch/mips/kernel/cpu-bugs64.c +++ b/arch/mips/kernel/cpu-bugs64.c @@ -206,7 +206,7 @@ static inline void check_daddi(void) "daddi %0, %1, %3\n\t" ".set pop" : "=r" (v), "=&r" (tmp) - : "I" (0xffffffffffffdb9a), "I" (0x1234)); + : "I" (0xffffffffffffdb9aUL), "I" (0x1234)); set_except_vector(12, handler); local_irq_restore(flags); @@ -224,7 +224,7 @@ static inline void check_daddi(void) "dsrl %1, %1, 1\n\t" "daddi %0, %1, %3" : "=r" (v), "=&r" (tmp) - : "I" (0xffffffffffffdb9a), "I" (0x1234)); + : "I" (0xffffffffffffdb9aUL), "I" (0x1234)); set_except_vector(12, handler); local_irq_restore(flags); @@ -280,7 +280,7 @@ static inline void check_daddiu(void) "daddu %1, %2\n\t" ".set pop" : "=&r" (v), "=&r" (w), "=&r" (tmp) - : "I" (0xffffffffffffdb9a), "I" (0x1234)); + : "I" (0xffffffffffffdb9aUL), "I" (0x1234)); if (v == w) { printk("no.\n"); @@ -296,7 +296,7 @@ static inline void check_daddiu(void) "addiu %1, $0, %4\n\t" "daddu %1, %2" : "=&r" (v), "=&r" (w), "=&r" (tmp) - : "I" (0xffffffffffffdb9a), "I" (0x1234)); + : "I" (0xffffffffffffdb9aUL), "I" (0x1234)); if (v == w) { printk("yes.\n"); diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index bcf1b10e518f..faeed5f4cf26 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -246,7 +246,7 @@ static inline int parse_rd_cmdline(unsigned long* rd_start, unsigned long* rd_en #ifdef CONFIG_64BIT /* HACK: Guess if the sign extension was forgotten */ if (start > 0x0000000080000000 && start < 0x00000000ffffffff) - start |= 0xffffffff00000000; + start |= 0xffffffff00000000UL; #endif end = start + size; -- cgit v1.2.3 From ecf52d3c895c8bc069b9ae07c18acf39d846c2ef Mon Sep 17 00:00:00 2001 From: Atsushi Nemoto Date: Thu, 1 Jun 2006 01:00:03 +0900 Subject: [MIPS] Fix compiler warnings (field width, unused variable) Fix following warnings: linux/arch/mips/kernel/setup.c:432: warning: field width is not type int (arg 2) linux/arch/mips/kernel/setup.c:432: warning: field width is not type int (arg 4) linux/arch/mips/kernel/syscall.c:279: warning: unused variable `len' linux/arch/mips/kernel/syscall.c:280: warning: unused variable `name' linux/arch/mips/math-emu/dp_fint.c:32: warning: unused variable `xc' linux/arch/mips/math-emu/dp_flong.c:32: warning: unused variable `xc' linux/arch/mips/math-emu/sp_fint.c:32: warning: unused variable `xc' linux/arch/mips/math-emu/sp_flong.c:32: warning: unused variable `xc' (original patch by Atsushi, slight changes to the setup.c part by me.) Signed-off-by: Atsushi Nemoto Signed-off-by: Ralf Baechle --- arch/mips/kernel/setup.c | 13 ++++++++----- arch/mips/kernel/syscall.c | 3 +-- arch/mips/math-emu/dp_fint.c | 4 +++- arch/mips/math-emu/dp_flong.c | 4 +++- arch/mips/math-emu/sp_fint.c | 4 +++- arch/mips/math-emu/sp_flong.c | 4 +++- 6 files changed, 21 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index faeed5f4cf26..a481be047696 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -419,17 +419,20 @@ static inline void bootmem_init(void) #ifdef CONFIG_BLK_DEV_INITRD initrd_below_start_ok = 1; if (initrd_start) { - unsigned long initrd_size = ((unsigned char *)initrd_end) - ((unsigned char *)initrd_start); + unsigned long initrd_size = ((unsigned char *)initrd_end) - + ((unsigned char *)initrd_start); + const int width = sizeof(long) * 2; + printk("Initial ramdisk at: 0x%p (%lu bytes)\n", (void *)initrd_start, initrd_size); if (CPHYSADDR(initrd_end) > PFN_PHYS(max_low_pfn)) { printk("initrd extends beyond end of memory " "(0x%0*Lx > 0x%0*Lx)\ndisabling initrd\n", - sizeof(long) * 2, - (unsigned long long)CPHYSADDR(initrd_end), - sizeof(long) * 2, - (unsigned long long)PFN_PHYS(max_low_pfn)); + width, + (unsigned long long) CPHYSADDR(initrd_end), + width, + (unsigned long long) PFN_PHYS(max_low_pfn)); initrd_start = initrd_end = 0; initrd_reserve_bootmem = 0; } diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c index 8f4fdd94dbd0..5e8a18a8e2bd 100644 --- a/arch/mips/kernel/syscall.c +++ b/arch/mips/kernel/syscall.c @@ -276,8 +276,7 @@ void sys_set_thread_area(unsigned long addr) asmlinkage int _sys_sysmips(int cmd, long arg1, int arg2, int arg3) { - int tmp, len; - char __user *name; + int tmp; switch(cmd) { case MIPS_ATOMIC_SET: diff --git a/arch/mips/math-emu/dp_fint.c b/arch/mips/math-emu/dp_fint.c index a1962eb460f8..39a71de16f47 100644 --- a/arch/mips/math-emu/dp_fint.c +++ b/arch/mips/math-emu/dp_fint.c @@ -29,7 +29,9 @@ ieee754dp ieee754dp_fint(int x) { - COMPXDP; + u64 xm; + int xe; + int xs; CLEARCX; diff --git a/arch/mips/math-emu/dp_flong.c b/arch/mips/math-emu/dp_flong.c index eae90a866aa1..f08f223e488a 100644 --- a/arch/mips/math-emu/dp_flong.c +++ b/arch/mips/math-emu/dp_flong.c @@ -29,7 +29,9 @@ ieee754dp ieee754dp_flong(s64 x) { - COMPXDP; + u64 xm; + int xe; + int xs; CLEARCX; diff --git a/arch/mips/math-emu/sp_fint.c b/arch/mips/math-emu/sp_fint.c index 7aac13afb09a..e88e125e01c2 100644 --- a/arch/mips/math-emu/sp_fint.c +++ b/arch/mips/math-emu/sp_fint.c @@ -29,7 +29,9 @@ ieee754sp ieee754sp_fint(int x) { - COMPXSP; + unsigned xm; + int xe; + int xs; CLEARCX; diff --git a/arch/mips/math-emu/sp_flong.c b/arch/mips/math-emu/sp_flong.c index 3d6c1d11c178..26d6919a269a 100644 --- a/arch/mips/math-emu/sp_flong.c +++ b/arch/mips/math-emu/sp_flong.c @@ -29,7 +29,9 @@ ieee754sp ieee754sp_flong(s64 x) { - COMPXDP; /* <--- need 64-bit mantissa temp */ + u64 xm; /* <--- need 64-bit mantissa temp */ + int xe; + int xs; CLEARCX; -- cgit v1.2.3 From b1c231f5a57cb4a417c38a8a946f1e66db3bb9c0 Mon Sep 17 00:00:00 2001 From: Chad Reese Date: Tue, 30 May 2006 17:16:49 -0700 Subject: [MIPS] Fix sparsemem support. Move memory_present() in arch/mips/kernel/setup.c. When using sparsemem extreme, this function does an allocate for bootmem. This would always fail since init_bootmem hasn't been called yet. Move memory_present after free_bootmem. This only marks actual memory ranges as present instead of the entire address space. Signed-off-by: Chad Reese Signed-off-by: Ralf Baechle --- arch/mips/kernel/setup.c | 3 +-- arch/mips/mm/init.c | 2 +- include/asm-mips/page.h | 2 ++ include/asm-mips/sparsemem.h | 14 ++++++++++++++ 4 files changed, 18 insertions(+), 3 deletions(-) create mode 100644 include/asm-mips/sparsemem.h (limited to 'arch') diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index a481be047696..397a70e651b5 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c @@ -355,8 +355,6 @@ static inline void bootmem_init(void) } #endif - memory_present(0, first_usable_pfn, max_low_pfn); - /* Initialize the boot-time allocator with low memory only. */ bootmap_size = init_bootmem(first_usable_pfn, max_low_pfn); @@ -410,6 +408,7 @@ static inline void bootmem_init(void) /* Register lowmem ranges */ free_bootmem(PFN_PHYS(curr_pfn), PFN_PHYS(size)); + memory_present(0, curr_pfn, curr_pfn + size - 1); } /* Reserve the bootmap memory. */ diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index c22308b93ff0..33f6e1cdfd5b 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c @@ -227,7 +227,7 @@ void __init mem_init(void) for (tmp = 0; tmp < max_low_pfn; tmp++) if (page_is_ram(tmp)) { ram++; - if (PageReserved(mem_map+tmp)) + if (PageReserved(pfn_to_page(tmp))) reservedpages++; } diff --git a/include/asm-mips/page.h b/include/asm-mips/page.h index a1eab136ff6c..4035ec79ecd4 100644 --- a/include/asm-mips/page.h +++ b/include/asm-mips/page.h @@ -139,9 +139,11 @@ typedef struct { unsigned long pgprot; } pgprot_t; #define pfn_to_kaddr(pfn) __va((pfn) << PAGE_SHIFT) +#ifndef CONFIG_SPARSEMEM #ifndef CONFIG_NEED_MULTIPLE_NODES #define pfn_valid(pfn) ((pfn) < max_mapnr) #endif +#endif #define virt_to_page(kaddr) pfn_to_page(__pa(kaddr) >> PAGE_SHIFT) #define virt_addr_valid(kaddr) pfn_valid(__pa(kaddr) >> PAGE_SHIFT) diff --git a/include/asm-mips/sparsemem.h b/include/asm-mips/sparsemem.h new file mode 100644 index 000000000000..795ac6c23203 --- /dev/null +++ b/include/asm-mips/sparsemem.h @@ -0,0 +1,14 @@ +#ifndef _MIPS_SPARSEMEM_H +#define _MIPS_SPARSEMEM_H +#ifdef CONFIG_SPARSEMEM + +/* + * SECTION_SIZE_BITS 2^N: how big each section will be + * MAX_PHYSMEM_BITS 2^N: how much memory we can have in that space + */ +#define SECTION_SIZE_BITS 28 +#define MAX_PHYSMEM_BITS 35 + +#endif /* CONFIG_SPARSEMEM */ +#endif /* _MIPS_SPARSEMEM_H */ + -- cgit v1.2.3