From cc9b0918037454d2cd9f6f07d95095fe30b02091 Mon Sep 17 00:00:00 2001 From: Viresh Kumar Date: Fri, 25 May 2018 11:10:05 +0530 Subject: arm64: dts: rockchip: Add missing cooling device properties for CPUs The cooling device properties, like "#cooling-cells" and "dynamic-power-coefficient", should either be present for all the CPUs of a cluster or none. If these are present only for a subset of CPUs of a cluster then things will start falling apart as soon as the CPUs are brought online in a different order. For example, this will happen because the operating system looks for such properties in the CPU node it is trying to bring up, so that it can register a cooling device. Add such missing properties. Do minor rearrangement as well to keep ordering consistent. Signed-off-by: Viresh Kumar Signed-off-by: Heiko Stuebner --- arch/arm64/boot/dts/rockchip/rk3328.dtsi | 3 +++ arch/arm64/boot/dts/rockchip/rk3368.dtsi | 8 ++++++-- arch/arm64/boot/dts/rockchip/rk3399.dtsi | 8 ++++++-- 3 files changed, 15 insertions(+), 4 deletions(-) (limited to 'arch') diff --git a/arch/arm64/boot/dts/rockchip/rk3328.dtsi b/arch/arm64/boot/dts/rockchip/rk3328.dtsi index 241b86513c1b..2f38ff2f1465 100644 --- a/arch/arm64/boot/dts/rockchip/rk3328.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3328.dtsi @@ -52,6 +52,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x1>; clocks = <&cru ARMCLK>; + #cooling-cells = <2>; dynamic-power-coefficient = <120>; enable-method = "psci"; next-level-cache = <&l2>; @@ -63,6 +64,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x2>; clocks = <&cru ARMCLK>; + #cooling-cells = <2>; dynamic-power-coefficient = <120>; enable-method = "psci"; next-level-cache = <&l2>; @@ -74,6 +76,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x3>; clocks = <&cru ARMCLK>; + #cooling-cells = <2>; dynamic-power-coefficient = <120>; enable-method = "psci"; next-level-cache = <&l2>; diff --git a/arch/arm64/boot/dts/rockchip/rk3368.dtsi b/arch/arm64/boot/dts/rockchip/rk3368.dtsi index f52ced6091db..9c24de1ba43c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3368.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3368.dtsi @@ -76,7 +76,6 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; - #cooling-cells = <2>; /* min followed by max */ }; @@ -85,6 +84,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x1>; enable-method = "psci"; + #cooling-cells = <2>; /* min followed by max */ }; cpu_l2: cpu@2 { @@ -92,6 +92,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x2>; enable-method = "psci"; + #cooling-cells = <2>; /* min followed by max */ }; cpu_l3: cpu@3 { @@ -99,6 +100,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x3>; enable-method = "psci"; + #cooling-cells = <2>; /* min followed by max */ }; cpu_b0: cpu@100 { @@ -106,7 +108,6 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; - #cooling-cells = <2>; /* min followed by max */ }; @@ -115,6 +116,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x101>; enable-method = "psci"; + #cooling-cells = <2>; /* min followed by max */ }; cpu_b2: cpu@102 { @@ -122,6 +124,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x102>; enable-method = "psci"; + #cooling-cells = <2>; /* min followed by max */ }; cpu_b3: cpu@103 { @@ -129,6 +132,7 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x103>; enable-method = "psci"; + #cooling-cells = <2>; /* min followed by max */ }; }; diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi index 2636fd82e229..ff63d9e93b4a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi @@ -71,8 +71,8 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0 0x0>; enable-method = "psci"; - #cooling-cells = <2>; /* min followed by max */ clocks = <&cru ARMCLKL>; + #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <100>; }; @@ -82,6 +82,7 @@ reg = <0x0 0x1>; enable-method = "psci"; clocks = <&cru ARMCLKL>; + #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <100>; }; @@ -91,6 +92,7 @@ reg = <0x0 0x2>; enable-method = "psci"; clocks = <&cru ARMCLKL>; + #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <100>; }; @@ -100,6 +102,7 @@ reg = <0x0 0x3>; enable-method = "psci"; clocks = <&cru ARMCLKL>; + #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <100>; }; @@ -108,8 +111,8 @@ compatible = "arm,cortex-a72", "arm,armv8"; reg = <0x0 0x100>; enable-method = "psci"; - #cooling-cells = <2>; /* min followed by max */ clocks = <&cru ARMCLKB>; + #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <436>; }; @@ -119,6 +122,7 @@ reg = <0x0 0x101>; enable-method = "psci"; clocks = <&cru ARMCLKB>; + #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <436>; }; }; -- cgit v1.2.3