From 87a8c7164022d2e5c558bc0e14075c7a50af7f95 Mon Sep 17 00:00:00 2001 From: Oleksij Rempel Date: Wed, 11 Aug 2021 09:38:35 +0200 Subject: ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz By default ENET_REF is configured to 50MHz, which is usable for the RMII link. In case RGMII is used, we need 125MHz clock. Signed-off-by: Oleksij Rempel Signed-off-by: Shawn Guo --- arch/arm/boot/dts/imx6qp-prtwd3.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/boot/dts/imx6qp-prtwd3.dts b/arch/arm/boot/dts/imx6qp-prtwd3.dts index c42723989bc0..b92e0f2748a5 100644 --- a/arch/arm/boot/dts/imx6qp-prtwd3.dts +++ b/arch/arm/boot/dts/imx6qp-prtwd3.dts @@ -208,6 +208,8 @@ &fec { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_enet>; + assigned-clocks = <&clks IMX6QDL_CLK_ENET_REF>; + assigned-clock-rates = <125000000>; status = "okay"; phy-mode = "rgmii"; -- cgit v1.2.3