From b2640b420a806c91f6b8799314ca96bb88a246d2 Mon Sep 17 00:00:00 2001 From: Matt Reimer Date: Thu, 20 Oct 2005 23:21:18 +0100 Subject: [ARM] 3025/1: Add I2S platform device for PXA Patch from Matt Reimer Adds an I2S platform_device for PXA. I2S is used to interface with sound chips on systems like iPAQ h1910/h2200/hx4700 and Asus 716. Signed-off-by: mreimer@vpop.net Signed-off-by: Russell King --- arch/arm/mach-pxa/generic.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-pxa/generic.c b/arch/arm/mach-pxa/generic.c index d327c127eddb..1d7677669a76 100644 --- a/arch/arm/mach-pxa/generic.c +++ b/arch/arm/mach-pxa/generic.c @@ -250,6 +250,25 @@ void __init pxa_set_i2c_info(struct i2c_pxa_platform_data *info) i2c_device.dev.platform_data = info; } +static struct resource i2s_resources[] = { + { + .start = 0x40400000, + .end = 0x40400083, + .flags = IORESOURCE_MEM, + }, { + .start = IRQ_I2S, + .end = IRQ_I2S, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device i2s_device = { + .name = "pxa2xx-i2s", + .id = -1, + .resource = i2c_resources, + .num_resources = ARRAY_SIZE(i2s_resources), +}; + static struct platform_device *devices[] __initdata = { &pxamci_device, &udc_device, @@ -258,6 +277,7 @@ static struct platform_device *devices[] __initdata = { &btuart_device, &stuart_device, &i2c_device, + &i2s_device, }; static int __init pxa_init(void) -- cgit v1.2.3 From b048dbf4d428c89f219efc2eddf2771f13500503 Mon Sep 17 00:00:00 2001 From: Ben Dooks Date: Thu, 20 Oct 2005 23:21:19 +0100 Subject: [ARM] 3027/1: BAST - reduce NAND timings slightly Patch from Ben Dooks The current Simtec BAST nand area timings are a little too slow to be obtained by a 2410 running at 266MHz, so reduce the timings slightly to bring them into the acceptable range. Signed-off-by: Ben Dooks Signed-off-by: Russell King --- arch/arm/mach-s3c2410/mach-bast.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-s3c2410/mach-bast.c b/arch/arm/mach-s3c2410/mach-bast.c index 8ca955984645..7b51bfd0ba6d 100644 --- a/arch/arm/mach-s3c2410/mach-bast.c +++ b/arch/arm/mach-s3c2410/mach-bast.c @@ -307,9 +307,9 @@ static void bast_nand_select(struct s3c2410_nand_set *set, int slot) } static struct s3c2410_platform_nand bast_nand_info = { - .tacls = 40, - .twrph0 = 80, - .twrph1 = 80, + .tacls = 30, + .twrph0 = 60, + .twrph1 = 60, .nr_sets = ARRAY_SIZE(bast_nand_sets), .sets = bast_nand_sets, .select_chip = bast_nand_select, -- cgit v1.2.3 From d18566376055046fca0b51ad536f1778ef34966a Mon Sep 17 00:00:00 2001 From: Russell King Date: Fri, 21 Oct 2005 10:17:37 +0100 Subject: [ARM] Fix Integrator IM/PD-1 support Signed-off-by: Russell King --- arch/arm/mach-integrator/impd1.c | 15 ++++++++------- 1 file changed, 8 insertions(+), 7 deletions(-) (limited to 'arch') diff --git a/arch/arm/mach-integrator/impd1.c b/arch/arm/mach-integrator/impd1.c index c3c2f17d030e..a1b153d1626c 100644 --- a/arch/arm/mach-integrator/impd1.c +++ b/arch/arm/mach-integrator/impd1.c @@ -67,7 +67,7 @@ static void impd1_setvco(struct clk *clk, struct icst525_vco vco) } writel(0, impd1->base + IMPD1_LOCK); -#if DEBUG +#ifdef DEBUG vco.v = val & 0x1ff; vco.r = (val >> 9) & 0x7f; vco.s = (val >> 16) & 7; @@ -427,17 +427,18 @@ static int impd1_probe(struct lm_device *dev) return ret; } +static int impd1_remove_one(struct device *dev, void *data) +{ + device_unregister(dev); + return 0; +} + static void impd1_remove(struct lm_device *dev) { struct impd1_module *impd1 = lm_get_drvdata(dev); - struct list_head *l, *n; int i; - list_for_each_safe(l, n, &dev->dev.children) { - struct device *d = list_to_dev(l); - - device_unregister(d); - } + device_for_each_child(&dev->dev, NULL, impd1_remove_one); for (i = 0; i < ARRAY_SIZE(impd1->vcos); i++) clk_unregister(&impd1->vcos[i]); -- cgit v1.2.3 From a1c7e111934b6375baf07a970d6c890d18d7e34f Mon Sep 17 00:00:00 2001 From: Paul Mackerras Date: Fri, 21 Oct 2005 22:39:36 +1000 Subject: [PATCH] ppc64: Fix typo in time calculations This fixes a typo in the div128_by_32 function used in the timekeeping calculations on ppc64. If you look at the code it's quite obvious that we need (rb + c) rather than (rb + b). The "b" is clearly just a typo. Signed-off-by: Paul Mackerras Signed-off-by: Linus Torvalds --- arch/ppc64/kernel/time.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/ppc64/kernel/time.c b/arch/ppc64/kernel/time.c index 9939c206afa4..b56c6a324e17 100644 --- a/arch/ppc64/kernel/time.c +++ b/arch/ppc64/kernel/time.c @@ -870,7 +870,7 @@ void div128_by_32( unsigned long dividend_high, unsigned long dividend_low, rb = ((ra + b) - (x * divisor)) << 32; y = (rb + c)/divisor; - rc = ((rb + b) - (y * divisor)) << 32; + rc = ((rb + c) - (y * divisor)) << 32; z = (rc + d)/divisor; -- cgit v1.2.3 From 5d96551541a8f5521dcc8c634a18d42a3d349ec9 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Fri, 21 Oct 2005 14:12:51 +1000 Subject: [PATCH] ppc64: Fix pages marked dirty abusively While working on 64K pages, I found this little buglet in our update_mmu_cache() implementation. The code calls __hash_page() passing it an "access" parameter (the type of access that triggers the hash) containing the bits _PAGE_RW and _PAGE_USER of the linux PTE. The latter is useless in this case and the former is wrong. In fact, if we have a writeable PTE and we pass _PAGE_RW to hash_page(), it will set _PAGE_DIRTY (since we track dirty that way, by hash faulting !dirty) which is not what we want. In fact, the correct fix is to always pass 0. That means that only read-only or already dirty read write PTEs will be preloaded. The (hopefully rare) case of a non dirty read write PTE can't be preloaded this way, it will have to fault in hash_page on the actual access. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Linus Torvalds --- arch/ppc64/mm/init.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/ppc64/mm/init.c b/arch/ppc64/mm/init.c index c2157c9c3acb..be64b157afce 100644 --- a/arch/ppc64/mm/init.c +++ b/arch/ppc64/mm/init.c @@ -799,8 +799,7 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long ea, if (cpus_equal(vma->vm_mm->cpu_vm_mask, tmp)) local = 1; - __hash_page(ea, pte_val(pte) & (_PAGE_USER|_PAGE_RW), vsid, ptep, - 0x300, local); + __hash_page(ea, 0, vsid, ptep, 0x300, local); local_irq_restore(flags); } -- cgit v1.2.3 From 3078fcc1d18c7235b034dc889642c5300959fa20 Mon Sep 17 00:00:00 2001 From: David Gibson Date: Fri, 21 Oct 2005 13:41:19 +1000 Subject: [PATCH] ppc64: Fix typo bug in iSeries hash code This fixes a stupid typo bug in the iSeries hash table code. When we place a hash PTE in the secondary bucket, instead of setting the SECONDARY flag bit, as we should, we (redundantly) set the VALID flag. This was introduced with the patch abolishing bitfields from the hash table code. Mea culpa, oops. It hasn't been noticed until now because in practice we don't hit the secondary bucket terribly often. Signed-off-by: David Gibson Signed-off-by: Linus Torvalds --- arch/ppc64/kernel/iSeries_htab.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/ppc64/kernel/iSeries_htab.c b/arch/ppc64/kernel/iSeries_htab.c index 2192055a90a0..073b76661747 100644 --- a/arch/ppc64/kernel/iSeries_htab.c +++ b/arch/ppc64/kernel/iSeries_htab.c @@ -66,7 +66,7 @@ static long iSeries_hpte_insert(unsigned long hpte_group, unsigned long va, } if (slot < 0) { /* MSB set means secondary group */ - vflags |= HPTE_V_VALID; + vflags |= HPTE_V_SECONDARY; secondary = 1; slot &= 0x7fffffffffffffff; } -- cgit v1.2.3 From 0213df74315bbab9ccaa73146f3e11972ea6de46 Mon Sep 17 00:00:00 2001 From: Dave Jones Date: Fri, 21 Oct 2005 17:21:03 -0400 Subject: [PATCH] cpufreq: fix pending powernow timer stuck condition AMD recently discovered that on some hardware, there is a race condition possible when a C-state change request goes onto the bus at the same time as a P-state change request. Both requests happen, but the southbridge hardware only acknowledges the C-state change. The PowerNow! driver is then stuck in a loop, waiting for the P-state change acknowledgement. The driver eventually times out, but can no longer perform P-state changes. It turns out the solution is to resend the P-state change, which the southbridge will acknowledge normally. Thanks to Johannes Winkelmann for reporting this and testing the fix. Signed-off-by: Mark Langsdorf Signed-off-by: Dave Jones Signed-off-by: Linus Torvalds --- arch/i386/kernel/cpu/cpufreq/powernow-k8.c | 30 +++++++++++++++++++----------- 1 file changed, 19 insertions(+), 11 deletions(-) (limited to 'arch') diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c index ab6e0611303d..ec3a9e335aa3 100644 --- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c @@ -44,7 +44,7 @@ #define PFX "powernow-k8: " #define BFX PFX "BIOS error: " -#define VERSION "version 1.50.3" +#define VERSION "version 1.50.4" #include "powernow-k8.h" /* serialize freq changes */ @@ -111,8 +111,8 @@ static int query_current_values_with_pending_wait(struct powernow_k8_data *data) u32 i = 0; do { - if (i++ > 0x1000000) { - printk(KERN_ERR PFX "detected change pending stuck\n"); + if (i++ > 10000) { + dprintk("detected change pending stuck\n"); return 1; } rdmsr(MSR_FIDVID_STATUS, lo, hi); @@ -159,6 +159,7 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid) { u32 lo; u32 savevid = data->currvid; + u32 i = 0; if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { printk(KERN_ERR PFX "internal error - overflow on fid write\n"); @@ -170,10 +171,13 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid) dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n", fid, lo, data->plllock * PLL_LOCK_CONVERSION); - wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); - - if (query_current_values_with_pending_wait(data)) - return 1; + do { + wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); + if (i++ > 100) { + printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n"); + retrun 1; + } + } while (query_current_values_with_pending_wait(data)); count_off_irt(data); @@ -197,6 +201,7 @@ static int write_new_vid(struct powernow_k8_data *data, u32 vid) { u32 lo; u32 savefid = data->currfid; + int i = 0; if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { printk(KERN_ERR PFX "internal error - overflow on vid write\n"); @@ -208,10 +213,13 @@ static int write_new_vid(struct powernow_k8_data *data, u32 vid) dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n", vid, lo, STOP_GRANT_5NS); - wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); - - if (query_current_values_with_pending_wait(data)) - return 1; + do { + wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); + if (i++ > 100) { + printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n"); + return 1; + } + } while (query_current_values_with_pending_wait(data)); if (savefid != data->currfid) { printk(KERN_ERR PFX "fid changed on vid trans, old 0x%x new 0x%x\n", -- cgit v1.2.3 From 63172cb3d5ef762dcb60a292bc7f016b85cf6e1f Mon Sep 17 00:00:00 2001 From: Chris Wright Date: Fri, 21 Oct 2005 16:56:08 -0700 Subject: [PATCH] typo fix in last cpufreq powernow patch Not sure how it slipped by, but here's a trivial typo fix for powernow. Signed-off-by: Chris Wright [ It's "nurter" backwards.. Maybe we have a hillbilly The Shining fan? ] Signed-off-by: Linus Torvalds --- arch/i386/kernel/cpu/cpufreq/powernow-k8.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch') diff --git a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c index ec3a9e335aa3..58ca98fdc2ca 100644 --- a/arch/i386/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/i386/kernel/cpu/cpufreq/powernow-k8.c @@ -175,7 +175,7 @@ static int write_new_fid(struct powernow_k8_data *data, u32 fid) wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); if (i++ > 100) { printk(KERN_ERR PFX "internal error - pending bit very stuck - no further pstate changes possible\n"); - retrun 1; + return 1; } } while (query_current_values_with_pending_wait(data)); -- cgit v1.2.3 From 10ded9493ec4a566977ed68b65158eba280e61e5 Mon Sep 17 00:00:00 2001 From: Miklos Szeredi Date: Mon, 24 Oct 2005 17:49:34 +0200 Subject: [PATCH] uml: fix compile failure for TT mode Without this patch, uml compile fails with: LD .tmp_vmlinux1 arch/um/kernel/built-in.o: In function `config_gdb_cb': arch/um/kernel/tt/gdb.c:129: undefined reference to `TASK_EXTERN_PID' Tested on i386, but fix needed on x86_64 too AFAICS. Signed-off-by: Miklos Szeredi Signed-off-by: Linus Torvalds --- arch/um/include/sysdep-i386/thread.h | 2 +- arch/um/include/sysdep-x86_64/thread.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/um/include/sysdep-i386/thread.h b/arch/um/include/sysdep-i386/thread.h index e2bd6bae8b8a..243fed44d780 100644 --- a/arch/um/include/sysdep-i386/thread.h +++ b/arch/um/include/sysdep-i386/thread.h @@ -4,7 +4,7 @@ #include #define TASK_DEBUGREGS(task) ((unsigned long *) &(((char *) (task))[HOST_TASK_DEBUGREGS])) -#ifdef CONFIG_MODE_TT +#ifdef UML_CONFIG_MODE_TT #define TASK_EXTERN_PID(task) *((int *) &(((char *) (task))[HOST_TASK_EXTERN_PID])) #endif diff --git a/arch/um/include/sysdep-x86_64/thread.h b/arch/um/include/sysdep-x86_64/thread.h index 6a76a7f3683f..cbef3e1697f4 100644 --- a/arch/um/include/sysdep-x86_64/thread.h +++ b/arch/um/include/sysdep-x86_64/thread.h @@ -3,7 +3,7 @@ #include -#ifdef CONFIG_MODE_TT +#ifdef UML_CONFIG_MODE_TT #define TASK_EXTERN_PID(task) *((int *) &(((char *) (task))[HOST_TASK_EXTERN_PID])) #endif -- cgit v1.2.3 From c34e152a494c0de8d920b70163d95235a51f4120 Mon Sep 17 00:00:00 2001 From: Pavel Machek Date: Mon, 24 Oct 2005 22:30:10 +0100 Subject: [ARM] fix sharp zaurus c-3000 compile failure without CONFIG_FB_PXA This fixes compile problem when CONFIG_FB_PXA is not set. LD .tmp_vmlinux1 arch/arm/mach-pxa/built-in.o(.text+0x1d74): In function `spitz_get_hsync_len': : undefined reference to `pxafb_get_hsync_time' make: *** [.tmp_vmlinux1] Error 1 3.46user 0.46system 5.10 (0m5.106s) elapsed 77.01%CPU Signed-off-by: Pavel Machek Signed-off-by: Richard Purdie Signed-off-by: Russell King --- arch/arm/mach-pxa/corgi_lcd.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch') diff --git a/arch/arm/mach-pxa/corgi_lcd.c b/arch/arm/mach-pxa/corgi_lcd.c index 850538fadece..370df113dc06 100644 --- a/arch/arm/mach-pxa/corgi_lcd.c +++ b/arch/arm/mach-pxa/corgi_lcd.c @@ -488,6 +488,7 @@ static int is_pxafb_device(struct device * dev, void * data) unsigned long spitz_get_hsync_len(void) { +#ifdef CONFIG_FB_PXA if (!spitz_pxafb_dev) { spitz_pxafb_dev = bus_find_device(&platform_bus_type, NULL, NULL, is_pxafb_device); if (!spitz_pxafb_dev) @@ -496,6 +497,7 @@ unsigned long spitz_get_hsync_len(void) if (!get_hsync_time) get_hsync_time = symbol_get(pxafb_get_hsync_time); if (!get_hsync_time) +#endif return 0; return pxafb_get_hsync_time(spitz_pxafb_dev); -- cgit v1.2.3 From 958d24df82e021704437da0789c47fcf581e4b85 Mon Sep 17 00:00:00 2001 From: Benjamin Herrenschmidt Date: Wed, 26 Oct 2005 01:59:00 -0700 Subject: [PATCH] ppc64: Fix wrong register mapping in mpic driver The mpic interrupt controller driver (used on G5 and early pSeries among others) has a bug where it doesn't get the right virtual address for the timer registers. It causes the driver to poke at the MMIO space of whatever has been mapped just next to it (ouch !) when initializing and causes boot failures on some IBM machines. Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds --- arch/ppc64/kernel/mpic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch') diff --git a/arch/ppc64/kernel/mpic.c b/arch/ppc64/kernel/mpic.c index cc262a05ddb4..5f5bc73754d9 100644 --- a/arch/ppc64/kernel/mpic.c +++ b/arch/ppc64/kernel/mpic.c @@ -506,8 +506,8 @@ struct mpic * __init mpic_alloc(unsigned long phys_addr, mpic->senses_count = senses_count; /* Map the global registers */ - mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x1000); - mpic->tmregs = mpic->gregs + (MPIC_TIMER_BASE >> 2); + mpic->gregs = ioremap(phys_addr + MPIC_GREG_BASE, 0x2000); + mpic->tmregs = mpic->gregs + ((MPIC_TIMER_BASE - MPIC_GREG_BASE) >> 2); BUG_ON(mpic->gregs == NULL); /* Reset */ -- cgit v1.2.3