From 280ef31a00073b4092bb47814fcb0a1f1f27b2bd Mon Sep 17 00:00:00 2001 From: Greg Ungerer Date: Fri, 13 Jul 2012 16:08:44 +1000 Subject: m68knommu: modify clock code so it can be used by all ColdFire CPU types The existing clk.c code for ColdFire CPUs has one set of functions to support those CPU types that have selectable clocks (those with a PPMCR register), and a duplicate simpler set for those with static clocks. Modify the clk.c code so there is just one set of support functions. All CPU types now define a list of clocks (in "struct clk"s), so we only need a single set of clock functions. Signed-off-by: Greg Ungerer --- arch/m68k/platform/coldfire/clk.c | 100 +++++++++++++++----------------------- 1 file changed, 38 insertions(+), 62 deletions(-) (limited to 'arch') diff --git a/arch/m68k/platform/coldfire/clk.c b/arch/m68k/platform/coldfire/clk.c index 9cd13b4ce42b..fddfdccae63b 100644 --- a/arch/m68k/platform/coldfire/clk.c +++ b/arch/m68k/platform/coldfire/clk.c @@ -19,37 +19,58 @@ #include #include -/***************************************************************************/ -#ifndef MCFPM_PPMCR0 -struct clk *clk_get(struct device *dev, const char *id) +static DEFINE_SPINLOCK(clk_lock); + +#ifdef MCFPM_PPMCR0 +/* + * For more advanced ColdFire parts that have clocks that can be enabled + * we supply enable/disable functions. These must properly define their + * clocks in their platform specific code. + */ +void __clk_init_enabled(struct clk *clk) { - return NULL; + clk->enabled = 1; + clk->clk_ops->enable(clk); } -EXPORT_SYMBOL(clk_get); -int clk_enable(struct clk *clk) +void __clk_init_disabled(struct clk *clk) { - return 0; + clk->enabled = 0; + clk->clk_ops->disable(clk); } -EXPORT_SYMBOL(clk_enable); -void clk_disable(struct clk *clk) +static void __clk_enable0(struct clk *clk) { + __raw_writeb(clk->slot, MCFPM_PPMCR0); } -EXPORT_SYMBOL(clk_disable); -void clk_put(struct clk *clk) +static void __clk_disable0(struct clk *clk) +{ + __raw_writeb(clk->slot, MCFPM_PPMSR0); +} + +struct clk_ops clk_ops0 = { + .enable = __clk_enable0, + .disable = __clk_disable0, +}; + +#ifdef MCFPM_PPMCR1 +static void __clk_enable1(struct clk *clk) { + __raw_writeb(clk->slot, MCFPM_PPMCR1); } -EXPORT_SYMBOL(clk_put); -unsigned long clk_get_rate(struct clk *clk) +static void __clk_disable1(struct clk *clk) { - return MCF_CLK; + __raw_writeb(clk->slot, MCFPM_PPMSR1); } -EXPORT_SYMBOL(clk_get_rate); -#else -static DEFINE_SPINLOCK(clk_lock); + +struct clk_ops clk_ops1 = { + .enable = __clk_enable1, + .disable = __clk_disable1, +}; +#endif /* MCFPM_PPMCR1 */ +#endif /* MCFPM_PPMCR0 */ struct clk *clk_get(struct device *dev, const char *id) { @@ -101,48 +122,3 @@ unsigned long clk_get_rate(struct clk *clk) EXPORT_SYMBOL(clk_get_rate); /***************************************************************************/ - -void __clk_init_enabled(struct clk *clk) -{ - clk->enabled = 1; - clk->clk_ops->enable(clk); -} - -void __clk_init_disabled(struct clk *clk) -{ - clk->enabled = 0; - clk->clk_ops->disable(clk); -} - -static void __clk_enable0(struct clk *clk) -{ - __raw_writeb(clk->slot, MCFPM_PPMCR0); -} - -static void __clk_disable0(struct clk *clk) -{ - __raw_writeb(clk->slot, MCFPM_PPMSR0); -} - -struct clk_ops clk_ops0 = { - .enable = __clk_enable0, - .disable = __clk_disable0, -}; - -#ifdef MCFPM_PPMCR1 -static void __clk_enable1(struct clk *clk) -{ - __raw_writeb(clk->slot, MCFPM_PPMCR1); -} - -static void __clk_disable1(struct clk *clk) -{ - __raw_writeb(clk->slot, MCFPM_PPMSR1); -} - -struct clk_ops clk_ops1 = { - .enable = __clk_enable1, - .disable = __clk_disable1, -}; -#endif /* MCFPM_PPMCR1 */ -#endif /* MCFPM_PPMCR0 */ -- cgit v1.2.3