From 4f22ca7e192ee313a83f8093ba5b5b2ca72d10e4 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Tue, 16 Feb 2021 22:39:41 -0800 Subject: xtensa: simplify coherent_kvaddr logic Functions coherent_kvaddr, clear_page_alias and copy_page_alias use physical address 0 as a special value that means 'this page is in the KSEG mapping and its existing virtual address has the same color as the virtual address of its future mapping, so don't map it to the TLBTEMP_BASE area'. Simplify this logic and drop special handling of low memory pages/pages with coherent mapping and always use TLBTEMP_BASE area. Signed-off-by: Max Filippov --- arch/xtensa/mm/cache.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) (limited to 'arch/xtensa/mm/cache.c') diff --git a/arch/xtensa/mm/cache.c b/arch/xtensa/mm/cache.c index 085b8c77b9d9..19e5a478a7e8 100644 --- a/arch/xtensa/mm/cache.c +++ b/arch/xtensa/mm/cache.c @@ -81,13 +81,8 @@ static inline void kmap_invalidate_coherent(struct page *page, static inline void *coherent_kvaddr(struct page *page, unsigned long base, unsigned long vaddr, unsigned long *paddr) { - if (PageHighMem(page) || !DCACHE_ALIAS_EQ(page_to_phys(page), vaddr)) { - *paddr = page_to_phys(page); - return (void *)(base + (vaddr & DCACHE_ALIAS_MASK)); - } else { - *paddr = 0; - return page_to_virt(page); - } + *paddr = page_to_phys(page); + return (void *)(base + (vaddr & DCACHE_ALIAS_MASK)); } void clear_user_highpage(struct page *page, unsigned long vaddr) -- cgit v1.2.3