From eb9a63a1e550c489ba389c53bef0f7a94156fa8e Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Mon, 17 Sep 2012 05:44:54 +0400 Subject: xtensa: rename MISC SR definition to avoid name clashes There are other special register that cause build warnings and may as well need renaming as well. Signed-off-by: Max Filippov Signed-off-by: Chris Zankel --- arch/xtensa/include/asm/regs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/xtensa/include') diff --git a/arch/xtensa/include/asm/regs.h b/arch/xtensa/include/asm/regs.h index d4baed246928..a3075b12aff1 100644 --- a/arch/xtensa/include/asm/regs.h +++ b/arch/xtensa/include/asm/regs.h @@ -66,7 +66,7 @@ #define ICOUNTLEVEL 237 #define EXCVADDR 238 #define CCOMPARE 240 -#define MISC 244 +#define MISC_SR 244 /* Special names for read-only and write-only interrupt registers. */ -- cgit v1.2.3