From e725331354924b3f720c8bb7ca579d44cc63e574 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Sun, 15 Dec 2019 02:44:59 -0800 Subject: xtensa: clean up platform headers Drop include directives for irrelevant headers in asm/platform.h and its users. Sort remaining headers. Signed-off-by: Max Filippov --- arch/xtensa/include/asm/platform.h | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/xtensa/include/asm') diff --git a/arch/xtensa/include/asm/platform.h b/arch/xtensa/include/asm/platform.h index f2c48522c5a1..354ca942de40 100644 --- a/arch/xtensa/include/asm/platform.h +++ b/arch/xtensa/include/asm/platform.h @@ -12,8 +12,6 @@ #define _XTENSA_PLATFORM_H #include -#include - #include /* -- cgit v1.2.3 From a922b1561137fc516e7c77c478779f7d198cc9cf Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Fri, 31 Jan 2020 21:20:58 -0800 Subject: xtensa: clean up optional XCHAL_* definitions Simplify users of XCHAL_HAVE_EXTERN_REGS and XCHAL_HAVE_VECBASE and always define them as 0 if they're not defined in the variant/core.h Signed-off-by: Max Filippov --- arch/xtensa/include/asm/core.h | 8 ++++++++ arch/xtensa/include/asm/processor.h | 4 ---- arch/xtensa/include/asm/vectors.h | 2 +- 3 files changed, 9 insertions(+), 5 deletions(-) (limited to 'arch/xtensa/include/asm') diff --git a/arch/xtensa/include/asm/core.h b/arch/xtensa/include/asm/core.h index 5b4acb7d1c07..5590b0f68837 100644 --- a/arch/xtensa/include/asm/core.h +++ b/arch/xtensa/include/asm/core.h @@ -10,10 +10,18 @@ #define XCHAL_HAVE_EXCLUSIVE 0 #endif +#ifndef XCHAL_HAVE_EXTERN_REGS +#define XCHAL_HAVE_EXTERN_REGS 0 +#endif + #ifndef XCHAL_HAVE_MPU #define XCHAL_HAVE_MPU 0 #endif +#ifndef XCHAL_HAVE_VECBASE +#define XCHAL_HAVE_VECBASE 0 +#endif + #ifndef XCHAL_SPANNING_WAY #define XCHAL_SPANNING_WAY 0 #endif diff --git a/arch/xtensa/include/asm/processor.h b/arch/xtensa/include/asm/processor.h index 6fa903daf2a2..7f63aca6a0d3 100644 --- a/arch/xtensa/include/asm/processor.h +++ b/arch/xtensa/include/asm/processor.h @@ -237,10 +237,6 @@ extern unsigned long get_wchan(struct task_struct *p); v; \ }) -#ifndef XCHAL_HAVE_EXTERN_REGS -#define XCHAL_HAVE_EXTERN_REGS 0 -#endif - #if XCHAL_HAVE_EXTERN_REGS static inline void set_er(unsigned long value, unsigned long addr) diff --git a/arch/xtensa/include/asm/vectors.h b/arch/xtensa/include/asm/vectors.h index fd99b25037a7..140f30762cf9 100644 --- a/arch/xtensa/include/asm/vectors.h +++ b/arch/xtensa/include/asm/vectors.h @@ -40,7 +40,7 @@ #define VECBASE_VADDR _vecbase #endif -#if defined(XCHAL_HAVE_VECBASE) && XCHAL_HAVE_VECBASE +#if XCHAL_HAVE_VECBASE #define VECTOR_VADDR(offset) (VECBASE_VADDR + offset) -- cgit v1.2.3 From 50722f0bf631cfcbcce18dac6b3fb5c2b6432628 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Fri, 31 Jan 2020 18:48:43 -0800 Subject: xtensa: move fast exception handlers close to vectors On XIP kernels it makes sense to have exception vectors and fast exception handlers together (in a fast memory). In addition, with MTD XIP support both vectors and fast exception handlers must be outside of the FLASH. Add section .exception.text and move fast exception handlers to it. Put it together with vectors when vectors are outside of the .text. Signed-off-by: Max Filippov --- arch/xtensa/include/asm/asmmacro.h | 2 ++ arch/xtensa/kernel/coprocessor.S | 5 ++--- arch/xtensa/kernel/entry.S | 18 ++++++++++++------ arch/xtensa/kernel/setup.c | 4 ++++ arch/xtensa/kernel/vectors.S | 3 ++- arch/xtensa/kernel/vmlinux.lds.S | 19 ++++++++++++++++--- 6 files changed, 38 insertions(+), 13 deletions(-) (limited to 'arch/xtensa/include/asm') diff --git a/arch/xtensa/include/asm/asmmacro.h b/arch/xtensa/include/asm/asmmacro.h index 71a7e846bc1f..bfc89e11f469 100644 --- a/arch/xtensa/include/asm/asmmacro.h +++ b/arch/xtensa/include/asm/asmmacro.h @@ -237,4 +237,6 @@ #error Unsupported Xtensa ABI #endif +#define __XTENSA_HANDLER .section ".exception.text", "ax" + #endif /* _XTENSA_ASMMACRO_H */ diff --git a/arch/xtensa/kernel/coprocessor.S b/arch/xtensa/kernel/coprocessor.S index c53ce6d8794f..c426b846beef 100644 --- a/arch/xtensa/kernel/coprocessor.S +++ b/arch/xtensa/kernel/coprocessor.S @@ -58,6 +58,8 @@ .endif; \ .long THREAD_XTREGS_CP##x + __XTENSA_HANDLER + SAVE_CP_REGS(0) SAVE_CP_REGS(1) SAVE_CP_REGS(2) @@ -76,7 +78,6 @@ LOAD_CP_REGS(6) LOAD_CP_REGS(7) - .section ".rodata", "a" .align 4 .Lsave_cp_regs_jump_table: SAVE_CP_REGS_TAB(0) @@ -98,8 +99,6 @@ LOAD_CP_REGS_TAB(6) LOAD_CP_REGS_TAB(7) - .previous - /* * coprocessor_flush(struct thread_info*, index) * a2 a3 diff --git a/arch/xtensa/kernel/entry.S b/arch/xtensa/kernel/entry.S index be897803834a..9d2e22d9f3c3 100644 --- a/arch/xtensa/kernel/entry.S +++ b/arch/xtensa/kernel/entry.S @@ -939,6 +939,9 @@ ENDPROC(unrecoverable_exception) /* -------------------------- FAST EXCEPTION HANDLERS ----------------------- */ + __XTENSA_HANDLER + .literal_position + /* * Fast-handler for alloca exceptions * @@ -1024,7 +1027,7 @@ ENDPROC(fast_alloca) ENTRY(fast_illegal_instruction_user) rsr a0, ps - bbsi.l a0, PS_WOE_BIT, user_exception + bbsi.l a0, PS_WOE_BIT, 1f s32i a3, a2, PT_AREG3 movi a3, PS_WOE_MASK or a0, a0, a3 @@ -1033,6 +1036,8 @@ ENTRY(fast_illegal_instruction_user) l32i a0, a2, PT_AREG0 rsr a2, depc rfe +1: + call0 user_exception ENDPROC(fast_illegal_instruction_user) #endif @@ -1071,7 +1076,7 @@ ENTRY(fast_syscall_user) _beqz a0, fast_syscall_spill_registers _beqi a0, __NR_xtensa, fast_syscall_xtensa - j user_exception + call0 user_exception ENDPROC(fast_syscall_user) @@ -1762,8 +1767,8 @@ ENTRY(fast_second_level_miss) rsr a2, ps bbsi.l a2, PS_UM_BIT, 1f - j _kernel_exception -1: j _user_exception + call0 _kernel_exception +1: call0 _user_exception ENDPROC(fast_second_level_miss) @@ -1859,13 +1864,14 @@ ENTRY(fast_store_prohibited) rsr a2, ps bbsi.l a2, PS_UM_BIT, 1f - j _kernel_exception -1: j _user_exception + call0 _kernel_exception +1: call0 _user_exception ENDPROC(fast_store_prohibited) #endif /* CONFIG_MMU */ + .text /* * System Calls. * diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c index 0f93b67c7a5a..fefbdce1db99 100644 --- a/arch/xtensa/kernel/setup.c +++ b/arch/xtensa/kernel/setup.c @@ -284,6 +284,8 @@ extern char _UserExceptionVector_text_start; extern char _UserExceptionVector_text_end; extern char _DoubleExceptionVector_text_start; extern char _DoubleExceptionVector_text_end; +extern char _exception_text_start; +extern char _exception_text_end; #if XCHAL_EXCM_LEVEL >= 2 extern char _Level2InterruptVector_text_start; extern char _Level2InterruptVector_text_end; @@ -363,6 +365,8 @@ void __init setup_arch(char **cmdline_p) mem_reserve(__pa(&_DoubleExceptionVector_text_start), __pa(&_DoubleExceptionVector_text_end)); + mem_reserve(__pa(&_exception_text_start), + __pa(&_exception_text_end)); #if XCHAL_EXCM_LEVEL >= 2 mem_reserve(__pa(&_Level2InterruptVector_text_start), __pa(&_Level2InterruptVector_text_end)); diff --git a/arch/xtensa/kernel/vectors.S b/arch/xtensa/kernel/vectors.S index 841503d3307c..95ad1e773991 100644 --- a/arch/xtensa/kernel/vectors.S +++ b/arch/xtensa/kernel/vectors.S @@ -43,6 +43,7 @@ */ #include +#include #include #include #include @@ -477,7 +478,6 @@ _DoubleExceptionVector_handle_exception: ENDPROC(_DoubleExceptionVector) - .text /* * Fixup handler for TLB miss in double exception handler for window owerflow. * We get here with windowbase set to the window that was being spilled and @@ -505,6 +505,7 @@ ENDPROC(_DoubleExceptionVector) * a3: exctable, original value in excsave1 */ + __XTENSA_HANDLER .literal_position ENTRY(window_overflow_restore_a0_fixup) diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S index 409c05cac15e..37a3205c404c 100644 --- a/arch/xtensa/kernel/vmlinux.lds.S +++ b/arch/xtensa/kernel/vmlinux.lds.S @@ -110,6 +110,8 @@ SECTIONS SECTION_VECTOR (.KernelExceptionVector.text, KERNEL_VECTOR_VADDR) SECTION_VECTOR (.UserExceptionVector.text, USER_VECTOR_VADDR) SECTION_VECTOR (.DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR) + + *(.exception.text) #endif IRQENTRY_TEXT @@ -190,6 +192,8 @@ SECTIONS .DoubleExceptionVector.text); RELOCATE_ENTRY(_DebugInterruptVector_text, .DebugInterruptVector.text); + RELOCATE_ENTRY(_exception_text, + .exception.text); #endif #ifdef CONFIG_XIP_KERNEL RELOCATE_ENTRY(_xip_data, .data); @@ -282,8 +286,7 @@ SECTIONS .DoubleExceptionVector.text, DOUBLEEXC_VECTOR_VADDR, .UserExceptionVector.text) - - . = (LOADADDR( .DoubleExceptionVector.text ) + SIZEOF( .DoubleExceptionVector.text ) + 3) & ~ 3; +#define LAST .DoubleExceptionVector.text #endif #if !defined(CONFIG_XIP_KERNEL) && defined(CONFIG_SMP) @@ -292,10 +295,20 @@ SECTIONS .SecondaryResetVector.text, RESET_VECTOR1_VADDR, .DoubleExceptionVector.text) +#undef LAST +#define LAST .SecondaryResetVector.text - . = LOADADDR(.SecondaryResetVector.text)+SIZEOF(.SecondaryResetVector.text); +#endif +#ifdef CONFIG_VECTORS_OFFSET + SECTION_VECTOR (_exception_text, + .exception.text, + , + LAST) +#undef LAST +#define LAST .exception.text #endif + . = (LOADADDR(LAST) + SIZEOF(LAST) + 3) & ~ 3; . = ALIGN(PAGE_SIZE); -- cgit v1.2.3 From 5e4417f921238b5acf101bfcd59a7b3463fb2dbd Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Fri, 31 Jan 2020 20:11:24 -0800 Subject: xtensa: reorganize vectors placement Allow vectors to be either merged into the kernel .text or put at a fixed virtual address independently of XIP option. Drop option that puts vectors at a fixed offset from the kernel text. Add choice to Kconfig. Vectors at fixed virtual address may be useful for XIP-aware MTD support and for noMMU configurations with available IRAM. Configurations without VECBASE register must put their vectors at specific locations regardless of the selected option. All other configurations should happily use merged vectors. Signed-off-by: Max Filippov --- arch/xtensa/Kconfig | 40 +++++++++++++++++++++++++++------ arch/xtensa/configs/smp_lx200_defconfig | 1 - arch/xtensa/configs/virt_defconfig | 1 - arch/xtensa/include/asm/vectors.h | 4 ++-- arch/xtensa/kernel/setup.c | 4 ++-- arch/xtensa/kernel/vmlinux.lds.S | 21 +++++++++++------ 6 files changed, 51 insertions(+), 20 deletions(-) (limited to 'arch/xtensa/include/asm') diff --git a/arch/xtensa/Kconfig b/arch/xtensa/Kconfig index 06e6161797fa..133385d13c02 100644 --- a/arch/xtensa/Kconfig +++ b/arch/xtensa/Kconfig @@ -572,15 +572,41 @@ config KERNEL_LOAD_ADDRESS If unsure, leave the default value here. -config VECTORS_OFFSET - hex "Kernel vectors offset" - default 0x00003000 - depends on !XIP_KERNEL +choice + prompt "Relocatable vectors location" + default XTENSA_VECTORS_IN_TEXT help - This is the offset of the kernel image from the relocatable vectors - base. + Choose whether relocatable vectors are merged into the kernel .text + or placed separately at runtime. This option does not affect + configurations without VECBASE register where vectors are always + placed at their hardware-defined locations. - If unsure, leave the default value here. +config XTENSA_VECTORS_IN_TEXT + bool "Merge relocatable vectors into kernel text" + depends on !MTD_XIP + help + This option puts relocatable vectors into the kernel .text section + with proper alignment. + This is a safe choice for most configurations. + +config XTENSA_VECTORS_SEPARATE + bool "Put relocatable vectors at fixed address" + help + This option puts relocatable vectors at specific virtual address. + Vectors are merged with the .init data in the kernel image and + are copied into their designated location during kernel startup. + Use it to put vectors into IRAM or out of FLASH on kernels with + XIP-aware MTD support. + +endchoice + +config VECTORS_ADDR + hex "Kernel vectors virtual address" + default 0x00000000 + depends on XTENSA_VECTORS_SEPARATE + help + This is the virtual address of the (relocatable) vectors base. + It must be within KSEG if MMU is used. config XIP_DATA_ADDR hex "XIP kernel data virtual address" diff --git a/arch/xtensa/configs/smp_lx200_defconfig b/arch/xtensa/configs/smp_lx200_defconfig index 8b3bc92a079c..4f1c7998b030 100644 --- a/arch/xtensa/configs/smp_lx200_defconfig +++ b/arch/xtensa/configs/smp_lx200_defconfig @@ -30,7 +30,6 @@ CONFIG_SMP=y CONFIG_HOTPLUG_CPU=y # CONFIG_INITIALIZE_XTENSA_MMU_INSIDE_VMLINUX is not set # CONFIG_PCI is not set -CONFIG_VECTORS_OFFSET=0x00002000 CONFIG_XTENSA_PLATFORM_XTFPGA=y CONFIG_CMDLINE_BOOL=y CONFIG_CMDLINE="earlycon=uart8250,mmio32native,0xfd050020,115200n8 console=ttyS0,115200n8 ip=dhcp root=/dev/nfs rw debug memmap=96M@0" diff --git a/arch/xtensa/configs/virt_defconfig b/arch/xtensa/configs/virt_defconfig index 4fddd8512350..6d1387dfa96f 100644 --- a/arch/xtensa/configs/virt_defconfig +++ b/arch/xtensa/configs/virt_defconfig @@ -19,7 +19,6 @@ CONFIG_KALLSYMS_ALL=y CONFIG_PERF_EVENTS=y CONFIG_XTENSA_VARIANT_DC233C=y CONFIG_XTENSA_UNALIGNED_USER=y -CONFIG_VECTORS_OFFSET=0x00002000 CONFIG_XTENSA_KSEG_512M=y CONFIG_HIGHMEM=y CONFIG_CMDLINE_BOOL=y diff --git a/arch/xtensa/include/asm/vectors.h b/arch/xtensa/include/asm/vectors.h index 140f30762cf9..704286c35640 100644 --- a/arch/xtensa/include/asm/vectors.h +++ b/arch/xtensa/include/asm/vectors.h @@ -34,8 +34,8 @@ #endif #define RESET_VECTOR1_VADDR (XCHAL_RESET_VECTOR1_VADDR) -#ifdef CONFIG_VECTORS_OFFSET -#define VECBASE_VADDR (KERNELOFFSET - CONFIG_VECTORS_OFFSET) +#ifdef CONFIG_VECTORS_ADDR +#define VECBASE_VADDR (CONFIG_VECTORS_ADDR) #else #define VECBASE_VADDR _vecbase #endif diff --git a/arch/xtensa/kernel/setup.c b/arch/xtensa/kernel/setup.c index fefbdce1db99..1e9b9e7d9583 100644 --- a/arch/xtensa/kernel/setup.c +++ b/arch/xtensa/kernel/setup.c @@ -349,7 +349,7 @@ void __init setup_arch(char **cmdline_p) mem_reserve(__pa(_xip_start), __pa(_xip_end)); #endif -#ifdef CONFIG_VECTORS_OFFSET +#ifdef CONFIG_VECTORS_ADDR mem_reserve(__pa(&_WindowVectors_text_start), __pa(&_WindowVectors_text_end)); @@ -388,7 +388,7 @@ void __init setup_arch(char **cmdline_p) __pa(&_Level6InterruptVector_text_end)); #endif -#endif /* CONFIG_VECTORS_OFFSET */ +#endif /* CONFIG_VECTORS_ADDR */ #ifdef CONFIG_SMP mem_reserve(__pa(&_SecondaryResetVector_text_start), diff --git a/arch/xtensa/kernel/vmlinux.lds.S b/arch/xtensa/kernel/vmlinux.lds.S index d9e547810b6c..d23a6e38f062 100644 --- a/arch/xtensa/kernel/vmlinux.lds.S +++ b/arch/xtensa/kernel/vmlinux.lds.S @@ -47,9 +47,15 @@ jiffies = jiffies_64; LONG(sym ## _end); \ LONG(LOADADDR(section)) +#if !defined(CONFIG_VECTORS_ADDR) && XCHAL_HAVE_VECBASE +#define MERGED_VECTORS 1 +#else +#define MERGED_VECTORS 0 +#endif + /* - * Macro to define a section for a vector. When CONFIG_VECTORS_OFFSET is - * defined code for every vector is located with other init data. At startup + * Macro to define a section for a vector. When MERGED_VECTORS is 0 + * code for every vector is located with other init data. At startup * time head.S copies code for every vector to its final position according * to description recorded in the corresponding RELOCATE_ENTRY. */ @@ -84,7 +90,7 @@ SECTIONS /* The HEAD_TEXT section must be the first section! */ HEAD_TEXT -#ifndef CONFIG_VECTORS_OFFSET +#if MERGED_VECTORS . = ALIGN(PAGE_SIZE); _vecbase = .; @@ -159,7 +165,7 @@ SECTIONS . = ALIGN(16); __boot_reloc_table_start = ABSOLUTE(.); -#ifdef CONFIG_VECTORS_OFFSET +#if !MERGED_VECTORS RELOCATE_ENTRY(_WindowVectors_text, .WindowVectors.text); #if XCHAL_EXCM_LEVEL >= 2 @@ -220,7 +226,7 @@ SECTIONS #undef LAST #define LAST .dummy -#ifdef CONFIG_VECTORS_OFFSET +#if !MERGED_VECTORS /* The vectors are relocated to the real position at startup time */ SECTION_VECTOR4 (_WindowVectors_text, @@ -299,7 +305,7 @@ SECTIONS #define LAST .SecondaryResetVector.text #endif -#ifdef CONFIG_VECTORS_OFFSET +#if !MERGED_VECTORS SECTION_VECTOR4 (_exception_text, .exception.text, , @@ -310,6 +316,7 @@ SECTIONS #endif . = (LOADADDR(LAST) + SIZEOF(LAST) + 3) & ~ 3; + .dummy1 : AT(ADDR(.dummy1)) { LONG(0) } . = ALIGN(PAGE_SIZE); #ifndef CONFIG_XIP_KERNEL @@ -327,7 +334,7 @@ SECTIONS #undef LOAD_OFFSET #define LOAD_OFFSET \ - (CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy) + SIZEOF(.dummy) + 3) & ~ 3) + (CONFIG_XIP_DATA_ADDR - (LOADADDR(.dummy1) + SIZEOF(.dummy1) + 3) & ~ 3) _xip_data_start = .; _sdata = .; -- cgit v1.2.3