From b50f1704e9c441c58cf6dc05e72953ca30e1d4d2 Mon Sep 17 00:00:00 2001 From: GuanXuetao Date: Sat, 15 Jan 2011 18:16:59 +0800 Subject: unicore32 core architecture: mm related: generic codes This patch includes generic codes for memory management. Signed-off-by: Guan Xuetao Reviewed-by: Arnd Bergmann --- arch/unicore32/include/asm/cache.h | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) create mode 100644 arch/unicore32/include/asm/cache.h (limited to 'arch/unicore32/include/asm/cache.h') diff --git a/arch/unicore32/include/asm/cache.h b/arch/unicore32/include/asm/cache.h new file mode 100644 index 000000000000..ad8f795d86ca --- /dev/null +++ b/arch/unicore32/include/asm/cache.h @@ -0,0 +1,27 @@ +/* + * linux/arch/unicore32/include/asm/cache.h + * + * Code specific to PKUnity SoC and UniCore ISA + * + * Copyright (C) 2001-2010 GUAN Xue-tao + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ +#ifndef __UNICORE_CACHE_H__ +#define __UNICORE_CACHE_H__ + +#define L1_CACHE_SHIFT (5) +#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT) + +/* + * Memory returned by kmalloc() may be used for DMA, so we must make + * sure that all such allocations are cache aligned. Otherwise, + * unrelated code may cause parts of the buffer to be read into the + * cache before the transfer is done, causing old data to be seen by + * the CPU. + */ +#define ARCH_DMA_MINALIGN L1_CACHE_BYTES + +#endif -- cgit v1.2.3