From 6db92cc9d07db9f713da8554b4bcdfc8e54ad386 Mon Sep 17 00:00:00 2001 From: Harninder Rai Date: Wed, 13 Oct 2010 17:30:56 +0530 Subject: powerpc/85xx: add cache-sram support It adds cache-sram support in P1/P2 QorIQ platforms as under: * A small abstraction over powerpc's remote heap allocator * Exports mpc85xx_cache_sram_alloc()/free() APIs * Supports only one contiguous SRAM window * Drivers can do the following in Kconfig to use these APIs "select FSL_85XX_CACHE_SRAM if MPC85xx" * Required SRAM size and the offset where SRAM should be mapped must be provided at kernel command line as : cache-sram-size= cache-sram-offset= Signed-off-by: Harninder Rai Signed-off-by: Vivek Mahajan Signed-off-by: Kumar Gala --- arch/powerpc/sysdev/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/powerpc/sysdev/Makefile') diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index c20ad6de33ee..0bef9dacb64e 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile @@ -18,6 +18,7 @@ obj-$(CONFIG_FSL_PMC) += fsl_pmc.o obj-$(CONFIG_FSL_LBC) += fsl_lbc.o obj-$(CONFIG_FSL_GTM) += fsl_gtm.o obj-$(CONFIG_MPC8xxx_GPIO) += mpc8xxx_gpio.o +obj-$(CONFIG_FSL_85XX_CACHE_SRAM) += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o obj-$(CONFIG_SIMPLE_GPIO) += simple_gpio.o obj-$(CONFIG_RAPIDIO) += fsl_rio.o obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o -- cgit v1.2.3