From 840b66c2550df04fbd66d8be782efa23649a0163 Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Fri, 3 Dec 2021 22:42:05 +0900 Subject: openrisc: Cleanup switch code and comments The saving of the r12 register was there for a compiler bug referring to a port that was never upstreamed. It should be safe to use this as the new compiler is what we use and the old deprecated. Also, clean up some typos and references to old names in the switch comments. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/entry.S | 16 ++++++---------- 1 file changed, 6 insertions(+), 10 deletions(-) (limited to 'arch/openrisc') diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S index 59c6d3aa7081..c608f76e5753 100644 --- a/arch/openrisc/kernel/entry.S +++ b/arch/openrisc/kernel/entry.S @@ -1001,11 +1001,10 @@ ENTRY(ret_from_fork) l.lwz r11,PT_GPR11(r1) /* The syscall fast path return expects call-saved registers - * r12-r28 to be untouched, so we restore them here as they + * r14-r28 to be untouched, so we restore them here as they * will have been effectively clobbered when arriving here * via the call to switch() */ - l.lwz r12,PT_GPR12(r1) l.lwz r14,PT_GPR14(r1) l.lwz r16,PT_GPR16(r1) l.lwz r18,PT_GPR18(r1) @@ -1037,10 +1036,10 @@ ENTRY(ret_from_fork) /* _switch MUST never lay on page boundry, cause it runs from * effective addresses and beeing interrupted by iTLB miss would kill it. - * dTLB miss seams to never accour in the bad place since data accesses + * dTLB miss seems to never accour in the bad place since data accesses * are from task structures which are always page aligned. * - * The problem happens in RESTORE_ALL_NO_R11 where we first set the EPCR + * The problem happens in RESTORE_ALL where we first set the EPCR * register, then load the previous register values and only at the end call * the l.rfe instruction. If get TLB miss in beetwen the EPCR register gets * garbled and we end up calling l.rfe with the wrong EPCR. (same probably @@ -1068,9 +1067,8 @@ ENTRY(_switch) /* No need to store r1/PT_SP as it goes into KSP below */ l.sw PT_GPR2(r1),r2 l.sw PT_GPR9(r1),r9 - /* This is wrong, r12 shouldn't be here... but GCC is broken for the time being - * and expects r12 to be callee-saved... */ - l.sw PT_GPR12(r1),r12 + + /* Save callee-saved registers to the new pt_regs */ l.sw PT_GPR14(r1),r14 l.sw PT_GPR16(r1),r16 l.sw PT_GPR18(r1),r18 @@ -1111,9 +1109,7 @@ ENTRY(_switch) /* No need to restore r10 */ /* ...and do not restore r11 */ - /* This is wrong, r12 shouldn't be here... but GCC is broken for the time being - * and expects r12 to be callee-saved... */ - l.lwz r12,PT_GPR12(r1) + /* Restore callee-saved registers */ l.lwz r14,PT_GPR14(r1) l.lwz r16,PT_GPR16(r1) l.lwz r18,PT_GPR18(r1) -- cgit v1.2.3 From 07baf50ac754384b9ea996f82b9a2a8aba946aa4 Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Fri, 3 Dec 2021 22:56:50 +0900 Subject: openrisc: Use delay slot for clone and fork wrappers This saves one instruction. Signed-off-by: Stafford Horne --- arch/openrisc/kernel/entry.S | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) (limited to 'arch/openrisc') diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S index c608f76e5753..8cd2113057c5 100644 --- a/arch/openrisc/kernel/entry.S +++ b/arch/openrisc/kernel/entry.S @@ -1162,15 +1162,13 @@ _fork_save_extra_regs_and_call: ENTRY(__sys_clone) l.movhi r29,hi(sys_clone) - l.ori r29,r29,lo(sys_clone) l.j _fork_save_extra_regs_and_call - l.nop + l.ori r29,r29,lo(sys_clone) ENTRY(__sys_fork) l.movhi r29,hi(sys_fork) - l.ori r29,r29,lo(sys_fork) l.j _fork_save_extra_regs_and_call - l.nop + l.ori r29,r29,lo(sys_fork) ENTRY(sys_rt_sigreturn) l.jal _sys_rt_sigreturn -- cgit v1.2.3 From 433fe39f674d58bc7a3e8254a5d2ffc290b7e04e Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Sat, 4 Dec 2021 07:10:18 +0900 Subject: openrisc: Add clone3 ABI wrapper Like fork and clone the clone3 syscall needs a wrapper to save callee saved registers, which is required by the OpenRISC ABI. This came up after auditing code following a discussion with Rob Landley and Arnd Bergmann [0]. Tested with the clone3 kselftests and there were no issues. [0] https://lore.kernel.org/all/41206fc7-f8ce-98aa-3718-ba3e1431e320@landley.net/T/#m9c0cdb2703813b9df4da04cf6b30de1f1aa89944 Fixes: 07e83dfbe16c ("openrisc: Enable the clone3 syscall") Cc: Rob Landley Cc: Arnd Bergmann Signed-off-by: Stafford Horne --- arch/openrisc/include/asm/syscalls.h | 2 ++ arch/openrisc/kernel/entry.S | 5 +++++ 2 files changed, 7 insertions(+) (limited to 'arch/openrisc') diff --git a/arch/openrisc/include/asm/syscalls.h b/arch/openrisc/include/asm/syscalls.h index 3a7eeae6f56a..aa1c7e98722e 100644 --- a/arch/openrisc/include/asm/syscalls.h +++ b/arch/openrisc/include/asm/syscalls.h @@ -22,9 +22,11 @@ asmlinkage long sys_or1k_atomic(unsigned long type, unsigned long *v1, asmlinkage long __sys_clone(unsigned long clone_flags, unsigned long newsp, void __user *parent_tid, void __user *child_tid, int tls); +asmlinkage long __sys_clone3(struct clone_args __user *uargs, size_t size); asmlinkage long __sys_fork(void); #define sys_clone __sys_clone +#define sys_clone3 __sys_clone3 #define sys_fork __sys_fork #endif /* __ASM_OPENRISC_SYSCALLS_H */ diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S index 8cd2113057c5..3ca1b1f490b9 100644 --- a/arch/openrisc/kernel/entry.S +++ b/arch/openrisc/kernel/entry.S @@ -1165,6 +1165,11 @@ ENTRY(__sys_clone) l.j _fork_save_extra_regs_and_call l.ori r29,r29,lo(sys_clone) +ENTRY(__sys_clone3) + l.movhi r29,hi(sys_clone3) + l.j _fork_save_extra_regs_and_call + l.ori r29,r29,lo(sys_clone3) + ENTRY(__sys_fork) l.movhi r29,hi(sys_fork) l.j _fork_save_extra_regs_and_call -- cgit v1.2.3 From 7f435e42fd6b65fd8759963156e1ef0fb7d213f8 Mon Sep 17 00:00:00 2001 From: Stafford Horne Date: Tue, 11 Jan 2022 11:55:37 +0900 Subject: openrisc: init: Add support for common clk When testing the new litex_mmc driver it was found to not work on OpenRISC due to missing support for common clk. This patch does the basic initialization to allow OpenRISC to use the common clk framework. Signed-off-by: Stafford Horne Reviewed-by: Geert Uytterhoeven --- arch/openrisc/Kconfig | 1 + arch/openrisc/kernel/time.c | 4 ++++ 2 files changed, 5 insertions(+) (limited to 'arch/openrisc') diff --git a/arch/openrisc/Kconfig b/arch/openrisc/Kconfig index c2491b295d60..f724b3f1aeed 100644 --- a/arch/openrisc/Kconfig +++ b/arch/openrisc/Kconfig @@ -10,6 +10,7 @@ config OPENRISC select ARCH_HAS_DMA_SET_UNCACHED select ARCH_HAS_DMA_CLEAR_UNCACHED select ARCH_HAS_SYNC_DMA_FOR_DEVICE + select COMMON_CLK select OF select OF_EARLY_FLATTREE select IRQ_DOMAIN diff --git a/arch/openrisc/kernel/time.c b/arch/openrisc/kernel/time.c index a6e69386f82a..6d18989d63d0 100644 --- a/arch/openrisc/kernel/time.c +++ b/arch/openrisc/kernel/time.c @@ -20,6 +20,7 @@ #include #include #include +#include #include @@ -169,4 +170,7 @@ void __init time_init(void) openrisc_timer_init(); openrisc_clockevent_init(); + + of_clk_init(NULL); + timer_probe(); } -- cgit v1.2.3