From 00ffed582fe8a3f7556593c0e8baaf3da3df85b0 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Sat, 4 Aug 2012 15:03:56 +0000 Subject: MIPS: ath79: add USB platform setup code for AR934X Signed-off-by: Gabor Juhos Patchwork: http://patchwork.linux-mips.org/patch/4172/ Signed-off-by: John Crispin --- arch/mips/ath79/dev-usb.c | 28 ++++++++++++++++++++++++++ arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 7 +++++++ 2 files changed, 35 insertions(+) (limited to 'arch/mips') diff --git a/arch/mips/ath79/dev-usb.c b/arch/mips/ath79/dev-usb.c index 87fe48e8e301..072bb9be2304 100644 --- a/arch/mips/ath79/dev-usb.c +++ b/arch/mips/ath79/dev-usb.c @@ -193,6 +193,32 @@ static void __init ar933x_usb_setup(void) platform_device_register(&ath79_ehci_device); } +static void __init ar934x_usb_setup(void) +{ + u32 bootstrap; + + bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP); + if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE) + return; + + ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE); + udelay(1000); + + ath79_device_reset_clear(AR934X_RESET_USB_PHY); + udelay(1000); + + ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG); + udelay(1000); + + ath79_device_reset_clear(AR934X_RESET_USB_HOST); + udelay(1000); + + ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE, + AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB); + ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2; + platform_device_register(&ath79_ehci_device); +} + void __init ath79_register_usb(void) { if (soc_is_ar71xx()) @@ -205,6 +231,8 @@ void __init ath79_register_usb(void) ar913x_usb_setup(); else if (soc_is_ar933x()) ar933x_usb_setup(); + else if (soc_is_ar934x()) + ar934x_usb_setup(); else BUG(); } diff --git a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h index dde504477fac..3ccae12cc7b3 100644 --- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h +++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h @@ -63,6 +63,8 @@ #define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000) #define AR934X_WMAC_SIZE 0x20000 +#define AR934X_EHCI_BASE 0x1b000000 +#define AR934X_EHCI_SIZE 0x200 /* * DDR_CTRL block @@ -288,6 +290,11 @@ #define AR933X_RESET_USB_PHY BIT(4) #define AR933X_RESET_USBSUS_OVERRIDE BIT(3) +#define AR934X_RESET_USB_PHY_ANALOG BIT(11) +#define AR934X_RESET_USB_HOST BIT(5) +#define AR934X_RESET_USB_PHY BIT(4) +#define AR934X_RESET_USBSUS_OVERRIDE BIT(3) + #define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0) #define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23) -- cgit v1.2.3