From f36c4720fca325579faddc880d4e178e4ccbda88 Mon Sep 17 00:00:00 2001 From: Leonid Yegoshin Date: Tue, 4 Mar 2014 13:34:43 +0000 Subject: MIPS: Add support for the M5150 processor The M5150 core is a 32-bit MIPS RISC which implements the MIPS Architecture Release-5 in a 5-stage pipeline. In addition, it includes the MIPS Architecture Virtualization Module that enables virtualization of operating systems, which provides a scalable, trusted, and secure execution environment. Signed-off-by: Leonid Yegoshin Signed-off-by: Markos Chandras Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6596/ Signed-off-by: Ralf Baechle --- arch/mips/oprofile/op_model_mipsxx.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/mips/oprofile/op_model_mipsxx.c') diff --git a/arch/mips/oprofile/op_model_mipsxx.c b/arch/mips/oprofile/op_model_mipsxx.c index 9797493546e4..42821ae2d77e 100644 --- a/arch/mips/oprofile/op_model_mipsxx.c +++ b/arch/mips/oprofile/op_model_mipsxx.c @@ -389,6 +389,10 @@ static int __init mipsxx_init(void) op_model_mipsxx_ops.cpu_type = "mips/P5600"; break; + case CPU_M5150: + op_model_mipsxx_ops.cpu_type = "mips/M5150"; + break; + case CPU_5KC: op_model_mipsxx_ops.cpu_type = "mips/5K"; break; -- cgit v1.2.3