From 586016ebf76d62e58a0e9dfd971e465c8027889d Mon Sep 17 00:00:00 2001 From: David Daney Date: Tue, 15 May 2012 00:04:48 -0700 Subject: MIPS: Octeon: Use board_cache_error_setup for cache error handler setup. Signed-off-by: David Daney Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3820/ Signed-off-by: Ralf Baechle --- arch/mips/mm/c-octeon.c | 14 ++++++++------ 1 file changed, 8 insertions(+), 6 deletions(-) (limited to 'arch/mips/mm') diff --git a/arch/mips/mm/c-octeon.c b/arch/mips/mm/c-octeon.c index 47037ec5589b..44e69e7a4519 100644 --- a/arch/mips/mm/c-octeon.c +++ b/arch/mips/mm/c-octeon.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include @@ -248,6 +249,11 @@ static void __cpuinit probe_octeon(void) } } +static void __cpuinit octeon_cache_error_setup(void) +{ + extern char except_vec2_octeon; + set_handler(0x100, &except_vec2_octeon, 0x80); +} /** * Setup the Octeon cache flush routines @@ -255,12 +261,6 @@ static void __cpuinit probe_octeon(void) */ void __cpuinit octeon_cache_init(void) { - extern unsigned long ebase; - extern char except_vec2_octeon; - - memcpy((void *)(ebase + 0x100), &except_vec2_octeon, 0x80); - octeon_flush_cache_sigtramp(ebase + 0x100); - probe_octeon(); shm_align_mask = PAGE_SIZE - 1; @@ -280,6 +280,8 @@ void __cpuinit octeon_cache_init(void) build_clear_page(); build_copy_page(); + + board_cache_error_setup = octeon_cache_error_setup; } /** -- cgit v1.2.3