From 4ebea49ce233ce76421250f113a75d6d33c90e22 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Sat, 2 Feb 2019 01:43:24 +0000 Subject: MIPS: mm: Un-inline get_new_mmu_context In preparation for adding MMID support to get_new_mmu_context() which will increase the size of the function somewhat, move it from asm/mmu_context.h into a C file. Signed-off-by: Paul Burton Cc: linux-mips@vger.kernel.org --- arch/mips/mm/Makefile | 1 + arch/mips/mm/context.c | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+) create mode 100644 arch/mips/mm/context.c (limited to 'arch/mips/mm') diff --git a/arch/mips/mm/Makefile b/arch/mips/mm/Makefile index 25d492736848..f34d7ff5eb60 100644 --- a/arch/mips/mm/Makefile +++ b/arch/mips/mm/Makefile @@ -4,6 +4,7 @@ # obj-y += cache.o +obj-y += context.o obj-y += extable.o obj-y += fault.o obj-y += gup.o diff --git a/arch/mips/mm/context.c b/arch/mips/mm/context.c new file mode 100644 index 000000000000..b5af471006f0 --- /dev/null +++ b/arch/mips/mm/context.c @@ -0,0 +1,19 @@ +// SPDX-License-Identifier: GPL-2.0 +#include + +void get_new_mmu_context(struct mm_struct *mm) +{ + unsigned int cpu; + u64 asid; + + cpu = smp_processor_id(); + asid = asid_cache(cpu); + + if (!((asid += cpu_asid_inc()) & cpu_asid_mask(&cpu_data[cpu]))) { + if (cpu_has_vtag_icache) + flush_icache_all(); + local_flush_tlb_all(); /* start new asid cycle */ + } + + cpu_context(cpu, mm) = asid_cache(cpu) = asid; +} -- cgit v1.2.3