From 1f6c52ff7225789d20c1d69883f263d502b7eda7 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Mon, 14 Jul 2014 10:32:14 +0100 Subject: MIPS: detect presence of MAARs Detect the presence of MAAR using the MRP bit in Config5, and record that presence using a CPU option bit. A cpu_has_maar macro will then allow code to conditionalise upon the presence of MAARs. Signed-off-by: Paul Burton Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/7330/ Signed-off-by: Ralf Baechle --- arch/mips/include/asm/cpu.h | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/mips/include/asm/cpu.h') diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 7ba2a035ad86..dfdc77ed1839 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h @@ -367,6 +367,7 @@ enum cpu_type_enum { #define MIPS_CPU_EVA 0x80000000ull /* CPU supports Enhanced Virtual Addressing */ #define MIPS_CPU_HTW 0x100000000ull /* CPU support Hardware Page Table Walker */ #define MIPS_CPU_RIXIEX 0x200000000ull /* CPU has unique exception codes for {Read, Execute}-Inhibit exceptions */ +#define MIPS_CPU_MAAR 0x400000000ull /* MAAR(I) registers are present */ /* * CPU ASE encodings -- cgit v1.2.3