From 69e9ba6f31e6ff93eecdbf6fbeff8e5320fd2155 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Fri, 20 Dec 2013 05:44:27 -0300 Subject: [media] adv7842: support YCrCb analog input, receive CEA formats as RGB on VGA input Added support for YCrCb analog input. If input is ADV7842_MODE_RGB and RGB quantization range is set to V4L2_DV_RGB_RANGE_AUTO, then video with CEA timings will be received as RGB. For ADV7842_MODE_COMP, automatic CSC mode will be selected. See table 48 on page 281 in "ADV7842 Hardware Manual, Rev. 0, January 2011" for details. Make sure that when switching inputs the RGB quantization range is updated as well. Also updated the platform_data in ezkit to ensure that what was the old default value is now explicitly specified, so the behavior for that board is unchanged. Signed-off-by: Mats Randgaard Signed-off-by: Martin Bugge Signed-off-by: Hans Verkuil Cc: Scott Jiang Signed-off-by: Mauro Carvalho Chehab --- arch/blackfin/mach-bf609/boards/ezkit.c | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c index 82beedd953f6..28bdd8ba3a86 100644 --- a/arch/blackfin/mach-bf609/boards/ezkit.c +++ b/arch/blackfin/mach-bf609/boards/ezkit.c @@ -1025,7 +1025,6 @@ static struct adv7842_platform_data adv7842_data = { .ain_sel = ADV7842_AIN10_11_12_NC_SYNC_4_1, .prim_mode = ADV7842_PRIM_MODE_SDP, .vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1, - .inp_color_space = ADV7842_INP_COLOR_SPACE_AUTO, .i2c_sdp_io = 0x40, .i2c_sdp = 0x41, .i2c_cp = 0x42, -- cgit v1.2.3 From f0ec17420e85cc701032a7d7fd1067d3435bd133 Mon Sep 17 00:00:00 2001 From: Martin Bugge Date: Fri, 20 Dec 2013 06:02:24 -0300 Subject: [media] adv7842: obtain free-run mode from the platform_data The free-run mode can be board-specific. Also updated the platform_data in ezkit to ensure that what was the old default value is now explicitly specified, so the behavior for that board is unchanged. Signed-off-by: Martin Bugge Signed-off-by: Hans Verkuil Cc: Scott Jiang Signed-off-by: Mauro Carvalho Chehab --- arch/blackfin/mach-bf609/boards/ezkit.c | 2 ++ drivers/media/i2c/adv7842.c | 11 ++++++++--- include/media/adv7842.h | 14 ++++++++++++-- 3 files changed, 22 insertions(+), 5 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c index 28bdd8ba3a86..39a7969287ab 100644 --- a/arch/blackfin/mach-bf609/boards/ezkit.c +++ b/arch/blackfin/mach-bf609/boards/ezkit.c @@ -1025,6 +1025,8 @@ static struct adv7842_platform_data adv7842_data = { .ain_sel = ADV7842_AIN10_11_12_NC_SYNC_4_1, .prim_mode = ADV7842_PRIM_MODE_SDP, .vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1, + .hdmi_free_run_enable = 1, + .sdp_free_run_auto = 1, .i2c_sdp_io = 0x40, .i2c_sdp = 0x41, .i2c_cp = 0x42, diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c index ecbe3f29c1ab..518f1e29b9b0 100644 --- a/drivers/media/i2c/adv7842.c +++ b/drivers/media/i2c/adv7842.c @@ -1624,8 +1624,6 @@ static void select_input(struct v4l2_subdev *sd, /* deinterlacer enabled and 3D comb */ sdp_write_and_or(sd, 0x12, 0xf6, 0x09); - sdp_write(sd, 0xdd, 0x08); /* free run auto */ - break; case ADV7842_MODE_COMP: @@ -2538,7 +2536,14 @@ static int adv7842_core_init(struct v4l2_subdev *sd) pdata->drive_strength.sync); /* HDMI free run */ - cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); + cp_write_and_or(sd, 0xba, 0xfc, pdata->hdmi_free_run_enable | + (pdata->hdmi_free_run_mode << 1)); + + /* SPD free run */ + sdp_write_and_or(sd, 0xdd, 0xf0, pdata->sdp_free_run_force | + (pdata->sdp_free_run_cbar_en << 1) | + (pdata->sdp_free_run_man_col_en << 2) | + (pdata->sdp_free_run_force << 3)); /* TODO from platform data */ cp_write(sd, 0x69, 0x14); /* Enable CP CSC */ diff --git a/include/media/adv7842.h b/include/media/adv7842.h index a4851bff8fae..772cdecfa71b 100644 --- a/include/media/adv7842.h +++ b/include/media/adv7842.h @@ -192,8 +192,18 @@ struct adv7842_platform_data { unsigned sd_ram_size; /* ram size in MB */ unsigned sd_ram_ddr:1; /* ddr or sdr sdram */ - /* Free run */ - unsigned hdmi_free_run_mode; + /* HDMI free run, CP-reg 0xBA */ + unsigned hdmi_free_run_enable:1; + /* 0 = Mode 0: run when there is no TMDS clock + 1 = Mode 1: run when there is no TMDS clock or the + video resolution does not match programmed one. */ + unsigned hdmi_free_run_mode:1; + + /* SDP free run, CP-reg 0xDD */ + unsigned sdp_free_run_auto:1; + unsigned sdp_free_run_man_col_en:1; + unsigned sdp_free_run_cbar_en:1; + unsigned sdp_free_run_force:1; struct adv7842_sdp_csc_coeff sdp_csc_coeff; -- cgit v1.2.3 From fe808f3c9342cbd77fb0102c462e8555e458b286 Mon Sep 17 00:00:00 2001 From: Hans Verkuil Date: Fri, 20 Dec 2013 06:03:58 -0300 Subject: [media] adv7842: set LLC DLL phase from platform_data The correct LLC DLL phase depends on the board layout, so this should be part of the platform_data. Also updated the platform_data in ezkit to ensure that what was the old default value is now explicitly specified, so the behavior for that board is unchanged. Tested-by: Martin Bugge Signed-off-by: Hans Verkuil Cc: Scott Jiang Signed-off-by: Mauro Carvalho Chehab --- arch/blackfin/mach-bf609/boards/ezkit.c | 1 + drivers/media/i2c/adv7842.c | 6 +----- include/media/adv7842.h | 6 ++++++ 3 files changed, 8 insertions(+), 5 deletions(-) (limited to 'arch/blackfin') diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c index 39a7969287ab..66e9edba1ba9 100644 --- a/arch/blackfin/mach-bf609/boards/ezkit.c +++ b/arch/blackfin/mach-bf609/boards/ezkit.c @@ -1027,6 +1027,7 @@ static struct adv7842_platform_data adv7842_data = { .vid_std_select = ADV7842_SDP_VID_STD_CVBS_SD_4x1, .hdmi_free_run_enable = 1, .sdp_free_run_auto = 1, + .llc_dll_phase = 0x10, .i2c_sdp_io = 0x40, .i2c_sdp = 0x41, .i2c_cp = 0x42, diff --git a/drivers/media/i2c/adv7842.c b/drivers/media/i2c/adv7842.c index c69711756c8e..78986869b46b 100644 --- a/drivers/media/i2c/adv7842.c +++ b/drivers/media/i2c/adv7842.c @@ -1593,9 +1593,6 @@ static void select_input(struct v4l2_subdev *sd, afe_write(sd, 0x00, 0x00); /* power up ADC */ afe_write(sd, 0xc8, 0x00); /* phase control */ - io_write(sd, 0x19, 0x83); /* LLC DLL phase */ - io_write(sd, 0x33, 0x40); /* LLC DLL enable */ - io_write(sd, 0xdd, 0x90); /* Manual 2x output clock */ /* script says register 0xde, which don't exist in manual */ @@ -2609,8 +2606,7 @@ static int adv7842_core_init(struct v4l2_subdev *sd) io_write_and_or(sd, 0x20, 0xcf, 0x00); /* LLC */ - /* Set phase to 16. TODO: get this from platform_data */ - io_write(sd, 0x19, 0x90); + io_write(sd, 0x19, 0x80 | pdata->llc_dll_phase); io_write(sd, 0x33, 0x40); /* interrupts */ diff --git a/include/media/adv7842.h b/include/media/adv7842.h index 5a7eb50a1a57..d72a8a7a5b36 100644 --- a/include/media/adv7842.h +++ b/include/media/adv7842.h @@ -192,6 +192,12 @@ struct adv7842_platform_data { unsigned sync:2; } drive_strength; + /* + * IO register 0x19: Adjustment to the LLC DLL phase in + * increments of 1/32 of a clock period. + */ + unsigned llc_dll_phase:5; + /* External RAM for 3-D comb or frame synchronizer */ unsigned sd_ram_size; /* ram size in MB */ unsigned sd_ram_ddr:1; /* ddr or sdr sdram */ -- cgit v1.2.3