From 0e0f4d47288a8e56ed2586699b89573afcb1bf72 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 17 Aug 2017 13:29:14 +0200 Subject: arm64: dts: renesas: r8a7795-es1: Drop extra zero from usb unit address With W=1: arch/arm64/boot/dts/renesas/r8a7795-es1-salvator-x.dtb: Warning (simple_bus_reg): Node /soc/usb@ee0400000 simple-bus unit address format error, expected "ee040000" arch/arm64/boot/dts/renesas/r8a7795-es1-h3ulcb.dtb: Warning (simple_bus_reg): Node /soc/usb@ee0400000 simple-bus unit address format error, expected "ee040000" Fixes: 291e0c4994d0813f ("arm64: dts: r8a7795: Add support for R-Car H3 ES2.0") Fixes: 171f2ef82284f61b ("arm64: dts: r8a7795: Add USB3.0 host device nodes") Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi index aaa5e67a963e..655dd30639c5 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795-es1.dtsi @@ -11,7 +11,7 @@ #include "r8a7795.dtsi" &soc { - xhci1: usb@ee0400000 { + xhci1: usb@ee040000 { compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci"; reg = <0 0xee040000 0 0xc00>; interrupts = ; -- cgit v1.2.3 From 8ef7512a68f4cd559af5d5f0be3ee2e89f0769ec Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 13 Jul 2017 14:21:10 +0300 Subject: arm64: dts: renesas: r8a7796: Add FDP1 instance The r8a7796 has a single FDP1 instance. Signed-off-by: Laurent Pinchart Reviewed-by: Kieran Bingham Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 369092e17e34..16da83458f18 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -1659,6 +1659,16 @@ /* placeholder */ }; + fdp1@fe940000 { + compatible = "renesas,fdp1"; + reg = <0 0xfe940000 0 0x2400>; + interrupts = ; + clocks = <&cpg CPG_MOD 119>; + power-domains = <&sysc R8A7796_PD_A3VC>; + resets = <&cpg 119>; + renesas,fcp = <&fcpf0>; + }; + fcpf0: fcp@fe950000 { compatible = "renesas,fcpf"; reg = <0 0xfe950000 0 0x200>; -- cgit v1.2.3 From 5a979972b6cb799944423f00c4e269d826c6d2c7 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Tue, 29 Aug 2017 16:35:59 +0900 Subject: arm64: dts: renesas: r8a77995: update PFC node name to pin-controller This patch changes the name from from e6060000.pfc and pfc@e6060000 to e6060000.pin-controller and pin-controller@e6060000 like other Renesas SoCs. Reported-by: Geert Uytterhoeven Signed-off-by: Yoshihiro Shimoda Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index d0f95b78c022..72c303362b16 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -122,7 +122,7 @@ reg = <0 0xe6160000 0 0x0200>; }; - pfc: pfc@e6060000 { + pfc: pin-controller@e6060000 { compatible = "renesas,pfc-r8a77995"; reg = <0 0xe6060000 0 0x508>; }; -- cgit v1.2.3 From 7da2ed12da2c81b782ee4c3b4b0b87098048aae8 Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Tue, 22 Aug 2017 17:23:26 +0300 Subject: arm64: dts: renesas: ulcb: Enable display output The DU is already wired up to the HDMI encoder, all we need to do is enable it. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/ulcb.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/ulcb.dtsi b/arch/arm64/boot/dts/renesas/ulcb.dtsi index 1b868df2393f..dfec9072718b 100644 --- a/arch/arm64/boot/dts/renesas/ulcb.dtsi +++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi @@ -157,6 +157,10 @@ }; }; +&du { + status = "okay"; +}; + &ehci1 { status = "okay"; }; -- cgit v1.2.3 From 6b5ac2f1cb1162679662f3be891978d32b345b6f Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 30 Aug 2017 12:03:17 +0200 Subject: arm64: dts: renesas: r8a7795: Drop bogus HDMI node names suffixes Node names should not use numerical suffixes if the nodes can be distinguished by unit-address. Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 2938195b9571..5d5174d8635d 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -2014,7 +2014,7 @@ renesas,fcp = <&fcpf1>; }; - hdmi0: hdmi0@fead0000 { + hdmi0: hdmi@fead0000 { compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; reg = <0 0xfead0000 0 0x10000>; interrupts = ; @@ -2039,7 +2039,7 @@ }; }; - hdmi1: hdmi1@feae0000 { + hdmi1: hdmi@feae0000 { compatible = "renesas,r8a7795-hdmi", "renesas,rcar-gen3-hdmi"; reg = <0 0xfeae0000 0 0x10000>; interrupts = ; -- cgit v1.2.3 From a6d21c0940490a343c6894bd78601be9e0e36f45 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 25 Aug 2017 14:56:50 +0200 Subject: arm64: renesas: Add Renesas R8A77970 Kconfig support Add a configuration option for the R-Car V3M SoC. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/Kconfig.platforms | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 6b54ee8c1262..a07f9b5a4f82 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -184,6 +184,12 @@ config ARCH_R8A7796 help This enables support for the Renesas R-Car M3-W SoC. +config ARCH_R8A77970 + bool "Renesas R-Car V3M SoC Platform" + depends on ARCH_RENESAS + help + This enables support for the Renesas R-Car V3M SoC. + config ARCH_R8A77995 bool "Renesas R-Car D3 SoC Platform" depends on ARCH_RENESAS -- cgit v1.2.3 From 9066b042b4502f711c5207662ec0d26be1732aff Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jul 2017 14:54:36 +0200 Subject: arm64: dts: renesas: r8a77995: Use r8a7795-sysc binding definitions Replace the hardcoded power domain indices by R8A77995_PD_* symbols. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 72c303362b16..a5b769b840e9 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -11,6 +11,7 @@ #include #include +#include / { compatible = "renesas,r8a77995"; @@ -30,14 +31,14 @@ compatible = "arm,cortex-a53", "arm,armv8"; reg = <0x0>; device_type = "cpu"; - power-domains = <&sysc 5>; + power-domains = <&sysc R8A77995_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; }; L2_CA53: cache-controller-1 { compatible = "cache"; - power-domains = <&sysc 21>; + power-domains = <&sysc R8A77995_PD_CA53_SCU>; cache-unified; cache-level = <2>; }; @@ -76,7 +77,7 @@ (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>; clocks = <&cpg CPG_MOD 408>; clock-names = "clk"; - power-domains = <&sysc 32>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 408>; }; @@ -97,7 +98,7 @@ "renesas,rcar-gen3-wdt"; reg = <0 0xe6020000 0 0x0c>; clocks = <&cpg CPG_MOD 402>; - power-domains = <&sysc 32>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 402>; status = "disabled"; }; @@ -147,7 +148,7 @@ <&cpg CPG_CORE 16>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; - power-domains = <&sysc 32>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; resets = <&cpg 310>; status = "disabled"; }; -- cgit v1.2.3 From 5889ded170cd5b6f5a9449956288d069074b20c4 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 20 Jul 2017 14:54:37 +0200 Subject: arm64: dts: renesas: r8a77995: Use r8a7795-cpg-mssr binding definitions Replace the hardcoded clock indices by R8A77995_CLK_* symbols. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index a5b769b840e9..84b6bd58eafb 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -9,7 +9,7 @@ * kind, whether express or implied. */ -#include +#include #include #include @@ -145,7 +145,7 @@ reg = <0 0xe6e88000 0 64>; interrupts = ; clocks = <&cpg CPG_MOD 310>, - <&cpg CPG_CORE 16>, + <&cpg CPG_CORE R8A77995_CLK_S3D1C>, <&scif_clk>; clock-names = "fck", "brg_int", "scif_clk"; power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; -- cgit v1.2.3 From 11581f5d52a81fe32fb1bb1c71fb22fb9192ee01 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 13 Sep 2017 19:33:59 +0900 Subject: arm64: dts: renesas: r8a77995: add GPIO device nodes This patch adds GPIO device nodes for r8a77995. Reviewed-by: Geert Uytterhoeven Signed-off-by: Yoshihiro Shimoda Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 112 ++++++++++++++++++++++++++++++ 1 file changed, 112 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 84b6bd58eafb..d7756256d2a6 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -139,6 +139,118 @@ #power-domain-cells = <1>; }; + gpio0: gpio@e6050000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6050000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 0 9>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 912>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 912>; + }; + + gpio1: gpio@e6051000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6051000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 32 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 911>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 911>; + }; + + gpio2: gpio@e6052000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6052000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 64 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 910>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 910>; + }; + + gpio3: gpio@e6053000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6053000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 96 10>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 909>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 909>; + }; + + gpio4: gpio@e6054000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6054000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 128 32>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 908>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 908>; + }; + + gpio5: gpio@e6055000 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6055000 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 160 21>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 907>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 907>; + }; + + gpio6: gpio@e6055400 { + compatible = "renesas,gpio-r8a77995", + "renesas,rcar-gen3-gpio", + "renesas,gpio-rcar"; + reg = <0 0xe6055400 0 0x50>; + interrupts = ; + #gpio-cells = <2>; + gpio-controller; + gpio-ranges = <&pfc 0 192 14>; + #interrupt-cells = <2>; + interrupt-controller; + clocks = <&cpg CPG_MOD 906>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 906>; + }; + scif2: serial@e6e88000 { compatible = "renesas,scif-r8a77995", "renesas,rcar-gen3-scif", "renesas,scif"; -- cgit v1.2.3 From f9ba0c4cfe6169b7cc9a2f9653c76b05316f0508 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 13 Sep 2017 21:18:38 +0900 Subject: arm64: dts: renesas: r8a77995: Add EthernetAVB device node This patch adds EthernetAVB device node for r8a77995. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 45 +++++++++++++++++++++++++++++++ 1 file changed, 45 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index d7756256d2a6..72d04d7337be 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -251,6 +251,51 @@ resets = <&cpg 906>; }; + avb: ethernet@e6800000 { + compatible = "renesas,etheravb-r8a77995", + "renesas,etheravb-rcar-gen3"; + reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15", + "ch16", "ch17", "ch18", "ch19", + "ch20", "ch21", "ch22", "ch23", + "ch24"; + clocks = <&cpg CPG_MOD 812>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 812>; + phy-mode = "rgmii-txid"; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + scif2: serial@e6e88000 { compatible = "renesas,scif-r8a77995", "renesas,rcar-gen3-scif", "renesas,scif"; -- cgit v1.2.3 From 41f4345a6111056341346742942df3f5d5be535d Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 15 Sep 2017 22:43:20 +0300 Subject: arm64: dts: renesas: initial R8A77970 SoC device tree The initial R8A77970 SoC device tree including Cortex-A53 CPU, GIC, timer, CPG, RST, and SYSC. Based on the original (and large) patch by Daisuke Matsushita . Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 125 ++++++++++++++++++++++++++++++ 1 file changed, 125 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a77970.dtsi (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi new file mode 100644 index 000000000000..dec3492cd7dc --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -0,0 +1,125 @@ +/* + * Device Tree Source for the r8a77970 SoC + * + * Copyright (C) 2016-2017 Renesas Electronics Corp. + * Copyright (C) 2017 Cogent Embedded, Inc. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include +#include +#include + +/ { + compatible = "renesas,r8a77970"; + #address-cells = <2>; + #size-cells = <2>; + + psci { + compatible = "arm,psci-1.0", "arm,psci-0.2"; + method = "smc"; + }; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + a53_0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0>; + clocks = <&cpg CPG_CORE 0>; + power-domains = <&sysc 5>; + next-level-cache = <&L2_CA53>; + enable-method = "psci"; + }; + + L2_CA53: cache-controller { + compatible = "cache"; + power-domains = <&sysc 21>; + cache-unified; + cache-level = <2>; + }; + }; + + extal_clk: extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + extalr_clk: extalr { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&gic>; + + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@f1010000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0 0xf1010000 0 0x1000>, + <0 0xf1020000 0 0x20000>, + <0 0xf1040000 0 0x20000>, + <0 0xf1060000 0 0x20000>; + interrupts = ; + clocks = <&cpg CPG_MOD 408>; + clock-names = "clk"; + power-domains = <&sysc 32>; + resets = <&cpg 408>; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + cpg: clock-controller@e6150000 { + compatible = "renesas,r8a77970-cpg-mssr"; + reg = <0 0xe6150000 0 0x1000>; + clocks = <&extal_clk>, <&extalr_clk>; + clock-names = "extal", "extalr"; + #clock-cells = <2>; + #power-domain-cells = <0>; + #reset-cells = <1>; + }; + + rst: reset-controller@e6160000 { + compatible = "renesas,r8a77970-rst"; + reg = <0 0xe6160000 0 0x200>; + }; + + sysc: system-controller@e6180000 { + compatible = "renesas,r8a77970-sysc"; + reg = <0 0xe6180000 0 0x440>; + #power-domain-cells = <1>; + }; + + prr: chipid@fff00044 { + compatible = "renesas,prr"; + reg = <0 0xfff00044 0 4>; + }; + }; +}; -- cgit v1.2.3 From bd746e70d3fce2cb1719fd2c085cd57a872575fe Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 15 Sep 2017 22:43:21 +0300 Subject: arm64: dts: renesas: r8a77970: add SYS-DMAC support Describe SYS-DMAC1/2 in the R8A77970 device tree. Based on the original (and large) patch by Daisuke Matsushita . Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 48 +++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index dec3492cd7dc..a2a438a91b3f 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -121,5 +121,53 @@ compatible = "renesas,prr"; reg = <0 0xfff00044 0 4>; }; + + dmac1: dma-controller@e7300000 { + compatible = "renesas,dmac-r8a77970", + "renesas,rcar-dmac"; + reg = <0 0xe7300000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7"; + clocks = <&cpg CPG_MOD 218>; + clock-names = "fck"; + power-domains = <&sysc 32>; + resets = <&cpg 218>; + #dma-cells = <1>; + dma-channels = <8>; + }; + + dmac2: dma-controller@e7310000 { + compatible = "renesas,dmac-r8a77970", + "renesas,rcar-dmac"; + reg = <0 0xe7310000 0 0x10000>; + interrupts = ; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7"; + clocks = <&cpg CPG_MOD 217>; + clock-names = "fck"; + power-domains = <&sysc 32>; + resets = <&cpg 217>; + #dma-cells = <1>; + dma-channels = <8>; + }; }; }; -- cgit v1.2.3 From 38dbb6fc972e53110f0bc308057822d73c063903 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 15 Sep 2017 22:43:22 +0300 Subject: arm64: dts: renesas: r8a77970: add [H]SCIF support Describe [H]SCIF ports in the R8A77970 device tree. Based on the original (and large) patch by Daisuke Matsushita . Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 149 ++++++++++++++++++++++++++++++ 1 file changed, 149 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index a2a438a91b3f..04ec0e459686 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -59,6 +59,13 @@ clock-frequency = <0>; }; + /* External SCIF clock - to be overridden by boards that provide it */ + scif_clk: scif { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + soc { compatible = "simple-bus"; interrupt-parent = <&gic>; @@ -169,5 +176,147 @@ #dma-cells = <1>; dma-channels = <8>; }; + + hscif0: serial@e6540000 { + compatible = "renesas,hscif-r8a77970", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe6540000 0 96>; + interrupts = ; + clocks = <&cpg CPG_MOD 520>, + <&cpg CPG_CORE 9>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x31>, <&dmac1 0x30>, + <&dmac2 0x31>, <&dmac2 0x30>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc 32>; + resets = <&cpg 520>; + status = "disabled"; + }; + + hscif1: serial@e6550000 { + compatible = "renesas,hscif-r8a77970", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe6550000 0 96>; + interrupts = ; + clocks = <&cpg CPG_MOD 519>, + <&cpg CPG_CORE 9>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x33>, <&dmac1 0x32>, + <&dmac2 0x33>, <&dmac2 0x32>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc 32>; + resets = <&cpg 519>; + status = "disabled"; + }; + + hscif2: serial@e6560000 { + compatible = "renesas,hscif-r8a77970", + "renesas,rcar-gen3-hscif", + "renesas,hscif"; + reg = <0 0xe6560000 0 96>; + interrupts = ; + clocks = <&cpg CPG_MOD 518>, + <&cpg CPG_CORE 9>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x35>, <&dmac1 0x34>, + <&dmac2 0x35>, <&dmac2 0x34>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc 32>; + resets = <&cpg 518>; + status = "disabled"; + }; + + hscif3: serial@e66a0000 { + compatible = "renesas,hscif-r8a77970", + "renesas,rcar-gen3-hscif", "renesas,hscif"; + reg = <0 0xe66a0000 0 96>; + interrupts = ; + clocks = <&cpg CPG_MOD 517>, + <&cpg CPG_CORE 9>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x37>, <&dmac1 0x36>, + <&dmac2 0x37>, <&dmac2 0x36>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc 32>; + resets = <&cpg 517>; + status = "disabled"; + }; + + scif0: serial@e6e60000 { + compatible = "renesas,scif-r8a77970", + "renesas,rcar-gen3-scif", + "renesas,scif"; + reg = <0 0xe6e60000 0 64>; + interrupts = ; + clocks = <&cpg CPG_MOD 207>, + <&cpg CPG_CORE 9>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x51>, <&dmac1 0x50>, + <&dmac2 0x51>, <&dmac2 0x50>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc 32>; + resets = <&cpg 207>; + status = "disabled"; + }; + + scif1: serial@e6e68000 { + compatible = "renesas,scif-r8a77970", + "renesas,rcar-gen3-scif", + "renesas,scif"; + reg = <0 0xe6e68000 0 64>; + interrupts = ; + clocks = <&cpg CPG_MOD 206>, + <&cpg CPG_CORE 9>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x53>, <&dmac1 0x52>, + <&dmac2 0x53>, <&dmac2 0x52>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc 32>; + resets = <&cpg 206>; + status = "disabled"; + }; + + scif3: serial@e6c50000 { + compatible = "renesas,scif-r8a77970", + "renesas,rcar-gen3-scif", + "renesas,scif"; + reg = <0 0xe6c50000 0 64>; + interrupts = ; + clocks = <&cpg CPG_MOD 204>, + <&cpg CPG_CORE 9>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x57>, <&dmac1 0x56>, + <&dmac2 0x57>, <&dmac2 0x56>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc 32>; + resets = <&cpg 204>; + status = "disabled"; + }; + + scif4: serial@e6c40000 { + compatible = "renesas,scif-r8a77970", + "renesas,rcar-gen3-scif", "renesas,scif"; + reg = <0 0xe6c40000 0 64>; + interrupts = ; + clocks = <&cpg CPG_MOD 203>, + <&cpg CPG_CORE 9>, + <&scif_clk>; + clock-names = "fck", "brg_int", "scif_clk"; + dmas = <&dmac1 0x59>, <&dmac1 0x58>, + <&dmac2 0x59>, <&dmac2 0x58>; + dma-names = "tx", "rx", "tx", "rx"; + power-domains = <&sysc 32>; + resets = <&cpg 203>; + status = "disabled"; + }; }; }; -- cgit v1.2.3 From bea2ab136eaacec2d14613a3ab89557298fa9748 Mon Sep 17 00:00:00 2001 From: Sergei Shtylyov Date: Fri, 15 Sep 2017 22:43:23 +0300 Subject: arm64: dts: renesas: r8a77970: add EtherAVB support Define the generic R8A77970 part of the EtherAVB device node. Based on the original (and large) patch by Daisuke Matsushita . Signed-off-by: Vladimir Barinov Signed-off-by: Sergei Shtylyov Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77970.dtsi | 44 +++++++++++++++++++++++++++++++ 1 file changed, 44 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77970.dtsi b/arch/arm64/boot/dts/renesas/r8a77970.dtsi index 04ec0e459686..aa9032d34189 100644 --- a/arch/arm64/boot/dts/renesas/r8a77970.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77970.dtsi @@ -318,5 +318,49 @@ resets = <&cpg 203>; status = "disabled"; }; + + avb: ethernet@e6800000 { + compatible = "renesas,etheravb-r8a77970", + "renesas,etheravb-rcar-gen3"; + reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>; + interrupts = , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + , + ; + interrupt-names = "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15", + "ch16", "ch17", "ch18", "ch19", + "ch20", "ch21", "ch22", "ch23", + "ch24"; + clocks = <&cpg CPG_MOD 812>; + power-domains = <&sysc 32>; + resets = <&cpg 812>; + phy-mode = "rgmii-id"; + #address-cells = <1>; + #size-cells = <0>; + }; }; }; -- cgit v1.2.3 From ea203404fb2f0b3b4cc24917044f7bd72fef12c7 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 28 Aug 2017 11:26:10 +0200 Subject: arm64: dts: draak: Add serial console pins Add pin control for SCIF2. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index d144370051d5..19c5462d8b67 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -36,7 +36,18 @@ clock-frequency = <48000000>; }; +&pfc { + scif2_pins: scif2 { + groups = "scif2_data"; + function = "scif2"; + }; + +}; + &scif2 { + pinctrl-0 = <&scif2_pins>; + pinctrl-names = "default"; + status = "okay"; }; -- cgit v1.2.3 From a0ea7fe8d34cbede9928b44e9a6b1dcd3f0150d1 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 14 Sep 2017 19:30:40 +0900 Subject: arm64: dts: renesas: r8a77995: Add USB2.0 PHY device node This patch adds USB2.0 PHY device node for r8a77995. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 12 ++++++++++++ 1 file changed, 12 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 72d04d7337be..59ed1303bd93 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -309,5 +309,17 @@ resets = <&cpg 310>; status = "disabled"; }; + + usb2_phy0: usb-phy@ee080200 { + compatible = "renesas,usb2-phy-r8a77995", + "renesas,rcar-gen3-usb2-phy"; + reg = <0 0xee080200 0 0x700>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 703>; + #phy-cells = <0>; + status = "disabled"; + }; }; }; -- cgit v1.2.3 From 423254a1799bc7ea1f81db0b5e0c7eb1494c13f1 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 14 Sep 2017 19:30:41 +0900 Subject: arm64: dts: renesas: r8a77995: add USB2.0 Host (EHCI/OHCI) device node This patch adds USB2.0 Host (EHCI/OHCI) device node for r8a77995. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995.dtsi | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi b/arch/arm64/boot/dts/renesas/r8a77995.dtsi index 59ed1303bd93..56e42921e879 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi @@ -310,6 +310,31 @@ status = "disabled"; }; + ehci0: usb@ee080100 { + compatible = "generic-ehci"; + reg = <0 0xee080100 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb2_phy0>; + phy-names = "usb"; + companion = <&ohci0>; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + + ohci0: usb@ee080000 { + compatible = "generic-ohci"; + reg = <0 0xee080000 0 0x100>; + interrupts = ; + clocks = <&cpg CPG_MOD 703>; + phys = <&usb2_phy0>; + phy-names = "usb"; + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>; + resets = <&cpg 703>; + status = "disabled"; + }; + usb2_phy0: usb-phy@ee080200 { compatible = "renesas,usb2-phy-r8a77995", "renesas,rcar-gen3-usb2-phy"; -- cgit v1.2.3 From 34f058b2731bd8c06237ea5725a557edba687ff4 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 14 Sep 2017 19:30:42 +0900 Subject: arm64: dts: renesas: r8a77995: draak: enable USB2.0 PHY This patch enables USB2.0 PHY for R-Car D3 draak board. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index 19c5462d8b67..454658ac6efc 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -42,6 +42,10 @@ function = "scif2"; }; + usb0_pins: usb0 { + groups = "usb0"; + function = "usb0"; + }; }; &scif2 { @@ -51,6 +55,13 @@ status = "okay"; }; +&usb2_phy0 { + pinctrl-0 = <&usb0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; + &rwdt { timeout-sec = <60>; status = "okay"; -- cgit v1.2.3 From 607c73c38e8492677da02a999eabd669e96f6d88 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 14 Sep 2017 19:30:43 +0900 Subject: arm64: dts: renesas: r8a77995: draak: enable USB2.0 Host (EHCI/OHCI) This patch enables USB2.0 Host (EHCI/OHCI) for r8a77995. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index 454658ac6efc..7b776cb7e928 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -48,6 +48,14 @@ }; }; +&ehci0 { + status = "okay"; +}; + +&ohci0 { + status = "okay"; +}; + &scif2 { pinctrl-0 = <&scif2_pins>; pinctrl-names = "default"; -- cgit v1.2.3 From 4503b50eac08f472e8690ec61f4d144e62cbdc55 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Wed, 13 Sep 2017 21:18:39 +0900 Subject: arm64: dts: renesas: r8a77995: draak: enable EthernetAVB This patch enables EthernetAVB for R-Car D3 draak board. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a77995-draak.dts | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts index 7b776cb7e928..96b7ff5cc321 100644 --- a/arch/arm64/boot/dts/renesas/r8a77995-draak.dts +++ b/arch/arm64/boot/dts/renesas/r8a77995-draak.dts @@ -11,6 +11,7 @@ /dts-v1/; #include "r8a77995.dtsi" +#include / { model = "Renesas Draak board based on r8a77995"; @@ -18,6 +19,7 @@ aliases { serial0 = &scif2; + ethernet0 = &avb; }; chosen { @@ -37,6 +39,14 @@ }; &pfc { + avb0_pins: avb { + mux { + groups = "avb0_link", "avb0_phy_int", "avb0_mdc", + "avb0_mii"; + function = "avb0"; + }; + }; + scif2_pins: scif2 { groups = "scif2_data"; function = "scif2"; @@ -56,6 +66,21 @@ status = "okay"; }; +&avb { + pinctrl-0 = <&avb0_pins>; + pinctrl-names = "default"; + renesas,no-ether-link; + phy-handle = <&phy0>; + status = "okay"; + + phy0: ethernet-phy@0 { + rxc-skew-ps = <1500>; + reg = <0>; + interrupt-parent = <&gpio5>; + interrupts = <19 IRQ_TYPE_LEVEL_LOW>; + }; +}; + &scif2 { pinctrl-0 = <&scif2_pins>; pinctrl-names = "default"; -- cgit v1.2.3 From 3bdba1b26771496ad8db8cd948ce144fc1ce1ca2 Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 21 Sep 2017 14:31:25 +0900 Subject: arm64: dts: renesas: r8a7795: add USB3.0 peripheral device node This patch adds USB3.0 peripheral channel 0 device node for r8a7795. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7795.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi index 5d5174d8635d..d5cfd1a1c539 100644 --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -1471,6 +1471,17 @@ status = "disabled"; }; + usb3_peri0: usb@ee020000 { + compatible = "renesas,r8a7795-usb3-peri", + "renesas,rcar-gen3-usb3-peri"; + reg = <0 0xee020000 0 0x400>; + interrupts = ; + clocks = <&cpg CPG_MOD 328>; + power-domains = <&sysc R8A7795_PD_ALWAYS_ON>; + resets = <&cpg 328>; + status = "disabled"; + }; + usb_dmac0: dma-controller@e65a0000 { compatible = "renesas,r8a7795-usb-dmac", "renesas,usb-dmac"; -- cgit v1.2.3 From 2affee619d48d101831e83e74cadeb7c5200d9cb Mon Sep 17 00:00:00 2001 From: Yoshihiro Shimoda Date: Thu, 21 Sep 2017 14:31:26 +0900 Subject: arm64: dts: renesas: r8a7796: add USB3.0 peripheral device node This patch adds USB3.0 peripheral channel 0 device node for r8a7796. Signed-off-by: Yoshihiro Shimoda Reviewed-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm64') diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 16da83458f18..57ac5ca6ed98 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -1279,6 +1279,17 @@ status = "disabled"; }; + usb3_peri0: usb@ee020000 { + compatible = "renesas,r8a7796-usb3-peri", + "renesas,rcar-gen3-usb3-peri"; + reg = <0 0xee020000 0 0x400>; + interrupts = ; + clocks = <&cpg CPG_MOD 328>; + power-domains = <&sysc R8A7796_PD_ALWAYS_ON>; + resets = <&cpg 328>; + status = "disabled"; + }; + ohci0: usb@ee080000 { compatible = "generic-ohci"; reg = <0 0xee080000 0 0x100>; -- cgit v1.2.3