From bd4fb6d270bc423a9a4098108784f7f9254c4e6d Mon Sep 17 00:00:00 2001 From: Will Deacon Date: Thu, 14 Jun 2018 11:21:34 +0100 Subject: arm64: Add support for SB barrier and patch in over DSB; ISB sequences We currently use a DSB; ISB sequence to inhibit speculation in set_fs(). Whilst this works for current CPUs, future CPUs may implement a new SB barrier instruction which acts as an architected speculation barrier. On CPUs that support it, patch in an SB; NOP sequence over the DSB; ISB sequence and advertise the presence of the new instruction to userspace. Signed-off-by: Will Deacon --- arch/arm64/kernel/cpuinfo.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm64/kernel/cpuinfo.c') diff --git a/arch/arm64/kernel/cpuinfo.c b/arch/arm64/kernel/cpuinfo.c index bcc2831399cb..7cb0b08ab0a7 100644 --- a/arch/arm64/kernel/cpuinfo.c +++ b/arch/arm64/kernel/cpuinfo.c @@ -82,6 +82,7 @@ static const char *const hwcap_str[] = { "ilrcpc", "flagm", "ssbs", + "sb", NULL }; -- cgit v1.2.3