From 17ab3c3e31db1f6b4ee8d8a698d131d4a18ec7c6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 6 Mar 2020 12:00:25 +0100 Subject: arm64: dts: renesas: r8a77961: Add thermal nodes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add a device node for the Thermal Sensor/Chip Internal Voltage Monitor in the R-Car M3-W+ (R8A77961) SoC, and describe the thermal zones. According to the R-Car Gen3 Hardware Manual Errata for Revision 2.00 of Jan 31, 2020, the thermal parameters for R-Car M3-W+ are the same as for R-Car M3-W. Signed-off-by: Geert Uytterhoeven Reviewed-by: Niklas Söderlund Link: https://lore.kernel.org/r/20200306110025.24747-1-geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a77961.dtsi | 79 +++++++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi index b6915319a61c..f710a7fcfbb3 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi @@ -474,6 +474,20 @@ #power-domain-cells = <1>; }; + tsc: thermal@e6198000 { + compatible = "renesas,r8a77961-thermal"; + reg = <0 0xe6198000 0 0x100>, + <0 0xe61a0000 0 0x100>, + <0 0xe61a8000 0 0x100>; + interrupts = , + , + ; + clocks = <&cpg CPG_MOD 522>; + power-domains = <&sysc R8A77961_PD_ALWAYS_ON>; + resets = <&cpg 522>; + #thermal-sensor-cells = <1>; + }; + intc_ex: interrupt-controller@e61c0000 { #interrupt-cells = <2>; interrupt-controller; @@ -1073,6 +1087,71 @@ }; }; + thermal-zones { + sensor_thermal1: sensor-thermal1 { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsc 0>; + sustainable-power = <3874>; + + trips { + sensor1_crit: sensor1-crit { + temperature = <120000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + sensor_thermal2: sensor-thermal2 { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsc 1>; + sustainable-power = <3874>; + + trips { + sensor2_crit: sensor2-crit { + temperature = <120000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + + sensor_thermal3: sensor-thermal3 { + polling-delay-passive = <250>; + polling-delay = <1000>; + thermal-sensors = <&tsc 2>; + sustainable-power = <3874>; + + cooling-maps { + map0 { + trip = <&target>; + cooling-device = <&a57_0 2 4>; + contribution = <1024>; + }; + map1 { + trip = <&target>; + cooling-device = <&a53_0 0 2>; + contribution = <1024>; + }; + }; + trips { + target: trip-point1 { + temperature = <100000>; + hysteresis = <1000>; + type = "passive"; + }; + + sensor3_crit: sensor3-crit { + temperature = <120000>; + hysteresis = <1000>; + type = "critical"; + }; + }; + }; + }; + timer { compatible = "arm,armv8-timer"; interrupts-extended = <&gic GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(6) | IRQ_TYPE_LEVEL_LOW)>, -- cgit v1.2.3 From 42afeb28d28061108364d987a8898d67cecb6b25 Mon Sep 17 00:00:00 2001 From: Yuya Hamamachi Date: Mon, 9 Mar 2020 15:44:25 +0900 Subject: arm64: dts: renesas: Add support for M3ULCB with R-Car M3-W+ Add initial support for the Renesas M3ULCB board equipped with an R-Car M3-W+ SiP with 8 (2 x 4) GiB of RAM. To avoid build error on 'ulcb.dtsi', ssi2 is added into 'r8a77961.dtsi'. Based on commit 92980759c1699a3c ("arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+"). Signed-off-by: Yuya Hamamachi Link: https://lore.kernel.org/r/20200309064425.25437-3-yuya.hamamachi.sx@renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/Makefile | 1 + arch/arm64/boot/dts/renesas/r8a77961-ulcb.dts | 32 +++++++++++++++++++++++++++ arch/arm64/boot/dts/renesas/r8a77961.dtsi | 1 + 3 files changed, 34 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a77961-ulcb.dts (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index 94d5ad03197d..a4c77d095ffb 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -12,6 +12,7 @@ dtb-$(CONFIG_ARCH_R8A77951) += r8a77951-ulcb.dtb r8a77951-ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A77960) += r8a77960-salvator-x.dtb r8a77960-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77960) += r8a77960-ulcb.dtb r8a77960-ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A77961) += r8a77961-salvator-xs.dtb +dtb-$(CONFIG_ARCH_R8A77961) += r8a77961-ulcb.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-salvator-x.dtb r8a77965-salvator-xs.dtb dtb-$(CONFIG_ARCH_R8A77965) += r8a77965-ulcb.dtb r8a77965-ulcb-kf.dtb dtb-$(CONFIG_ARCH_R8A77970) += r8a77970-eagle.dtb r8a77970-v3msk.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a77961-ulcb.dts b/arch/arm64/boot/dts/renesas/r8a77961-ulcb.dts new file mode 100644 index 000000000000..7c6e60f6f32d --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a77961-ulcb.dts @@ -0,0 +1,32 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the M3ULCB (R-Car Starter Kit Pro) board with R-Car + * M3-W+ + * + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +/dts-v1/; +#include "r8a77961.dtsi" +#include "ulcb.dtsi" + +/ { + model = "Renesas M3ULCB board based on r8a77961"; + compatible = "renesas,m3ulcb", "renesas,r8a77961"; + + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ + reg = <0x0 0x48000000 0x0 0x78000000>; + }; + + memory@480000000 { + device_type = "memory"; + reg = <0x4 0x80000000 0x0 0x80000000>; + }; + + memory@600000000 { + device_type = "memory"; + reg = <0x6 0x00000000 0x1 0x00000000>; + }; +}; diff --git a/arch/arm64/boot/dts/renesas/r8a77961.dtsi b/arch/arm64/boot/dts/renesas/r8a77961.dtsi index f710a7fcfbb3..0d96f2d3492b 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77961.dtsi @@ -884,6 +884,7 @@ rcar_sound,ssi { ssi0: ssi-0 { }; ssi1: ssi-1 { }; + ssi2: ssi-2 { }; }; }; -- cgit v1.2.3 From 04456450f54b1ed87a8cea7b862d162faf8fe096 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Mon, 9 Mar 2020 18:08:25 +0100 Subject: arm64: dts: renesas: r8a77961: salvator-xs: Fix memory unit-address Correct the unit-address of the second memory node, to match the corresponding reg property. Fixes: 92980759c1699a3c ("arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+") Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200309170825.20882-1-geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts index 4abd78ac1cd5..2ffc7e31dd58 100644 --- a/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts +++ b/arch/arm64/boot/dts/renesas/r8a77961-salvator-xs.dts @@ -19,7 +19,7 @@ reg = <0x0 0x48000000 0x0 0x78000000>; }; - memory@400000000 { + memory@480000000 { device_type = "memory"; reg = <0x4 0x80000000 0x0 0x80000000>; }; -- cgit v1.2.3 From 5fc00fce6276cd8e9231586bdd3e5c4d44f8f9f7 Mon Sep 17 00:00:00 2001 From: Takeshi Kihara Date: Mon, 9 Mar 2020 18:11:12 +0100 Subject: arm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores Enable cpuidle (core shutdown) support for the CA57 cores on R-Car M3-N. Signed-off-by: Takeshi Kihara Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200309171112.21086-1-geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a77965.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a77965.dtsi b/arch/arm64/boot/dts/renesas/r8a77965.dtsi index f7468822e81e..d82dd4e67b62 100644 --- a/arch/arm64/boot/dts/renesas/r8a77965.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77965.dtsi @@ -111,6 +111,7 @@ power-domains = <&sysc R8A77965_PD_CA57_CPU0>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; #cooling-cells = <2>; dynamic-power-coefficient = <854>; clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; @@ -124,6 +125,7 @@ power-domains = <&sysc R8A77965_PD_CA57_CPU1>; next-level-cache = <&L2_CA57>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; clocks = <&cpg CPG_CORE R8A77965_CLK_Z>; operating-points-v2 = <&cluster0_opp>; }; @@ -134,6 +136,19 @@ cache-unified; cache-level = <2>; }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <400>; + exit-latency-us = <500>; + min-residency-us = <4000>; + }; + }; }; extal_clk: extal { -- cgit v1.2.3 From 9aa7dea8d66e05bbb331eb214327f7d1b82d00ad Mon Sep 17 00:00:00 2001 From: Takeshi Kihara Date: Mon, 9 Mar 2020 18:12:00 +0100 Subject: arm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores Enable cpuidle (core shutdown) support for the CA53 cores on R-Car E3. Signed-off-by: Takeshi Kihara Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200309171200.21226-1-geert+renesas@glider.be --- arch/arm64/boot/dts/renesas/r8a77990.dtsi | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index 0ad20b78e6eb..1543f18e834f 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -88,6 +88,7 @@ power-domains = <&sysc R8A77990_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; dynamic-power-coefficient = <277>; clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; @@ -100,6 +101,7 @@ power-domains = <&sysc R8A77990_PD_CA53_CPU1>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; }; @@ -110,6 +112,19 @@ cache-unified; cache-level = <2>; }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <700>; + exit-latency-us = <700>; + min-residency-us = <5000>; + }; + }; }; extal_clk: extal { -- cgit v1.2.3 From e30f56800e69db6d2763a1f7f64dfcc79f9b5ea7 Mon Sep 17 00:00:00 2001 From: Fabrizio Castro Date: Wed, 11 Mar 2020 20:03:40 +0000 Subject: arm64: dts: renesas: Add HiHope RZ/G2M board with idk-1110wr display The HiHope RZ/G2M is advertised as compatible with panel idk-1110wr from Advantech, however the panel isn't sold alongside the board. A new dts, adding everything that's required to get the panel to work with HiHope RZ/G2M, is the most convenient way to support the HiHope RZ/G2M when it's connected to the idk-1110wr. Signed-off-by: Fabrizio Castro Signed-off-by: Lad Prabhakar Link: https://lore.kernel.org/r/1583957020-16359-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- arch/arm64/boot/dts/renesas/Makefile | 1 + .../r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts | 52 ++++++++++++++++++++++ 2 files changed, 53 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts (limited to 'arch/arm64/boot') diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile index a4c77d095ffb..a7ec7a7065d5 100644 --- a/arch/arm64/boot/dts/renesas/Makefile +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -1,6 +1,7 @@ # SPDX-License-Identifier: GPL-2.0 dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m.dtb dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex.dtb +dtb-$(CONFIG_ARCH_R8A774A1) += r8a774a1-hihope-rzg2m-ex-idk-1110wr.dtb dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n.dtb dtb-$(CONFIG_ARCH_R8A774B1) += r8a774b1-hihope-rzg2n-ex.dtb dtb-$(CONFIG_ARCH_R8A774C0) += r8a774c0-cat874.dtb r8a774c0-ek874.dtb \ diff --git a/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts new file mode 100644 index 000000000000..2ab5edd84e9b --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a774a1-hihope-rzg2m-ex-idk-1110wr.dts @@ -0,0 +1,52 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source for the HiHope RZ/G2M sub board connected to an + * Advantech IDK-1110WR 10.1" LVDS panel + * + * Copyright (C) 2020 Renesas Electronics Corp. + */ + +#include "r8a774a1-hihope-rzg2m-ex.dts" +#include "rzg2-advantech-idk-1110wr-panel.dtsi" + +/ { + backlight { + compatible = "pwm-backlight"; + pwms = <&pwm0 0 50000>; + + brightness-levels = <0 2 8 16 32 64 128 255>; + default-brightness-level = <6>; + }; + +}; + +&gpio1 { + /* + * When GP1_20 is LOW LVDS0 is connected to the LVDS connector + * When GP1_20 is HIGH LVDS0 is connected to the LT8918L + */ + lvds-connector-en-gpio { + gpio-hog; + gpios = <20 GPIO_ACTIVE_HIGH>; + output-low; + line-name = "lvds-connector-en-gpio"; + }; +}; + +&lvds0 { + status = "okay"; +}; + +&pfc { + pwm0_pins: pwm0 { + groups = "pwm0"; + function = "pwm0"; + }; +}; + +&pwm0 { + pinctrl-0 = <&pwm0_pins>; + pinctrl-names = "default"; + + status = "okay"; +}; -- cgit v1.2.3