From 8f32b8124a99a8f7a433d50ca041a75f096ffc7b Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Sun, 27 Nov 2016 03:10:53 +0900 Subject: arm64: dts: uniphier: add SD-ctrl node for LD11 SoC The LD11 SoC is equipped with SD-ctrl (0x59810000) as well as MIO-ctrl (0x5b3e0000). The SD-ctrl block on this SoC has just one register for controlling RST_n pin of the eMMC device. Signed-off-by: Masahiro Yamada --- arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 7c7511b9d231..43b658392e20 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -273,6 +273,17 @@ reg = <0x59801000 0x400>; }; + sdctrl@59810000 { + compatible = "socionext,uniphier-ld11-sdctrl", + "simple-mfd", "syscon"; + reg = <0x59810000 0x400>; + + sd_rst: reset { + compatible = "socionext,uniphier-ld11-sd-reset"; + #reset-cells = <1>; + }; + }; + perictrl@59820000 { compatible = "socionext,uniphier-ld11-perictrl", "simple-mfd", "syscon"; -- cgit v1.2.3 From 3a93cc261a29bde973a5ac9a9800c12ce362f5a1 Mon Sep 17 00:00:00 2001 From: Masahiro Yamada Date: Thu, 21 Apr 2016 19:33:56 +0900 Subject: arm64: dts: uniphier: add eMMC controller node for LD11/LD20 Add Cadence's eMMC controller node for LD11/LD20. Signed-off-by: Masahiro Yamada --- arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi | 10 ++++++++++ arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi | 10 ++++++++++ 2 files changed, 20 insertions(+) (limited to 'arch/arm64/boot/dts') diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi index 43b658392e20..da881f5b6ed4 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld11.dtsi @@ -300,6 +300,16 @@ }; }; + emmc: sdhc@5a000000 { + compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; + reg = <0x5a000000 0x400>; + interrupts = <0 78 4>; + clocks = <&sys_clk 4>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + }; + usb0: usb@5a800100 { compatible = "socionext,uniphier-ehci", "generic-ehci"; status = "disabled"; diff --git a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi index fcaecc6bdeac..a6b3a70dae83 100644 --- a/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi +++ b/arch/arm64/boot/dts/socionext/uniphier-ld20.dtsi @@ -374,6 +374,16 @@ }; }; + emmc: sdhc@5a000000 { + compatible = "socionext,uniphier-sd4hc", "cdns,sd4hc"; + reg = <0x5a000000 0x400>; + interrupts = <0 78 4>; + clocks = <&sys_clk 4>; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + }; + soc-glue@5f800000 { compatible = "socionext,uniphier-ld20-soc-glue", "simple-mfd", "syscon"; -- cgit v1.2.3