From c40d1cceb30b508ccac85b34eb10d62fb9f32002 Mon Sep 17 00:00:00 2001 From: Nava kishore Manne Date: Fri, 18 Oct 2019 18:07:33 +0200 Subject: arm64: zynqmp: Label whole PL part as fpga_full region This will simplify dt overlay structure for the whole PL. Signed-off-by: Nava kishore Manne Signed-off-by: Michal Simek Signed-off-by: Michael Tretter --- arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm64/boot/dts/xilinx') diff --git a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi index 43f01dca1f78..e72343756f7b 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp.dtsi @@ -135,6 +135,14 @@ <1 10 0xf08>; }; + fpga_full: fpga-full { + compatible = "fpga-region"; + fpga-mgr = <&zynqmp_pcap>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + }; + amba_apu: amba-apu@0 { compatible = "simple-bus"; #address-cells = <2>; -- cgit v1.2.3