From a3f3332f412fe26fee186fb8abdcb4c8770dcd91 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Wed, 12 Dec 2018 10:36:44 +0100 Subject: arm64: dts: marvell: add interrupt support to ap806 thermal node Add interrupt properties in the thermal node as well as a critical trip point in the thermal-zone. Signed-off-by: Miquel Raynal Acked-by: Eduardo Valentin Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi index 7d94c1fa592a..faca07de4d84 100644 --- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi @@ -266,6 +266,8 @@ ap_thermal: thermal-sensor@80 { compatible = "marvell,armada-ap806-thermal"; reg = <0x80 0x10>; + interrupt-parent = <&sei>; + interrupts = <18>; #thermal-sensor-cells = <1>; }; }; @@ -276,16 +278,26 @@ * The thermal IP features one internal sensor plus, if applicable, one * remote channel wired to one sensor per CPU. * + * Only one thermal zone per AP/CP may trigger interrupts at a time, the + * first one that will have a critical trip point will be chosen. + * * The cooling maps are always empty as there are no cooling devices. */ thermal-zones { ap_thermal_ic: ap-thermal-ic { - polling-delay-passive = <1000>; - polling-delay = <1000>; + polling-delay-passive = <0>; /* Interrupt driven */ + polling-delay = <0>; /* Interrupt driven */ thermal-sensors = <&ap_thermal 0>; - trips { }; + trips { + ap_crit: ap-crit { + temperature = <100000>; /* mC degrees */ + hysteresis = <2000>; /* mC degrees */ + type = "critical"; + }; + }; + cooling-maps { }; }; -- cgit v1.2.3 From 47041b9780f14caa7fe696e22d041f05f5973ee7 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Wed, 12 Dec 2018 10:36:45 +0100 Subject: arm64: dts: marvell: add interrupt support to cp110 thermal node Add interrupt properties in the thermal node as well as a critical trip point in the thermal-zone. Signed-off-by: Miquel Raynal Acked-by: Eduardo Valentin Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-cp110.dtsi | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi index b9d9f31e3ba1..4d6e4a097f72 100644 --- a/arch/arm64/boot/dts/marvell/armada-cp110.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-cp110.dtsi @@ -28,12 +28,19 @@ */ thermal-zones { CP110_LABEL(thermal_ic): CP110_NODE_NAME(thermal-ic) { - polling-delay-passive = <1000>; - polling-delay = <1000>; + polling-delay-passive = <0>; /* Interrupt driven */ + polling-delay = <0>; /* Interrupt driven */ thermal-sensors = <&CP110_LABEL(thermal) 0>; - trips { }; + trips { + CP110_LABEL(crit): crit { + temperature = <100000>; /* mC degrees */ + hysteresis = <2000>; /* mC degrees */ + type = "critical"; + }; + }; + cooling-maps { }; }; }; @@ -259,6 +266,8 @@ CP110_LABEL(thermal): thermal-sensor@70 { compatible = "marvell,armada-cp110-thermal"; reg = <0x70 0x10>; + interrupts-extended = + <&CP110_LABEL(icu_sei) 116 IRQ_TYPE_LEVEL_HIGH>; #thermal-sensor-cells = <1>; }; }; -- cgit v1.2.3 From d68def52498ebaca071da2b9fb3222f46262d89e Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 8 Jan 2019 17:31:23 +0100 Subject: arm64: dts: marvell: armada-37xx: fix SATA node scope Fix the SATA IP memory area which is only 0x178 bytes long (from Marvell A3700 specification). Actually, starting from the offset 0xe0178, there is an area dedicated to the COMPHY driver. Suggested-by: Grzegorz Jaszczyk Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index e05594ea15fb..6f5058a4f149 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -368,7 +368,7 @@ sata: sata@e0000 { compatible = "marvell,armada-3700-ahci"; - reg = <0xe0000 0x2000>; + reg = <0xe0000 0x178>; interrupts = ; status = "disabled"; }; -- cgit v1.2.3 From 02967b85b3ea0c09b8276f1a84933768409e34cc Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 4 Dec 2018 20:28:30 +0100 Subject: arm64: dts: marvell: armada-37xx: declare SATA clock The SATA IP get its clock from the north-bridge. Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 6f5058a4f149..e832ea597a16 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -370,6 +370,7 @@ compatible = "marvell,armada-3700-ahci"; reg = <0xe0000 0x178>; interrupts = ; + clocks = <&nb_periph_clk 1>; status = "disabled"; }; -- cgit v1.2.3 From b3ad58bcad7ea384a6efaf60df3a763a0ff41c40 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 29 Jan 2019 10:36:33 +0100 Subject: arm64: dts: marvell: armada-37xx: fix USB2 memory region The specification splits the USB2 memory region into three sections: 1/ 0xD005E000-0xD005EFFF: USB2 Host Controller Registers 2/ 0xD005F000-0xD005F7FF: USB2 UTMI PHY Registers 3/ 0xD005F800-0xD005FFFF: USB2 Host Miscellaneous Registers Section 1/ belongs to the USB2 node but section 2/ belongs to the UTMI PHY node. Section 3/ can be accessed by both the USB controller and the PHY because of the miscaellaneous nature of the registers inside so a specific node will be created to cover the area and a handle to it will be added in both the USB controller and the PHY node. Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index e832ea597a16..27f780bae6ea 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -312,7 +312,7 @@ usb2: usb@5e000 { compatible = "marvell,armada-3700-ehci"; - reg = <0x5e000 0x2000>; + reg = <0x5e000 0x1000>; interrupts = ; status = "disabled"; }; -- cgit v1.2.3 From 05d168a56fae8ff50432d5dfe6e7423b989455a8 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 29 Jan 2019 10:36:34 +0100 Subject: arm64: dts: marvell: armada-37xx: declare USB2 UTMI PHYs On Marvell Armada 3700 SoCs there are two USB2 UTMI PHYs. They are both very similar but only one has OTG/charging capabilities. Because there are USB host registers and PHY registers mixed in a single area, a system controller is also created and referenced from both the USB host node and the PHY node. Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 27f780bae6ea..48f85dc1c0a1 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -305,18 +305,46 @@ compatible = "marvell,armada3700-xhci", "generic-xhci"; reg = <0x58000 0x4000>; + marvell,usb-misc-reg = <&usb32_syscon>; interrupts = ; clocks = <&sb_periph_clk 12>; status = "disabled"; }; + usb2_utmi_otg_phy: phy@5d000 { + compatible = "marvell,a3700-utmi-otg-phy"; + reg = <0x5d000 0x800>; + marvell,usb-misc-reg = <&usb32_syscon>; + #phy-cells = <0>; + }; + + usb32_syscon: system-controller@5d800 { + compatible = "marvell,armada-3700-usb2-host-device-misc", + "syscon"; + reg = <0x5d800 0x800>; + }; + usb2: usb@5e000 { compatible = "marvell,armada-3700-ehci"; reg = <0x5e000 0x1000>; + marvell,usb-misc-reg = <&usb2_syscon>; interrupts = ; status = "disabled"; }; + usb2_utmi_host_phy: phy@5f000 { + compatible = "marvell,a3700-utmi-host-phy"; + reg = <0x5f000 0x800>; + marvell,usb-misc-reg = <&usb2_syscon>; + #phy-cells = <0>; + }; + + usb2_syscon: system-controller@5f800 { + compatible = "marvell,armada-3700-usb2-host-misc", + "syscon"; + reg = <0x5f800 0x800>; + }; + xor@60900 { compatible = "marvell,armada-3700-xor"; reg = <0x60900 0x100>, -- cgit v1.2.3 From a5470af981a0cc14a650af8da5186668971a4fc8 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 8 Jan 2019 17:24:39 +0100 Subject: arm64: dts: marvell: armada-37xx: declare PCIe reset pin One pin can be muxed as PCIe endpoint card reset. Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 48f85dc1c0a1..b278b64b73e3 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -276,6 +276,15 @@ function = "sdio"; }; + pcie_reset_pins: pcie-reset-pins { + groups = "pcie1"; + function = "pcie"; + }; + + pcie_clkreq_pins: pcie-clkreq-pins { + groups = "pcie1_clkreq"; + function = "pcie"; + }; }; eth0: ethernet@30000 { -- cgit v1.2.3 From c54932d42a4e39b9d68bba4e766ccb7a95ff7746 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 8 Jan 2019 17:24:40 +0100 Subject: arm64: dts: marvell: armada-3720-espressobin: declare PCIe warm reset pin Ensure the PCIe endpoint card reset that is toggled by the PCIe controller itself is muxed correctly on the EspressoBin. Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts index 846003bb480c..18938d133ae3 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts @@ -46,6 +46,8 @@ /* J9 */ &pcie0 { status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>; }; /* J6 */ -- cgit v1.2.3 From 0d45062cfc891b4cba27fe017a6f5bcd5d3191f0 Mon Sep 17 00:00:00 2001 From: Vladimir Vid Date: Fri, 25 Jan 2019 18:17:08 +0100 Subject: arm64: dts: marvell: Add device tree for uDPU board This adds initial support for micro-DPU (uDPU) board which is based on Armada-3720 SoC. micro-DPU is the single-port FTTdp distribution point unit made by Methode Electronics which offers complete modularity with replaceable SFP modules both for uplink and downlink (G.hn over twisted-pair, G.hn over coax, 1G and 2.5G Ethernet over Cat-5e cable). On-board features: - 512 MiB DDR3 - 2 x 2.5G SFP via HSGMII SERDES interface to the A3720 SoC - USB 2.0 Type-C connector - 4GB eMMC - ETSI TS 101548 reverse powering via twisted pair (RJ45) or coax (F Type) Cc: Luka Perkov Cc: Luis Torres Cc: Scott Roberts Cc: Paul Arola Cc: Andrew Lunn Cc: Jason Cooper Cc: Gregory Clement Cc: Sebastian Hesselbarth Cc: linux-arm-kernel@lists.infradead.org Signed-off-by: Vladimir Vid Reviewed-by: Andrew Lunn Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/Makefile | 1 + arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts | 162 +++++++++++++++++++++++ 2 files changed, 163 insertions(+) create mode 100644 arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/Makefile b/arch/arm64/boot/dts/marvell/Makefile index 2eff1f927471..caed4334f27d 100644 --- a/arch/arm64/boot/dts/marvell/Makefile +++ b/arch/arm64/boot/dts/marvell/Makefile @@ -2,6 +2,7 @@ # Mvebu SoC Family dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-espressobin.dtb +dtb-$(CONFIG_ARCH_MVEBU) += armada-3720-uDPU.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-7040-db.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-clearfog-gt-8k.dtb dtb-$(CONFIG_ARCH_MVEBU) += armada-8040-db.dtb diff --git a/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts new file mode 100644 index 000000000000..bd4aab6092e0 --- /dev/null +++ b/arch/arm64/boot/dts/marvell/armada-3720-uDPU.dts @@ -0,0 +1,162 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Device tree for the uDPU board. + * Based on Marvell Armada 3720 development board (DB-88F3720-DDR3) + * Copyright (C) 2016 Marvell + * Copyright (C) 2019 Methode Electronics + * Copyright (C) 2019 Telus + * + * Vladimir Vid + */ + +/dts-v1/; + +#include +#include "armada-372x.dtsi" + +/ { + model = "Methode uDPU Board"; + compatible = "methode,udpu", "marvell,armada3720"; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + memory@0 { + device_type = "memory"; + reg = <0x00000000 0x00000000 0x00000000 0x20000000>; + }; + + leds { + pinctrl-names = "default"; + compatible = "gpio-leds"; + + power1 { + label = "udpu:green:power"; + gpios = <&gpionb 11 GPIO_ACTIVE_LOW>; + }; + + power2 { + label = "udpu:red:power"; + gpios = <&gpionb 12 GPIO_ACTIVE_LOW>; + }; + + network1 { + label = "udpu:green:network"; + gpios = <&gpionb 13 GPIO_ACTIVE_LOW>; + }; + + network2 { + label = "udpu:red:network"; + gpios = <&gpionb 14 GPIO_ACTIVE_LOW>; + }; + + alarm1 { + label = "udpu:green:alarm"; + gpios = <&gpionb 15 GPIO_ACTIVE_LOW>; + }; + + alarm2 { + label = "udpu:red:alarm"; + gpios = <&gpionb 16 GPIO_ACTIVE_LOW>; + }; + }; + + sfp_eth0: sfp-eth0 { + compatible = "sff,sfp"; + i2c-bus = <&i2c0>; + los-gpio = <&gpiosb 2 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpiosb 3 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&gpiosb 4 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&gpiosb 5 GPIO_ACTIVE_HIGH>; + }; + + sfp_eth1: sfp-eth1 { + compatible = "sff,sfp"; + i2c-bus = <&i2c1>; + los-gpio = <&gpiosb 7 GPIO_ACTIVE_HIGH>; + mod-def0-gpio = <&gpiosb 8 GPIO_ACTIVE_LOW>; + tx-disable-gpio = <&gpiosb 9 GPIO_ACTIVE_HIGH>; + tx-fault-gpio = <&gpiosb 10 GPIO_ACTIVE_HIGH>; + }; +}; + +&sdhci0 { + status = "okay"; + bus-width = <8>; + mmc-ddr-1_8v; + mmc-hs400-1_8v; + marvell,pad-type = "fixed-1-8v"; + non-removable; + no-sd; + no-sdio; +}; + +&spi0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&spi_quad_pins>; + + m25p80@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <54000000>; + + partitions { + compatible = "fixed-partitions"; + #address-cells = <1>; + #size-cells = <1>; + /* only bootloader is located on the SPI */ + partition@0 { + label = "uboot"; + reg = <0 0x400000>; + }; + }; + }; +}; + +&i2c0 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; +}; + +&i2c1 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&i2c2_pins>; + + lm75@48 { + status = "okay"; + compatible = "lm75"; + reg = <0x48>; + }; + + lm75@49 { + status = "okay"; + compatible = "lm75"; + reg = <0x49>; + }; +}; + +ð0 { + phy-mode = "sgmii"; + status = "okay"; + managed = "in-band-status"; + sfp = <&sfp_eth0>; +}; + +ð1 { + phy-mode = "sgmii"; + status = "okay"; + managed = "in-band-status"; + sfp = <&sfp_eth1>; +}; + +&usb3 { + status = "okay"; +}; + +&uart0 { + status = "okay"; +}; -- cgit v1.2.3 From 4f63b1c3d6c4604866d3ffd1184b5a9f0fda61dc Mon Sep 17 00:00:00 2001 From: Remi Pommarel Date: Mon, 28 Jan 2019 21:07:27 +0100 Subject: arm64: dts: armada-3720-espressobin: Configure RGMII and SMI pins In order to be able to communicate with the 88e6341 switch some pins have to be repurposed as RGMII and SMI pins. This fixes ethernet support on system booted via a bootloader that has not already configured those pins (e.g. mainline u-boot, or vendor u-boot compiled without ethernet support). Signed-off-by: Remi Pommarel Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 ++ arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 5 +++++ 2 files changed, 7 insertions(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts index 18938d133ae3..dcb610933bc7 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts @@ -198,6 +198,8 @@ }; ð0 { + pinctrl-names = "default"; + pinctrl-0 = <&rgmii_pins>, <&smi_pins>; phy-mode = "rgmii-id"; status = "okay"; diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index b278b64b73e3..d4542bf10c11 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -271,6 +271,11 @@ function = "mii"; }; + smi_pins: smi-pins { + groups = "smi"; + function = "smi"; + }; + sdio_pins: sdio-pins { groups = "sdio_sb"; function = "sdio"; -- cgit v1.2.3 From 99ce97875973ab83a4f894a56cf7f59afdc3943f Mon Sep 17 00:00:00 2001 From: Remi Pommarel Date: Mon, 28 Jan 2019 21:07:28 +0100 Subject: arm64: dts: armada-3720-espressobin: Set mv88e6341 cpu port as RGMII-ID The mv88e6341 ethernet switch needs the cpu port control register to be set with TX and RX internal delay in order to work. This fixes ethernet support on system booted via a bootloader that has not already configured this register (e.g. mainline u-boot, or vendor u-boot compiled without ethernet support). Signed-off-by: Remi Pommarel Reviewed-by: Andrew Lunn Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts index dcb610933bc7..67fa84bf8686 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts @@ -158,6 +158,11 @@ reg = <0>; label = "cpu"; ethernet = <ð0>; + phy-mode = "rgmii-id"; + fixed-link { + speed = <1000>; + full-duplex; + }; }; port@1 { -- cgit v1.2.3 From 8b0a14d97e282534f12ec254525642be69142cce Mon Sep 17 00:00:00 2001 From: Gregory CLEMENT Date: Wed, 6 Feb 2019 00:05:12 +0100 Subject: arm64: dts: marvell: Remove unnecessary #address-cells/#size-cells under flashes By using the new binding for the partitions for the flashes we don't need anymore to use #size-cells and #address-cells at the flash node level. Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-7040-db.dts | 4 ---- arch/arm64/boot/dts/marvell/armada-8040-db.dts | 4 ---- 2 files changed, 8 deletions(-) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts index 412efdb46e7c..d20d84ce7ca8 100644 --- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts +++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts @@ -66,8 +66,6 @@ status = "okay"; spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; @@ -169,8 +167,6 @@ status = "okay"; spi-flash@0 { - #address-cells = <0x1>; - #size-cells = <0x1>; compatible = "jedec,spi-nor"; reg = <0x0>; spi-max-frequency = <20000000>; diff --git a/arch/arm64/boot/dts/marvell/armada-8040-db.dts b/arch/arm64/boot/dts/marvell/armada-8040-db.dts index 1bac437369a1..9f4f939ab65f 100644 --- a/arch/arm64/boot/dts/marvell/armada-8040-db.dts +++ b/arch/arm64/boot/dts/marvell/armada-8040-db.dts @@ -81,8 +81,6 @@ status = "okay"; spi-flash@0 { - #address-cells = <1>; - #size-cells = <1>; compatible = "jedec,spi-nor"; reg = <0>; spi-max-frequency = <10000000>; @@ -214,8 +212,6 @@ status = "okay"; spi-flash@0 { - #address-cells = <0x1>; - #size-cells = <0x1>; compatible = "jedec,spi-nor"; reg = <0x0>; spi-max-frequency = <20000000>; -- cgit v1.2.3 From 2ef303f0fe44feee4a3ca8bd62fca86c105927d2 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 8 Jan 2019 17:31:24 +0100 Subject: arm64: dts: marvell: armada-37xx: declare the COMPHY node Describe the A3700 COMPHY node. It has three PHYs that can be configured as follow: * PCIe or GbE * USB3 or GbE * SATA or USB3 Each of them has its own memory area. Suggested-by: Grzegorz Jaszczyk Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 29 ++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index d4542bf10c11..1a1dbeb2d0ae 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -247,6 +247,35 @@ reg = <0x14000 0x60>; }; + comphy: phy@18300 { + compatible = "marvell,comphy-a3700"; + reg = <0x18300 0x300>, + <0x1F000 0x400>, + <0x5C000 0x400>, + <0xe0178 0x8>; + reg-names = "comphy", + "lane1_pcie_gbe", + "lane0_usb3_gbe", + "lane2_sata_usb3"; + #address-cells = <1>; + #size-cells = <0>; + + comphy0: phy@0 { + reg = <0>; + #phy-cells = <1>; + }; + + comphy1: phy@1 { + reg = <1>; + #phy-cells = <1>; + }; + + comphy2: phy@2 { + reg = <2>; + #phy-cells = <1>; + }; + }; + pinctrl_sb: pinctrl@18800 { compatible = "marvell,armada3710-sb-pinctrl", "syscon", "simple-mfd"; -- cgit v1.2.3 From c38e13a2f8162a6d92985908c4a760a23c044dfe Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 8 Jan 2019 17:24:38 +0100 Subject: arm64: dts: marvell: armada-3720-espressobin: declare PCIe PHY The PCIe node is wired to the second PHY of the COMPHY IP. Suggested-by: Grzegorz Jaszczyk Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts index 67fa84bf8686..d17fd5600c55 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts @@ -46,6 +46,7 @@ /* J9 */ &pcie0 { status = "okay"; + phys = <&comphy1 0>; pinctrl-names = "default"; pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>; }; -- cgit v1.2.3 From 8e18c8e58da644018a6217dac5eaa0af8d0f390c Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 4 Dec 2018 20:28:31 +0100 Subject: arm64: dts: marvell: armada-3720-espressobin: declare SATA PHY property The SATA node is wired to the third PHY of the COMPHY IP. Suggested-by: Grzegorz Jaszczyk Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts index d17fd5600c55..6be019e1888e 100644 --- a/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts +++ b/arch/arm64/boot/dts/marvell/armada-3720-espressobin.dts @@ -54,6 +54,8 @@ /* J6 */ &sata { status = "okay"; + phys = <&comphy2 0>; + phy-names = "sata-phy"; }; /* J1 */ -- cgit v1.2.3 From bd3d25b0734284dcf603173d54232c538eb6e385 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Tue, 29 Jan 2019 10:36:35 +0100 Subject: arm64: dts: marvell: armada-37xx: link USB hosts with their PHYs Reference the PHY nodes from the USB controller nodes. The USB3 host controller is wired to: * the first PHY of the COMPHY IP * the OTG-capable UTMI PHY The USB2 host controller is wired to: * the host-only UTMI PHY Signed-off-by: Miquel Raynal Signed-off-by: Gregory CLEMENT --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm64/boot/dts/marvell') diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 1a1dbeb2d0ae..159c83a90b82 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -351,6 +351,8 @@ marvell,usb-misc-reg = <&usb32_syscon>; interrupts = ; clocks = <&sb_periph_clk 12>; + phys = <&comphy0 0>, <&usb2_utmi_otg_phy>; + phy-names = "usb3-phy", "usb2-utmi-otg-phy"; status = "disabled"; }; @@ -372,6 +374,8 @@ reg = <0x5e000 0x1000>; marvell,usb-misc-reg = <&usb2_syscon>; interrupts = ; + phys = <&usb2_utmi_host_phy>; + phy-names = "usb2-utmi-host-phy"; status = "disabled"; }; -- cgit v1.2.3