From 35ddf7c003f54fc9878a15384beb9a900d40319d Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Mon, 2 Aug 2010 14:21:39 +0300 Subject: omap: Add back UART MDR1 check into uncompress.h Recent DEBUG_LL and uncompress.h changes removed the check_port() as pointed out by Cory Maccarrone . This causes some boards to not boot, so add back the MDR1 register check. The MDR1 register tells the mode of omap uart. Based on an earlier patch by Cory Maccarrone . Tested-by: Cory Maccarrone Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/include/plat/uncompress.h | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/include/plat/uncompress.h b/arch/arm/plat-omap/include/plat/uncompress.h index bbedd71943f6..ddf723be48dc 100644 --- a/arch/arm/plat-omap/include/plat/uncompress.h +++ b/arch/arm/plat-omap/include/plat/uncompress.h @@ -25,6 +25,8 @@ #include +#define MDR1_MODE_MASK 0x07 + static volatile u8 *uart_base; static int uart_shift; @@ -42,6 +44,10 @@ static void putc(int c) if (!uart_base) return; + /* Check for UART 16x mode */ + if ((uart_base[UART_OMAP_MDR1 << uart_shift] & MDR1_MODE_MASK) != 0) + return; + while (!(uart_base[UART_LSR << uart_shift] & UART_LSR_THRE)) barrier(); uart_base[UART_TX << uart_shift] = c; -- cgit v1.2.3 From 8b8fbd39e20b5db95f8f4b3bda4c9d3fcf8e3afc Mon Sep 17 00:00:00 2001 From: Cory Maccarrone Date: Mon, 2 Aug 2010 14:21:39 +0300 Subject: omap1: omap7xx clocks, mux, serial fixes This change adds in the necessary clocks and mux pins for UART control on omap7xx devices. I also made a change in the serial code to only try and initialize two UARTs in omap_serial_init, as these devices don't have three. Signed-off-by: Cory Maccarrone Signed-off-by: Tony Lindgren --- arch/arm/mach-omap1/clock_data.c | 20 ++++++++++++++++++++ arch/arm/mach-omap1/mux.c | 4 ++++ arch/arm/mach-omap1/serial.c | 7 +++++++ arch/arm/plat-omap/include/plat/mux.h | 4 ++++ 4 files changed, 35 insertions(+) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/mach-omap1/clock_data.c b/arch/arm/mach-omap1/clock_data.c index aa8558adbf1c..9240bc1026a3 100644 --- a/arch/arm/mach-omap1/clock_data.c +++ b/arch/arm/mach-omap1/clock_data.c @@ -478,6 +478,24 @@ static struct clk usb_dc_ck7xx = { .enable_bit = 8, }; +static struct clk uart1_7xx = { + .name = "uart1_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = 9, +}; + +static struct clk uart2_7xx = { + .name = "uart2_ck", + .ops = &clkops_generic, + /* Direct from ULPD, no parent */ + .rate = 12000000, + .enable_reg = OMAP1_IO_ADDRESS(SOFT_REQ_REG), + .enable_bit = 11, +}; + static struct clk mclk_1510 = { .name = "mclk", .ops = &clkops_generic, @@ -620,7 +638,9 @@ static struct omap_clk omap_clks[] = { /* ULPD clocks */ CLK(NULL, "uart1_ck", &uart1_1510, CK_1510 | CK_310), CLK(NULL, "uart1_ck", &uart1_16xx.clk, CK_16XX), + CLK(NULL, "uart1_ck", &uart1_7xx, CK_7XX), CLK(NULL, "uart2_ck", &uart2_ck, CK_16XX | CK_1510 | CK_310), + CLK(NULL, "uart2_ck", &uart2_7xx, CK_7XX), CLK(NULL, "uart3_ck", &uart3_1510, CK_1510 | CK_310), CLK(NULL, "uart3_ck", &uart3_16xx.clk, CK_16XX), CLK(NULL, "usb_clko", &usb_clko, CK_16XX | CK_1510 | CK_310), diff --git a/arch/arm/mach-omap1/mux.c b/arch/arm/mach-omap1/mux.c index 84341377232d..6a9b42f4113f 100644 --- a/arch/arm/mach-omap1/mux.c +++ b/arch/arm/mach-omap1/mux.c @@ -70,6 +70,10 @@ MUX_CFG_7XX("SPI_7XX_3", 6, 13, 4, 12, 1, 0) MUX_CFG_7XX("SPI_7XX_4", 6, 17, 4, 16, 1, 0) MUX_CFG_7XX("SPI_7XX_5", 8, 25, 0, 24, 0, 0) MUX_CFG_7XX("SPI_7XX_6", 9, 5, 0, 4, 0, 0) + +/* UART pins */ +MUX_CFG_7XX("UART_7XX_1", 3, 21, 0, 20, 0, 0) +MUX_CFG_7XX("UART_7XX_2", 8, 1, 6, 0, 0, 0) }; #define OMAP7XX_PINS_SZ ARRAY_SIZE(omap7xx_pins) #else diff --git a/arch/arm/mach-omap1/serial.c b/arch/arm/mach-omap1/serial.c index 349de90194e3..b78d0749f13d 100644 --- a/arch/arm/mach-omap1/serial.c +++ b/arch/arm/mach-omap1/serial.c @@ -122,6 +122,13 @@ void __init omap_serial_init(void) for (i = 0; i < ARRAY_SIZE(serial_platform_data) - 1; i++) { + /* Don't look at UARTs higher than 2 for omap7xx */ + if (cpu_is_omap7xx() && i > 1) { + serial_platform_data[i].membase = NULL; + serial_platform_data[i].mapbase = 0; + continue; + } + /* Static mapping, never released */ serial_platform_data[i].membase = ioremap(serial_platform_data[i].mapbase, SZ_2K); diff --git a/arch/arm/plat-omap/include/plat/mux.h b/arch/arm/plat-omap/include/plat/mux.h index c7472a28ce24..82c374c2f868 100644 --- a/arch/arm/plat-omap/include/plat/mux.h +++ b/arch/arm/plat-omap/include/plat/mux.h @@ -191,6 +191,10 @@ enum omap7xx_index { SPI_7XX_4, SPI_7XX_5, SPI_7XX_6, + + /* UART */ + UART_7XX_1, + UART_7XX_2, }; enum omap1xxx_index { -- cgit v1.2.3 From 72a1179ed41e0fc6bd5eb58e02e8d230eba10e24 Mon Sep 17 00:00:00 2001 From: Samu Onkalo Date: Mon, 2 Aug 2010 14:21:40 +0300 Subject: omap: dma: Support for prefetch in destination synchronizedtransfer Omap DMA controller can prefetch data in advance in case of destination synchronized data transfer. This may increase performance when target HW block doesn't have fifo. Data is waiting for transfer request in DMA fifo instead of read from memory. Signed-off-by: Samu Onkalo Signed-off-by: Tony Lindgren --- arch/arm/plat-omap/dma.c | 11 +++++++---- arch/arm/plat-omap/include/plat/dma.h | 1 + 2 files changed, 8 insertions(+), 4 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c index f7f571e7987e..ec7eddf9e525 100644 --- a/arch/arm/plat-omap/dma.c +++ b/arch/arm/plat-omap/dma.c @@ -290,7 +290,7 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, val = dma_read(CCR(lch)); /* DMA_SYNCHRO_CONTROL_UPPER depends on the channel number */ - val &= ~((3 << 19) | 0x1f); + val &= ~((1 << 23) | (3 << 19) | 0x1f); val |= (dma_trigger & ~0x1f) << 14; val |= dma_trigger & 0x1f; @@ -304,11 +304,14 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count, else val &= ~(1 << 18); - if (src_or_dst_synch) + if (src_or_dst_synch == OMAP_DMA_DST_SYNC_PREFETCH) { + val &= ~(1 << 24); /* dest synch */ + val |= (1 << 23); /* Prefetch */ + } else if (src_or_dst_synch) { val |= 1 << 24; /* source synch */ - else + } else { val &= ~(1 << 24); /* dest synch */ - + } dma_write(val, CCR(lch)); } diff --git a/arch/arm/plat-omap/include/plat/dma.h b/arch/arm/plat-omap/include/plat/dma.h index 02232ca2c37f..af3a03941add 100644 --- a/arch/arm/plat-omap/include/plat/dma.h +++ b/arch/arm/plat-omap/include/plat/dma.h @@ -345,6 +345,7 @@ #define OMAP_DMA_SYNC_BLOCK 0x02 #define OMAP_DMA_SYNC_PACKET 0x03 +#define OMAP_DMA_DST_SYNC_PREFETCH 0x02 #define OMAP_DMA_SRC_SYNC 0x01 #define OMAP_DMA_DST_SYNC 0x00 -- cgit v1.2.3 From ad0c63f1d623ea9d3e0c0521d5ce9cd522c4e1f0 Mon Sep 17 00:00:00 2001 From: "stanley.miao" Date: Mon, 2 Aug 2010 14:21:40 +0300 Subject: OMAP3: AM3505/3517 do not have IO wakeup capability AM3505/3517 doesn't have IO wakeup capability, so we do not need to set the bit OMAP3430_EN_IO and the bit OMAP3430_EN_IO_CHAIN in the register PM_WKEN_WKUP when the system enters suspend state. Tested on AM3517EVM and OMAP3530EVM. Signed-off-by: Stanley.Miao Acked-by: Kevin Hilman Signed-off-by: Tony Lindgren --- arch/arm/mach-omap2/id.c | 2 ++ arch/arm/mach-omap2/pm34xx.c | 7 ++++--- arch/arm/plat-omap/include/plat/cpu.h | 2 ++ 3 files changed, 8 insertions(+), 3 deletions(-) (limited to 'arch/arm/plat-omap/include') diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index c7bf0e1c4d9c..ccaa1ed8e0f1 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -179,6 +179,8 @@ static void __init omap3_check_features(void) OMAP3_CHECK_FEATURE(status, ISP); if (cpu_is_omap3630()) omap3_features |= OMAP3_HAS_192MHZ_CLK; + if (!cpu_is_omap3505() && !cpu_is_omap3517()) + omap3_features |= OMAP3_HAS_IO_WAKEUP; /* * TODO: Get additional info (where applicable) diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index b88737fd6cfe..fb4994ad622e 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -385,8 +385,9 @@ void omap_sram_idle(void) /* Enable IO-PAD and IO-CHAIN wakeups */ per_next_state = pwrdm_read_next_pwrst(per_pwrdm); core_next_state = pwrdm_read_next_pwrst(core_pwrdm); - if (per_next_state < PWRDM_POWER_ON || - core_next_state < PWRDM_POWER_ON) { + if (omap3_has_io_wakeup() && \ + (per_next_state < PWRDM_POWER_ON || + core_next_state < PWRDM_POWER_ON)) { prm_set_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); omap3_enable_io_chain(); } @@ -479,7 +480,7 @@ void omap_sram_idle(void) } /* Disable IO-PAD and IO-CHAIN wakeup */ - if (core_next_state < PWRDM_POWER_ON) { + if (omap3_has_io_wakeup() && core_next_state < PWRDM_POWER_ON) { prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); omap3_disable_io_chain(); } diff --git a/arch/arm/plat-omap/include/plat/cpu.h b/arch/arm/plat-omap/include/plat/cpu.h index 75141742300c..aa2f4f079f57 100644 --- a/arch/arm/plat-omap/include/plat/cpu.h +++ b/arch/arm/plat-omap/include/plat/cpu.h @@ -444,6 +444,7 @@ extern u32 omap3_features; #define OMAP3_HAS_NEON BIT(3) #define OMAP3_HAS_ISP BIT(4) #define OMAP3_HAS_192MHZ_CLK BIT(5) +#define OMAP3_HAS_IO_WAKEUP BIT(6) #define OMAP3_HAS_FEATURE(feat,flag) \ static inline unsigned int omap3_has_ ##feat(void) \ @@ -457,5 +458,6 @@ OMAP3_HAS_FEATURE(iva, IVA) OMAP3_HAS_FEATURE(neon, NEON) OMAP3_HAS_FEATURE(isp, ISP) OMAP3_HAS_FEATURE(192mhz_clk, 192MHZ_CLK) +OMAP3_HAS_FEATURE(io_wakeup, IO_WAKEUP) #endif -- cgit v1.2.3