From 27f3c70874fc1d114e26c807e900fec4b50b1217 Mon Sep 17 00:00:00 2001 From: Magnus Damm Date: Mon, 6 Oct 2014 08:59:20 +0900 Subject: ARM: shmobile: Handle CA7 arch timer delay Update the delay code to include arch timer checks for CA7. From a arch timer availability perspective CA7 should be treated same as CA15. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/timer.c | 23 +++++++++++++++-------- 1 file changed, 15 insertions(+), 8 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/timer.c b/arch/arm/mach-shmobile/timer.c index 87c6be1e79bd..32ee335d2632 100644 --- a/arch/arm/mach-shmobile/timer.c +++ b/arch/arm/mach-shmobile/timer.c @@ -45,6 +45,7 @@ void __init shmobile_init_delay(void) struct device_node *np, *cpus; bool is_a7_a8_a9 = false; bool is_a15 = false; + bool has_arch_timer = false; u32 max_freq = 0; cpus = of_find_node_by_path("/cpus"); @@ -57,12 +58,16 @@ void __init shmobile_init_delay(void) if (!of_property_read_u32(np, "clock-frequency", &freq)) max_freq = max(max_freq, freq); - if (of_device_is_compatible(np, "arm,cortex-a7") || - of_device_is_compatible(np, "arm,cortex-a8") || - of_device_is_compatible(np, "arm,cortex-a9")) + if (of_device_is_compatible(np, "arm,cortex-a8") || + of_device_is_compatible(np, "arm,cortex-a9")) { is_a7_a8_a9 = true; - else if (of_device_is_compatible(np, "arm,cortex-a15")) + } else if (of_device_is_compatible(np, "arm,cortex-a7")) { + is_a7_a8_a9 = true; + has_arch_timer = true; + } else if (of_device_is_compatible(np, "arm,cortex-a15")) { is_a15 = true; + has_arch_timer = true; + } } of_node_put(cpus); @@ -70,10 +75,12 @@ void __init shmobile_init_delay(void) if (!max_freq) return; - if (is_a7_a8_a9) - shmobile_setup_delay_hz(max_freq, 1, 3); - else if (is_a15 && !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) - shmobile_setup_delay_hz(max_freq, 2, 4); + if (!has_arch_timer || !IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) { + if (is_a7_a8_a9) + shmobile_setup_delay_hz(max_freq, 1, 3); + else if (is_a15) + shmobile_setup_delay_hz(max_freq, 2, 4); + } } static void __init shmobile_late_time_init(void) -- cgit v1.2.3 From 27c1bb20d45830a64bf344cc1cb5e0a745e2d206 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 17 Oct 2014 14:22:37 +0200 Subject: ARM: shmobile: sh7372: Add shmobile_init_late() Extend sh7372 SoC machine vector to include shmobile_init_late() so Suspend-to-RAM and CPUIdle are setup as expected. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-sh7372.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index d646c8d12423..769ff008571d 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -1012,6 +1012,7 @@ DT_MACHINE_START(SH7372_DT, "Generic SH7372 (Flattened Device Tree)") .init_irq = sh7372_init_irq, .handle_irq = shmobile_handle_irq_intc, .init_machine = sh7372_add_standard_devices_dt, + .init_late = shmobile_init_late, .dt_compat = sh7372_boards_compat_dt, MACHINE_END -- cgit v1.2.3 From 9ce3fa6816c2fb59d128248c9b0509aef1c5dae7 Mon Sep 17 00:00:00 2001 From: Ulrich Hecht Date: Fri, 12 Sep 2014 10:52:05 +0200 Subject: ARM: shmobile: rcar-gen2: Add CA7 arch_timer initialization for r8a7794 On E2, the arch timer is hooked up to a different clock, and the CA7's arch timer CNTVOFF register must be initialized. Based on work by Hisashi Nakamura. Signed-off-by: Ulrich Hecht Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-rcar-gen2.c | 72 ++++++++++++++++++++++---------- 1 file changed, 49 insertions(+), 23 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-rcar-gen2.c b/arch/arm/mach-shmobile/setup-rcar-gen2.c index 42d5b4308923..7ed92790d13f 100644 --- a/arch/arm/mach-shmobile/setup-rcar-gen2.c +++ b/arch/arm/mach-shmobile/setup-rcar-gen2.c @@ -3,6 +3,7 @@ * * Copyright (C) 2013 Renesas Solutions Corp. * Copyright (C) 2013 Magnus Damm + * Copyright (C) 2014 Ulrich Hecht * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -24,6 +25,7 @@ #include #include #include +#include #include #include #include "common.h" @@ -54,37 +56,61 @@ void __init rcar_gen2_timer_init(void) { #if defined(CONFIG_ARM_ARCH_TIMER) || defined(CONFIG_COMMON_CLK) u32 mode = rcar_gen2_read_mode_pins(); + bool is_e2 = (bool)of_find_compatible_node(NULL, NULL, + "renesas,r8a7794"); #endif #ifdef CONFIG_ARM_ARCH_TIMER void __iomem *base; int extal_mhz = 0; u32 freq; - /* At Linux boot time the r8a7790 arch timer comes up - * with the counter disabled. Moreover, it may also report - * a potentially incorrect fixed 13 MHz frequency. To be - * correct these registers need to be updated to use the - * frequency EXTAL / 2 which can be determined by the MD pins. - */ - - switch (mode & (MD(14) | MD(13))) { - case 0: - extal_mhz = 15; - break; - case MD(13): - extal_mhz = 20; - break; - case MD(14): - extal_mhz = 26; - break; - case MD(13) | MD(14): - extal_mhz = 30; - break; + if (is_e2) { + freq = 260000000 / 8; /* ZS / 8 */ + /* CNTVOFF has to be initialized either from non-secure + * Hypervisor mode or secure Monitor mode with SCR.NS==1. + * If TrustZone is enabled then it should be handled by the + * secure code. + */ + asm volatile( + " cps 0x16\n" + " mrc p15, 0, r1, c1, c1, 0\n" + " orr r0, r1, #1\n" + " mcr p15, 0, r0, c1, c1, 0\n" + " isb\n" + " mov r0, #0\n" + " mcrr p15, 4, r0, r0, c14\n" + " isb\n" + " mcr p15, 0, r1, c1, c1, 0\n" + " isb\n" + " cps 0x13\n" + : : : "r0", "r1"); + } else { + /* At Linux boot time the r8a7790 arch timer comes up + * with the counter disabled. Moreover, it may also report + * a potentially incorrect fixed 13 MHz frequency. To be + * correct these registers need to be updated to use the + * frequency EXTAL / 2 which can be determined by the MD pins. + */ + + switch (mode & (MD(14) | MD(13))) { + case 0: + extal_mhz = 15; + break; + case MD(13): + extal_mhz = 20; + break; + case MD(14): + extal_mhz = 26; + break; + case MD(13) | MD(14): + extal_mhz = 30; + break; + } + + /* The arch timer frequency equals EXTAL / 2 */ + freq = extal_mhz * (1000000 / 2); } - /* The arch timer frequency equals EXTAL / 2 */ - freq = extal_mhz * (1000000 / 2); - /* Remap "armgcnt address map" space */ base = ioremap(0xe6080000, PAGE_SIZE); -- cgit v1.2.3 From 80f643b39346768878317eb04bd4b1deb4551537 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:18:51 +0200 Subject: ARM: shmobile: r8a7740: Add missing A3SP pm domain devices Commit 802a5639aa7041b2 ("ARM: shmobile: r8a7740: add A3SP pm domain support") added the A3SP power domain, but forgot to hook up the IPPMU, DMAC0/1/2, and USBDMAC hardware blocks. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7740.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 8894e1b7ab0e..6992d4013ef0 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -756,6 +756,11 @@ void __init r8a7740_add_standard_devices(void) { "A3SP", &scif7_device }, { "A3SP", &scif8_device }, { "A3SP", &i2c1_device }, + { "A3SP", &ipmmu_device }, + { "A3SP", &dma0_device }, + { "A3SP", &dma1_device }, + { "A3SP", &dma2_device }, + { "A3SP", &usb_dma_device }, }; /* I2C work-around */ -- cgit v1.2.3 From 3b358cb8b7c73304ea2c634afc644cfad37adbdc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:18:52 +0200 Subject: ARM: shmobile: r8a7740: Add missing A4S pm domain devices Commit 8459293c27bcd13a ("ARM: shmobile: r8a7740: add A4S pm domain support") added the A4S power domain, but forgot to hook up the INTCA hardware block. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-r8a7740.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 6992d4013ef0..dbf8a93ccc4f 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -746,6 +746,10 @@ static void r8a7740_i2c_workaround(struct platform_device *pdev) void __init r8a7740_add_standard_devices(void) { static struct pm_domain_device domain_devices[] __initdata = { + { "A4S", &irqpin0_device }, + { "A4S", &irqpin1_device }, + { "A4S", &irqpin2_device }, + { "A4S", &irqpin3_device }, { "A3SP", &scif0_device }, { "A3SP", &scif1_device }, { "A3SP", &scif2_device }, -- cgit v1.2.3 From 4311d9654c66b7cc7147035b8ec74f41ddffa650 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:18:53 +0200 Subject: ARM: shmobile: armadillo800eva legacy: Add missing A3SP pm domain devices MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Commit 802a5639aa7041b2 ("ARM: shmobile: r8a7740: add A3SP pm domain support") added the A3SP power domain, but forgot to hook up the TPU, SDHI0/1, and MMCIF hardware blocks. Note: As the default PM QoS latency constraint for SDHI is only 100 µs (cfr. commit c419e611c3c59c0e ("tmio_mmc / PM: Use PM QoS latency constraint"), while DEFAULT_DEV_LATENCY_NS is 250000, suspend fails with -EBUSY, unless the constraint is increased first to more than 500 µs using e.g. echo 501 > /sys/devices/platform/sh_mobile_sdhi.0/power/pm_qos_resume_latency_us Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-armadillo800eva.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index e70983534403..4bc202dd828a 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -1234,8 +1234,11 @@ static void __init eva_init(void) static struct pm_domain_device domain_devices[] __initdata = { { "A4LC", &lcdc0_device }, { "A4LC", &hdmi_lcdc_device }, + { "A3SP", &pwm_device }, + { "A3SP", &sdhi0_device }, + { "A3SP", &sh_mmcif_device }, }; - struct platform_device *usb = NULL; + struct platform_device *usb = NULL, *sdhi1 = NULL; regulator_register_always_on(0, "fixed-3.3V", fixed3v3_power_consumers, ARRAY_SIZE(fixed3v3_power_consumers), 3300000); @@ -1304,6 +1307,7 @@ static void __init eva_init(void) platform_device_register(&vcc_sdhi1); platform_device_register(&sdhi1_device); + sdhi1 = &sdhi1_device; } @@ -1324,6 +1328,8 @@ static void __init eva_init(void) ARRAY_SIZE(domain_devices)); if (usb) rmobile_add_device_to_domain("A3SP", usb); + if (sdhi1) + rmobile_add_device_to_domain("A3SP", sdhi1); r8a7740_pm_init(); } -- cgit v1.2.3 From 671c522a69fc6fa6960ada4c55bc7186f7d89a3a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:18:54 +0200 Subject: ARM: shmobile: armadillo800eva legacy: Add missing A4S pm domain devices Commit 8459293c27bcd13a ("ARM: shmobile: r8a7740: add A4S pm domain support") added the A4S power domain, but forgot to hook up the GbEther hardware block. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-armadillo800eva.c | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 4bc202dd828a..0aa5bbdbd153 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -1234,6 +1234,7 @@ static void __init eva_init(void) static struct pm_domain_device domain_devices[] __initdata = { { "A4LC", &lcdc0_device }, { "A4LC", &hdmi_lcdc_device }, + { "A4S", &sh_eth_device }, { "A3SP", &pwm_device }, { "A3SP", &sdhi0_device }, { "A3SP", &sh_mmcif_device }, -- cgit v1.2.3 From 995d925058b63f8300b20d458d941a8a1306d8fb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:18:55 +0200 Subject: ARM: shmobile: r8a7740: Add A3RV pm domain support Add support for the A3RV power domain. This domain contains the VPU5F and VCP1 hardware blocks, which are currently not used by any driver. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/pm-r8a7740.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c index e3f146448237..1d916038660d 100644 --- a/arch/arm/mach-shmobile/pm-r8a7740.c +++ b/arch/arm/mach-shmobile/pm-r8a7740.c @@ -36,6 +36,9 @@ static struct rmobile_pm_domain r8a7740_pm_domains[] = { { .genpd.name = "A4LC", .bit_shift = 1, + }, { + .genpd.name = "A3RV", + .bit_shift = 6, }, { .genpd.name = "A4S", .bit_shift = 10, -- cgit v1.2.3 From 92e88fd7793401dc7bc1b5cec93761e83b19b947 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:18:56 +0200 Subject: ARM: shmobile: r8a7740: Add A3SG pm domain support Add support for the A3SG power domain, and hook it up as a subdomain of A4S. This domain contains the SGX540 hardware block, which is currently not used by any driver. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/pm-r8a7740.c | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c index 1d916038660d..932c2a621e81 100644 --- a/arch/arm/mach-shmobile/pm-r8a7740.c +++ b/arch/arm/mach-shmobile/pm-r8a7740.c @@ -51,6 +51,9 @@ static struct rmobile_pm_domain r8a7740_pm_domains[] = { .gov = &pm_domain_always_on_gov, .no_debug = true, .suspend = r8a7740_pd_a3sp_suspend, + }, { + .genpd.name = "A3SG", + .bit_shift = 13, }, }; @@ -58,6 +61,7 @@ void __init r8a7740_init_pm_domains(void) { rmobile_init_domains(r8a7740_pm_domains, ARRAY_SIZE(r8a7740_pm_domains)); pm_genpd_add_subdomain_names("A4S", "A3SP"); + pm_genpd_add_subdomain_names("A4S", "A3SG"); } #endif /* CONFIG_PM && !CONFIG_ARCH_MULTIPLATFORM */ -- cgit v1.2.3 From 77192e1e25a57a519df30015b29c046bd6a769fc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:18:57 +0200 Subject: ARM: shmobile: r8a7740/armadillo legacy: Add A4MP pm domain support Add support for the A4MP power domain, and hook up the HDMI-Link and FSI hardware blocks. This domain also contains the SPU2, FMSI, and BBIF2 hardware blocks, but these are currently not used by any driver. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-armadillo800eva.c | 2 ++ arch/arm/mach-shmobile/pm-r8a7740.c | 3 +++ 2 files changed, 5 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index 0aa5bbdbd153..e06444370a86 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -1234,6 +1234,8 @@ static void __init eva_init(void) static struct pm_domain_device domain_devices[] __initdata = { { "A4LC", &lcdc0_device }, { "A4LC", &hdmi_lcdc_device }, + { "A4MP", &hdmi_device }, + { "A4MP", &fsi_device }, { "A4S", &sh_eth_device }, { "A3SP", &pwm_device }, { "A3SP", &sdhi0_device }, diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c index 932c2a621e81..081a4f9726a0 100644 --- a/arch/arm/mach-shmobile/pm-r8a7740.c +++ b/arch/arm/mach-shmobile/pm-r8a7740.c @@ -36,6 +36,9 @@ static struct rmobile_pm_domain r8a7740_pm_domains[] = { { .genpd.name = "A4LC", .bit_shift = 1, + }, { + .genpd.name = "A4MP", + .bit_shift = 2, }, { .genpd.name = "A3RV", .bit_shift = 6, -- cgit v1.2.3 From 7e81f5434db5bbef3ac55d3f44f702566c0323c6 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:18:58 +0200 Subject: ARM: shmobile: r8a7740: Add D4 pm domain support Add support for the D4 power domain. This domain contains the Coresight-ETM hardware block. As long as the ARM debug/perf code doesn't use resource management with runtime PM support, the D4 power domain must be kept powered to avoid a crash during resume from s2ram (dbg_cpu_pm_notify() calls reset_ctrl_regs() unconditionally, causing an undefined instruction oops). Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/pm-r8a7740.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c index 081a4f9726a0..8b1af2a585ab 100644 --- a/arch/arm/mach-shmobile/pm-r8a7740.c +++ b/arch/arm/mach-shmobile/pm-r8a7740.c @@ -32,6 +32,16 @@ static int r8a7740_pd_a3sp_suspend(void) return console_suspend_enabled ? 0 : -EBUSY; } +static int r8a7740_pd_d4_suspend(void) +{ + /* + * The D4 domain contains the Coresight-ETM hardware block and + * therefore it should only be turned off if the debug module is + * not in use. + */ + return -EBUSY; +} + static struct rmobile_pm_domain r8a7740_pm_domains[] = { { .genpd.name = "A4LC", @@ -39,6 +49,11 @@ static struct rmobile_pm_domain r8a7740_pm_domains[] = { }, { .genpd.name = "A4MP", .bit_shift = 2, + }, { + .genpd.name = "D4", + .bit_shift = 3, + .gov = &pm_domain_always_on_gov, + .suspend = r8a7740_pd_d4_suspend, }, { .genpd.name = "A3RV", .bit_shift = 6, -- cgit v1.2.3 From 1618a677046b0391621708734f56886233210047 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:18:59 +0200 Subject: ARM: shmobile: r8a7740/armadillo legacy: Add A4R pm domain support Add support for the A4R power domain, and hook up the A3RV subdomain, and the CEU0, TMU0, and IIC0 hardware blocks. This domain also contains the Realtime CPU (SH-4A), Realtime CPU debug modules, H-UDI, RT-SHwy, INTCS, RT-HPB, VIO6C, JPU, RTDMAC1/2, SSP, MSIOF0, CMT0, ICB, DREQPAK (RT), 2DDMAC, IPMMUI, and 2DG hardware blocks, but these are currently not used by any driver. Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-armadillo800eva.c | 1 + arch/arm/mach-shmobile/pm-r8a7740.c | 4 ++++ arch/arm/mach-shmobile/setup-r8a7740.c | 2 ++ 3 files changed, 7 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/board-armadillo800eva.c b/arch/arm/mach-shmobile/board-armadillo800eva.c index e06444370a86..25813dac77d9 100644 --- a/arch/arm/mach-shmobile/board-armadillo800eva.c +++ b/arch/arm/mach-shmobile/board-armadillo800eva.c @@ -1236,6 +1236,7 @@ static void __init eva_init(void) { "A4LC", &hdmi_lcdc_device }, { "A4MP", &hdmi_device }, { "A4MP", &fsi_device }, + { "A4R", &ceu0_device }, { "A4S", &sh_eth_device }, { "A3SP", &pwm_device }, { "A3SP", &sdhi0_device }, diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c index 8b1af2a585ab..74e6a67a28d3 100644 --- a/arch/arm/mach-shmobile/pm-r8a7740.c +++ b/arch/arm/mach-shmobile/pm-r8a7740.c @@ -54,6 +54,9 @@ static struct rmobile_pm_domain r8a7740_pm_domains[] = { .bit_shift = 3, .gov = &pm_domain_always_on_gov, .suspend = r8a7740_pd_d4_suspend, + }, { + .genpd.name = "A4R", + .bit_shift = 5, }, { .genpd.name = "A3RV", .bit_shift = 6, @@ -78,6 +81,7 @@ static struct rmobile_pm_domain r8a7740_pm_domains[] = { void __init r8a7740_init_pm_domains(void) { rmobile_init_domains(r8a7740_pm_domains, ARRAY_SIZE(r8a7740_pm_domains)); + pm_genpd_add_subdomain_names("A4R", "A3RV"); pm_genpd_add_subdomain_names("A4S", "A3SP"); pm_genpd_add_subdomain_names("A4S", "A3SG"); } diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index dbf8a93ccc4f..b77c226ab891 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -746,6 +746,8 @@ static void r8a7740_i2c_workaround(struct platform_device *pdev) void __init r8a7740_add_standard_devices(void) { static struct pm_domain_device domain_devices[] __initdata = { + { "A4R", &tmu0_device }, + { "A4R", &i2c0_device }, { "A4S", &irqpin0_device }, { "A4S", &irqpin1_device }, { "A4S", &irqpin2_device }, -- cgit v1.2.3 From 4ee7830c3ef9224bd078abe41a33c7396f827078 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:19:00 +0200 Subject: ARM: shmobile: r8a7740: Add A4SU pm domain support Add support for the A4SU power domain. This domain contains the USBPHY hardware block, which is currently not used by any driver. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/pm-r8a7740.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c index 74e6a67a28d3..27117a8a49ad 100644 --- a/arch/arm/mach-shmobile/pm-r8a7740.c +++ b/arch/arm/mach-shmobile/pm-r8a7740.c @@ -75,6 +75,9 @@ static struct rmobile_pm_domain r8a7740_pm_domains[] = { }, { .genpd.name = "A3SG", .bit_shift = 13, + }, { + .genpd.name = "A4SU", + .bit_shift = 20, }, }; -- cgit v1.2.3 From dc4470e177973feedd82596969d86468a1695b1e Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 23 Oct 2014 13:19:01 +0200 Subject: ARM: shmobile: r8a7740: Add A3SM pm domain support Add support for the A3SM power domain, and hook it up as a subdomain of A4S. This domain contains the System CPU (Cortex-A9) hardware block. Hence move the special CPU handling from A4S to A3SM. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/pm-r8a7740.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/pm-r8a7740.c b/arch/arm/mach-shmobile/pm-r8a7740.c index 27117a8a49ad..ac2eecd6f5ea 100644 --- a/arch/arm/mach-shmobile/pm-r8a7740.c +++ b/arch/arm/mach-shmobile/pm-r8a7740.c @@ -14,10 +14,10 @@ #include "pm-rmobile.h" #if defined(CONFIG_PM) && !defined(CONFIG_ARCH_MULTIPLATFORM) -static int r8a7740_pd_a4s_suspend(void) +static int r8a7740_pd_a3sm_suspend(void) { /* - * The A4S domain contains the CPU core and therefore it should + * The A3SM domain contains the CPU core and therefore it should * only be turned off if the CPU is not in use. */ return -EBUSY; @@ -63,15 +63,18 @@ static struct rmobile_pm_domain r8a7740_pm_domains[] = { }, { .genpd.name = "A4S", .bit_shift = 10, - .gov = &pm_domain_always_on_gov, .no_debug = true, - .suspend = r8a7740_pd_a4s_suspend, }, { .genpd.name = "A3SP", .bit_shift = 11, .gov = &pm_domain_always_on_gov, .no_debug = true, .suspend = r8a7740_pd_a3sp_suspend, + }, { + .genpd.name = "A3SM", + .bit_shift = 12, + .gov = &pm_domain_always_on_gov, + .suspend = r8a7740_pd_a3sm_suspend, }, { .genpd.name = "A3SG", .bit_shift = 13, @@ -86,6 +89,7 @@ void __init r8a7740_init_pm_domains(void) rmobile_init_domains(r8a7740_pm_domains, ARRAY_SIZE(r8a7740_pm_domains)); pm_genpd_add_subdomain_names("A4R", "A3RV"); pm_genpd_add_subdomain_names("A4S", "A3SP"); + pm_genpd_add_subdomain_names("A4S", "A3SM"); pm_genpd_add_subdomain_names("A4S", "A3SG"); } #endif /* CONFIG_PM && !CONFIG_ARCH_MULTIPLATFORM */ -- cgit v1.2.3 From 3794705aeb318c431c07072f04380c78cc5a84ac Mon Sep 17 00:00:00 2001 From: Laurent Pinchart Date: Thu, 23 Oct 2014 17:38:31 +0300 Subject: ARM: shmobile: Select CONFIG_ZONE_DMA when CONFIG_ARM_LPAE is enabled Most IP cores on ARM Renesas platforms can only address 32 bits of physical memory for DMA. Without CONFIG_ZONE_DMA enabled and with the recent CMA highmem allocation support, the default CMA zone is reserved above the 4GiB limit when LPAE is enabled, resulting in various driver failures. Fix the problem by selecting CONFIG_ZONE_DMA. Other options to investigate in the future would be to either enable IOMMU support or use custom CMA reservations for peripherals not supporting LPAE. While not a strict dependency, the "[PATCH 0/4] Low/high memory CMA reservation fixes" series is also required to fix a different but related CMA allocation problem. Signed-off-by: Laurent Pinchart Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 21f457b56c01..6bc018fc5dc1 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -1,5 +1,6 @@ config ARCH_SHMOBILE bool + select ZONE_DMA if ARM_LPAE config PM_RCAR bool -- cgit v1.2.3 From a8d2ff39c7c4a5ce50df2a47d5f8523810dd4c29 Mon Sep 17 00:00:00 2001 From: Hisashi Nakamura Date: Fri, 24 Oct 2014 17:33:08 +0900 Subject: ARM: shmobile: Separate APMU resource data into CPU dependant part APMU resources are not common to all R-Car SoCs so don't share this data. A subsequent patch will correct the CPU cores for the r8a7791. Signed-off-by: Hisashi Nakamura Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/common.h | 5 ----- arch/arm/mach-shmobile/platsmp-apmu.c | 27 +++++++++------------------ arch/arm/mach-shmobile/platsmp-apmu.h | 32 ++++++++++++++++++++++++++++++++ arch/arm/mach-shmobile/smp-r8a7790.c | 16 +++++++++++++++- arch/arm/mach-shmobile/smp-r8a7791.c | 16 +++++++++++++++- 5 files changed, 71 insertions(+), 25 deletions(-) create mode 100644 arch/arm/mach-shmobile/platsmp-apmu.h (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/common.h b/arch/arm/mach-shmobile/common.h index 72087c79ad7b..309025efd4cf 100644 --- a/arch/arm/mach-shmobile/common.h +++ b/arch/arm/mach-shmobile/common.h @@ -19,11 +19,6 @@ extern void shmobile_boot_scu(void); extern void shmobile_smp_scu_prepare_cpus(unsigned int max_cpus); extern void shmobile_smp_scu_cpu_die(unsigned int cpu); extern int shmobile_smp_scu_cpu_kill(unsigned int cpu); -extern void shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus); -extern int shmobile_smp_apmu_boot_secondary(unsigned int cpu, - struct task_struct *idle); -extern void shmobile_smp_apmu_cpu_die(unsigned int cpu); -extern int shmobile_smp_apmu_cpu_kill(unsigned int cpu); struct clk; extern int shmobile_clk_init(void); extern void shmobile_handle_irq_intc(struct pt_regs *); diff --git a/arch/arm/mach-shmobile/platsmp-apmu.c b/arch/arm/mach-shmobile/platsmp-apmu.c index 2c06810d3a70..f483b560b066 100644 --- a/arch/arm/mach-shmobile/platsmp-apmu.c +++ b/arch/arm/mach-shmobile/platsmp-apmu.c @@ -1,6 +1,7 @@ /* * SMP support for SoCs with APMU * + * Copyright (C) 2014 Renesas Electronics Corporation * Copyright (C) 2013 Magnus Damm * * This program is free software; you can redistribute it and/or modify @@ -22,6 +23,7 @@ #include #include #include "common.h" +#include "platsmp-apmu.h" static struct { void __iomem *iomem; @@ -83,28 +85,15 @@ static void apmu_init_cpu(struct resource *res, int cpu, int bit) pr_debug("apmu ioremap %d %d %pr\n", cpu, bit, res); } -static struct { - struct resource iomem; - int cpus[4]; -} apmu_config[] = { - { - .iomem = DEFINE_RES_MEM(0xe6152000, 0x88), - .cpus = { 0, 1, 2, 3 }, - }, - { - .iomem = DEFINE_RES_MEM(0xe6151000, 0x88), - .cpus = { 0x100, 0x101, 0x102, 0x103 }, - } -}; - -static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit)) +static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit), + struct rcar_apmu_config *apmu_config, int num) { u32 id; int k; int bit, index; bool is_allowed; - for (k = 0; k < ARRAY_SIZE(apmu_config); k++) { + for (k = 0; k < num; k++) { /* only enable the cluster that includes the boot CPU */ is_allowed = false; for (bit = 0; bit < ARRAY_SIZE(apmu_config[k].cpus); bit++) { @@ -128,14 +117,16 @@ static void apmu_parse_cfg(void (*fn)(struct resource *res, int cpu, int bit)) } } -void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus) +void __init shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus, + struct rcar_apmu_config *apmu_config, + int num) { /* install boot code shared by all CPUs */ shmobile_boot_fn = virt_to_phys(shmobile_smp_boot); shmobile_boot_arg = MPIDR_HWID_BITMASK; /* perform per-cpu setup */ - apmu_parse_cfg(apmu_init_cpu); + apmu_parse_cfg(apmu_init_cpu, apmu_config, num); } #ifdef CONFIG_SMP diff --git a/arch/arm/mach-shmobile/platsmp-apmu.h b/arch/arm/mach-shmobile/platsmp-apmu.h new file mode 100644 index 000000000000..76512c9a2545 --- /dev/null +++ b/arch/arm/mach-shmobile/platsmp-apmu.h @@ -0,0 +1,32 @@ +/* + * rmobile apmu definition + * + * Copyright (C) 2014 Renesas Electronics Corporation + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef PLATSMP_APMU_H +#define PLATSMP_APMU_H + +struct rcar_apmu_config { + struct resource iomem; + int cpus[4]; +}; + +extern void shmobile_smp_apmu_prepare_cpus(unsigned int max_cpus, + struct rcar_apmu_config *apmu_config, + int num); +extern int shmobile_smp_apmu_boot_secondary(unsigned int cpu, + struct task_struct *idle); +extern void shmobile_smp_apmu_cpu_die(unsigned int cpu); +extern int shmobile_smp_apmu_cpu_kill(unsigned int cpu); + +#endif /* PLATSMP_APMU_H */ diff --git a/arch/arm/mach-shmobile/smp-r8a7790.c b/arch/arm/mach-shmobile/smp-r8a7790.c index 2311694636e1..9c3da1345b8b 100644 --- a/arch/arm/mach-shmobile/smp-r8a7790.c +++ b/arch/arm/mach-shmobile/smp-r8a7790.c @@ -21,6 +21,7 @@ #include #include "common.h" +#include "platsmp-apmu.h" #include "pm-rcar.h" #include "r8a7790.h" @@ -34,10 +35,23 @@ static struct rcar_sysc_ch r8a7790_ca7_scu = { .isr_bit = 21, /* CA7-SCU */ }; +static struct rcar_apmu_config r8a7790_apmu_config[] = { + { + .iomem = DEFINE_RES_MEM(0xe6152000, 0x88), + .cpus = { 0, 1, 2, 3 }, + }, + { + .iomem = DEFINE_RES_MEM(0xe6151000, 0x88), + .cpus = { 0x100, 0x0101, 0x102, 0x103 }, + } +}; + static void __init r8a7790_smp_prepare_cpus(unsigned int max_cpus) { /* let APMU code install data related to shmobile_boot_vector */ - shmobile_smp_apmu_prepare_cpus(max_cpus); + shmobile_smp_apmu_prepare_cpus(max_cpus, + r8a7790_apmu_config, + ARRAY_SIZE(r8a7790_apmu_config)); /* turn on power to SCU */ r8a7790_pm_init(); diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index f743386166fb..96e392c2573c 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -21,13 +21,27 @@ #include #include "common.h" +#include "platsmp-apmu.h" #include "r8a7791.h" #include "rcar-gen2.h" +static struct rcar_apmu_config r8a7791_apmu_config[] = { + { + .iomem = DEFINE_RES_MEM(0xe6152000, 0x88), + .cpus = { 0, 1, 2, 3 }, + }, + { + .iomem = DEFINE_RES_MEM(0xe6151000, 0x88), + .cpus = { 0x100, 0x0101, 0x102, 0x103 }, + } +}; + static void __init r8a7791_smp_prepare_cpus(unsigned int max_cpus) { /* let APMU code install data related to shmobile_boot_vector */ - shmobile_smp_apmu_prepare_cpus(max_cpus); + shmobile_smp_apmu_prepare_cpus(max_cpus, + r8a7791_apmu_config, + ARRAY_SIZE(r8a7791_apmu_config)); r8a7791_pm_init(); } -- cgit v1.2.3 From 7466c52e1706d98392b6a4650b04e94f39f3a794 Mon Sep 17 00:00:00 2001 From: Hisashi Nakamura Date: Fri, 24 Oct 2014 17:33:09 +0900 Subject: ARM: shmobile: r8a7791: Correct number of CPU cores The r8a7791 only has 2 CPU CA15 cores, not 4 CA15 and 4 CA7 cores. Signed-off-by: Hisashi Nakamura Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/smp-r8a7791.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/smp-r8a7791.c b/arch/arm/mach-shmobile/smp-r8a7791.c index 96e392c2573c..7e49e0a52e32 100644 --- a/arch/arm/mach-shmobile/smp-r8a7791.c +++ b/arch/arm/mach-shmobile/smp-r8a7791.c @@ -28,11 +28,7 @@ static struct rcar_apmu_config r8a7791_apmu_config[] = { { .iomem = DEFINE_RES_MEM(0xe6152000, 0x88), - .cpus = { 0, 1, 2, 3 }, - }, - { - .iomem = DEFINE_RES_MEM(0xe6151000, 0x88), - .cpus = { 0x100, 0x0101, 0x102, 0x103 }, + .cpus = { 0, 1 }, } }; -- cgit v1.2.3 From 950a3f0e7dd32c372c9957d5c050b08de7ec9e56 Mon Sep 17 00:00:00 2001 From: Phil Edworthy Date: Tue, 4 Nov 2014 17:38:28 +0000 Subject: ARM: shmobile: Enable PCI domains for R-Car Gen2 devices The PCI core will soon automatically handle the PCI domain number, allowing the internal PCI and external PCIe bridges work at the same time. In order for that to work, we need to enable PCI_DOMAINS. Signed-off-by: Phil Edworthy Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Kconfig | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/Kconfig b/arch/arm/mach-shmobile/Kconfig index 6bc018fc5dc1..b0a9e1a7955a 100644 --- a/arch/arm/mach-shmobile/Kconfig +++ b/arch/arm/mach-shmobile/Kconfig @@ -19,6 +19,7 @@ config ARCH_RCAR_GEN2 select PM_RCAR if PM || SMP select RENESAS_IRQC select SYS_SUPPORTS_SH_CMT + select PCI_DOMAINS if PCI config ARCH_RMOBILE bool -- cgit v1.2.3 From 534547c036afad3f23d49d8352896f5d05709685 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 7 Nov 2014 14:46:32 +0100 Subject: ARM: shmobile: kzm9g-reference: Add restart callback Port the sh73a0 restart handling from the kzm9g-legacy board code to the kzm9g-reference board code. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/board-kzm9g-reference.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/board-kzm9g-reference.c b/arch/arm/mach-shmobile/board-kzm9g-reference.c index d9cdf9a97e23..0e1de7455c5c 100644 --- a/arch/arm/mach-shmobile/board-kzm9g-reference.c +++ b/arch/arm/mach-shmobile/board-kzm9g-reference.c @@ -43,6 +43,13 @@ static void __init kzm_init(void) #endif } +#define RESCNT2 IOMEM(0xe6188020) +static void kzm9g_restart(enum reboot_mode mode, const char *cmd) +{ + /* Do soft power on reset */ + writel((1 << 31), RESCNT2); +} + static const char *kzm9g_boards_compat_dt[] __initdata = { "renesas,kzm9g-reference", NULL, @@ -54,5 +61,6 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g-reference") .init_early = shmobile_init_delay, .init_machine = kzm_init, .init_late = shmobile_init_late, + .restart = kzm9g_restart, .dt_compat = kzm9g_boards_compat_dt, MACHINE_END -- cgit v1.2.3 From cad900819fba01760833c6c6ed89f464f9c93690 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 7 Nov 2014 14:46:33 +0100 Subject: ARM: shmobile: sh73a0: Add restart callback Port the sh73a0 restart handling from the kzm9g-legacy board code to the generic sh73a0 code. Signed-off-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/setup-sh73a0.c | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index b7bd8e509668..3447ca7e90d9 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -775,6 +775,13 @@ void __init sh73a0_add_standard_devices_dt(void) of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); } +#define RESCNT2 IOMEM(0xe6188020) +static void sh73a0_restart(enum reboot_mode mode, const char *cmd) +{ + /* Do soft power on reset */ + writel((1 << 31), RESCNT2); +} + static const char *sh73a0_boards_compat_dt[] __initdata = { "renesas,sh73a0", NULL, @@ -786,6 +793,7 @@ DT_MACHINE_START(SH73A0_DT, "Generic SH73A0 (Flattened Device Tree)") .init_early = sh73a0_init_delay, .init_machine = sh73a0_add_standard_devices_dt, .init_late = shmobile_init_late, + .restart = sh73a0_restart, .dt_compat = sh73a0_boards_compat_dt, MACHINE_END #endif /* CONFIG_USE_OF */ -- cgit v1.2.3 From e3d163329753b3b473f40c9be71561ed8eb98aea Mon Sep 17 00:00:00 2001 From: Arnd Bergmann Date: Tue, 11 Nov 2014 16:36:50 +0100 Subject: ARM: shmobile: always build rcar setup for armv7 In a combined ARMv6/v7 kernel, the setup-rcar-gen2.c cannot currently be compiled correctly because it uses the isb instruction that is not available on ARMv6. Adding the -march=armv7-a flag lets the compiler know that it is safe to build this file for ARMv7. Signed-off-by: Arnd Bergmann Acked-by: Geert Uytterhoeven Signed-off-by: Simon Horman --- arch/arm/mach-shmobile/Makefile | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/mach-shmobile') diff --git a/arch/arm/mach-shmobile/Makefile b/arch/arm/mach-shmobile/Makefile index e20f2786ec72..71e68ca56886 100644 --- a/arch/arm/mach-shmobile/Makefile +++ b/arch/arm/mach-shmobile/Makefile @@ -36,6 +36,7 @@ cpu-y := platsmp.o headsmp.o # Shared SoC family objects obj-$(CONFIG_ARCH_RCAR_GEN2) += setup-rcar-gen2.o platsmp-apmu.o $(cpu-y) +CFLAGS_setup-rcar-gen2.o += -march=armv7-a # SMP objects smp-y := $(cpu-y) -- cgit v1.2.3 From 7a2071c58f36450fbf44a27d2e5d371c18534a25 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 14 Nov 2014 16:49:47 +0100 Subject: ARM: shmobile: Add early debugging support using SCIF(A) Add serial port debug macros for the SCIF(A) serial ports. This includes all supported shmobile SoCs, except for EMEV2. The configuration logic (both Kconfig and #ifdef) is more complicated than one would expect, for several reasons: 1. Not all SoCs have the same serial devices, and they're not always at the same addresses. 2. There are two different types: SCIF and SCIFA. Fortunately they can easily be distinguished by physical address. 3. Not all boards use the same serial port for the console. The defaults correspond to the boards that are supported in mainline. If you want to use a different serial port, just change the value of CONFIG_DEBUG_UART_PHYS, and the rest will auto-adapt. 4. debug_ll_io_init() maps the SCIF(A) registers to a fixed virtual address. 0xfdxxxxxx was chosen, as it should lie below VMALLOC_END = 0xff000000, and must not conflict with the 2 MiB reserved region at PCI_IO_VIRT_BASE = 0xfee00000. - On SoCs not using the legacy machine_desc.map_io(), debug_ll_io_init() is called by the ARM core code. - On SoCs using the legacy machine_desc.map_io(), debug_ll_io_init() must be called explicitly. Calls are added for r8a7740, r8a7779, sh7372, and sh73a0. This was derived from the r8a7790 version by Laurent Pinchart. Signed-off-by: Geert Uytterhoeven Acked-by: Laurent Pinchart Acked-by: Arnd Bergmann Tested-by: Simon Horman Signed-off-by: Simon Horman --- MAINTAINERS | 1 + arch/arm/Kconfig.debug | 80 +++++++++++++++++++++++++++++++++- arch/arm/include/debug/renesas-scif.S | 52 ++++++++++++++++++++++ arch/arm/mach-shmobile/setup-r8a7740.c | 1 + arch/arm/mach-shmobile/setup-r8a7779.c | 1 + arch/arm/mach-shmobile/setup-sh7372.c | 1 + arch/arm/mach-shmobile/setup-sh73a0.c | 1 + 7 files changed, 136 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/debug/renesas-scif.S (limited to 'arch/arm/mach-shmobile') diff --git a/MAINTAINERS b/MAINTAINERS index a20df9bf8ab0..7d843099e9c6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1387,6 +1387,7 @@ F: arch/arm/configs/lager_defconfig F: arch/arm/configs/mackerel_defconfig F: arch/arm/configs/marzen_defconfig F: arch/arm/configs/shmobile_defconfig +F: arch/arm/include/debug/renesas-scif.S F: arch/arm/mach-shmobile/ F: drivers/sh/ diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 03dc4c1a8736..6ac3758f85d8 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -653,6 +653,64 @@ choice Say Y here if you want kernel low-level debugging support on Rockchip RK32xx based platforms. + config DEBUG_R7S72100_SCIF2 + bool "Kernel low-level debugging messages via SCIF2 on R7S72100" + depends on ARCH_R7S72100 + help + Say Y here if you want kernel low-level debugging support + via SCIF2 on Renesas RZ/A1H (R7S72100). + + config DEBUG_RCAR_GEN1_SCIF0 + bool "Kernel low-level debugging messages via SCIF0 on R8A7778" + depends on ARCH_R8A7778 + help + Say Y here if you want kernel low-level debugging support + via SCIF0 on Renesas R-Car M1A (R8A7778). + + config DEBUG_RCAR_GEN1_SCIF2 + bool "Kernel low-level debugging messages via SCIF2 on R8A7779" + depends on ARCH_R8A7779 + help + Say Y here if you want kernel low-level debugging support + via SCIF2 on Renesas R-Car H1 (R8A7779). + + config DEBUG_RCAR_GEN2_SCIF0 + bool "Kernel low-level debugging messages via SCIF0 on R8A7790/R8A7791/R8A7793)" + depends on ARCH_R8A7790 || ARCH_R8A7791 || ARCH_R8A7793 + help + Say Y here if you want kernel low-level debugging support + via SCIF0 on Renesas R-Car H2 (R8A7790), M2-W (R8A7791), or + M2-N (R8A7793). + + config DEBUG_RCAR_GEN2_SCIF2 + bool "Kernel low-level debugging messages via SCIF2 on R8A7794" + depends on ARCH_R8A7794 + help + Say Y here if you want kernel low-level debugging support + via SCIF2 on Renesas R-Car E2 (R8A7794). + + config DEBUG_RMOBILE_SCIFA0 + bool "Kernel low-level debugging messages via SCIFA0 on R8A73A4/SH7372" + depends on ARCH_R8A73A4 || ARCH_SH7372 + help + Say Y here if you want kernel low-level debugging support + via SCIFA0 on Renesas R-Mobile APE6 (R8A73A4) or SH-Mobile + AP4 (SH7372). + + config DEBUG_RMOBILE_SCIFA1 + bool "Kernel low-level debugging messages via SCIFA1 on R8A7740" + depends on ARCH_R8A7740 + help + Say Y here if you want kernel low-level debugging support + via SCIFA1 on Renesas R-Mobile A1 (R8A7740). + + config DEBUG_RMOBILE_SCIFA4 + bool "Kernel low-level debugging messages via SCIFA4 on SH73A0" + depends on ARCH_SH73A0 + help + Say Y here if you want kernel low-level debugging support + via SCIFA4 on Renesas SH-Mobile AG5 (SH73A0). + config DEBUG_S3C_UART0 depends on PLAT_SAMSUNG select DEBUG_EXYNOS_UART if ARCH_EXYNOS @@ -1061,6 +1119,14 @@ config DEBUG_LL_INCLUDE DEBUG_IMX6SX_UART default "debug/msm.S" if DEBUG_MSM_UART || DEBUG_QCOM_UARTDM default "debug/omap2plus.S" if DEBUG_OMAP2PLUS_UART + default "debug/renesas-scif.S" if DEBUG_R7S72100_SCIF2 + default "debug/renesas-scif.S" if DEBUG_RCAR_GEN1_SCIF0 + default "debug/renesas-scif.S" if DEBUG_RCAR_GEN1_SCIF2 + default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF0 + default "debug/renesas-scif.S" if DEBUG_RCAR_GEN2_SCIF2 + default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA0 + default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA1 + default "debug/renesas-scif.S" if DEBUG_RMOBILE_SCIFA4 default "debug/s3c24xx.S" if DEBUG_S3C24XX_UART default "debug/s5pv210.S" if DEBUG_S5PV210_UART default "debug/sirf.S" if DEBUG_SIRFPRIMA2_UART1 || DEBUG_SIRFMARCO_UART1 @@ -1152,6 +1218,12 @@ config DEBUG_UART_PHYS default 0xd4018000 if DEBUG_MMP_UART3 default 0xe0000000 if ARCH_SPEAR13XX default 0xe4007000 if DEBUG_HIP04_UART + default 0xe6c40000 if DEBUG_RMOBILE_SCIFA0 + default 0xe6c50000 if DEBUG_RMOBILE_SCIFA1 + default 0xe6c80000 if DEBUG_RMOBILE_SCIFA4 + default 0xe6e58000 if DEBUG_RCAR_GEN2_SCIF2 + default 0xe6e60000 if DEBUG_RCAR_GEN2_SCIF0 + default 0xe8008000 if DEBUG_R7S72100_SCIF2 default 0xf0000be0 if ARCH_EBSA110 default 0xf1012000 if DEBUG_MVEBU_UART_ALTERNATE default 0xf1012000 if ARCH_DOVE || ARCH_MV78XX0 || \ @@ -1164,13 +1236,19 @@ config DEBUG_UART_PHYS default 0xff690000 if DEBUG_RK32_UART2 default 0xffc02000 if DEBUG_SOCFPGA_UART default 0xffd82340 if ARCH_IOP13XX + default 0xffe40000 if DEBUG_RCAR_GEN1_SCIF0 + default 0xffe42000 if DEBUG_RCAR_GEN1_SCIF2 default 0xfff36000 if DEBUG_HIGHBANK_UART default 0xfffe8600 if DEBUG_UART_BCM63XX default 0xfffff700 if ARCH_IOP33X depends on DEBUG_LL_UART_8250 || DEBUG_LL_UART_PL01X || \ DEBUG_LL_UART_EFM32 || \ DEBUG_UART_8250 || DEBUG_UART_PL01X || DEBUG_MESON_UARTAO || \ - DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_S3C24XX_UART || \ + DEBUG_MSM_UART || DEBUG_QCOM_UARTDM || DEBUG_R7S72100_SCIF2 || \ + DEBUG_RCAR_GEN1_SCIF0 || DEBUG_RCAR_GEN1_SCIF2 || \ + DEBUG_RCAR_GEN2_SCIF0 || DEBUG_RCAR_GEN2_SCIF2 || \ + DEBUG_RMOBILE_SCIFA0 || DEBUG_RMOBILE_SCIFA1 || \ + DEBUG_RMOBILE_SCIFA4 || DEBUG_S3C24XX_UART || \ DEBUG_UART_BCM63XX config DEBUG_UART_VIRT diff --git a/arch/arm/include/debug/renesas-scif.S b/arch/arm/include/debug/renesas-scif.S new file mode 100644 index 000000000000..97820a8df51a --- /dev/null +++ b/arch/arm/include/debug/renesas-scif.S @@ -0,0 +1,52 @@ +/* + * Renesas SCIF(A) debugging macro include header + * + * Based on r8a7790.S + * + * Copyright (C) 2012-2013 Renesas Electronics Corporation + * Copyright (C) 1994-1999 Russell King + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +#define SCIF_PHYS CONFIG_DEBUG_UART_PHYS +#define SCIF_VIRT ((SCIF_PHYS & 0x00ffffff) | 0xfd000000) + +#if CONFIG_DEBUG_UART_PHYS < 0xe6e00000 +/* SCIFA */ +#define FTDR 0x20 +#define FSR 0x14 +#else +/* SCIF */ +#define FTDR 0x0c +#define FSR 0x10 +#endif + +#define TDFE (1 << 5) +#define TEND (1 << 6) + + .macro addruart, rp, rv, tmp + ldr \rp, =SCIF_PHYS + ldr \rv, =SCIF_VIRT + .endm + + .macro waituart, rd, rx +1001: ldrh \rd, [\rx, #FSR] + tst \rd, #TDFE + beq 1001b + .endm + + .macro senduart, rd, rx + strb \rd, [\rx, #FTDR] + ldrh \rd, [\rx, #FSR] + bic \rd, \rd, #TEND + strh \rd, [\rx, #FSR] + .endm + + .macro busyuart, rd, rx +1001: ldrh \rd, [\rx, #FSR] + tst \rd, #TEND + beq 1001b + .endm diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c index 8894e1b7ab0e..0bfe2261c4e7 100644 --- a/arch/arm/mach-shmobile/setup-r8a7740.c +++ b/arch/arm/mach-shmobile/setup-r8a7740.c @@ -71,6 +71,7 @@ static struct map_desc r8a7740_io_desc[] __initdata = { void __init r8a7740_map_io(void) { + debug_ll_io_init(); iotable_init(r8a7740_io_desc, ARRAY_SIZE(r8a7740_io_desc)); } diff --git a/arch/arm/mach-shmobile/setup-r8a7779.c b/arch/arm/mach-shmobile/setup-r8a7779.c index 136078ab9407..434d1504066a 100644 --- a/arch/arm/mach-shmobile/setup-r8a7779.c +++ b/arch/arm/mach-shmobile/setup-r8a7779.c @@ -70,6 +70,7 @@ static struct map_desc r8a7779_io_desc[] __initdata = { void __init r8a7779_map_io(void) { + debug_ll_io_init(); iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc)); } diff --git a/arch/arm/mach-shmobile/setup-sh7372.c b/arch/arm/mach-shmobile/setup-sh7372.c index 769ff008571d..322e2dc3fa36 100644 --- a/arch/arm/mach-shmobile/setup-sh7372.c +++ b/arch/arm/mach-shmobile/setup-sh7372.c @@ -60,6 +60,7 @@ static struct map_desc sh7372_io_desc[] __initdata = { void __init sh7372_map_io(void) { + debug_ll_io_init(); iotable_init(sh7372_io_desc, ARRAY_SIZE(sh7372_io_desc)); } diff --git a/arch/arm/mach-shmobile/setup-sh73a0.c b/arch/arm/mach-shmobile/setup-sh73a0.c index 3447ca7e90d9..fa7cab820ab9 100644 --- a/arch/arm/mach-shmobile/setup-sh73a0.c +++ b/arch/arm/mach-shmobile/setup-sh73a0.c @@ -58,6 +58,7 @@ static struct map_desc sh73a0_io_desc[] __initdata = { void __init sh73a0_map_io(void) { + debug_ll_io_init(); iotable_init(sh73a0_io_desc, ARRAY_SIZE(sh73a0_io_desc)); } -- cgit v1.2.3