From bc9ea6c7f5352f8857525b054bc3df784be1b8d5 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Wed, 16 Dec 2009 17:30:27 +0100 Subject: imx27: define and use MX27_IO_ADDRESS MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: Uwe Kleine-König Cc: Sascha Hauer Cc: Russell King Cc: Rabin Vincent Cc: Javier Martin Cc: Valentin Longchamp Cc: Holger Schurig --- arch/arm/mach-mx2/clock_imx27.c | 4 ++-- arch/arm/mach-mx2/cpu_imx27.c | 3 ++- 2 files changed, 4 insertions(+), 3 deletions(-) (limited to 'arch/arm/mach-mx2') diff --git a/arch/arm/mach-mx2/clock_imx27.c b/arch/arm/mach-mx2/clock_imx27.c index 6db98566a720..bb9f60318fde 100644 --- a/arch/arm/mach-mx2/clock_imx27.c +++ b/arch/arm/mach-mx2/clock_imx27.c @@ -29,7 +29,7 @@ #include #include -#define IO_ADDR_CCM(off) (IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off)) +#define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR) + (off)) /* Register offsets */ #define CCM_CSCR IO_ADDR_CCM(0x0) @@ -757,7 +757,7 @@ int __init mx27_clocks_init(unsigned long fref) clk_enable(&uart1_clk); #endif - mxc_timer_init(&gpt1_clk, IO_ADDRESS(MX27_GPT1_BASE_ADDR), + mxc_timer_init(&gpt1_clk, MX27_IO_ADDRESS(MX27_GPT1_BASE_ADDR), MX27_INT_GPT1); return 0; diff --git a/arch/arm/mach-mx2/cpu_imx27.c b/arch/arm/mach-mx2/cpu_imx27.c index 8c50c5e7c033..d8d3b2d84dc5 100644 --- a/arch/arm/mach-mx2/cpu_imx27.c +++ b/arch/arm/mach-mx2/cpu_imx27.c @@ -39,7 +39,8 @@ static void query_silicon_parameter(void) * the silicon revision very early we read it here to * avoid any further hooks */ - val = __raw_readl(IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR) + SYS_CHIP_ID); + val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR + + SYS_CHIP_ID)); cpu_silicon_rev = (int)(val >> 28); cpu_partnumber = (int)((val >> 12) & 0xFFFF); -- cgit v1.2.3