From a9372a5fb20597a070d89f9402241d9012c0590f Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Thu, 16 May 2019 08:19:37 +0200 Subject: ARM: mmp: add support for MMP3 SoC Similar to MMP2, which this patch is based on. Known differencies from MMP2 are: * Two PJ4B cores instead of one PJ4 * Tauros 3 L2 cache controller instead of Tauros 2 * A GIC interrupt controller optionally used instead of the MMP one * A TWD local timer * Different USB2 PHY * A USB3 SS controller * More interrupt muxes Hard to tell what else is different, because documentation is not available. Signed-off-by: Lubomir Rintel --- arch/arm/mach-mmp/time.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-mmp/time.c') diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c index 3f6fd0be0051..8f4cacbf640e 100644 --- a/arch/arm/mach-mmp/time.c +++ b/arch/arm/mach-mmp/time.c @@ -155,7 +155,8 @@ static void __init timer_config(void) __raw_writel(0x0, mmp_timer_base + TMR_CER); /* disable */ - ccr &= (cpu_is_mmp2()) ? (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : + ccr &= (cpu_is_mmp2() || cpu_is_mmp3()) ? + (TMR_CCR_CS_0(0) | TMR_CCR_CS_1(0)) : (TMR_CCR_CS_0(3) | TMR_CCR_CS_1(3)); __raw_writel(ccr, mmp_timer_base + TMR_CCR); -- cgit v1.2.3