From e95dddb34c896f33e89f97365491e7932f89a0c0 Mon Sep 17 00:00:00 2001
From: Anson Huang <b20788@freescale.com>
Date: Wed, 20 Mar 2013 19:39:42 -0400
Subject: ARM: imx: enable anatop suspend/resume
Anatop module have sereval configurations for user
to reduce the power consumption in suspend, provide
suspend/resume interface for further use and enable
fet_odrive to reduce CORE LDO leakage during suspend.
As we have a common anatop file, remove all the operations
of anatop module in other files, use anatop interfaces to
do that.
Signed-off-by: Anson Huang <b20788@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
arch/arm/mach-imx/mach-imx6q.c | 48 ++++++------------------------------------
1 file changed, 6 insertions(+), 42 deletions(-)
(limited to 'arch/arm/mach-imx/mach-imx6q.c')
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 9ffd103b27e4..31aee4d5fcdd 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -1,5 +1,5 @@
/*
- * Copyright 2011 Freescale Semiconductor, Inc.
+ * Copyright 2011-2013 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*
* The code contained herein is licensed under the GNU General Public
@@ -39,27 +39,12 @@
#include "cpuidle.h"
#include "hardware.h"
-#define IMX6Q_ANALOG_DIGPROG 0x260
-
static int imx6q_revision(void)
{
- struct device_node *np;
- void __iomem *base;
static u32 rev;
- if (!rev) {
- np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
- if (!np)
- return IMX_CHIP_REVISION_UNKNOWN;
- base = of_iomap(np, 0);
- if (!base) {
- of_node_put(np);
- return IMX_CHIP_REVISION_UNKNOWN;
- }
- rev = readl_relaxed(base + IMX6Q_ANALOG_DIGPROG);
- iounmap(base);
- of_node_put(np);
- }
+ if (!rev)
+ rev = imx_anatop_get_digprog();
switch (rev & 0xff) {
case 0:
@@ -165,29 +150,7 @@ static void __init imx6q_1588_init(void)
}
static void __init imx6q_usb_init(void)
{
- struct regmap *anatop;
-
-#define HW_ANADIG_USB1_CHRG_DETECT 0x000001b0
-#define HW_ANADIG_USB2_CHRG_DETECT 0x00000210
-
-#define BM_ANADIG_USB_CHRG_DETECT_EN_B 0x00100000
-#define BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B 0x00080000
-
- anatop = syscon_regmap_lookup_by_compatible("fsl,imx6q-anatop");
- if (!IS_ERR(anatop)) {
- /*
- * The external charger detector needs to be disabled,
- * or the signal at DP will be poor
- */
- regmap_write(anatop, HW_ANADIG_USB1_CHRG_DETECT,
- BM_ANADIG_USB_CHRG_DETECT_EN_B
- | BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
- regmap_write(anatop, HW_ANADIG_USB2_CHRG_DETECT,
- BM_ANADIG_USB_CHRG_DETECT_EN_B |
- BM_ANADIG_USB_CHRG_DETECT_CHK_CHRG_B);
- } else {
- pr_warn("failed to find fsl,imx6q-anatop regmap\n");
- }
+ imx_anatop_usb_chrg_detect_disable();
}
static void __init imx6q_init_machine(void)
@@ -197,9 +160,11 @@ static void __init imx6q_init_machine(void)
of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
+ imx_anatop_init();
imx6q_pm_init();
imx6q_usb_init();
imx6q_1588_init();
+ imx_print_silicon_rev("i.MX6Q", imx6q_revision());
}
#define OCOTP_CFG3 0x440
@@ -293,7 +258,6 @@ static void __init imx6q_timer_init(void)
{
mx6q_clocks_init();
twd_local_timer_of_register();
- imx_print_silicon_rev("i.MX6Q", imx6q_revision());
}
static const char *imx6q_dt_compat[] __initdata = {
--
cgit v1.2.3
From b1a3582dc6f1f85a56b60f688305a5194e266e02 Mon Sep 17 00:00:00 2001
From: Philipp Zabel <p.zabel@pengutronix.de>
Date: Wed, 27 Mar 2013 18:30:37 +0100
Subject: ARM i.MX6q: export imx6q_revision
So it can be used in clk-imx6q.c for revision dependent clock tree setup.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
arch/arm/mach-imx/common.h | 1 +
arch/arm/mach-imx/mach-imx6q.c | 2 +-
2 files changed, 2 insertions(+), 1 deletion(-)
(limited to 'arch/arm/mach-imx/mach-imx6q.c')
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index bcb11b1751d8..4cba7dbb079f 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -74,6 +74,7 @@ extern void mxc_set_cpu_type(unsigned int type);
extern void mxc_restart(char, const char *);
extern void mxc_arch_reset_init(void __iomem *);
extern int mx53_revision(void);
+extern int imx6q_revision(void);
extern int mx53_display_revision(void);
extern void imx_set_aips(void __iomem *);
extern int mxc_device_init(void);
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 31aee4d5fcdd..0af330d7e592 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -39,7 +39,7 @@
#include "cpuidle.h"
#include "hardware.h"
-static int imx6q_revision(void)
+int imx6q_revision(void)
{
static u32 rev;
--
cgit v1.2.3
From 7006ba24c26313631f21fff5a087c971f5c7d2ef Mon Sep 17 00:00:00 2001
From: Shawn Guo <shawn.guo@linaro.org>
Date: Sun, 31 Mar 2013 22:39:22 +0800
Subject: ARM: imx: do not use regmap_read for ANADIG_DIGPROG
Function imx_anatop_get_digprog() that reads register ANADIG_DIGPROG is
called to identify silicon version. Users might query silicon version
earlier than regmap subsystem is ready. For example, imx6q clock driver
query revision in mx6q_clocks_init(), where regmap is not initialized
yet.
Change imx_anatop_get_digprog() to map anatop block and read
ANADIG_DIGPROG in the native way, so that the function can work at very
early stage.
While at it, let's move imx_print_silicon_rev() back to
imx6q_timer_init() to have the message show up a little earlier.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
arch/arm/mach-imx/anatop.c | 15 ++++++++++++---
arch/arm/mach-imx/mach-imx6q.c | 2 +-
2 files changed, 13 insertions(+), 4 deletions(-)
(limited to 'arch/arm/mach-imx/mach-imx6q.c')
diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c
index 472beee9cd98..0cfa07dd9aa4 100644
--- a/arch/arm/mach-imx/anatop.c
+++ b/arch/arm/mach-imx/anatop.c
@@ -78,10 +78,19 @@ void imx_anatop_usb_chrg_detect_disable(void)
u32 imx_anatop_get_digprog(void)
{
- u32 val;
+ struct device_node *np;
+ void __iomem *anatop_base;
+ static u32 digprog;
- regmap_read(anatop, ANADIG_DIGPROG, &val);
- return val;
+ if (digprog)
+ return digprog;
+
+ np = of_find_compatible_node(NULL, NULL, "fsl,imx6q-anatop");
+ anatop_base = of_iomap(np, 0);
+ WARN_ON(!anatop_base);
+ digprog = readl_relaxed(anatop_base + ANADIG_DIGPROG);
+
+ return digprog;
}
void __init imx_anatop_init(void)
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 0af330d7e592..221f31991939 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -164,7 +164,6 @@ static void __init imx6q_init_machine(void)
imx6q_pm_init();
imx6q_usb_init();
imx6q_1588_init();
- imx_print_silicon_rev("i.MX6Q", imx6q_revision());
}
#define OCOTP_CFG3 0x440
@@ -258,6 +257,7 @@ static void __init imx6q_timer_init(void)
{
mx6q_clocks_init();
twd_local_timer_of_register();
+ imx_print_silicon_rev("i.MX6Q", imx6q_revision());
}
static const char *imx6q_dt_compat[] __initdata = {
--
cgit v1.2.3
From 3c03a2fed63881abf5ecb5596625157ecfc9e4eb Mon Sep 17 00:00:00 2001
From: Shawn Guo <shawn.guo@linaro.org>
Date: Mon, 1 Apr 2013 22:13:32 +0800
Subject: ARM: imx: add initial imx6dl support
The i.MX6 DualLite/Solo is another i.MX6 family SoC, which is highly
compatible with i.MX6 Quad/Dual. And that's why we choose to support
it using imx6q code with cpu_is_imx6dl() check when necessary.
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
---
arch/arm/Kconfig.debug | 4 ++--
arch/arm/mach-imx/Kconfig | 2 +-
arch/arm/mach-imx/clk-imx6q.c | 2 +-
arch/arm/mach-imx/mach-imx6q.c | 30 +++++++++++++++++++++---------
arch/arm/mach-imx/mxc.h | 11 +++++++++++
5 files changed, 36 insertions(+), 13 deletions(-)
(limited to 'arch/arm/mach-imx/mach-imx6q.c')
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug
index 9b31f4311ea2..7e911fd4dd89 100644
--- a/arch/arm/Kconfig.debug
+++ b/arch/arm/Kconfig.debug
@@ -234,11 +234,11 @@ choice
on i.MX53.
config DEBUG_IMX6Q_UART
- bool "i.MX6Q Debug UART"
+ bool "i.MX6Q/DL Debug UART"
depends on SOC_IMX6Q
help
Say Y here if you want kernel low-level debugging support
- on i.MX6Q.
+ on i.MX6Q/DL.
config DEBUG_MMP_UART2
bool "Kernel low-level debugging message via MMP UART2"
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 5b676d425bab..2b09a0471d7b 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -790,7 +790,7 @@ config SOC_IMX53
This enables support for Freescale i.MX53 processor.
config SOC_IMX6Q
- bool "i.MX6 Quad support"
+ bool "i.MX6 Quad/DualLite support"
select ARCH_HAS_CPUFREQ
select ARCH_HAS_OPP
select ARM_CPU_SUSPEND if PM
diff --git a/arch/arm/mach-imx/clk-imx6q.c b/arch/arm/mach-imx/clk-imx6q.c
index 43dbcd618be3..151259003086 100644
--- a/arch/arm/mach-imx/clk-imx6q.c
+++ b/arch/arm/mach-imx/clk-imx6q.c
@@ -296,7 +296,7 @@ int __init mx6q_clocks_init(void)
WARN_ON(!base);
/* Audio/video PLL post dividers do not work on i.MX6q revision 1.0 */
- if (imx6q_revision() == IMX_CHIP_REVISION_1_0) {
+ if (cpu_is_imx6q() && imx6q_revision() == IMX_CHIP_REVISION_1_0) {
post_div_table[1].div = 1;
post_div_table[2].div = 1;
video_div_table[1].div = 1;
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 221f31991939..8aa9d9065e8e 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -39,23 +39,32 @@
#include "cpuidle.h"
#include "hardware.h"
+static u32 chip_revision;
+
int imx6q_revision(void)
{
- static u32 rev;
+ return chip_revision;
+}
- if (!rev)
- rev = imx_anatop_get_digprog();
+static void __init imx6q_init_revision(void)
+{
+ u32 rev = imx_anatop_get_digprog();
switch (rev & 0xff) {
case 0:
- return IMX_CHIP_REVISION_1_0;
+ chip_revision = IMX_CHIP_REVISION_1_0;
+ break;
case 1:
- return IMX_CHIP_REVISION_1_1;
+ chip_revision = IMX_CHIP_REVISION_1_1;
+ break;
case 2:
- return IMX_CHIP_REVISION_1_2;
+ chip_revision = IMX_CHIP_REVISION_1_2;
+ break;
default:
- return IMX_CHIP_REVISION_UNKNOWN;
+ chip_revision = IMX_CHIP_REVISION_UNKNOWN;
}
+
+ mxc_set_cpu_type(rev >> 16 & 0xff);
}
void imx6q_restart(char mode, const char *cmd)
@@ -247,6 +256,7 @@ static void __init imx6q_map_io(void)
static void __init imx6q_init_irq(void)
{
+ imx6q_init_revision();
l2x0_of_init(0, ~0UL);
imx_src_init();
imx_gpc_init();
@@ -257,15 +267,17 @@ static void __init imx6q_timer_init(void)
{
mx6q_clocks_init();
twd_local_timer_of_register();
- imx_print_silicon_rev("i.MX6Q", imx6q_revision());
+ imx_print_silicon_rev(cpu_is_imx6dl() ? "i.MX6DL" : "i.MX6Q",
+ imx6q_revision());
}
static const char *imx6q_dt_compat[] __initdata = {
+ "fsl,imx6dl",
"fsl,imx6q",
NULL,
};
-DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad (Device Tree)")
+DT_MACHINE_START(IMX6Q, "Freescale i.MX6 Quad/DualLite (Device Tree)")
.smp = smp_ops(imx_smp_ops),
.map_io = imx6q_map_io,
.init_irq = imx6q_init_irq,
diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h
index 7dce17a9fe6c..8629e5be7ecd 100644
--- a/arch/arm/mach-imx/mxc.h
+++ b/arch/arm/mach-imx/mxc.h
@@ -34,6 +34,8 @@
#define MXC_CPU_MX35 35
#define MXC_CPU_MX51 51
#define MXC_CPU_MX53 53
+#define MXC_CPU_IMX6DL 0x61
+#define MXC_CPU_IMX6Q 0x63
#define IMX_CHIP_REVISION_1_0 0x10
#define IMX_CHIP_REVISION_1_1 0x11
@@ -150,6 +152,15 @@ extern unsigned int __mxc_cpu_type;
#endif
#ifndef __ASSEMBLY__
+static inline bool cpu_is_imx6dl(void)
+{
+ return __mxc_cpu_type == MXC_CPU_IMX6DL;
+}
+
+static inline bool cpu_is_imx6q(void)
+{
+ return __mxc_cpu_type == MXC_CPU_IMX6Q;
+}
struct cpu_op {
u32 cpu_rate;
--
cgit v1.2.3