From 2edb90ae421a0f65edcdef65ef9dd08e3228abbf Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 11 Oct 2013 09:37:45 +0200 Subject: ARM: at91: move at91_pmc.h to include/linux/clk/at91_pmc.h This patch moves at91_pmc.h header from machine specific directory (arch/arm/mach-at91/include/mach/at91_pmc.h) to clk include directory (include/linux/clk/at91_pmc.h). We need this to avoid reference to machine specific headers in clk drivers. Signed-off-by: Boris BREZILLON Acked-by: Felipe Balbi Acked-by: Mike Turquette Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/at91rm9200.c | 2 +- arch/arm/mach-at91/at91sam9260.c | 2 +- arch/arm/mach-at91/at91sam9261.c | 2 +- arch/arm/mach-at91/at91sam9263.c | 2 +- arch/arm/mach-at91/at91sam9g45.c | 2 +- arch/arm/mach-at91/at91sam9n12.c | 2 +- arch/arm/mach-at91/at91sam9rl.c | 2 +- arch/arm/mach-at91/at91sam9x5.c | 2 +- arch/arm/mach-at91/clock.c | 2 +- arch/arm/mach-at91/include/mach/at91_pmc.h | 190 ----------------------------- arch/arm/mach-at91/pm.c | 2 +- arch/arm/mach-at91/pm_slowclock.S | 2 +- arch/arm/mach-at91/sama5d3.c | 2 +- arch/arm/mach-at91/setup.c | 2 +- 14 files changed, 13 insertions(+), 203 deletions(-) delete mode 100644 arch/arm/mach-at91/include/mach/at91_pmc.h (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index 25805f2f6010..e47f5fd232f5 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c @@ -12,13 +12,13 @@ #include #include +#include #include #include #include #include #include -#include #include #include diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index d6a1fa85371d..6c821e562159 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -11,6 +11,7 @@ */ #include +#include #include #include @@ -20,7 +21,6 @@ #include #include #include -#include #include "at91_aic.h" #include "at91_rstc.h" diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 23ba1d8a1531..6276b4c1acfe 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -11,6 +11,7 @@ */ #include +#include #include #include @@ -19,7 +20,6 @@ #include #include #include -#include #include "at91_aic.h" #include "at91_rstc.h" diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 7eccb0fc57bc..37b90f4b990c 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -11,6 +11,7 @@ */ #include +#include #include #include @@ -18,7 +19,6 @@ #include #include #include -#include #include "at91_aic.h" #include "at91_rstc.h" diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 9405aa08b104..2f455ce35268 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -12,13 +12,13 @@ #include #include +#include #include #include #include #include #include -#include #include #include "at91_aic.h" diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c index 388ec3aec4b9..4ef088c62eab 100644 --- a/arch/arm/mach-at91/at91sam9n12.c +++ b/arch/arm/mach-at91/at91sam9n12.c @@ -8,12 +8,12 @@ #include #include +#include #include #include #include #include -#include #include #include "board.h" diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 0750ffb7e6b1..3651517abedf 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -10,6 +10,7 @@ */ #include +#include #include #include @@ -19,7 +20,6 @@ #include #include #include -#include #include "at91_aic.h" #include "at91_rstc.h" diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index e8a2e075a1b8..3e8ec26e39dc 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -8,12 +8,12 @@ #include #include +#include #include #include #include #include -#include #include #include "board.h" diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 6b2630a92f71..5f02aea1021c 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -24,9 +24,9 @@ #include #include #include +#include #include -#include #include #include diff --git a/arch/arm/mach-at91/include/mach/at91_pmc.h b/arch/arm/mach-at91/include/mach/at91_pmc.h deleted file mode 100644 index c604cc69acb5..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_pmc.h +++ /dev/null @@ -1,190 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_pmc.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Power Management Controller (PMC) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PMC_H -#define AT91_PMC_H - -#ifndef __ASSEMBLY__ -extern void __iomem *at91_pmc_base; - -#define at91_pmc_read(field) \ - __raw_readl(at91_pmc_base + field) - -#define at91_pmc_write(field, value) \ - __raw_writel(value, at91_pmc_base + field) -#else -.extern at91_pmc_base -#endif - -#define AT91_PMC_SCER 0x00 /* System Clock Enable Register */ -#define AT91_PMC_SCDR 0x04 /* System Clock Disable Register */ - -#define AT91_PMC_SCSR 0x08 /* System Clock Status Register */ -#define AT91_PMC_PCK (1 << 0) /* Processor Clock */ -#define AT91RM9200_PMC_UDP (1 << 1) /* USB Devcice Port Clock [AT91RM9200 only] */ -#define AT91RM9200_PMC_MCKUDP (1 << 2) /* USB Device Port Master Clock Automatic Disable on Suspend [AT91RM9200 only] */ -#define AT91RM9200_PMC_UHP (1 << 4) /* USB Host Port Clock [AT91RM9200 only] */ -#define AT91SAM926x_PMC_UHP (1 << 6) /* USB Host Port Clock [AT91SAM926x only] */ -#define AT91SAM926x_PMC_UDP (1 << 7) /* USB Devcice Port Clock [AT91SAM926x only] */ -#define AT91_PMC_PCK0 (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1 (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2 (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3 (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_PCK4 (1 << 12) /* Programmable Clock 4 [AT572D940HF only] */ -#define AT91_PMC_HCK0 (1 << 16) /* AHB Clock (USB host) [AT91SAM9261 only] */ -#define AT91_PMC_HCK1 (1 << 17) /* AHB Clock (LCD) [AT91SAM9261 only] */ - -#define AT91_PMC_PCER 0x10 /* Peripheral Clock Enable Register */ -#define AT91_PMC_PCDR 0x14 /* Peripheral Clock Disable Register */ -#define AT91_PMC_PCSR 0x18 /* Peripheral Clock Status Register */ - -#define AT91_CKGR_UCKR 0x1C /* UTMI Clock Register [some SAM9] */ -#define AT91_PMC_UPLLEN (1 << 16) /* UTMI PLL Enable */ -#define AT91_PMC_UPLLCOUNT (0xf << 20) /* UTMI PLL Start-up Time */ -#define AT91_PMC_BIASEN (1 << 24) /* UTMI BIAS Enable */ -#define AT91_PMC_BIASCOUNT (0xf << 28) /* UTMI BIAS Start-up Time */ - -#define AT91_CKGR_MOR 0x20 /* Main Oscillator Register [not on SAM9RL] */ -#define AT91_PMC_MOSCEN (1 << 0) /* Main Oscillator Enable */ -#define AT91_PMC_OSCBYPASS (1 << 1) /* Oscillator Bypass */ -#define AT91_PMC_MOSCRCEN (1 << 3) /* Main On-Chip RC Oscillator Enable [some SAM9] */ -#define AT91_PMC_OSCOUNT (0xff << 8) /* Main Oscillator Start-up Time */ -#define AT91_PMC_KEY (0x37 << 16) /* MOR Writing Key */ -#define AT91_PMC_MOSCSEL (1 << 24) /* Main Oscillator Selection [some SAM9] */ -#define AT91_PMC_CFDEN (1 << 25) /* Clock Failure Detector Enable [some SAM9] */ - -#define AT91_CKGR_MCFR 0x24 /* Main Clock Frequency Register */ -#define AT91_PMC_MAINF (0xffff << 0) /* Main Clock Frequency */ -#define AT91_PMC_MAINRDY (1 << 16) /* Main Clock Ready */ - -#define AT91_CKGR_PLLAR 0x28 /* PLL A Register */ -#define AT91_CKGR_PLLBR 0x2c /* PLL B Register */ -#define AT91_PMC_DIV (0xff << 0) /* Divider */ -#define AT91_PMC_PLLCOUNT (0x3f << 8) /* PLL Counter */ -#define AT91_PMC_OUT (3 << 14) /* PLL Clock Frequency Range */ -#define AT91_PMC_MUL (0x7ff << 16) /* PLL Multiplier */ -#define AT91_PMC_MUL_GET(n) ((n) >> 16 & 0x7ff) -#define AT91_PMC3_MUL (0x7f << 18) /* PLL Multiplier [SAMA5 only] */ -#define AT91_PMC3_MUL_GET(n) ((n) >> 18 & 0x7f) -#define AT91_PMC_USBDIV (3 << 28) /* USB Divisor (PLLB only) */ -#define AT91_PMC_USBDIV_1 (0 << 28) -#define AT91_PMC_USBDIV_2 (1 << 28) -#define AT91_PMC_USBDIV_4 (2 << 28) -#define AT91_PMC_USB96M (1 << 28) /* Divider by 2 Enable (PLLB only) */ - -#define AT91_PMC_MCKR 0x30 /* Master Clock Register */ -#define AT91_PMC_CSS (3 << 0) /* Master Clock Selection */ -#define AT91_PMC_CSS_SLOW (0 << 0) -#define AT91_PMC_CSS_MAIN (1 << 0) -#define AT91_PMC_CSS_PLLA (2 << 0) -#define AT91_PMC_CSS_PLLB (3 << 0) -#define AT91_PMC_CSS_UPLL (3 << 0) /* [some SAM9 only] */ -#define PMC_PRES_OFFSET 2 -#define AT91_PMC_PRES (7 << PMC_PRES_OFFSET) /* Master Clock Prescaler */ -#define AT91_PMC_PRES_1 (0 << PMC_PRES_OFFSET) -#define AT91_PMC_PRES_2 (1 << PMC_PRES_OFFSET) -#define AT91_PMC_PRES_4 (2 << PMC_PRES_OFFSET) -#define AT91_PMC_PRES_8 (3 << PMC_PRES_OFFSET) -#define AT91_PMC_PRES_16 (4 << PMC_PRES_OFFSET) -#define AT91_PMC_PRES_32 (5 << PMC_PRES_OFFSET) -#define AT91_PMC_PRES_64 (6 << PMC_PRES_OFFSET) -#define PMC_ALT_PRES_OFFSET 4 -#define AT91_PMC_ALT_PRES (7 << PMC_ALT_PRES_OFFSET) /* Master Clock Prescaler [alternate location] */ -#define AT91_PMC_ALT_PRES_1 (0 << PMC_ALT_PRES_OFFSET) -#define AT91_PMC_ALT_PRES_2 (1 << PMC_ALT_PRES_OFFSET) -#define AT91_PMC_ALT_PRES_4 (2 << PMC_ALT_PRES_OFFSET) -#define AT91_PMC_ALT_PRES_8 (3 << PMC_ALT_PRES_OFFSET) -#define AT91_PMC_ALT_PRES_16 (4 << PMC_ALT_PRES_OFFSET) -#define AT91_PMC_ALT_PRES_32 (5 << PMC_ALT_PRES_OFFSET) -#define AT91_PMC_ALT_PRES_64 (6 << PMC_ALT_PRES_OFFSET) -#define AT91_PMC_MDIV (3 << 8) /* Master Clock Division */ -#define AT91RM9200_PMC_MDIV_1 (0 << 8) /* [AT91RM9200 only] */ -#define AT91RM9200_PMC_MDIV_2 (1 << 8) -#define AT91RM9200_PMC_MDIV_3 (2 << 8) -#define AT91RM9200_PMC_MDIV_4 (3 << 8) -#define AT91SAM9_PMC_MDIV_1 (0 << 8) /* [SAM9 only] */ -#define AT91SAM9_PMC_MDIV_2 (1 << 8) -#define AT91SAM9_PMC_MDIV_4 (2 << 8) -#define AT91SAM9_PMC_MDIV_6 (3 << 8) /* [some SAM9 only] */ -#define AT91SAM9_PMC_MDIV_3 (3 << 8) /* [some SAM9 only] */ -#define AT91_PMC_PDIV (1 << 12) /* Processor Clock Division [some SAM9 only] */ -#define AT91_PMC_PDIV_1 (0 << 12) -#define AT91_PMC_PDIV_2 (1 << 12) -#define AT91_PMC_PLLADIV2 (1 << 12) /* PLLA divisor by 2 [some SAM9 only] */ -#define AT91_PMC_PLLADIV2_OFF (0 << 12) -#define AT91_PMC_PLLADIV2_ON (1 << 12) - -#define AT91_PMC_USB 0x38 /* USB Clock Register [some SAM9 only] */ -#define AT91_PMC_USBS (0x1 << 0) /* USB OHCI Input clock selection */ -#define AT91_PMC_USBS_PLLA (0 << 0) -#define AT91_PMC_USBS_UPLL (1 << 0) -#define AT91_PMC_USBS_PLLB (1 << 0) /* [AT91SAMN12 only] */ -#define AT91_PMC_OHCIUSBDIV (0xF << 8) /* Divider for USB OHCI Clock */ -#define AT91_PMC_OHCIUSBDIV_1 (0x0 << 8) -#define AT91_PMC_OHCIUSBDIV_2 (0x1 << 8) - -#define AT91_PMC_SMD 0x3c /* Soft Modem Clock Register [some SAM9 only] */ -#define AT91_PMC_SMDS (0x1 << 0) /* SMD input clock selection */ -#define AT91_PMC_SMD_DIV (0x1f << 8) /* SMD input clock divider */ -#define AT91_PMC_SMDDIV(n) (((n) << 8) & AT91_PMC_SMD_DIV) - -#define AT91_PMC_PCKR(n) (0x40 + ((n) * 4)) /* Programmable Clock 0-N Registers */ -#define AT91_PMC_ALT_PCKR_CSS (0x7 << 0) /* Programmable Clock Source Selection [alternate length] */ -#define AT91_PMC_CSS_MASTER (4 << 0) /* [some SAM9 only] */ -#define AT91_PMC_CSSMCK (0x1 << 8) /* CSS or Master Clock Selection */ -#define AT91_PMC_CSSMCK_CSS (0 << 8) -#define AT91_PMC_CSSMCK_MCK (1 << 8) - -#define AT91_PMC_IER 0x60 /* Interrupt Enable Register */ -#define AT91_PMC_IDR 0x64 /* Interrupt Disable Register */ -#define AT91_PMC_SR 0x68 /* Status Register */ -#define AT91_PMC_MOSCS (1 << 0) /* MOSCS Flag */ -#define AT91_PMC_LOCKA (1 << 1) /* PLLA Lock */ -#define AT91_PMC_LOCKB (1 << 2) /* PLLB Lock */ -#define AT91_PMC_MCKRDY (1 << 3) /* Master Clock */ -#define AT91_PMC_LOCKU (1 << 6) /* UPLL Lock [some SAM9] */ -#define AT91_PMC_PCK0RDY (1 << 8) /* Programmable Clock 0 */ -#define AT91_PMC_PCK1RDY (1 << 9) /* Programmable Clock 1 */ -#define AT91_PMC_PCK2RDY (1 << 10) /* Programmable Clock 2 */ -#define AT91_PMC_PCK3RDY (1 << 11) /* Programmable Clock 3 */ -#define AT91_PMC_MOSCSELS (1 << 16) /* Main Oscillator Selection [some SAM9] */ -#define AT91_PMC_MOSCRCS (1 << 17) /* Main On-Chip RC [some SAM9] */ -#define AT91_PMC_CFDEV (1 << 18) /* Clock Failure Detector Event [some SAM9] */ -#define AT91_PMC_IMR 0x6c /* Interrupt Mask Register */ - -#define AT91_PMC_PROT 0xe4 /* Write Protect Mode Register [some SAM9] */ -#define AT91_PMC_WPEN (0x1 << 0) /* Write Protect Enable */ -#define AT91_PMC_WPKEY (0xffffff << 8) /* Write Protect Key */ -#define AT91_PMC_PROTKEY (0x504d43 << 8) /* Activation Code */ - -#define AT91_PMC_WPSR 0xe8 /* Write Protect Status Register [some SAM9] */ -#define AT91_PMC_WPVS (0x1 << 0) /* Write Protect Violation Status */ -#define AT91_PMC_WPVSRC (0xffff << 8) /* Write Protect Violation Source */ - -#define AT91_PMC_PCER1 0x100 /* Peripheral Clock Enable Register 1 [SAMA5 only]*/ -#define AT91_PMC_PCDR1 0x104 /* Peripheral Clock Enable Register 1 */ -#define AT91_PMC_PCSR1 0x108 /* Peripheral Clock Enable Register 1 */ - -#define AT91_PMC_PCR 0x10c /* Peripheral Control Register [some SAM9 and SAMA5] */ -#define AT91_PMC_PCR_PID (0x3f << 0) /* Peripheral ID */ -#define AT91_PMC_PCR_CMD (0x1 << 12) /* Command (read=0, write=1) */ -#define AT91_PMC_PCR_DIV(n) ((n) << 16) /* Divisor Value */ -#define AT91_PMC_PCR_DIV0 0x0 /* Peripheral clock is MCK */ -#define AT91_PMC_PCR_DIV2 0x1 /* Peripheral clock is MCK/2 */ -#define AT91_PMC_PCR_DIV4 0x2 /* Peripheral clock is MCK/4 */ -#define AT91_PMC_PCR_DIV8 0x3 /* Peripheral clock is MCK/8 */ -#define AT91_PMC_PCR_EN (0x1 << 28) /* Enable */ - -#endif diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 9986542e8060..d43b79f56e94 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -19,13 +19,13 @@ #include #include #include +#include #include #include #include #include -#include #include #include "at91_aic.h" diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S index 098c28ddf025..20018779bae7 100644 --- a/arch/arm/mach-at91/pm_slowclock.S +++ b/arch/arm/mach-at91/pm_slowclock.S @@ -13,8 +13,8 @@ */ #include +#include #include -#include #include diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c index 3ea86428ee09..5c6dc24fafbd 100644 --- a/arch/arm/mach-at91/sama5d3.c +++ b/arch/arm/mach-at91/sama5d3.c @@ -9,12 +9,12 @@ #include #include +#include #include #include #include #include -#include #include #include "soc.h" diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index 094b3459c288..ca542dee087d 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include @@ -18,7 +19,6 @@ #include #include #include -#include #include "at91_shdwc.h" #include "soc.h" -- cgit v1.2.3 From c8a8c6300866a51ba41fb41b95800e5982dcf96a Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 11 Oct 2013 09:37:46 +0200 Subject: ARM: at91: add Kconfig options for common clk support This patch adds the following Kconfig options to prepare the transition to common clk framework: - AT91_USE_OLD_CLK: this option is selected by every SoC which does not support new at91 clks based on common clk framework (SoC which does not define the clock tree in its device tree). This options is also selected when the user choose non dt boards support (new at91 clks can only be registered from a device tree definition). - COMMON_CLK_AT91: this option cannot be selected directly. Instead it is enabled if these 3 conditions are met: * at least one of the selected SoCs have a PMC (Power Management Controller) Unit * device tree support is enabled * the old at91 clk implementation is disabled (every selected SoC define its clks in its device tree and non dt boards support is disabled) - OLD_CLK_AT91: this option cannot be selected directly. Instead it is enabled if these 2 conditions are met: * at least one of the selected SoCs have a PMC (Power Management Controller) Unit * at least one of the selected SoCs does not define its clks in its device tree or non dt-boards support is enabled This patch selects AT91_USE_OLD_CLK in all currently supported SoCs. These selects will be removed after clk definitions are properly added in each soc's device tree. It also selects AT91_USE_OLD_CLK in all non-dt boards support. AT91_PMC_UNIT references are replaced by OLD_CLK_AT91, because PMC Unit is enabled for both old and common clk implementations, and old clk implementation should not be compiled if COMMON_CLK is enabled. To avoid future link errors, a new stub is created for at91_dt_clock_init function if OLD_CLK_AT91 is disabled. A new check is added in dt init functions (setup.c) to prepare for SoCs supporting new clk implementation. These SoCs won't setup the register_clocks callback (clk registration is done using of_clk_init). Signed-off-by: Boris BREZILLON Acked-by: Mike Turquette Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 21 +++++++++++++++++++++ arch/arm/mach-at91/Kconfig.non_dt | 6 ++++++ arch/arm/mach-at91/Makefile | 2 +- arch/arm/mach-at91/generic.h | 3 ++- arch/arm/mach-at91/setup.c | 6 ++++-- 5 files changed, 34 insertions(+), 4 deletions(-) (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 699b71e7f7ec..85b53a441459 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -6,10 +6,22 @@ config HAVE_AT91_DBGU0 config HAVE_AT91_DBGU1 bool +config AT91_USE_OLD_CLK + bool + config AT91_PMC_UNIT bool default !ARCH_AT91X40 +config COMMON_CLK_AT91 + bool + default AT91_PMC_UNIT && USE_OF && !AT91_USE_OLD_CLK + select COMMON_CLK + +config OLD_CLK_AT91 + bool + default AT91_PMC_UNIT && AT91_USE_OLD_CLK + config AT91_SAM9_ALT_RESET bool default !ARCH_AT91X40 @@ -65,6 +77,7 @@ config SOC_SAMA5D3 select SOC_SAMA5 select HAVE_FB_ATMEL select HAVE_AT91_DBGU1 + select AT91_USE_OLD_CLK help Select this if you are using one of Atmel's SAMA5D3 family SoC. This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35. @@ -78,11 +91,13 @@ config SOC_AT91RM9200 select HAVE_AT91_DBGU0 select MULTI_IRQ_HANDLER select SPARSE_IRQ + select AT91_USE_OLD_CLK config SOC_AT91SAM9260 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" select HAVE_AT91_DBGU0 select SOC_AT91SAM9 + select AT91_USE_OLD_CLK help Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE or AT91SAM9G20 SoC. @@ -92,6 +107,7 @@ config SOC_AT91SAM9261 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL select SOC_AT91SAM9 + select AT91_USE_OLD_CLK help Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. @@ -100,18 +116,21 @@ config SOC_AT91SAM9263 select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select SOC_AT91SAM9 + select AT91_USE_OLD_CLK config SOC_AT91SAM9RL bool "AT91SAM9RL" select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL select SOC_AT91SAM9 + select AT91_USE_OLD_CLK config SOC_AT91SAM9G45 bool "AT91SAM9G45 or AT91SAM9M10 families" select HAVE_AT91_DBGU1 select HAVE_FB_ATMEL select SOC_AT91SAM9 + select AT91_USE_OLD_CLK help Select this if you are using one of Atmel's AT91SAM9G45 family SoC. This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. @@ -121,6 +140,7 @@ config SOC_AT91SAM9X5 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL select SOC_AT91SAM9 + select AT91_USE_OLD_CLK help Select this if you are using one of Atmel's AT91SAM9x5 family SoC. This means that your SAM9 name finishes with a '5' (except if it is @@ -133,6 +153,7 @@ config SOC_AT91SAM9N12 select HAVE_AT91_DBGU0 select HAVE_FB_ATMEL select SOC_AT91SAM9 + select AT91_USE_OLD_CLK help Select this if you are using Atmel's AT91SAM9N12 SoC. diff --git a/arch/arm/mach-at91/Kconfig.non_dt b/arch/arm/mach-at91/Kconfig.non_dt index ca900be144ce..b736b571e882 100644 --- a/arch/arm/mach-at91/Kconfig.non_dt +++ b/arch/arm/mach-at91/Kconfig.non_dt @@ -12,26 +12,32 @@ config ARCH_AT91_NONE config ARCH_AT91RM9200 bool "AT91RM9200" select SOC_AT91RM9200 + select AT91_USE_OLD_CLK config ARCH_AT91SAM9260 bool "AT91SAM9260 or AT91SAM9XE or AT91SAM9G20" select SOC_AT91SAM9260 + select AT91_USE_OLD_CLK config ARCH_AT91SAM9261 bool "AT91SAM9261 or AT91SAM9G10" select SOC_AT91SAM9261 + select AT91_USE_OLD_CLK config ARCH_AT91SAM9263 bool "AT91SAM9263" select SOC_AT91SAM9263 + select AT91_USE_OLD_CLK config ARCH_AT91SAM9RL bool "AT91SAM9RL" select SOC_AT91SAM9RL + select AT91_USE_OLD_CLK config ARCH_AT91SAM9G45 bool "AT91SAM9G45" select SOC_AT91SAM9G45 + select AT91_USE_OLD_CLK config ARCH_AT91X40 bool "AT91x40" diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 90aab2d5a07f..705b38a179ec 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -7,7 +7,7 @@ obj-m := obj-n := obj- := -obj-$(CONFIG_AT91_PMC_UNIT) += clock.o +obj-$(CONFIG_OLD_CLK_AT91) += clock.o obj-$(CONFIG_AT91_SAM9_ALT_RESET) += at91sam9_alt_reset.o obj-$(CONFIG_AT91_SAM9G45_RESET) += at91sam9g45_reset.o obj-$(CONFIG_AT91_SAM9_TIME) += at91sam926x_time.o diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index 26dee3ce9397..631fa3b8c16d 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -46,11 +46,12 @@ extern void at91sam926x_pit_init(void); extern void at91x40_timer_init(void); /* Clocks */ -#ifdef CONFIG_AT91_PMC_UNIT +#ifdef CONFIG_OLD_CLK_AT91 extern int __init at91_clock_init(unsigned long main_clock); extern int __init at91_dt_clock_init(void); #else static int inline at91_clock_init(unsigned long main_clock) { return 0; } +static int inline at91_dt_clock_init(void) { return 0; } #endif struct device; diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index ca542dee087d..7d3f7cc61081 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -491,7 +491,8 @@ void __init at91rm9200_dt_initialize(void) at91_dt_clock_init(); /* Register the processor-specific clocks */ - at91_boot_soc.register_clocks(); + if (at91_boot_soc.register_clocks) + at91_boot_soc.register_clocks(); at91_boot_soc.init(); } @@ -506,7 +507,8 @@ void __init at91_dt_initialize(void) at91_dt_clock_init(); /* Register the processor-specific clocks */ - at91_boot_soc.register_clocks(); + if (at91_boot_soc.register_clocks) + at91_boot_soc.register_clocks(); if (at91_boot_soc.init) at91_boot_soc.init(); -- cgit v1.2.3 From f090fb37def3eb9ea49b71751dbe43f423f3a152 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 11 Oct 2013 12:22:06 +0200 Subject: clk: at91: add PMC utmi clock This adds new at91 utmi clock implementation using common clk framework. This clock is a pll with a fixed factor (x40). It is used as a source for usb clock. Signed-off-by: Boris BREZILLON Acked-by: Mike Turquette Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 7 ++ drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-utmi.c | 159 ++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/at91/pmc.c | 7 ++ drivers/clk/at91/pmc.h | 5 ++ 5 files changed, 179 insertions(+) create mode 100644 drivers/clk/at91/clk-utmi.c (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 85b53a441459..6ad37daca971 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -1,5 +1,8 @@ if ARCH_AT91 +config HAVE_AT91_UTMI + bool + config HAVE_AT91_DBGU0 bool @@ -78,6 +81,7 @@ config SOC_SAMA5D3 select HAVE_FB_ATMEL select HAVE_AT91_DBGU1 select AT91_USE_OLD_CLK + select HAVE_AT91_UTMI help Select this if you are using one of Atmel's SAMA5D3 family SoC. This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35. @@ -124,6 +128,7 @@ config SOC_AT91SAM9RL select HAVE_FB_ATMEL select SOC_AT91SAM9 select AT91_USE_OLD_CLK + select HAVE_AT91_UTMI config SOC_AT91SAM9G45 bool "AT91SAM9G45 or AT91SAM9M10 families" @@ -131,6 +136,7 @@ config SOC_AT91SAM9G45 select HAVE_FB_ATMEL select SOC_AT91SAM9 select AT91_USE_OLD_CLK + select HAVE_AT91_UTMI help Select this if you are using one of Atmel's AT91SAM9G45 family SoC. This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. @@ -141,6 +147,7 @@ config SOC_AT91SAM9X5 select HAVE_FB_ATMEL select SOC_AT91SAM9 select AT91_USE_OLD_CLK + select HAVE_AT91_UTMI help Select this if you are using one of Atmel's AT91SAM9x5 family SoC. This means that your SAM9 name finishes with a '5' (except if it is diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile index 3873b621768f..a82488323ea4 100644 --- a/drivers/clk/at91/Makefile +++ b/drivers/clk/at91/Makefile @@ -7,3 +7,4 @@ obj-y += clk-main.o clk-pll.o clk-plldiv.o clk-master.o obj-y += clk-system.o clk-peripheral.o obj-$(CONFIG_AT91_PROGRAMMABLE_CLOCKS) += clk-programmable.o +obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o diff --git a/drivers/clk/at91/clk-utmi.c b/drivers/clk/at91/clk-utmi.c new file mode 100644 index 000000000000..ae3263bc1476 --- /dev/null +++ b/drivers/clk/at91/clk-utmi.c @@ -0,0 +1,159 @@ +/* + * Copyright (C) 2013 Boris BREZILLON + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "pmc.h" + +#define UTMI_FIXED_MUL 40 + +struct clk_utmi { + struct clk_hw hw; + struct at91_pmc *pmc; + unsigned int irq; + wait_queue_head_t wait; +}; + +#define to_clk_utmi(hw) container_of(hw, struct clk_utmi, hw) + +static irqreturn_t clk_utmi_irq_handler(int irq, void *dev_id) +{ + struct clk_utmi *utmi = (struct clk_utmi *)dev_id; + + wake_up(&utmi->wait); + disable_irq_nosync(utmi->irq); + + return IRQ_HANDLED; +} + +static int clk_utmi_prepare(struct clk_hw *hw) +{ + struct clk_utmi *utmi = to_clk_utmi(hw); + struct at91_pmc *pmc = utmi->pmc; + u32 tmp = at91_pmc_read(AT91_CKGR_UCKR) | AT91_PMC_UPLLEN | + AT91_PMC_UPLLCOUNT | AT91_PMC_BIASEN; + + pmc_write(pmc, AT91_CKGR_UCKR, tmp); + + while (!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_LOCKU)) { + enable_irq(utmi->irq); + wait_event(utmi->wait, + pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_LOCKU); + } + + return 0; +} + +static int clk_utmi_is_prepared(struct clk_hw *hw) +{ + struct clk_utmi *utmi = to_clk_utmi(hw); + struct at91_pmc *pmc = utmi->pmc; + + return !!(pmc_read(pmc, AT91_PMC_SR) & AT91_PMC_LOCKU); +} + +static void clk_utmi_unprepare(struct clk_hw *hw) +{ + struct clk_utmi *utmi = to_clk_utmi(hw); + struct at91_pmc *pmc = utmi->pmc; + u32 tmp = at91_pmc_read(AT91_CKGR_UCKR) & ~AT91_PMC_UPLLEN; + + pmc_write(pmc, AT91_CKGR_UCKR, tmp); +} + +static unsigned long clk_utmi_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + /* UTMI clk is a fixed clk multiplier */ + return parent_rate * UTMI_FIXED_MUL; +} + +static const struct clk_ops utmi_ops = { + .prepare = clk_utmi_prepare, + .unprepare = clk_utmi_unprepare, + .is_prepared = clk_utmi_is_prepared, + .recalc_rate = clk_utmi_recalc_rate, +}; + +static struct clk * __init +at91_clk_register_utmi(struct at91_pmc *pmc, unsigned int irq, + const char *name, const char *parent_name) +{ + int ret; + struct clk_utmi *utmi; + struct clk *clk = NULL; + struct clk_init_data init; + + utmi = kzalloc(sizeof(*utmi), GFP_KERNEL); + if (!utmi) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &utmi_ops; + init.parent_names = parent_name ? &parent_name : NULL; + init.num_parents = parent_name ? 1 : 0; + init.flags = CLK_SET_RATE_GATE; + + utmi->hw.init = &init; + utmi->pmc = pmc; + utmi->irq = irq; + init_waitqueue_head(&utmi->wait); + irq_set_status_flags(utmi->irq, IRQ_NOAUTOEN); + ret = request_irq(utmi->irq, clk_utmi_irq_handler, + IRQF_TRIGGER_HIGH, "clk-utmi", utmi); + if (ret) + return ERR_PTR(ret); + + clk = clk_register(NULL, &utmi->hw); + if (IS_ERR(clk)) + kfree(utmi); + + return clk; +} + +static void __init +of_at91_clk_utmi_setup(struct device_node *np, struct at91_pmc *pmc) +{ + unsigned int irq; + struct clk *clk; + const char *parent_name; + const char *name = np->name; + + parent_name = of_clk_get_parent_name(np, 0); + + of_property_read_string(np, "clock-output-names", &name); + + irq = irq_of_parse_and_map(np, 0); + if (!irq) + return; + + clk = at91_clk_register_utmi(pmc, irq, name, parent_name); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); + return; +} + +void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np, + struct at91_pmc *pmc) +{ + of_at91_clk_utmi_setup(np, pmc); +} diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c index d0a1f93500f0..0f667fd4e7fa 100644 --- a/drivers/clk/at91/pmc.c +++ b/drivers/clk/at91/pmc.c @@ -292,6 +292,13 @@ static const struct of_device_id pmc_clk_ids[] __initdata = { .compatible = "atmel,at91sam9x5-clk-programmable", .data = of_at91sam9x5_clk_prog_setup, }, +#endif + /* UTMI clock */ +#if defined(CONFIG_HAVE_AT91_UTMI) + { + .compatible = "atmel,at91sam9x5-clk-utmi", + .data = of_at91sam9x5_clk_utmi_setup, + }, #endif { /*sentinel*/ } }; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 6eeed491c94c..8e18ab0d8e22 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -94,4 +94,9 @@ extern void __init of_at91sam9x5_clk_prog_setup(struct device_node *np, struct at91_pmc *pmc); #endif +#if defined(CONFIG_HAVE_AT91_UTMI) +extern void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np, + struct at91_pmc *pmc); +#endif + #endif /* __PMC_H_ */ -- cgit v1.2.3 From c84a61d87261f91d378cf26be4ffd3199ffd2493 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Thu, 17 Oct 2013 18:55:41 +0200 Subject: clk: at91: add PMC usb clock This patch adds new at91 usb clock implementation using common clk framework. This clock is used to clock usb ports (ohci, ehci and udc). Signed-off-by: Boris BREZILLON Acked-by: Mike Turquette Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 11 ++ drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-usb.c | 398 +++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/at91/pmc.c | 15 ++ drivers/clk/at91/pmc.h | 9 + 5 files changed, 434 insertions(+) create mode 100644 drivers/clk/at91/clk-usb.c (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 6ad37daca971..b76dc4c62af9 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -3,6 +3,9 @@ if ARCH_AT91 config HAVE_AT91_UTMI bool +config HAVE_AT91_USB_CLK + bool + config HAVE_AT91_DBGU0 bool @@ -82,6 +85,7 @@ config SOC_SAMA5D3 select HAVE_AT91_DBGU1 select AT91_USE_OLD_CLK select HAVE_AT91_UTMI + select HAVE_AT91_USB_CLK help Select this if you are using one of Atmel's SAMA5D3 family SoC. This support covers SAMA5D31, SAMA5D33, SAMA5D34, SAMA5D35. @@ -96,12 +100,14 @@ config SOC_AT91RM9200 select MULTI_IRQ_HANDLER select SPARSE_IRQ select AT91_USE_OLD_CLK + select HAVE_AT91_USB_CLK config SOC_AT91SAM9260 bool "AT91SAM9260, AT91SAM9XE or AT91SAM9G20" select HAVE_AT91_DBGU0 select SOC_AT91SAM9 select AT91_USE_OLD_CLK + select HAVE_AT91_USB_CLK help Select this if you are using one of Atmel's AT91SAM9260, AT91SAM9XE or AT91SAM9G20 SoC. @@ -112,6 +118,7 @@ config SOC_AT91SAM9261 select HAVE_FB_ATMEL select SOC_AT91SAM9 select AT91_USE_OLD_CLK + select HAVE_AT91_USB_CLK help Select this if you are using one of Atmel's AT91SAM9261 or AT91SAM9G10 SoC. @@ -121,6 +128,7 @@ config SOC_AT91SAM9263 select HAVE_FB_ATMEL select SOC_AT91SAM9 select AT91_USE_OLD_CLK + select HAVE_AT91_USB_CLK config SOC_AT91SAM9RL bool "AT91SAM9RL" @@ -137,6 +145,7 @@ config SOC_AT91SAM9G45 select SOC_AT91SAM9 select AT91_USE_OLD_CLK select HAVE_AT91_UTMI + select HAVE_AT91_USB_CLK help Select this if you are using one of Atmel's AT91SAM9G45 family SoC. This support covers AT91SAM9G45, AT91SAM9G46, AT91SAM9M10 and AT91SAM9M11. @@ -148,6 +157,7 @@ config SOC_AT91SAM9X5 select SOC_AT91SAM9 select AT91_USE_OLD_CLK select HAVE_AT91_UTMI + select HAVE_AT91_USB_CLK help Select this if you are using one of Atmel's AT91SAM9x5 family SoC. This means that your SAM9 name finishes with a '5' (except if it is @@ -161,6 +171,7 @@ config SOC_AT91SAM9N12 select HAVE_FB_ATMEL select SOC_AT91SAM9 select AT91_USE_OLD_CLK + select HAVE_AT91_USB_CLK help Select this if you are using Atmel's AT91SAM9N12 SoC. diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile index a82488323ea4..61db058be0c0 100644 --- a/drivers/clk/at91/Makefile +++ b/drivers/clk/at91/Makefile @@ -8,3 +8,4 @@ obj-y += clk-system.o clk-peripheral.o obj-$(CONFIG_AT91_PROGRAMMABLE_CLOCKS) += clk-programmable.o obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o +obj-$(CONFIG_HAVE_AT91_USB_CLK) += clk-usb.o diff --git a/drivers/clk/at91/clk-usb.c b/drivers/clk/at91/clk-usb.c new file mode 100644 index 000000000000..7d1d26a4bd04 --- /dev/null +++ b/drivers/clk/at91/clk-usb.c @@ -0,0 +1,398 @@ +/* + * Copyright (C) 2013 Boris BREZILLON + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include + +#include "pmc.h" + +#define USB_SOURCE_MAX 2 + +#define SAM9X5_USB_DIV_SHIFT 8 +#define SAM9X5_USB_MAX_DIV 0xf + +#define RM9200_USB_DIV_SHIFT 28 +#define RM9200_USB_DIV_TAB_SIZE 4 + +struct at91sam9x5_clk_usb { + struct clk_hw hw; + struct at91_pmc *pmc; +}; + +#define to_at91sam9x5_clk_usb(hw) \ + container_of(hw, struct at91sam9x5_clk_usb, hw) + +struct at91rm9200_clk_usb { + struct clk_hw hw; + struct at91_pmc *pmc; + u32 divisors[4]; +}; + +#define to_at91rm9200_clk_usb(hw) \ + container_of(hw, struct at91rm9200_clk_usb, hw) + +static unsigned long at91sam9x5_clk_usb_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + u32 tmp; + u8 usbdiv; + struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); + struct at91_pmc *pmc = usb->pmc; + + tmp = pmc_read(pmc, AT91_PMC_USB); + usbdiv = (tmp & AT91_PMC_OHCIUSBDIV) >> SAM9X5_USB_DIV_SHIFT; + return parent_rate / (usbdiv + 1); +} + +static long at91sam9x5_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + unsigned long div; + unsigned long bestrate; + unsigned long tmp; + + if (rate >= *parent_rate) + return *parent_rate; + + div = *parent_rate / rate; + if (div >= SAM9X5_USB_MAX_DIV) + return *parent_rate / (SAM9X5_USB_MAX_DIV + 1); + + bestrate = *parent_rate / div; + tmp = *parent_rate / (div + 1); + if (bestrate - rate > rate - tmp) + bestrate = tmp; + + return bestrate; +} + +static int at91sam9x5_clk_usb_set_parent(struct clk_hw *hw, u8 index) +{ + u32 tmp; + struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); + struct at91_pmc *pmc = usb->pmc; + + if (index > 1) + return -EINVAL; + tmp = pmc_read(pmc, AT91_PMC_USB) & ~AT91_PMC_USBS; + if (index) + tmp |= AT91_PMC_USBS; + pmc_write(pmc, AT91_PMC_USB, tmp); + return 0; +} + +static u8 at91sam9x5_clk_usb_get_parent(struct clk_hw *hw) +{ + struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); + struct at91_pmc *pmc = usb->pmc; + + return pmc_read(pmc, AT91_PMC_USB) & AT91_PMC_USBS; +} + +static int at91sam9x5_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + u32 tmp; + struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); + struct at91_pmc *pmc = usb->pmc; + unsigned long div = parent_rate / rate; + + if (parent_rate % rate || div < 1 || div >= SAM9X5_USB_MAX_DIV) + return -EINVAL; + + tmp = pmc_read(pmc, AT91_PMC_USB) & ~AT91_PMC_OHCIUSBDIV; + tmp |= (div - 1) << SAM9X5_USB_DIV_SHIFT; + pmc_write(pmc, AT91_PMC_USB, tmp); + + return 0; +} + +static const struct clk_ops at91sam9x5_usb_ops = { + .recalc_rate = at91sam9x5_clk_usb_recalc_rate, + .round_rate = at91sam9x5_clk_usb_round_rate, + .get_parent = at91sam9x5_clk_usb_get_parent, + .set_parent = at91sam9x5_clk_usb_set_parent, + .set_rate = at91sam9x5_clk_usb_set_rate, +}; + +static int at91sam9n12_clk_usb_enable(struct clk_hw *hw) +{ + struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); + struct at91_pmc *pmc = usb->pmc; + + pmc_write(pmc, AT91_PMC_USB, + pmc_read(pmc, AT91_PMC_USB) | AT91_PMC_USBS); + return 0; +} + +static void at91sam9n12_clk_usb_disable(struct clk_hw *hw) +{ + struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); + struct at91_pmc *pmc = usb->pmc; + + pmc_write(pmc, AT91_PMC_USB, + pmc_read(pmc, AT91_PMC_USB) & ~AT91_PMC_USBS); +} + +static int at91sam9n12_clk_usb_is_enabled(struct clk_hw *hw) +{ + struct at91sam9x5_clk_usb *usb = to_at91sam9x5_clk_usb(hw); + struct at91_pmc *pmc = usb->pmc; + + return !!(pmc_read(pmc, AT91_PMC_USB) & AT91_PMC_USBS); +} + +static const struct clk_ops at91sam9n12_usb_ops = { + .enable = at91sam9n12_clk_usb_enable, + .disable = at91sam9n12_clk_usb_disable, + .is_enabled = at91sam9n12_clk_usb_is_enabled, + .recalc_rate = at91sam9x5_clk_usb_recalc_rate, + .round_rate = at91sam9x5_clk_usb_round_rate, + .set_rate = at91sam9x5_clk_usb_set_rate, +}; + +static struct clk * __init +at91sam9x5_clk_register_usb(struct at91_pmc *pmc, const char *name, + const char **parent_names, u8 num_parents) +{ + struct at91sam9x5_clk_usb *usb; + struct clk *clk = NULL; + struct clk_init_data init; + + usb = kzalloc(sizeof(*usb), GFP_KERNEL); + if (!usb) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &at91sam9x5_usb_ops; + init.parent_names = parent_names; + init.num_parents = num_parents; + init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; + + usb->hw.init = &init; + usb->pmc = pmc; + + clk = clk_register(NULL, &usb->hw); + if (IS_ERR(clk)) + kfree(usb); + + return clk; +} + +static struct clk * __init +at91sam9n12_clk_register_usb(struct at91_pmc *pmc, const char *name, + const char *parent_name) +{ + struct at91sam9x5_clk_usb *usb; + struct clk *clk = NULL; + struct clk_init_data init; + + usb = kzalloc(sizeof(*usb), GFP_KERNEL); + if (!usb) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &at91sam9n12_usb_ops; + init.parent_names = &parent_name; + init.num_parents = 1; + init.flags = CLK_SET_RATE_GATE; + + usb->hw.init = &init; + usb->pmc = pmc; + + clk = clk_register(NULL, &usb->hw); + if (IS_ERR(clk)) + kfree(usb); + + return clk; +} + +static unsigned long at91rm9200_clk_usb_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw); + struct at91_pmc *pmc = usb->pmc; + u32 tmp; + u8 usbdiv; + + tmp = pmc_read(pmc, AT91_CKGR_PLLBR); + usbdiv = (tmp & AT91_PMC_USBDIV) >> RM9200_USB_DIV_SHIFT; + if (usb->divisors[usbdiv]) + return parent_rate / usb->divisors[usbdiv]; + + return 0; +} + +static long at91rm9200_clk_usb_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw); + unsigned long bestrate = 0; + int bestdiff = -1; + unsigned long tmprate; + int tmpdiff; + int i = 0; + + for (i = 0; i < 4; i++) { + if (!usb->divisors[i]) + continue; + tmprate = *parent_rate / usb->divisors[i]; + if (tmprate < rate) + tmpdiff = rate - tmprate; + else + tmpdiff = tmprate - rate; + + if (bestdiff < 0 || bestdiff > tmpdiff) { + bestrate = tmprate; + bestdiff = tmpdiff; + } + + if (!bestdiff) + break; + } + + return bestrate; +} + +static int at91rm9200_clk_usb_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + u32 tmp; + int i; + struct at91rm9200_clk_usb *usb = to_at91rm9200_clk_usb(hw); + struct at91_pmc *pmc = usb->pmc; + unsigned long div = parent_rate / rate; + + if (parent_rate % rate) + return -EINVAL; + for (i = 0; i < RM9200_USB_DIV_TAB_SIZE; i++) { + if (usb->divisors[i] == div) { + tmp = pmc_read(pmc, AT91_CKGR_PLLBR) & + ~AT91_PMC_USBDIV; + tmp |= i << RM9200_USB_DIV_SHIFT; + pmc_write(pmc, AT91_CKGR_PLLBR, tmp); + return 0; + } + } + + return -EINVAL; +} + +static const struct clk_ops at91rm9200_usb_ops = { + .recalc_rate = at91rm9200_clk_usb_recalc_rate, + .round_rate = at91rm9200_clk_usb_round_rate, + .set_rate = at91rm9200_clk_usb_set_rate, +}; + +static struct clk * __init +at91rm9200_clk_register_usb(struct at91_pmc *pmc, const char *name, + const char *parent_name, const u32 *divisors) +{ + struct at91rm9200_clk_usb *usb; + struct clk *clk = NULL; + struct clk_init_data init; + + usb = kzalloc(sizeof(*usb), GFP_KERNEL); + if (!usb) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &at91rm9200_usb_ops; + init.parent_names = &parent_name; + init.num_parents = 1; + init.flags = 0; + + usb->hw.init = &init; + usb->pmc = pmc; + memcpy(usb->divisors, divisors, sizeof(usb->divisors)); + + clk = clk_register(NULL, &usb->hw); + if (IS_ERR(clk)) + kfree(usb); + + return clk; +} + +void __init of_at91sam9x5_clk_usb_setup(struct device_node *np, + struct at91_pmc *pmc) +{ + struct clk *clk; + int i; + int num_parents; + const char *parent_names[USB_SOURCE_MAX]; + const char *name = np->name; + + num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells"); + if (num_parents <= 0 || num_parents > USB_SOURCE_MAX) + return; + + for (i = 0; i < num_parents; i++) { + parent_names[i] = of_clk_get_parent_name(np, i); + if (!parent_names[i]) + return; + } + + of_property_read_string(np, "clock-output-names", &name); + + clk = at91sam9x5_clk_register_usb(pmc, name, parent_names, num_parents); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +void __init of_at91sam9n12_clk_usb_setup(struct device_node *np, + struct at91_pmc *pmc) +{ + struct clk *clk; + const char *parent_name; + const char *name = np->name; + + parent_name = of_clk_get_parent_name(np, 0); + if (!parent_name) + return; + + of_property_read_string(np, "clock-output-names", &name); + + clk = at91sam9n12_clk_register_usb(pmc, name, parent_name); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} + +void __init of_at91rm9200_clk_usb_setup(struct device_node *np, + struct at91_pmc *pmc) +{ + struct clk *clk; + const char *parent_name; + const char *name = np->name; + u32 divisors[4] = {0, 0, 0, 0}; + + parent_name = of_clk_get_parent_name(np, 0); + if (!parent_name) + return; + + of_property_read_u32_array(np, "atmel,clk-divisors", divisors, 4); + if (!divisors[0]) + return; + + of_property_read_string(np, "clock-output-names", &name); + + clk = at91rm9200_clk_register_usb(pmc, name, parent_name, divisors); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c index 0f667fd4e7fa..4fba500dec38 100644 --- a/drivers/clk/at91/pmc.c +++ b/drivers/clk/at91/pmc.c @@ -299,6 +299,21 @@ static const struct of_device_id pmc_clk_ids[] __initdata = { .compatible = "atmel,at91sam9x5-clk-utmi", .data = of_at91sam9x5_clk_utmi_setup, }, +#endif + /* USB clock */ +#if defined(CONFIG_HAVE_AT91_USB_CLK) + { + .compatible = "atmel,at91rm9200-clk-usb", + .data = of_at91rm9200_clk_usb_setup, + }, + { + .compatible = "atmel,at91sam9x5-clk-usb", + .data = of_at91sam9x5_clk_usb_setup, + }, + { + .compatible = "atmel,at91sam9n12-clk-usb", + .data = of_at91sam9n12_clk_usb_setup, + }, #endif { /*sentinel*/ } }; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 8e18ab0d8e22..2483ddc0868b 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -99,4 +99,13 @@ extern void __init of_at91sam9x5_clk_utmi_setup(struct device_node *np, struct at91_pmc *pmc); #endif +#if defined(CONFIG_HAVE_AT91_USB_CLK) +extern void __init of_at91rm9200_clk_usb_setup(struct device_node *np, + struct at91_pmc *pmc); +extern void __init of_at91sam9x5_clk_usb_setup(struct device_node *np, + struct at91_pmc *pmc); +extern void __init of_at91sam9n12_clk_usb_setup(struct device_node *np, + struct at91_pmc *pmc); +#endif + #endif /* __PMC_H_ */ -- cgit v1.2.3 From a9c0688fde53c0a44cd75e9fe33b16db73187ba8 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 11 Oct 2013 13:27:06 +0200 Subject: clk: at91: add PMC smd clock This patch adds at91 smd (Soft Modem) clock implementation using common clk framework. Not used by any driver right now. Signed-off-by: Boris BREZILLON Acked-by: Mike Turquette Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 5 ++ drivers/clk/at91/Makefile | 1 + drivers/clk/at91/clk-smd.c | 171 +++++++++++++++++++++++++++++++++++++++++++++ drivers/clk/at91/pmc.c | 7 ++ drivers/clk/at91/pmc.h | 5 ++ 5 files changed, 189 insertions(+) create mode 100644 drivers/clk/at91/clk-smd.c (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index b76dc4c62af9..97033f792eea 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -39,6 +39,9 @@ config AT91_SAM9G45_RESET config AT91_SAM9_TIME bool +config HAVE_AT91_SMD + bool + config SOC_AT91SAM9 bool select AT91_SAM9_TIME @@ -85,6 +88,7 @@ config SOC_SAMA5D3 select HAVE_AT91_DBGU1 select AT91_USE_OLD_CLK select HAVE_AT91_UTMI + select HAVE_AT91_SMD select HAVE_AT91_USB_CLK help Select this if you are using one of Atmel's SAMA5D3 family SoC. @@ -157,6 +161,7 @@ config SOC_AT91SAM9X5 select SOC_AT91SAM9 select AT91_USE_OLD_CLK select HAVE_AT91_UTMI + select HAVE_AT91_SMD select HAVE_AT91_USB_CLK help Select this if you are using one of Atmel's AT91SAM9x5 family SoC. diff --git a/drivers/clk/at91/Makefile b/drivers/clk/at91/Makefile index 61db058be0c0..0e92b716f934 100644 --- a/drivers/clk/at91/Makefile +++ b/drivers/clk/at91/Makefile @@ -9,3 +9,4 @@ obj-y += clk-system.o clk-peripheral.o obj-$(CONFIG_AT91_PROGRAMMABLE_CLOCKS) += clk-programmable.o obj-$(CONFIG_HAVE_AT91_UTMI) += clk-utmi.o obj-$(CONFIG_HAVE_AT91_USB_CLK) += clk-usb.o +obj-$(CONFIG_HAVE_AT91_SMD) += clk-smd.o diff --git a/drivers/clk/at91/clk-smd.c b/drivers/clk/at91/clk-smd.c new file mode 100644 index 000000000000..144d47ecfe63 --- /dev/null +++ b/drivers/clk/at91/clk-smd.c @@ -0,0 +1,171 @@ +/* + * Copyright (C) 2013 Boris BREZILLON + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include +#include +#include +#include +#include +#include + +#include "pmc.h" + +#define SMD_SOURCE_MAX 2 + +#define SMD_DIV_SHIFT 8 +#define SMD_MAX_DIV 0xf + +struct at91sam9x5_clk_smd { + struct clk_hw hw; + struct at91_pmc *pmc; +}; + +#define to_at91sam9x5_clk_smd(hw) \ + container_of(hw, struct at91sam9x5_clk_smd, hw) + +static unsigned long at91sam9x5_clk_smd_recalc_rate(struct clk_hw *hw, + unsigned long parent_rate) +{ + u32 tmp; + u8 smddiv; + struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw); + struct at91_pmc *pmc = smd->pmc; + + tmp = pmc_read(pmc, AT91_PMC_SMD); + smddiv = (tmp & AT91_PMC_SMD_DIV) >> SMD_DIV_SHIFT; + return parent_rate / (smddiv + 1); +} + +static long at91sam9x5_clk_smd_round_rate(struct clk_hw *hw, unsigned long rate, + unsigned long *parent_rate) +{ + unsigned long div; + unsigned long bestrate; + unsigned long tmp; + + if (rate >= *parent_rate) + return *parent_rate; + + div = *parent_rate / rate; + if (div > SMD_MAX_DIV) + return *parent_rate / (SMD_MAX_DIV + 1); + + bestrate = *parent_rate / div; + tmp = *parent_rate / (div + 1); + if (bestrate - rate > rate - tmp) + bestrate = tmp; + + return bestrate; +} + +static int at91sam9x5_clk_smd_set_parent(struct clk_hw *hw, u8 index) +{ + u32 tmp; + struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw); + struct at91_pmc *pmc = smd->pmc; + + if (index > 1) + return -EINVAL; + tmp = pmc_read(pmc, AT91_PMC_SMD) & ~AT91_PMC_SMDS; + if (index) + tmp |= AT91_PMC_SMDS; + pmc_write(pmc, AT91_PMC_SMD, tmp); + return 0; +} + +static u8 at91sam9x5_clk_smd_get_parent(struct clk_hw *hw) +{ + struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw); + struct at91_pmc *pmc = smd->pmc; + + return pmc_read(pmc, AT91_PMC_SMD) & AT91_PMC_SMDS; +} + +static int at91sam9x5_clk_smd_set_rate(struct clk_hw *hw, unsigned long rate, + unsigned long parent_rate) +{ + u32 tmp; + struct at91sam9x5_clk_smd *smd = to_at91sam9x5_clk_smd(hw); + struct at91_pmc *pmc = smd->pmc; + unsigned long div = parent_rate / rate; + + if (parent_rate % rate || div < 1 || div > (SMD_MAX_DIV + 1)) + return -EINVAL; + tmp = pmc_read(pmc, AT91_PMC_SMD) & ~AT91_PMC_SMD_DIV; + tmp |= (div - 1) << SMD_DIV_SHIFT; + pmc_write(pmc, AT91_PMC_SMD, tmp); + + return 0; +} + +static const struct clk_ops at91sam9x5_smd_ops = { + .recalc_rate = at91sam9x5_clk_smd_recalc_rate, + .round_rate = at91sam9x5_clk_smd_round_rate, + .get_parent = at91sam9x5_clk_smd_get_parent, + .set_parent = at91sam9x5_clk_smd_set_parent, + .set_rate = at91sam9x5_clk_smd_set_rate, +}; + +static struct clk * __init +at91sam9x5_clk_register_smd(struct at91_pmc *pmc, const char *name, + const char **parent_names, u8 num_parents) +{ + struct at91sam9x5_clk_smd *smd; + struct clk *clk = NULL; + struct clk_init_data init; + + smd = kzalloc(sizeof(*smd), GFP_KERNEL); + if (!smd) + return ERR_PTR(-ENOMEM); + + init.name = name; + init.ops = &at91sam9x5_smd_ops; + init.parent_names = parent_names; + init.num_parents = num_parents; + init.flags = CLK_SET_RATE_GATE | CLK_SET_PARENT_GATE; + + smd->hw.init = &init; + smd->pmc = pmc; + + clk = clk_register(NULL, &smd->hw); + if (IS_ERR(clk)) + kfree(smd); + + return clk; +} + +void __init of_at91sam9x5_clk_smd_setup(struct device_node *np, + struct at91_pmc *pmc) +{ + struct clk *clk; + int i; + int num_parents; + const char *parent_names[SMD_SOURCE_MAX]; + const char *name = np->name; + + num_parents = of_count_phandle_with_args(np, "clocks", "#clock-cells"); + if (num_parents <= 0 || num_parents > SMD_SOURCE_MAX) + return; + + for (i = 0; i < num_parents; i++) { + parent_names[i] = of_clk_get_parent_name(np, i); + if (!parent_names[i]) + return; + } + + of_property_read_string(np, "clock-output-names", &name); + + clk = at91sam9x5_clk_register_smd(pmc, name, parent_names, + num_parents); + if (IS_ERR(clk)) + return; + + of_clk_add_provider(np, of_clk_src_simple_get, clk); +} diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c index 4fba500dec38..7b9db603b936 100644 --- a/drivers/clk/at91/pmc.c +++ b/drivers/clk/at91/pmc.c @@ -314,6 +314,13 @@ static const struct of_device_id pmc_clk_ids[] __initdata = { .compatible = "atmel,at91sam9n12-clk-usb", .data = of_at91sam9n12_clk_usb_setup, }, +#endif + /* SMD clock */ +#if defined(CONFIG_HAVE_AT91_SMD) + { + .compatible = "atmel,at91sam9x5-clk-smd", + .data = of_at91sam9x5_clk_smd_setup, + }, #endif { /*sentinel*/ } }; diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h index 2483ddc0868b..ba8d14233f80 100644 --- a/drivers/clk/at91/pmc.h +++ b/drivers/clk/at91/pmc.h @@ -108,4 +108,9 @@ extern void __init of_at91sam9n12_clk_usb_setup(struct device_node *np, struct at91_pmc *pmc); #endif +#if defined(CONFIG_HAVE_AT91_SMD) +extern void __init of_at91sam9x5_clk_smd_setup(struct device_node *np, + struct at91_pmc *pmc); +#endif + #endif /* __PMC_H_ */ -- cgit v1.2.3 From 7034be876e6b6f98b0babf359c21aab6b40bb9bd Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 11 Oct 2013 13:46:28 +0200 Subject: ARM: at91: move pit timer to common clk framework Use device tree to get the source clock of the PIT (Periodic Interval Timer). If the clock is not found in device tree (or dt is not enabled) we'll try to get it using clk_lookup definitions. Signed-off-by: Boris BREZILLON Acked-by: Mike Turquette Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/at91sam926x_time.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/at91sam926x_time.c b/arch/arm/mach-at91/at91sam926x_time.c index bb392320a0dd..0f04ffe9c5a8 100644 --- a/arch/arm/mach-at91/at91sam926x_time.c +++ b/arch/arm/mach-at91/at91sam926x_time.c @@ -39,6 +39,7 @@ static u32 pit_cycle; /* write-once */ static u32 pit_cnt; /* access only w/system irq blocked */ static void __iomem *pit_base_addr __read_mostly; +static struct clk *mck; static inline unsigned int pit_read(unsigned int reg_offset) { @@ -195,10 +196,14 @@ static int __init of_at91sam926x_pit_init(void) if (!pit_base_addr) goto node_err; + mck = of_clk_get(np, 0); + /* Get the interrupts property */ ret = irq_of_parse_and_map(np, 0); if (!ret) { pr_crit("AT91: PIT: Unable to get IRQ from DT\n"); + if (!IS_ERR(mck)) + clk_put(mck); goto ioremap_err; } at91sam926x_pit_irq.irq = ret; @@ -230,6 +235,8 @@ void __init at91sam926x_pit_init(void) unsigned bits; int ret; + mck = ERR_PTR(-ENOENT); + /* For device tree enabled device: initialize here */ of_at91sam926x_pit_init(); @@ -237,7 +244,12 @@ void __init at91sam926x_pit_init(void) * Use our actual MCK to figure out how many MCK/16 ticks per * 1/HZ period (instead of a compile-time constant LATCH). */ - pit_rate = clk_get_rate(clk_get(NULL, "mck")) / 16; + if (IS_ERR(mck)) + mck = clk_get(NULL, "mck"); + + if (IS_ERR(mck)) + panic("AT91: PIT: Unable to get mck clk\n"); + pit_rate = clk_get_rate(mck) / 16; pit_cycle = (pit_rate + HZ/2) / HZ; WARN_ON(((pit_cycle - 1) & ~AT91_PIT_PIV) != 0); -- cgit v1.2.3 From c59b631517e91300f6a4838f593ebca5ebde8742 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 11 Oct 2013 13:49:10 +0200 Subject: ARM: at91: add new compatible strings for pmc driver This patch adds new compatible string for PMC node to prepare the transition to common clk. These compatible string come from pmc driver in clk subsystem and are needed to provide new device tree compatibility with old at91 clks (device tree using common clks will use the new compatible strings). Signed-off-by: Boris BREZILLON Acked-by: Mike Turquette Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/clock.c | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 5f02aea1021c..72b257944733 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -884,6 +884,11 @@ static int __init at91_pmc_init(unsigned long main_clock) #if defined(CONFIG_OF) static struct of_device_id pmc_ids[] = { { .compatible = "atmel,at91rm9200-pmc" }, + { .compatible = "atmel,at91sam9260-pmc" }, + { .compatible = "atmel,at91sam9g45-pmc" }, + { .compatible = "atmel,at91sam9n12-pmc" }, + { .compatible = "atmel,at91sam9x5-pmc" }, + { .compatible = "atmel,sama5d3-pmc" }, { /*sentinel*/ } }; -- cgit v1.2.3 From d4d24c1b4f74e055905db6e677a2ba05f55de30a Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 11 Oct 2013 14:43:31 +0200 Subject: ARM: at91: prepare sama5 dt boards transition to common clk This patch prepare the transition to common clk for sama5 dt boards by replacing the timer init callback. Clocks registration cannot be done in early init callback (as formerly done by the old clk implementation) because it requires dynamic allocation which is not ready yet during early init. In the other hand, at91 clocks must be registered before at91sam926x_pit_init is called because PIT (Periodic Interval Timer) driver request the master clk (mck). A new function (at91sama5_dt_timer_init) is created to fullfil these needs. This function registers all at91 clks using the dt definition before calling the PIT init function. The device tree clock registration is enabled only if common clk is selected. Else the old clk registration is been done during at91_dt_initialize call. Signed-off-by: Boris BREZILLON Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/board-dt-sama5.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/board-dt-sama5.c b/arch/arm/mach-at91/board-dt-sama5.c index bf00d15d954d..075ec0576ada 100644 --- a/arch/arm/mach-at91/board-dt-sama5.c +++ b/arch/arm/mach-at91/board-dt-sama5.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -26,6 +27,13 @@ #include "at91_aic.h" #include "generic.h" +static void __init sama5_dt_timer_init(void) +{ +#if defined(CONFIG_COMMON_CLK) + of_clk_init(NULL); +#endif + at91sam926x_pit_init(); +} static const struct of_device_id irq_of_match[] __initconst = { @@ -72,7 +80,7 @@ static const char *sama5_dt_board_compat[] __initdata = { DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)") /* Maintainer: Atmel */ - .init_time = at91sam926x_pit_init, + .init_time = sama5_dt_timer_init, .map_io = at91_map_io, .handle_irq = at91_aic5_handle_irq, .init_early = at91_dt_initialize, -- cgit v1.2.3 From d1ff2300228e54f1d748f810a28134f4e6f160c7 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Mon, 2 Dec 2013 15:10:48 +0100 Subject: ARM: at91: prepare common clk transition for sama5d3 SoC This patch encloses sama5d3 old clk registration in "#if defined(CONFIG_OLD_CLK_AT91) #endif" sections. Signed-off-by: Boris BREZILLON Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/sama5d3.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c index 5c6dc24fafbd..f3313b9d084a 100644 --- a/arch/arm/mach-at91/sama5d3.c +++ b/arch/arm/mach-at91/sama5d3.c @@ -19,9 +19,10 @@ #include "soc.h" #include "generic.h" -#include "clock.h" #include "sam9_smc.h" +#if defined(CONFIG_OLD_CLK_AT91) +#include "clock.h" /* -------------------------------------------------------------------- * Clocks * -------------------------------------------------------------------- */ @@ -361,6 +362,7 @@ static void __init sama5d3_register_clocks(void) clk_register(&pck1); clk_register(&pck2); } +#endif /* -------------------------------------------------------------------- * AT91SAM9x5 processor initialization @@ -378,6 +380,8 @@ static void __init sama5d3_initialize(void) AT91_SOC_START(sama5d3) .map_io = sama5d3_map_io, +#if defined(CONFIG_OLD_CLK_AT91) .register_clocks = sama5d3_register_clocks, +#endif .init = sama5d3_initialize, AT91_SOC_END -- cgit v1.2.3 From 8ab033112a39bae52d61fa942fa69c2fc03f40b0 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Fri, 11 Oct 2013 14:43:35 +0200 Subject: ARM: at91: move sama5d3 SoC to common clk This patch removes the selection of AT91_USE_OLD_CLK when selecting sama5d3 SoC support. This will enable automatically enable COMMON_CLK_AT91 option and add support for at91 common clk implementation. Signed-off-by: Boris BREZILLON Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/Kconfig | 1 - 1 file changed, 1 deletion(-) (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 97033f792eea..b4f7d6ffa30b 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -86,7 +86,6 @@ config SOC_SAMA5D3 select SOC_SAMA5 select HAVE_FB_ATMEL select HAVE_AT91_DBGU1 - select AT91_USE_OLD_CLK select HAVE_AT91_UTMI select HAVE_AT91_SMD select HAVE_AT91_USB_CLK -- cgit v1.2.3 From b46e837d8ef1f3c777bbf9513e2cdb5d87d6c374 Mon Sep 17 00:00:00 2001 From: Boris BREZILLON Date: Mon, 2 Dec 2013 15:12:14 +0100 Subject: ARM: at91/dt: remove old clk material This patch removes the old main clk node which is now useless as sama5d3 SoCs and boards are no longer compatible with the old at91 clk implementations. It also remove old clock definitions (clock definitions using at91 old clk framework). Signed-off-by: Boris BREZILLON Signed-off-by: Nicolas Ferre --- arch/arm/boot/dts/sama5d3xcm.dtsi | 11 -- arch/arm/mach-at91/sama5d3.c | 346 -------------------------------------- 2 files changed, 357 deletions(-) (limited to 'arch/arm/mach-at91') diff --git a/arch/arm/boot/dts/sama5d3xcm.dtsi b/arch/arm/boot/dts/sama5d3xcm.dtsi index dce5419f773c..f55ed072c8e6 100644 --- a/arch/arm/boot/dts/sama5d3xcm.dtsi +++ b/arch/arm/boot/dts/sama5d3xcm.dtsi @@ -18,17 +18,6 @@ reg = <0x20000000 0x20000000>; }; - clocks { - #address-cells = <1>; - #size-cells = <1>; - ranges; - - main_clock: clock@0 { - compatible = "atmel,osc", "fixed-clock"; - clock-frequency = <12000000>; - }; - }; - ahb { apb { spi0: spi@f0004000 { diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c index f3313b9d084a..3d775d08de08 100644 --- a/arch/arm/mach-at91/sama5d3.c +++ b/arch/arm/mach-at91/sama5d3.c @@ -21,349 +21,6 @@ #include "generic.h" #include "sam9_smc.h" -#if defined(CONFIG_OLD_CLK_AT91) -#include "clock.h" -/* -------------------------------------------------------------------- - * Clocks - * -------------------------------------------------------------------- */ - -/* - * The peripheral clocks. - */ - -static struct clk pioA_clk = { - .name = "pioA_clk", - .pid = SAMA5D3_ID_PIOA, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk pioB_clk = { - .name = "pioB_clk", - .pid = SAMA5D3_ID_PIOB, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk pioC_clk = { - .name = "pioC_clk", - .pid = SAMA5D3_ID_PIOC, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk pioD_clk = { - .name = "pioD_clk", - .pid = SAMA5D3_ID_PIOD, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk pioE_clk = { - .name = "pioE_clk", - .pid = SAMA5D3_ID_PIOE, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk usart0_clk = { - .name = "usart0_clk", - .pid = SAMA5D3_ID_USART0, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk usart1_clk = { - .name = "usart1_clk", - .pid = SAMA5D3_ID_USART1, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk usart2_clk = { - .name = "usart2_clk", - .pid = SAMA5D3_ID_USART2, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk usart3_clk = { - .name = "usart3_clk", - .pid = SAMA5D3_ID_USART3, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk uart0_clk = { - .name = "uart0_clk", - .pid = SAMA5D3_ID_UART0, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk uart1_clk = { - .name = "uart1_clk", - .pid = SAMA5D3_ID_UART1, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk twi0_clk = { - .name = "twi0_clk", - .pid = SAMA5D3_ID_TWI0, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk twi1_clk = { - .name = "twi1_clk", - .pid = SAMA5D3_ID_TWI1, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk twi2_clk = { - .name = "twi2_clk", - .pid = SAMA5D3_ID_TWI2, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk mmc0_clk = { - .name = "mci0_clk", - .pid = SAMA5D3_ID_HSMCI0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mmc1_clk = { - .name = "mci1_clk", - .pid = SAMA5D3_ID_HSMCI1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk mmc2_clk = { - .name = "mci2_clk", - .pid = SAMA5D3_ID_HSMCI2, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk spi0_clk = { - .name = "spi0_clk", - .pid = SAMA5D3_ID_SPI0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk spi1_clk = { - .name = "spi1_clk", - .pid = SAMA5D3_ID_SPI1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk tcb0_clk = { - .name = "tcb0_clk", - .pid = SAMA5D3_ID_TC0, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk tcb1_clk = { - .name = "tcb1_clk", - .pid = SAMA5D3_ID_TC1, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk adc_clk = { - .name = "adc_clk", - .pid = SAMA5D3_ID_ADC, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk adc_op_clk = { - .name = "adc_op_clk", - .type = CLK_TYPE_PERIPHERAL, - .rate_hz = 5000000, -}; -static struct clk dma0_clk = { - .name = "dma0_clk", - .pid = SAMA5D3_ID_DMA0, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk dma1_clk = { - .name = "dma1_clk", - .pid = SAMA5D3_ID_DMA1, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk uhphs_clk = { - .name = "uhphs", - .pid = SAMA5D3_ID_UHPHS, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk udphs_clk = { - .name = "udphs_clk", - .pid = SAMA5D3_ID_UDPHS, - .type = CLK_TYPE_PERIPHERAL, -}; -/* gmac only for sama5d33, sama5d34, sama5d35 */ -static struct clk macb0_clk = { - .name = "macb0_clk", - .pid = SAMA5D3_ID_GMAC, - .type = CLK_TYPE_PERIPHERAL, -}; -/* emac only for sama5d31, sama5d35 */ -static struct clk macb1_clk = { - .name = "macb1_clk", - .pid = SAMA5D3_ID_EMAC, - .type = CLK_TYPE_PERIPHERAL, -}; -/* lcd only for sama5d31, sama5d33, sama5d34 */ -static struct clk lcdc_clk = { - .name = "lcdc_clk", - .pid = SAMA5D3_ID_LCDC, - .type = CLK_TYPE_PERIPHERAL, -}; -/* isi only for sama5d33, sama5d35 */ -static struct clk isi_clk = { - .name = "isi_clk", - .pid = SAMA5D3_ID_ISI, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk can0_clk = { - .name = "can0_clk", - .pid = SAMA5D3_ID_CAN0, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk can1_clk = { - .name = "can1_clk", - .pid = SAMA5D3_ID_CAN1, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk ssc0_clk = { - .name = "ssc0_clk", - .pid = SAMA5D3_ID_SSC0, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk ssc1_clk = { - .name = "ssc1_clk", - .pid = SAMA5D3_ID_SSC1, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV2, -}; -static struct clk sha_clk = { - .name = "sha_clk", - .pid = SAMA5D3_ID_SHA, - .type = CLK_TYPE_PERIPHERAL, - .div = AT91_PMC_PCR_DIV8, -}; -static struct clk aes_clk = { - .name = "aes_clk", - .pid = SAMA5D3_ID_AES, - .type = CLK_TYPE_PERIPHERAL, -}; -static struct clk tdes_clk = { - .name = "tdes_clk", - .pid = SAMA5D3_ID_TDES, - .type = CLK_TYPE_PERIPHERAL, -}; - -static struct clk *periph_clocks[] __initdata = { - &pioA_clk, - &pioB_clk, - &pioC_clk, - &pioD_clk, - &pioE_clk, - &usart0_clk, - &usart1_clk, - &usart2_clk, - &usart3_clk, - &uart0_clk, - &uart1_clk, - &twi0_clk, - &twi1_clk, - &twi2_clk, - &mmc0_clk, - &mmc1_clk, - &mmc2_clk, - &spi0_clk, - &spi1_clk, - &tcb0_clk, - &tcb1_clk, - &adc_clk, - &adc_op_clk, - &dma0_clk, - &dma1_clk, - &uhphs_clk, - &udphs_clk, - &macb0_clk, - &macb1_clk, - &lcdc_clk, - &isi_clk, - &can0_clk, - &can1_clk, - &ssc0_clk, - &ssc1_clk, - &sha_clk, - &aes_clk, - &tdes_clk, -}; - -static struct clk pck0 = { - .name = "pck0", - .pmc_mask = AT91_PMC_PCK0, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 0, -}; - -static struct clk pck1 = { - .name = "pck1", - .pmc_mask = AT91_PMC_PCK1, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 1, -}; - -static struct clk pck2 = { - .name = "pck2", - .pmc_mask = AT91_PMC_PCK2, - .type = CLK_TYPE_PROGRAMMABLE, - .id = 2, -}; - -static struct clk_lookup periph_clocks_lookups[] = { - /* lookup table for DT entries */ - CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck), - CLKDEV_CON_DEV_ID(NULL, "fffff200.gpio", &pioA_clk), - CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioB_clk), - CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk), - CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioD_clk), - CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioE_clk), - CLKDEV_CON_DEV_ID("usart", "f001c000.serial", &usart0_clk), - CLKDEV_CON_DEV_ID("usart", "f0020000.serial", &usart1_clk), - CLKDEV_CON_DEV_ID("usart", "f8020000.serial", &usart2_clk), - CLKDEV_CON_DEV_ID("usart", "f8024000.serial", &usart3_clk), - CLKDEV_CON_DEV_ID(NULL, "f0014000.i2c", &twi0_clk), - CLKDEV_CON_DEV_ID(NULL, "f0018000.i2c", &twi1_clk), - CLKDEV_CON_DEV_ID(NULL, "f801c000.i2c", &twi2_clk), - CLKDEV_CON_DEV_ID("mci_clk", "f0000000.mmc", &mmc0_clk), - CLKDEV_CON_DEV_ID("mci_clk", "f8000000.mmc", &mmc1_clk), - CLKDEV_CON_DEV_ID("mci_clk", "f8004000.mmc", &mmc2_clk), - CLKDEV_CON_DEV_ID("spi_clk", "f0004000.spi", &spi0_clk), - CLKDEV_CON_DEV_ID("spi_clk", "f8008000.spi", &spi1_clk), - CLKDEV_CON_DEV_ID("t0_clk", "f0010000.timer", &tcb0_clk), - CLKDEV_CON_DEV_ID("t0_clk", "f8014000.timer", &tcb1_clk), - CLKDEV_CON_DEV_ID("tsc_clk", "f8018000.tsadcc", &adc_clk), - CLKDEV_CON_DEV_ID("dma_clk", "ffffe600.dma-controller", &dma0_clk), - CLKDEV_CON_DEV_ID("dma_clk", "ffffe800.dma-controller", &dma1_clk), - CLKDEV_CON_DEV_ID("hclk", "600000.ohci", &uhphs_clk), - CLKDEV_CON_DEV_ID("ohci_clk", "600000.ohci", &uhphs_clk), - CLKDEV_CON_DEV_ID("ehci_clk", "700000.ehci", &uhphs_clk), - CLKDEV_CON_DEV_ID("pclk", "500000.gadget", &udphs_clk), - CLKDEV_CON_DEV_ID("hclk", "500000.gadget", &utmi_clk), - CLKDEV_CON_DEV_ID("hclk", "f0028000.ethernet", &macb0_clk), - CLKDEV_CON_DEV_ID("pclk", "f0028000.ethernet", &macb0_clk), - CLKDEV_CON_DEV_ID("hclk", "f802c000.ethernet", &macb1_clk), - CLKDEV_CON_DEV_ID("pclk", "f802c000.ethernet", &macb1_clk), - CLKDEV_CON_DEV_ID("pclk", "f0008000.ssc", &ssc0_clk), - CLKDEV_CON_DEV_ID("pclk", "f000c000.ssc", &ssc1_clk), - CLKDEV_CON_DEV_ID("can_clk", "f000c000.can", &can0_clk), - CLKDEV_CON_DEV_ID("can_clk", "f8010000.can", &can1_clk), - CLKDEV_CON_DEV_ID("sha_clk", "f8034000.sha", &sha_clk), - CLKDEV_CON_DEV_ID("aes_clk", "f8038000.aes", &aes_clk), - CLKDEV_CON_DEV_ID("tdes_clk", "f803c000.tdes", &tdes_clk), -}; - -static void __init sama5d3_register_clocks(void) -{ - int i; - - for (i = 0; i < ARRAY_SIZE(periph_clocks); i++) - clk_register(periph_clocks[i]); - - clkdev_add_table(periph_clocks_lookups, - ARRAY_SIZE(periph_clocks_lookups)); - - clk_register(&pck0); - clk_register(&pck1); - clk_register(&pck2); -} -#endif - /* -------------------------------------------------------------------- * AT91SAM9x5 processor initialization * -------------------------------------------------------------------- */ @@ -380,8 +37,5 @@ static void __init sama5d3_initialize(void) AT91_SOC_START(sama5d3) .map_io = sama5d3_map_io, -#if defined(CONFIG_OLD_CLK_AT91) - .register_clocks = sama5d3_register_clocks, -#endif .init = sama5d3_initialize, AT91_SOC_END -- cgit v1.2.3