From 8fe82a5550a8e97b3f59c74f994b88ed6b3544a3 Mon Sep 17 00:00:00 2001 From: Ludovic Desroches Date: Thu, 21 Jun 2012 14:47:27 +0200 Subject: ARM: at91: sparse irq support Enable sparse irq support for multisoc image. It involves to add the NR_IRQS_LEGACY offset to static SoC irq number definitions since NR_IRQS_LEGACY irq descs are allocated before AIC requests irq descs allocation. Move NR_AIC_IRQS macro to a more appropiate place with the purpose to remove mach/irqs.h later. Signed-off-by: Ludovic Desroches Signed-off-by: Nicolas Ferre --- arch/arm/mach-at91/irq.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'arch/arm/mach-at91/irq.c') diff --git a/arch/arm/mach-at91/irq.c b/arch/arm/mach-at91/irq.c index 390d4df21ef6..75ca2f44c78e 100644 --- a/arch/arm/mach-at91/irq.c +++ b/arch/arm/mach-at91/irq.c @@ -41,6 +41,8 @@ #include #include +#include + void __iomem *at91_aic_base; static struct irq_domain *at91_aic_domain; static struct device_node *at91_aic_np; @@ -302,11 +304,11 @@ void __init at91_aic_init(unsigned int priority[NR_AIC_IRQS]) */ for (i = 0; i < NR_AIC_IRQS; i++) { /* Put hardware irq number in Source Vector Register: */ - at91_aic_write(AT91_AIC_SVR(i), i); + at91_aic_write(AT91_AIC_SVR(i), NR_IRQS_LEGACY + i); /* Active Low interrupt, with the specified priority */ at91_aic_write(AT91_AIC_SMR(i), AT91_AIC_SRCTYPE_LOW | priority[i]); - irq_set_chip_and_handler(i, &at91_aic_chip, handle_fasteoi_irq); + irq_set_chip_and_handler(NR_IRQS_LEGACY + i, &at91_aic_chip, handle_fasteoi_irq); set_irq_flags(i, IRQF_VALID | IRQF_PROBE); } -- cgit v1.2.3