From 7cf261dd1efc593942db913c98851feadec9d73e Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 30 Nov 2012 15:19:59 +0000 Subject: ARM: ux500: Change IRQ from low-to-high edge triggered to high-to-low When the STMPE IRQ is triggered to be active high level-sensitive, the Nomadik GPIO controller it uses complains, although it still works. Recently we attempted to move triggering to low-to-high in an attempt to prevent the warning; however, this ensured that the IRQ was actually missed completely. Now we have a solution which both works and keeps the GPIO controller happy. Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/stuib.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/stuib.dtsi b/arch/arm/boot/dts/stuib.dtsi index 39446a247e79..615392a75676 100644 --- a/arch/arm/boot/dts/stuib.dtsi +++ b/arch/arm/boot/dts/stuib.dtsi @@ -15,7 +15,7 @@ stmpe1601: stmpe1601@40 { compatible = "st,stmpe1601"; reg = <0x40>; - interrupts = <26 0x1>; + interrupts = <26 0x2>; interrupt-parent = <&gpio6>; interrupt-controller; -- cgit v1.2.3 From fa17f9f3ef818308c8a7ed537bd87bd504cfb1f7 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 31 Jan 2013 11:24:19 +0000 Subject: ARM: ux500: Include the PRCMU's Secure Registers in DB8500's DT Currently we only include the PRCMU's primary registers when referencing the register count in the 'reg' property. This patch expands that count to include the secure registers also. Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/dbx5x0.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 69140ba99f46..2ec1599a89a0 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -191,7 +191,7 @@ prcmu: prcmu@80157000 { compatible = "stericsson,db8500-prcmu"; - reg = <0x80157000 0x1000>; + reg = <0x80157000 0x2000>; reg-names = "prcmu"; interrupts = <0 47 0x4>; #address-cells = <1>; -- cgit v1.2.3 From 4f902b42211b977f00a63ad6635277ef14382240 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 6 Dec 2012 14:00:01 +0000 Subject: ARM: ux500: Set correct MMCI regulator voltages in the ux5x0 Device Tree Correct the voltage specified by the mmci regulator node in Device Tree. Despite the MMC subsystem insisting on v3.3, we actually only offer v2.9, and not v2.6 which must have actually been a typo. Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/dbx5x0.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index 2ec1599a89a0..a8562e38e9b0 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -675,7 +675,7 @@ compatible = "regulator-gpio"; regulator-min-microvolt = <1800000>; - regulator-max-microvolt = <2600000>; + regulator-max-microvolt = <2900000>; regulator-name = "mmci-reg"; regulator-type = "voltage"; -- cgit v1.2.3 From e7bda303a43f5507cb76f8b41a6e73fec0f83cc8 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 6 Dec 2012 15:00:46 +0000 Subject: ARM: ux500: Specify the ux5x0 MMCI regulator's on/off GPIO as high-enable If not specified, the GPIO control bit is inverted by default i.e. low-enable and high-disable. This is not the case with the MMCI regulator, hence it will turn on during a disable and off when regulator_enable() is invoked. Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/dbx5x0.dtsi | 2 ++ 1 file changed, 2 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index a8562e38e9b0..b5e73aa4c3c2 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -679,6 +679,8 @@ regulator-name = "mmci-reg"; regulator-type = "voltage"; + enable-active-high; + states = <1800000 0x1 2900000 0x0>; -- cgit v1.2.3 From d05b066f6720be1a4771f1b922a3926da7097beb Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 6 Dec 2012 15:08:45 +0000 Subject: ARM: ux500: Specify which IOS regulator to use for MMCI In an effort to move platform specific GPIO controlled regulators out from platform code we've created a new mechanism to specify them from within the MMCI driver using the supply name 'vmmc-ios'. For that to happen when booting device tree, we need to supply it in the MMCI (SDI) node. Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/href.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/href.dtsi b/arch/arm/boot/dts/href.dtsi index 592fb9dc35bd..f2c0f66c4fda 100644 --- a/arch/arm/boot/dts/href.dtsi +++ b/arch/arm/boot/dts/href.dtsi @@ -87,6 +87,7 @@ mmc-cap-sd-highspeed; mmc-cap-mmc-highspeed; vmmc-supply = <&ab8500_ldo_aux3_reg>; + vqmmc-supply = <&vmmci>; cd-gpios = <&tc3589x_gpio 3 0x4>; -- cgit v1.2.3 From 757660038c187766d39dbfccc26e279862b23a5d Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Thu, 6 Dec 2012 15:11:53 +0000 Subject: ARM: ux500: Use the correct name when supplying a GPIO enable pin Correct a typo in the Device Tree source file, where instead of specifying property 'enable-gpio', which the driver is expecting we specified 'gpio-enable' instead. Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/hrefprev60.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/hrefprev60.dts b/arch/arm/boot/dts/hrefprev60.dts index eec29c4a86dc..9194fb63348e 100644 --- a/arch/arm/boot/dts/hrefprev60.dts +++ b/arch/arm/boot/dts/hrefprev60.dts @@ -40,7 +40,7 @@ vmmci: regulator-gpio { gpios = <&tc3589x_gpio 18 0x4>; - gpio-enable = <&tc3589x_gpio 17 0x4>; + enable-gpio = <&tc3589x_gpio 17 0x4>; status = "okay"; }; -- cgit v1.2.3 From 874c920241640595da77622b6ee98c14e79296e4 Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Fri, 7 Dec 2012 13:46:01 +0000 Subject: ARM: ux500: Setup correct settling time for the MMCI regulator The GPIO controlled MMCI regulator used on the ux5x0 boards takes 100us to settle. There's already a binding to provide such information. Let's make use of it. Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/dbx5x0.dtsi | 1 + 1 file changed, 1 insertion(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/dbx5x0.dtsi b/arch/arm/boot/dts/dbx5x0.dtsi index b5e73aa4c3c2..d765c38afebf 100644 --- a/arch/arm/boot/dts/dbx5x0.dtsi +++ b/arch/arm/boot/dts/dbx5x0.dtsi @@ -679,6 +679,7 @@ regulator-name = "mmci-reg"; regulator-type = "voltage"; + startup-delay-us = <100>; enable-active-high; states = <1800000 0x1 -- cgit v1.2.3 From d00156e8dfc204b97653a59ae31fa9eceff1db5f Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Wed, 16 Jan 2013 14:23:38 +0000 Subject: ARM: ux500: enable AB8500 GPIO for HREF The AB8500 GPIO driver has been un-BROKEN and rewritten as a pinctrl driver. Now that it's back in use, let's ensure that it's available when booting HREF with Device Tree enabled. Cc: arm@kernel.org Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/hrefprev60.dts | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/hrefprev60.dts b/arch/arm/boot/dts/hrefprev60.dts index 9194fb63348e..c2d274815923 100644 --- a/arch/arm/boot/dts/hrefprev60.dts +++ b/arch/arm/boot/dts/hrefprev60.dts @@ -25,6 +25,14 @@ }; soc-u9500 { + prcmu@80157000 { + ab8500@5 { + ab8500-gpio { + compatible = "stericsson,ab8500-gpio"; + }; + }; + }; + i2c@80004000 { tps61052@33 { compatible = "tps61052"; -- cgit v1.2.3 From 924e82dacab9a0b2ea661c57c98112569267f0db Mon Sep 17 00:00:00 2001 From: Lee Jones Date: Wed, 16 Jan 2013 14:28:03 +0000 Subject: ARM: ux500: allow Snowball access to the AB8500 GPIO pins The AB8500 GPIO driver has been un-BROKEN and rewritten as a pinctrl driver. Now that it's back in use, let's ensure that it's available when booting Snowball with Device Tree enabled. Cc: arm@kernel.org Signed-off-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/snowball.dts | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/snowball.dts b/arch/arm/boot/dts/snowball.dts index 27f31a5fa494..b095e85d93c8 100644 --- a/arch/arm/boot/dts/snowball.dts +++ b/arch/arm/boot/dts/snowball.dts @@ -299,6 +299,10 @@ }; ab8500@5 { + ab8500-gpio { + compatible = "stericsson,ab8500-gpio"; + }; + ab8500-regulators { ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { regulator-name = "V-DISPLAY"; -- cgit v1.2.3 From 908ab9368866e6edf0edebdd546adefd5f3128f9 Mon Sep 17 00:00:00 2001 From: Joseph Lo Date: Fri, 22 Feb 2013 11:23:39 +0800 Subject: ARM: dts: tegra: fix the activate polarity of cd-gpio in mmc host The GPIO pin of SD slot card detection should active low. Signed-off-by: Joseph Lo Tested-by: Thierry Reding Signed-off-by: Stephen Warren --- arch/arm/boot/dts/tegra20-colibri-512.dtsi | 2 +- arch/arm/boot/dts/tegra20-harmony.dts | 4 ++-- arch/arm/boot/dts/tegra20-paz00.dts | 2 +- arch/arm/boot/dts/tegra20-seaboard.dts | 2 +- arch/arm/boot/dts/tegra20-tamonten.dtsi | 2 +- arch/arm/boot/dts/tegra20-trimslice.dts | 2 +- arch/arm/boot/dts/tegra20-ventana.dts | 2 +- arch/arm/boot/dts/tegra20-whistler.dts | 1 + arch/arm/boot/dts/tegra30-beaver.dts | 2 +- arch/arm/boot/dts/tegra30-cardhu.dtsi | 2 +- 10 files changed, 11 insertions(+), 10 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi index 444162090042..cb73e62d61a9 100644 --- a/arch/arm/boot/dts/tegra20-colibri-512.dtsi +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -444,7 +444,7 @@ }; sdhci@c8000600 { - cd-gpios = <&gpio 23 0>; /* gpio PC7 */ + cd-gpios = <&gpio 23 1>; /* gpio PC7 */ }; sound { diff --git a/arch/arm/boot/dts/tegra20-harmony.dts b/arch/arm/boot/dts/tegra20-harmony.dts index 61d027f03617..1f79c0debb05 100644 --- a/arch/arm/boot/dts/tegra20-harmony.dts +++ b/arch/arm/boot/dts/tegra20-harmony.dts @@ -437,7 +437,7 @@ sdhci@c8000200 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 155 0>; /* gpio PT3 */ bus-width = <4>; @@ -445,7 +445,7 @@ sdhci@c8000600 { status = "okay"; - cd-gpios = <&gpio 58 0>; /* gpio PH2 */ + cd-gpios = <&gpio 58 1>; /* gpio PH2 */ wp-gpios = <&gpio 59 0>; /* gpio PH3 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ bus-width = <8>; diff --git a/arch/arm/boot/dts/tegra20-paz00.dts b/arch/arm/boot/dts/tegra20-paz00.dts index 54d6fce00a59..9db36da8e023 100644 --- a/arch/arm/boot/dts/tegra20-paz00.dts +++ b/arch/arm/boot/dts/tegra20-paz00.dts @@ -436,7 +436,7 @@ sdhci@c8000000 { status = "okay"; - cd-gpios = <&gpio 173 0>; /* gpio PV5 */ + cd-gpios = <&gpio 173 1>; /* gpio PV5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 169 0>; /* gpio PV1 */ bus-width = <4>; diff --git a/arch/arm/boot/dts/tegra20-seaboard.dts b/arch/arm/boot/dts/tegra20-seaboard.dts index 37b3a57ec0f1..715a8b8dd9cd 100644 --- a/arch/arm/boot/dts/tegra20-seaboard.dts +++ b/arch/arm/boot/dts/tegra20-seaboard.dts @@ -584,7 +584,7 @@ sdhci@c8000400 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ bus-width = <4>; diff --git a/arch/arm/boot/dts/tegra20-tamonten.dtsi b/arch/arm/boot/dts/tegra20-tamonten.dtsi index 4766abae7a72..6e9d91fc6195 100644 --- a/arch/arm/boot/dts/tegra20-tamonten.dtsi +++ b/arch/arm/boot/dts/tegra20-tamonten.dtsi @@ -465,7 +465,7 @@ }; sdhci@c8000600 { - cd-gpios = <&gpio 58 0>; /* gpio PH2 */ + cd-gpios = <&gpio 58 1>; /* gpio PH2 */ wp-gpios = <&gpio 59 0>; /* gpio PH3 */ bus-width = <4>; status = "okay"; diff --git a/arch/arm/boot/dts/tegra20-trimslice.dts b/arch/arm/boot/dts/tegra20-trimslice.dts index 5d79e4fc49a6..98f3e44f2a51 100644 --- a/arch/arm/boot/dts/tegra20-trimslice.dts +++ b/arch/arm/boot/dts/tegra20-trimslice.dts @@ -325,7 +325,7 @@ sdhci@c8000600 { status = "okay"; - cd-gpios = <&gpio 121 0>; /* gpio PP1 */ + cd-gpios = <&gpio 121 1>; /* gpio PP1 */ wp-gpios = <&gpio 122 0>; /* gpio PP2 */ bus-width = <4>; }; diff --git a/arch/arm/boot/dts/tegra20-ventana.dts b/arch/arm/boot/dts/tegra20-ventana.dts index 425c89000c20..4aef56f2d96a 100644 --- a/arch/arm/boot/dts/tegra20-ventana.dts +++ b/arch/arm/boot/dts/tegra20-ventana.dts @@ -520,7 +520,7 @@ sdhci@c8000400 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 57 0>; /* gpio PH1 */ power-gpios = <&gpio 70 0>; /* gpio PI6 */ bus-width = <4>; diff --git a/arch/arm/boot/dts/tegra20-whistler.dts b/arch/arm/boot/dts/tegra20-whistler.dts index ea57c0f6dcce..5762188c60ad 100644 --- a/arch/arm/boot/dts/tegra20-whistler.dts +++ b/arch/arm/boot/dts/tegra20-whistler.dts @@ -510,6 +510,7 @@ sdhci@c8000400 { status = "okay"; + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 173 0>; /* gpio PV5 */ bus-width = <8>; }; diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts index 8ff2ff20e4a3..0a2cd24df853 100644 --- a/arch/arm/boot/dts/tegra30-beaver.dts +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -257,7 +257,7 @@ sdhci@78000000 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 155 0>; /* gpio PT3 */ power-gpios = <&gpio 31 0>; /* gpio PD7 */ bus-width = <4>; diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi index 17499272a4ef..3e2d21018a5b 100644 --- a/arch/arm/boot/dts/tegra30-cardhu.dtsi +++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi @@ -311,7 +311,7 @@ sdhci@78000000 { status = "okay"; - cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + cd-gpios = <&gpio 69 1>; /* gpio PI5 */ wp-gpios = <&gpio 155 0>; /* gpio PT3 */ power-gpios = <&gpio 31 0>; /* gpio PD7 */ bus-width = <4>; -- cgit v1.2.3 From 7e16063bb8f4c4f2e2b055659b40a319092e62da Mon Sep 17 00:00:00 2001 From: Pawel Moll Date: Tue, 9 Apr 2013 14:03:51 +0100 Subject: ARM: vexpress: Remove A9 PMU compatible values for non-A9 platforms The ARM perf core code used to rely on the pmu node being compatible with "arm,cortex-a9-pmu", even when the PMUs of the different Cortex-A processors are not really compatible... This is no longer required and actually became harmful, so remove all the offending values from Versatile Express DTS files. Signed-off-by: Pawel Moll Signed-off-by: Olof Johansson --- arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 2 +- arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts | 2 +- arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot') diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index 73187173117c..9420053acc14 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -117,7 +117,7 @@ }; pmu { - compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu"; + compatible = "arm,cortex-a15-pmu"; interrupts = <0 68 4>, <0 69 4>; }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts index dfe371ec2749..d2803be4e1a8 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15_a7.dts @@ -134,7 +134,7 @@ }; pmu { - compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu"; + compatible = "arm,cortex-a15-pmu"; interrupts = <0 68 4>, <0 69 4>; }; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts index 6328cbc71d30..c544a5504591 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts @@ -111,7 +111,7 @@ }; pmu { - compatible = "arm,cortex-a5-pmu", "arm,cortex-a9-pmu"; + compatible = "arm,cortex-a5-pmu"; interrupts = <0 68 4>, <0 69 4>; }; -- cgit v1.2.3