From be6688350a4470e417aaeca54d162652aab40ac5 Mon Sep 17 00:00:00 2001 From: Lokesh Vutla Date: Wed, 12 Nov 2014 10:54:15 +0530 Subject: ARM: dts: DRA7: wdt: Fix compatible property for watchdog node OMAP wdt driver supports only ti,omap3-wdt compatible. In DRA7 dt wdt compatible property is defined as ti,omap4-wdt by mistake instead of ti,omap3-wdt. Correcting the typo. Fixes: 6e58b8f1daaf1a ("ARM: dts: DRA7: Add the dts files for dra7 SoC and dra7-evm board") Signed-off-by: Lokesh Vutla Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi index 9cc98436a982..666e796847d8 100644 --- a/arch/arm/boot/dts/dra7.dtsi +++ b/arch/arm/boot/dts/dra7.dtsi @@ -653,7 +653,7 @@ }; wdt2: wdt@4ae14000 { - compatible = "ti,omap4-wdt"; + compatible = "ti,omap3-wdt"; reg = <0x4ae14000 0x80>; interrupts = ; ti,hwmods = "wd_timer2"; -- cgit v1.2.3 From e671538d5110e913a0a3cd6122d7f70b71fc0728 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Mon, 13 Oct 2014 11:50:41 +0300 Subject: ARM: dts: dra7: fix DSS PLL clock mux registers The clock nodes for DSS VIDEO1/2 and HDMI have wrong register addresses. This patch fixes the addresses so that they point to CM_CLKSEL_VIDEO1_PLL_SYS, CM_CLKSEL_VIDEO2_PLL_SYS and CM_CLKSEL_HDMI_PLL_SYS. Reported-by: Somnath Mukherjee Signed-off-by: Tomi Valkeinen Acked-by: Tero Kristo Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7xx-clocks.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi index 2c05b3f017fa..4bdcbd61ce47 100644 --- a/arch/arm/boot/dts/dra7xx-clocks.dtsi +++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi @@ -1042,7 +1042,7 @@ #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&sys_clkin1>, <&sys_clkin2>; - reg = <0x01a4>; + reg = <0x0164>; }; mlb_clk: mlb_clk { @@ -1084,14 +1084,14 @@ #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&sys_clkin1>, <&sys_clkin2>; - reg = <0x01d0>; + reg = <0x0168>; }; video2_dpll_clk_mux: video2_dpll_clk_mux { #clock-cells = <0>; compatible = "ti,mux-clock"; clocks = <&sys_clkin1>, <&sys_clkin2>; - reg = <0x01d4>; + reg = <0x016c>; }; wkupaon_iclk_mux: wkupaon_iclk_mux { -- cgit v1.2.3 From 01824a57673d2e4bfb27bf5b8f88563717b5edf0 Mon Sep 17 00:00:00 2001 From: Tony Lindgren Date: Wed, 10 Dec 2014 08:21:56 -0800 Subject: ARM: dts: Fix gpmc regression for omap 2430sdp smc91x Commit f4d809ec55b6 ("ARM: dts: Fix gpmc timings for omap 2430sdp") added GPMC timings for 2430sdp. This however broke the Ethernet for some versions of u-boot using a different L3 clock frequency: set_gpmc_timing_reg: GPMC error! CS5: cs_rd_off: 233 ns, 39 ticks > 31 omap-gpmc 6e000000.gpmc: failed to set gpmc timings for: ethernet This is because the smsc91x timings from 1.1.4 u-boot overflow the GPMC registers when booted with 1.1.3 version of u-boot. Let's fix this issue by using the better timings from u-boot 1.1.3 as they also work on 1.1.4 and are faster. Note that so far the attempts over the years to calculate the GPMC timings on the SDP boards have failed probably because of the unknown latencies added by the FPGA on the debug boards. Reported-by: Nishanth Menon Acked-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/omap2430-sdp.dts | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/omap2430-sdp.dts b/arch/arm/boot/dts/omap2430-sdp.dts index 05eca2e4430f..6b36ede58488 100644 --- a/arch/arm/boot/dts/omap2430-sdp.dts +++ b/arch/arm/boot/dts/omap2430-sdp.dts @@ -48,22 +48,22 @@ gpmc,device-width = <1>; gpmc,cycle2cycle-samecsen = <1>; gpmc,cycle2cycle-diffcsen = <1>; - gpmc,cs-on-ns = <7>; - gpmc,cs-rd-off-ns = <233>; - gpmc,cs-wr-off-ns = <233>; - gpmc,adv-on-ns = <22>; - gpmc,adv-rd-off-ns = <60>; - gpmc,adv-wr-off-ns = <60>; - gpmc,oe-on-ns = <67>; - gpmc,oe-off-ns = <210>; - gpmc,we-on-ns = <67>; - gpmc,we-off-ns = <210>; - gpmc,rd-cycle-ns = <233>; - gpmc,wr-cycle-ns = <233>; - gpmc,access-ns = <233>; - gpmc,page-burst-access-ns = <30>; - gpmc,bus-turnaround-ns = <30>; - gpmc,cycle2cycle-delay-ns = <30>; + gpmc,cs-on-ns = <6>; + gpmc,cs-rd-off-ns = <187>; + gpmc,cs-wr-off-ns = <187>; + gpmc,adv-on-ns = <18>; + gpmc,adv-rd-off-ns = <48>; + gpmc,adv-wr-off-ns = <48>; + gpmc,oe-on-ns = <60>; + gpmc,oe-off-ns = <169>; + gpmc,we-on-ns = <66>; + gpmc,we-off-ns = <169>; + gpmc,rd-cycle-ns = <187>; + gpmc,wr-cycle-ns = <187>; + gpmc,access-ns = <187>; + gpmc,page-burst-access-ns = <24>; + gpmc,bus-turnaround-ns = <24>; + gpmc,cycle2cycle-delay-ns = <24>; gpmc,wait-monitoring-ns = <0>; gpmc,clk-activation-ns = <0>; gpmc,wr-data-mux-bus-ns = <0>; -- cgit v1.2.3 From 58230c2c443bc9801293f6535144d04ceaf731e0 Mon Sep 17 00:00:00 2001 From: Felipe Balbi Date: Thu, 4 Dec 2014 09:10:21 -0600 Subject: ARM: dts: am437x-sk: fix lcd enable pin mux data Caused by a copy & paste error. Note that even with this bug AM437x SK display still works because GPIO mux mode is always enabled. It's still wrong to mux somebody else's pin. Luckily ball D25 (offset 0x238 - gpio5_8) on AM437x isn't used for anything. While at that, also replace a pullup with a pulldown as that gpio should be normally low, not high. Cc: # v3.17+ Acked-by: Tomi Valkeinen Signed-off-by: Felipe Balbi Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 87aa4f3b8b3d..0efd3ecc59b7 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -320,8 +320,7 @@ lcd_pins: lcd_pins { pinctrl-single,pins = < - /* GPIO 5_8 to select LCD / HDMI */ - 0x238 (PIN_OUTPUT_PULLUP | MUX_MODE7) + 0x1c (PIN_OUTPUT_PULLDOWN | MUX_MODE7) /* gpcm_ad7.gpio1_7 */ >; }; }; -- cgit v1.2.3 From d114e8543520a7b8fa99a95ae59c0a918f1add11 Mon Sep 17 00:00:00 2001 From: Ravikumar Kattekola Date: Wed, 3 Dec 2014 17:33:56 +0530 Subject: ARM: dts: dra7-evm: Fix typo in SMPS6 (VDD_GPU) max voltage The max expected voltage for VDD_GPU, connected to SMPS6, is 1.25V. Correct regulator max voltage constraint to meet this requirement. Document reference: DRA74 Data Manual, SPRS857M - Dec 2012, Revised Oct 2014. Fixes: c56a831ca47e ("ARM: dts: DRA7: Add TPS659038 PMIC nodes") Signed-off-by: Ravikumar Kattekola Acked-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7-evm.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index 736092b1a535..b6b92861115d 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -304,7 +304,7 @@ /* VDD_GPU - over VDD_SMPS6 */ regulator-name = "smps6"; regulator-min-microvolt = <850000>; - regulator-max-microvolt = <12500000>; + regulator-max-microvolt = <1250000>; regulator-always-on; regulator-boot-on; }; -- cgit v1.2.3 From 70fcaf921c87df274615398c135e86439ad6f799 Mon Sep 17 00:00:00 2001 From: Ravikumar Kattekola Date: Wed, 3 Dec 2014 17:33:57 +0530 Subject: ARM: dts: dra7-evm: Update SMPS7 (VDD_CORE) max voltage to match DM As per the latest Data Manual, for newer samples, the nominal voltage required for VDD_CORE at OPP_NOM can be upto 1.06V which was 1.03V earlier. Update the regulator max voltage constraint for SMPS7, connected to VDD_CORE, to meet this requirement. Document reference: DRA74 Data Manual, SPRS857M - Dec 2012, Revised Oct 2014. DRA72 Data Manual, SPRS906G - Dec 2012, revised Oct 2014. Signed-off-by: Ravikumar Kattekola Acked-by: Nishanth Menon Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/dra7-evm.dts | 2 +- arch/arm/boot/dts/dra72-evm.dts | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts index b6b92861115d..10b725c7bfc0 100644 --- a/arch/arm/boot/dts/dra7-evm.dts +++ b/arch/arm/boot/dts/dra7-evm.dts @@ -313,7 +313,7 @@ /* CORE_VDD */ regulator-name = "smps7"; regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1030000>; + regulator-max-microvolt = <1060000>; regulator-always-on; regulator-boot-on; }; diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts index afc74fd4bb5e..89085d066c65 100644 --- a/arch/arm/boot/dts/dra72-evm.dts +++ b/arch/arm/boot/dts/dra72-evm.dts @@ -160,7 +160,7 @@ /* VDD_CORE */ regulator-name = "smps2"; regulator-min-microvolt = <850000>; - regulator-max-microvolt = <1030000>; + regulator-max-microvolt = <1060000>; regulator-boot-on; regulator-always-on; }; -- cgit v1.2.3 From d73f825e6efa723e81d9ffcc4949fe9f03f1df29 Mon Sep 17 00:00:00 2001 From: Tomi Valkeinen Date: Fri, 5 Dec 2014 09:39:31 +0200 Subject: ARM: dts: am437x-sk-evm.dts: fix LCD timings The lcd0 node for am437x-sk-evm.dts contains bad LCD timings, and while they seem to work with a quick test, doing for example blank/unblank will give you a black display. This patch updates the timings to the 'typical' values from the LCD spec sheet. Also, the compatible string is completely bogus, as "osddisplays,osd057T0559-34ts" is _not_ a 480x272 panel. The panel on the board is a newhaven one. Update the compatible string to reflect this. Note that this hasn't caused any issues, as the "panel-dpi" matches the driver. Cc: # v3.17+ Tested-by: Felipe Balbi Signed-off-by: Tomi Valkeinen Signed-off-by: Tony Lindgren --- arch/arm/boot/dts/am437x-sk-evm.dts | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'arch/arm/boot/dts') diff --git a/arch/arm/boot/dts/am437x-sk-evm.dts b/arch/arm/boot/dts/am437x-sk-evm.dts index 0efd3ecc59b7..53bbfc90b26a 100644 --- a/arch/arm/boot/dts/am437x-sk-evm.dts +++ b/arch/arm/boot/dts/am437x-sk-evm.dts @@ -100,7 +100,7 @@ }; lcd0: display { - compatible = "osddisplays,osd057T0559-34ts", "panel-dpi"; + compatible = "newhaven,nhd-4.3-480272ef-atxl", "panel-dpi"; label = "lcd"; pinctrl-names = "default"; @@ -112,11 +112,11 @@ clock-frequency = <9000000>; hactive = <480>; vactive = <272>; - hfront-porch = <8>; - hback-porch = <43>; - hsync-len = <4>; - vback-porch = <12>; - vfront-porch = <4>; + hfront-porch = <2>; + hback-porch = <2>; + hsync-len = <41>; + vfront-porch = <2>; + vback-porch = <2>; vsync-len = <10>; hsync-active = <0>; vsync-active = <0>; -- cgit v1.2.3