From 72b3e249ce5fb298e69bec698f9fdae7cc3f4ceb Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Fri, 18 Oct 2013 10:39:58 +0200 Subject: ARM: ux500: fix I2C4 clock bit The PCLK for I2C4 is controlled by bit 10 in the PCKEN registers while the KCLK is controlled by bit 9 on the KCKEN, it's one of these odd assymetric things. Correct the PCLK bit to 10. Acked-by: Lee Jones Signed-off-by: Linus Walleij --- arch/arm/boot/dts/ste-dbx5x0.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'arch/arm/boot/dts/ste-dbx5x0.dtsi') diff --git a/arch/arm/boot/dts/ste-dbx5x0.dtsi b/arch/arm/boot/dts/ste-dbx5x0.dtsi index 5112f4cd8bce..0fc634b1b50e 100644 --- a/arch/arm/boot/dts/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/ste-dbx5x0.dtsi @@ -694,7 +694,7 @@ clock-frequency = <400000>; - clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 9>; + clocks = <&prcc_kclk 1 9>, <&prcc_pclk 1 10>; clock-names = "i2cclk", "apb_pclk"; }; -- cgit v1.2.3