From f4e2f7cc6999943e0a649cbc4618428181aad58f Mon Sep 17 00:00:00 2001 From: Vineet Gupta Date: Thu, 29 Oct 2015 15:47:57 +0530 Subject: ARC: mm: TLB Miss optim: avoid re-reading ECR For setting PTE Dirty bit, reuse the prior test for ST miss. No need to reload ECR and test for ST cause code as the prev condition code is still valid (uncloberred) Signed-off-by: Vineet Gupta --- arch/arc/mm/tlbex.S | 2 -- 1 file changed, 2 deletions(-) (limited to 'arch/arc/mm') diff --git a/arch/arc/mm/tlbex.S b/arch/arc/mm/tlbex.S index 110c72536e8b..4c88148d4cd1 100644 --- a/arch/arc/mm/tlbex.S +++ b/arch/arc/mm/tlbex.S @@ -380,9 +380,7 @@ ENTRY(EV_TLBMissD) ;---------------------------------------------------------------- ; UPDATE_PTE: Let Linux VM know that page was accessed/dirty - lr r3, [ecr] or r0, r0, _PAGE_ACCESSED ; Accessed bit always - btst_s r3, ECR_C_BIT_DTLB_ST_MISS ; See if it was a Write Access ? or.nz r0, r0, _PAGE_DIRTY ; if Write, set Dirty bit as well st_s r0, [r1] ; Write back PTE -- cgit v1.2.3