From b8c1eca1e089e8f4247b19b73955c875bf7b18ae Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Fri, 19 Feb 2016 15:19:43 +0300 Subject: arc: axs10x - add support of ARC PGU Synopsys DesignWare ARC SDP boards sport ARC SDP display controller attached to ADV7511 HDMI encoder. That change adds desctiption of both ARC PGU and ADV7511 in ARC SDP'd base-board Device Tree. Signed-off-by: Alexey Brodkin Cc: Rob Herring Cc: Pawel Moll Cc: Mark Rutland Cc: Ian Campbell Cc: Kumar Gala Cc: Vineet Gupta Cc: devicetree@vger.kernel.org Cc: linux-snps-arc@lists.infradead.org --- arch/arc/boot/dts/axs10x_mb.dtsi | 61 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) (limited to 'arch/arc/boot/dts') diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi index ab5d5701e11d..823f15ca68df 100644 --- a/arch/arc/boot/dts/axs10x_mb.dtsi +++ b/arch/arc/boot/dts/axs10x_mb.dtsi @@ -34,6 +34,12 @@ clock-frequency = <50000000>; #clock-cells = <0>; }; + + pguclk: pguclk { + #clock-cells = <0>; + compatible = "fixed-clock"; + clock-frequency = <74440000>; + }; }; ethernet@0x18000 { @@ -155,6 +161,37 @@ clocks = <&i2cclk>; interrupts = <16>; + adv7511:adv7511@39{ + compatible="adi,adv7511"; + reg = <0x39>; + interrupts = <23>; + adi,input-depth = <8>; + adi,input-colorspace = "rgb"; + adi,input-clock = "1x"; + adi,clock-delay = <0x03>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + /* RGB/YUV input */ + port@0 { + reg = <0>; + adv7511_input:endpoint { + remote-endpoint = <&pgu_output>; + }; + }; + + /* HDMI output */ + port@1 { + reg = <1>; + adv7511_output: endpoint { + remote-endpoint = <&hdmi_connector_in>; + }; + }; + }; + }; + eeprom@0x54{ compatible = "24c01"; reg = <0x54>; @@ -168,6 +205,16 @@ }; }; + hdmi0: connector { + compatible = "hdmi-connector"; + type = "a"; + port { + hdmi_connector_in: endpoint { + remote-endpoint = <&adv7511_output>; + }; + }; + }; + gpio0:gpio@13000 { compatible = "snps,dw-apb-gpio"; reg = <0x13000 0x1000>; @@ -229,5 +276,19 @@ reg = <2>; }; }; + + pgu@17000 { + compatible = "snps,arcpgu"; + reg = <0x17000 0x400>; + encoder-slave = <&adv7511>; + clocks = <&pguclk>; + clock-names = "pxlclk"; + + port { + pgu_output: endpoint { + remote-endpoint = <&adv7511_input>; + }; + }; + }; }; }; -- cgit v1.2.3 From cb2ad5e5339c5122166265cea579cc6a356d46de Mon Sep 17 00:00:00 2001 From: Alexey Brodkin Date: Wed, 27 Apr 2016 16:59:50 +0300 Subject: ARC: [axs10x] Specify reserved memory for frame buffer Allocation of a frame buffer memory in a special memory region allows bypassing of so-called IO Coherency aperture which is typically set as a range 0x8z-0xAz. I.e. all data traffic to PGU bypasses IO Coherency block and saves its bandwidth for other peripherals. Even though for AXS101 (which sorts ARC770 CPU) IOC is not an option for a sake of keeping one DT description for the base-board (axs10x_mb.dtsi) we're still defining reserved memory location in the very end of DDR. Signed-off-by: Alexey Brodkin Acked-by: Vineet Gupta Cc: devicetree@vger.kernel.org --- arch/arc/boot/dts/axc001.dtsi | 22 ++++++++++++++++++++-- arch/arc/boot/dts/axc003.dtsi | 14 ++++++++++++++ arch/arc/boot/dts/axc003_idu.dtsi | 14 ++++++++++++++ arch/arc/boot/dts/axs10x_mb.dtsi | 2 +- 4 files changed, 49 insertions(+), 3 deletions(-) (limited to 'arch/arc/boot/dts') diff --git a/arch/arc/boot/dts/axc001.dtsi b/arch/arc/boot/dts/axc001.dtsi index 420dcfde289f..262496ac2628 100644 --- a/arch/arc/boot/dts/axc001.dtsi +++ b/arch/arc/boot/dts/axc001.dtsi @@ -93,8 +93,26 @@ memory { #address-cells = <1>; #size-cells = <1>; - ranges = <0x00000000 0x80000000 0x40000000>; + ranges = <0x00000000 0x80000000 0x20000000>; device_type = "memory"; - reg = <0x80000000 0x20000000>; /* 512MiB */ + reg = <0x80000000 0x1b000000>; /* (512 - 32) MiB */ + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + /* + * We just move frame buffer area to the very end of + * available DDR. And even though in case of ARC770 there's + * no strict requirement for a frame-buffer to be in any + * particular location it allows us to use the same + * base board's DT node for ARC PGU as for ARc HS38. + */ + frame_buffer: frame_buffer@9e000000 { + compatible = "shared-dma-pool"; + reg = <0x9e000000 0x2000000>; + no-map; + }; }; }; diff --git a/arch/arc/boot/dts/axc003.dtsi b/arch/arc/boot/dts/axc003.dtsi index f90fadf7f94e..35ece04d8353 100644 --- a/arch/arc/boot/dts/axc003.dtsi +++ b/arch/arc/boot/dts/axc003.dtsi @@ -100,4 +100,18 @@ device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512MiB */ }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + /* + * Move frame buffer out of IOC aperture (0x8z-0xAz). + */ + frame_buffer: frame_buffer@be000000 { + compatible = "shared-dma-pool"; + reg = <0xbe000000 0x2000000>; + no-map; + }; + }; }; diff --git a/arch/arc/boot/dts/axc003_idu.dtsi b/arch/arc/boot/dts/axc003_idu.dtsi index 06a9f294a2e6..df9ddb623bfe 100644 --- a/arch/arc/boot/dts/axc003_idu.dtsi +++ b/arch/arc/boot/dts/axc003_idu.dtsi @@ -123,4 +123,18 @@ device_type = "memory"; reg = <0x80000000 0x20000000>; /* 512MiB */ }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + /* + * Move frame buffer out of IOC aperture (0x8z-0xAz). + */ + frame_buffer: frame_buffer@be000000 { + compatible = "shared-dma-pool"; + reg = <0xbe000000 0x2000000>; + no-map; + }; + }; }; diff --git a/arch/arc/boot/dts/axs10x_mb.dtsi b/arch/arc/boot/dts/axs10x_mb.dtsi index 823f15ca68df..64b063d4e996 100644 --- a/arch/arc/boot/dts/axs10x_mb.dtsi +++ b/arch/arc/boot/dts/axs10x_mb.dtsi @@ -283,7 +283,7 @@ encoder-slave = <&adv7511>; clocks = <&pguclk>; clock-names = "pxlclk"; - + memory-region = <&frame_buffer>; port { pgu_output: endpoint { remote-endpoint = <&adv7511_input>; -- cgit v1.2.3