From fe1a56420cf2ec28c8eceef672b87de0bbe1a260 Mon Sep 17 00:00:00 2001 From: Hauke Mehrtens Date: Sun, 9 Sep 2018 22:16:45 +0200 Subject: net: lantiq: Add Lantiq / Intel VRX200 Ethernet driver This drives the PMAC between the GSWIP Switch and the CPU in the VRX200 SoC. This is currently only the very basic version of the Ethernet driver. When the DMA channel is activated we receive some packets which were send to the SoC while it was still in U-Boot, these packets have the wrong header. Resetting the IP cores did not work so we read out the extra packets at the beginning and discard them. This also adapts the clock code in sysctrl.c to use the default name of the device node so that the driver gets the correct clock. sysctrl.c should be replaced with a proper common clock driver later. Signed-off-by: Hauke Mehrtens Signed-off-by: David S. Miller --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index a11fbbe2be73..a58cfcb2ee6b 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -8172,6 +8172,7 @@ M: Hauke Mehrtens L: netdev@vger.kernel.org S: Maintained F: net/dsa/tag_gswip.c +F: drivers/net/ethernet/lantiq_xrx200.c LANTIQ MIPS ARCHITECTURE M: John Crispin -- cgit v1.2.3