From fd7cb3e4684f0c044a627dc33adb9f97c69f033f Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 10 Aug 2022 15:02:43 +0100 Subject: MAINTAINERS: add PolarFire SoC dt bindings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit So far when I added bindings for the platform I never added them to our MAINTAINERS entry. No time like the present to improve the coverage. Suggested-by: Mark Brown Signed-off-by: Conor Dooley Acked-by: Marc Kleine-Budde # for can Acked-by: Uwe Kleine-König CC: Mark Brown CC: Wolfram Sang CC: Thierry Reding CC: Uwe Kleine-König CC: Jassi Brar CC: Linus Walleij CC: Bartosz Golaszewski CC: Greg Kroah-Hartman CC: Arnd Bergmann CC: Olof Johansson CC: Michael Turquette CC: Stephen Boyd Link: https://lore.kernel.org/r/20220810140243.2685416-2-conor.dooley@microchip.com' Signed-off-by: Arnd Bergmann --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 64379c699903..9dec9a56f8dd 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17277,6 +17277,15 @@ M: Conor Dooley M: Daire McNamara L: linux-riscv@lists.infradead.org S: Supported +F: Documentation/devicetree/bindings/clock/microchip,mpfs.yaml +F: Documentation/devicetree/bindings/gpio/microchip,mpfs-gpio.yaml +F: Documentation/devicetree/bindings/i2c/microchip,corei2c.yaml +F: Documentation/devicetree/bindings/mailbox/microchip,mpfs-mailbox.yaml +F: Documentation/devicetree/bindings/net/can/microchip,mpfs-can.yaml +F: Documentation/devicetree/bindings/pwm/microchip,corepwm.yaml +F: Documentation/devicetree/bindings/soc/microchip/microchip,mpfs-sys-controller.yaml +F: Documentation/devicetree/bindings/spi/microchip,mpfs-spi.yaml +F: Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml F: arch/riscv/boot/dts/microchip/ F: drivers/char/hw_random/mpfs-rng.c F: drivers/clk/microchip/clk-mpfs.c -- cgit v1.2.3 From 3cbd673846772153a0aa85471aef5788f1a53dcd Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Wed, 10 Aug 2022 15:02:44 +0100 Subject: MAINTAINERS: add the Polarfire SoC's i2c driver Add the newly added i2c controller driver to the existing entry for PolarFire SoC. Signed-off-by: Conor Dooley Acked-by: Wolfram Sang Link: https://lore.kernel.org/r/20220810140243.2685416-3-conor.dooley@microchip.com' Signed-off-by: Arnd Bergmann --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 9dec9a56f8dd..aa6e11600d72 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17289,6 +17289,7 @@ F: Documentation/devicetree/bindings/usb/microchip,mpfs-musb.yaml F: arch/riscv/boot/dts/microchip/ F: drivers/char/hw_random/mpfs-rng.c F: drivers/clk/microchip/clk-mpfs.c +F: drivers/i2c/busses/i2c-microchip-core.c F: drivers/mailbox/mailbox-mpfs.c F: drivers/pci/controller/pcie-microchip-host.c F: drivers/soc/microchip/ -- cgit v1.2.3