From 28e5d3bb0325e71ef9b53a9cb4242cdfb55fd8c5 Mon Sep 17 00:00:00 2001 From: William Breathitt Gray Date: Wed, 28 Sep 2016 14:00:01 -0400 Subject: iio: 104-quad-8: Add IIO support for the ACCES 104-QUAD-8 The ACCES 104-QUAD-8 is a general purpose quadrature encoder counter/interface board. The 104-QUAD-8 is capable of monitoring the outputs of eight encoders via four on-board LSI/CSI LS7266R1 24-bit dual-axis quadrature counter chips. Core functions handled by the LS7266R1, such as direction and total count, are available. Performing a write to a counter's IIO_CHAN_INFO_RAW sets the counter and also clears the counter's respective error flag. Although the counters have a 25-bit range, only the lower 24 bits may be set, either directly or via a counter's preset attribute. Interrupts are not supported by this driver. This driver adds IIO support for the ACCES 104-QUAD-8 and ACCES 104-QUAD-4. The base port addresses for the devices may be configured via the base array module parameter. Signed-off-by: William Breathitt Gray Signed-off-by: Jonathan Cameron --- MAINTAINERS | 6 ++++++ 1 file changed, 6 insertions(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index e013c2be6d23..982dff301045 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -255,6 +255,12 @@ L: linux-gpio@vger.kernel.org S: Maintained F: drivers/gpio/gpio-104-idio-16.c +ACCES 104-QUAD-8 IIO DRIVER +M: William Breathitt Gray +L: linux-iio@vger.kernel.org +S: Maintained +F: drivers/iio/counter/104-quad-8.c + ACENIC DRIVER M: Jes Sorensen L: linux-acenic@sunsite.dk -- cgit v1.2.3 From d5d4602e040538b56e6fbedcc8542dce7e2352d3 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Tue, 11 Oct 2016 14:12:29 +0300 Subject: Staging: iio: fix a MAINTAINERS entry The "drivers/" part of the path name was missing. Signed-off-by: Dan Carpenter Signed-off-by: Jonathan Cameron --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 982dff301045..583088b04c81 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -776,7 +776,7 @@ S: Supported F: drivers/iio/*/ad* X: drivers/iio/*/adjd* F: drivers/staging/iio/*/ad* -F: staging/iio/trigger/iio-trig-bfin-timer.c +F: drivers/staging/iio/trigger/iio-trig-bfin-timer.c ANALOG DEVICES INC DMA DRIVERS M: Lars-Peter Clausen -- cgit v1.2.3 From 4a5a7a662a009e0d3359ea368f8141eafd21b1e4 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Mon, 17 Oct 2016 12:44:06 -0700 Subject: MAINTAINERS: Add the staging vchiq driver as a bcm2835 responsibility. It's being merged to support firmware communication on the Raspberry Pi, so we should probably send its patches to linux-rpi-kernel. Signed-off-by: Eric Anholt Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 7084d8e8592f..8d9392ac6e78 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2592,6 +2592,7 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) T: git git://git.kernel.org/pub/scm/linux/kernel/git/rpi/linux-rpi.git S: Maintained N: bcm2835 +F: drivers/staging/vc04_services BROADCOM BCM47XX MIPS ARCHITECTURE M: Hauke Mehrtens -- cgit v1.2.3 From 3904b28efb2c780c23dcddfb87e07fe0230661e5 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Tue, 25 Oct 2016 16:15:54 +0200 Subject: iio: gyro: Add driver for the MPU-3050 gyroscope This adds a new driver for the Invensense MPU-3050 gyroscope. This driver is based on information from the rough input driver in drivers/input/misc/mpu3050.c and the scratch misc driver posted by Nathan Royer in 2011. Some years have passed but this is finally a fully-fledged driver for this gyroscope. It was developed and tested on the Qualcomm APQ8060 Dragonboard. The driver supports both raw and buffered input. It also supports the internal trigger mechanism by registering a trigger that can fire in response to the internal sample engine of the component. In addition to reading out the gyroscope sensor values, the driver also supports reading the temperature from the sensor. The driver currently only supports I2C but the MPU-3050 can also be used from SPI, so the I2C portions are split in their own file and we just use regmap to access all registers, so it will be trivial to plug in SPI support if/when someone has a system requiring this. To conserve power, the driver utilizes the runtime PM framework and will put the sensor in off mode and disable the regulators when unused, after a timeout of 10 seconds. The fullscale can be set for the sensor to 250, 500, 1000 or 2000 deg/s. This corresponds to scale values of rougly 0.000122, 0.000275, 0.000512 or 0.001068. By writing such values (or close to these) into "in_anglevel_scale", the corresponding fullscale can be chosen. It will default to 2000 deg/s (~35 rad/s). The gyro component can have DC offsets on all axes. These can be compensated using the standard sysfs ABI property "in_anglevel_[xyz]_calibbias". This is in positive/negative values of the raw values, so a suitable calibration bias can be determined by userspace by reading the "in_anglevel_[xyz]_raw" for a few iterations while holding the sensor still, create an average integer, and writing the negative inverse of that into "in_anglevel_[xyz]_calibbias". After this the hardware will automatically subtract the bias, also when using buffered readings. Since the MPU-3050 has an outgoing I2C port it needs to act as an I2C mux. This means that the device is switching I2C traffic to devices beyond it. On my system this is the only way to reach the accelerometer. The "sensor fusion" ability of the MPU-3050 to directly talk to the device on the outgoing I2C port is currently not used by the driver, but it has code to allow I2C traffic to pass through so that the Linux kernel can reach the device on the other side with a kernel driver. Example usage with the native trigger: $ generic_buffer -a -c10 -n mpu3050 iio device number being used is 0 iio trigger number being used is 0 No channels are enabled, enabling all channels Enabling: in_anglvel_z_en Enabling: in_timestamp_en Enabling: in_anglvel_y_en Enabling: in_temp_en Enabling: in_anglvel_x_en /sys/bus/iio/devices/iio:device0 mpu3050-dev0 29607.142578 -0.117493 0.074768 0.012817 180788797150 29639.285156 -0.117493 0.076904 0.013885 180888982335 29696.427734 -0.116425 0.076904 0.012817 180989178039 29742.857422 -0.117493 0.076904 0.012817 181089377742 29764.285156 -0.116425 0.077972 0.012817 181189574187 29860.714844 -0.115356 0.076904 0.012817 181289772705 29864.285156 -0.117493 0.076904 0.012817 181389971520 29910.714844 -0.115356 0.076904 0.013885 181490170483 29917.857422 -0.116425 0.076904 0.011749 181590369742 29975.000000 -0.116425 0.076904 0.012817 181690567075 Disabling: in_anglvel_z_en Disabling: in_timestamp_en Disabling: in_anglvel_y_en Disabling: in_temp_en Disabling: in_anglvel_x_en The first column is the temperature in millidegrees, then the x,y,z axes in succession followed by the timestamp. Also tested successfully using the HRTimer trigger. Cc: Nick Vaccaro Cc: Ge Gao Cc: Anna Si Cc: Dmitry Torokhov Cc: Crestez Dan Leonard Cc: Daniel Baluta Cc: Gregor Boirie Cc: Peter Rosin Cc: Peter Meerwald-Stadler Signed-off-by: Linus Walleij Signed-off-by: Jonathan Cameron --- MAINTAINERS | 7 + drivers/iio/gyro/Kconfig | 17 + drivers/iio/gyro/Makefile | 5 + drivers/iio/gyro/mpu3050-core.c | 1307 +++++++++++++++++++++++++++++++++++++++ drivers/iio/gyro/mpu3050-i2c.c | 124 ++++ drivers/iio/gyro/mpu3050.h | 96 +++ 6 files changed, 1556 insertions(+) create mode 100644 drivers/iio/gyro/mpu3050-core.c create mode 100644 drivers/iio/gyro/mpu3050-i2c.c create mode 100644 drivers/iio/gyro/mpu3050.h (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 7084d8e8592f..5e218aaa4c7a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6496,6 +6496,13 @@ S: Maintained F: arch/x86/include/asm/pmc_core.h F: drivers/platform/x86/intel_pmc_core* +INVENSENSE MPU-3050 GYROSCOPE DRIVER +M: Linus Walleij +L: linux-iio@vger.kernel.org +S: Maintained +F: drivers/iio/gyro/mpu3050* +F: Documentation/devicetree/bindings/iio/gyroscope/inv,mpu3050.txt + IOC3 ETHERNET DRIVER M: Ralf Baechle L: linux-mips@linux-mips.org diff --git a/drivers/iio/gyro/Kconfig b/drivers/iio/gyro/Kconfig index 205a84420ae9..107b5efd4178 100644 --- a/drivers/iio/gyro/Kconfig +++ b/drivers/iio/gyro/Kconfig @@ -84,6 +84,23 @@ config HID_SENSOR_GYRO_3D Say yes here to build support for the HID SENSOR Gyroscope 3D. +config MPU3050 + tristate + select IIO_BUFFER + select IIO_TRIGGERED_BUFFER + select REGMAP + +config MPU3050_I2C + tristate "Invensense MPU3050 devices on I2C" + depends on !(INPUT_MPU3050=y || INPUT_MPU3050=m) + select MPU3050 + select REGMAP_I2C + select I2C_MUX + help + This driver supports the Invensense MPU3050 gyroscope over I2C. + This driver can be built as a module. The module will be called + inv-mpu3050-i2c. + config IIO_ST_GYRO_3AXIS tristate "STMicroelectronics gyroscopes 3-Axis Driver" depends on (I2C || SPI_MASTER) && SYSFS diff --git a/drivers/iio/gyro/Makefile b/drivers/iio/gyro/Makefile index f866a4be0667..f0e149a606b0 100644 --- a/drivers/iio/gyro/Makefile +++ b/drivers/iio/gyro/Makefile @@ -14,6 +14,11 @@ obj-$(CONFIG_BMG160_SPI) += bmg160_spi.o obj-$(CONFIG_HID_SENSOR_GYRO_3D) += hid-sensor-gyro-3d.o +# Currently this is rolled into one module, split it if +# we ever create a separate SPI interface for MPU-3050 +obj-$(CONFIG_MPU3050) += mpu3050.o +mpu3050-objs := mpu3050-core.o mpu3050-i2c.o + itg3200-y := itg3200_core.o itg3200-$(CONFIG_IIO_BUFFER) += itg3200_buffer.o obj-$(CONFIG_ITG3200) += itg3200.o diff --git a/drivers/iio/gyro/mpu3050-core.c b/drivers/iio/gyro/mpu3050-core.c new file mode 100644 index 000000000000..ed681c70a7b4 --- /dev/null +++ b/drivers/iio/gyro/mpu3050-core.c @@ -0,0 +1,1307 @@ +/* + * MPU3050 gyroscope driver + * + * Copyright (C) 2016 Linaro Ltd. + * Author: Linus Walleij + * + * Based on the input subsystem driver, Copyright (C) 2011 Wistron Co.Ltd + * Joseph Lai and trimmed down by + * Alan Cox in turn based on bma023.c. + * Device behaviour based on a misc driver posted by Nathan Royer in 2011. + * + * TODO: add support for setting up the low pass 3dB frequency. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "mpu3050.h" + +#define MPU3050_CHIP_ID 0x69 + +/* + * Register map: anything suffixed *_H is a big-endian high byte and always + * followed by the corresponding low byte (*_L) even though these are not + * explicitly included in the register definitions. + */ +#define MPU3050_CHIP_ID_REG 0x00 +#define MPU3050_PRODUCT_ID_REG 0x01 +#define MPU3050_XG_OFFS_TC 0x05 +#define MPU3050_YG_OFFS_TC 0x08 +#define MPU3050_ZG_OFFS_TC 0x0B +#define MPU3050_X_OFFS_USR_H 0x0C +#define MPU3050_Y_OFFS_USR_H 0x0E +#define MPU3050_Z_OFFS_USR_H 0x10 +#define MPU3050_FIFO_EN 0x12 +#define MPU3050_AUX_VDDIO 0x13 +#define MPU3050_SLV_ADDR 0x14 +#define MPU3050_SMPLRT_DIV 0x15 +#define MPU3050_DLPF_FS_SYNC 0x16 +#define MPU3050_INT_CFG 0x17 +#define MPU3050_AUX_ADDR 0x18 +#define MPU3050_INT_STATUS 0x1A +#define MPU3050_TEMP_H 0x1B +#define MPU3050_XOUT_H 0x1D +#define MPU3050_YOUT_H 0x1F +#define MPU3050_ZOUT_H 0x21 +#define MPU3050_DMP_CFG1 0x35 +#define MPU3050_DMP_CFG2 0x36 +#define MPU3050_BANK_SEL 0x37 +#define MPU3050_MEM_START_ADDR 0x38 +#define MPU3050_MEM_R_W 0x39 +#define MPU3050_FIFO_COUNT_H 0x3A +#define MPU3050_FIFO_R 0x3C +#define MPU3050_USR_CTRL 0x3D +#define MPU3050_PWR_MGM 0x3E + +/* MPU memory bank read options */ +#define MPU3050_MEM_PRFTCH BIT(5) +#define MPU3050_MEM_USER_BANK BIT(4) +/* Bits 8-11 select memory bank */ +#define MPU3050_MEM_RAM_BANK_0 0 +#define MPU3050_MEM_RAM_BANK_1 1 +#define MPU3050_MEM_RAM_BANK_2 2 +#define MPU3050_MEM_RAM_BANK_3 3 +#define MPU3050_MEM_OTP_BANK_0 4 + +#define MPU3050_AXIS_REGS(axis) (MPU3050_XOUT_H + (axis * 2)) + +/* Register bits */ + +/* FIFO Enable */ +#define MPU3050_FIFO_EN_FOOTER BIT(0) +#define MPU3050_FIFO_EN_AUX_ZOUT BIT(1) +#define MPU3050_FIFO_EN_AUX_YOUT BIT(2) +#define MPU3050_FIFO_EN_AUX_XOUT BIT(3) +#define MPU3050_FIFO_EN_GYRO_ZOUT BIT(4) +#define MPU3050_FIFO_EN_GYRO_YOUT BIT(5) +#define MPU3050_FIFO_EN_GYRO_XOUT BIT(6) +#define MPU3050_FIFO_EN_TEMP_OUT BIT(7) + +/* + * Digital Low Pass filter (DLPF) + * Full Scale (FS) + * and Synchronization + */ +#define MPU3050_EXT_SYNC_NONE 0x00 +#define MPU3050_EXT_SYNC_TEMP 0x20 +#define MPU3050_EXT_SYNC_GYROX 0x40 +#define MPU3050_EXT_SYNC_GYROY 0x60 +#define MPU3050_EXT_SYNC_GYROZ 0x80 +#define MPU3050_EXT_SYNC_ACCELX 0xA0 +#define MPU3050_EXT_SYNC_ACCELY 0xC0 +#define MPU3050_EXT_SYNC_ACCELZ 0xE0 +#define MPU3050_EXT_SYNC_MASK 0xE0 +#define MPU3050_EXT_SYNC_SHIFT 5 + +#define MPU3050_FS_250DPS 0x00 +#define MPU3050_FS_500DPS 0x08 +#define MPU3050_FS_1000DPS 0x10 +#define MPU3050_FS_2000DPS 0x18 +#define MPU3050_FS_MASK 0x18 +#define MPU3050_FS_SHIFT 3 + +#define MPU3050_DLPF_CFG_256HZ_NOLPF2 0x00 +#define MPU3050_DLPF_CFG_188HZ 0x01 +#define MPU3050_DLPF_CFG_98HZ 0x02 +#define MPU3050_DLPF_CFG_42HZ 0x03 +#define MPU3050_DLPF_CFG_20HZ 0x04 +#define MPU3050_DLPF_CFG_10HZ 0x05 +#define MPU3050_DLPF_CFG_5HZ 0x06 +#define MPU3050_DLPF_CFG_2100HZ_NOLPF 0x07 +#define MPU3050_DLPF_CFG_MASK 0x07 +#define MPU3050_DLPF_CFG_SHIFT 0 + +/* Interrupt config */ +#define MPU3050_INT_RAW_RDY_EN BIT(0) +#define MPU3050_INT_DMP_DONE_EN BIT(1) +#define MPU3050_INT_MPU_RDY_EN BIT(2) +#define MPU3050_INT_ANYRD_2CLEAR BIT(4) +#define MPU3050_INT_LATCH_EN BIT(5) +#define MPU3050_INT_OPEN BIT(6) +#define MPU3050_INT_ACTL BIT(7) +/* Interrupt status */ +#define MPU3050_INT_STATUS_RAW_RDY BIT(0) +#define MPU3050_INT_STATUS_DMP_DONE BIT(1) +#define MPU3050_INT_STATUS_MPU_RDY BIT(2) +#define MPU3050_INT_STATUS_FIFO_OVFLW BIT(7) +/* USR_CTRL */ +#define MPU3050_USR_CTRL_FIFO_EN BIT(6) +#define MPU3050_USR_CTRL_AUX_IF_EN BIT(5) +#define MPU3050_USR_CTRL_AUX_IF_RST BIT(3) +#define MPU3050_USR_CTRL_FIFO_RST BIT(1) +#define MPU3050_USR_CTRL_GYRO_RST BIT(0) +/* PWR_MGM */ +#define MPU3050_PWR_MGM_PLL_X 0x01 +#define MPU3050_PWR_MGM_PLL_Y 0x02 +#define MPU3050_PWR_MGM_PLL_Z 0x03 +#define MPU3050_PWR_MGM_CLKSEL_MASK 0x07 +#define MPU3050_PWR_MGM_STBY_ZG BIT(3) +#define MPU3050_PWR_MGM_STBY_YG BIT(4) +#define MPU3050_PWR_MGM_STBY_XG BIT(5) +#define MPU3050_PWR_MGM_SLEEP BIT(6) +#define MPU3050_PWR_MGM_RESET BIT(7) +#define MPU3050_PWR_MGM_MASK 0xff + +/* + * Fullscale precision is (for finest precision) +/- 250 deg/s, so the full + * scale is actually 500 deg/s. All 16 bits are then used to cover this scale, + * in two's complement. + */ +static unsigned int mpu3050_fs_precision[] = { + IIO_DEGREE_TO_RAD(250), + IIO_DEGREE_TO_RAD(500), + IIO_DEGREE_TO_RAD(1000), + IIO_DEGREE_TO_RAD(2000) +}; + +/* + * Regulator names + */ +static const char mpu3050_reg_vdd[] = "vdd"; +static const char mpu3050_reg_vlogic[] = "vlogic"; + +static unsigned int mpu3050_get_freq(struct mpu3050 *mpu3050) +{ + unsigned int freq; + + if (mpu3050->lpf == MPU3050_DLPF_CFG_256HZ_NOLPF2) + freq = 8000; + else + freq = 1000; + freq /= (mpu3050->divisor + 1); + + return freq; +} + +static int mpu3050_start_sampling(struct mpu3050 *mpu3050) +{ + __be16 raw_val[3]; + int ret; + int i; + + /* Reset */ + ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, + MPU3050_PWR_MGM_RESET, MPU3050_PWR_MGM_RESET); + if (ret) + return ret; + + /* Turn on the Z-axis PLL */ + ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, + MPU3050_PWR_MGM_CLKSEL_MASK, + MPU3050_PWR_MGM_PLL_Z); + if (ret) + return ret; + + /* Write calibration offset registers */ + for (i = 0; i < 3; i++) + raw_val[i] = cpu_to_be16(mpu3050->calibration[i]); + + ret = regmap_bulk_write(mpu3050->map, MPU3050_X_OFFS_USR_H, raw_val, + sizeof(raw_val)); + if (ret) + return ret; + + /* Set low pass filter (sample rate), sync and full scale */ + ret = regmap_write(mpu3050->map, MPU3050_DLPF_FS_SYNC, + MPU3050_EXT_SYNC_NONE << MPU3050_EXT_SYNC_SHIFT | + mpu3050->fullscale << MPU3050_FS_SHIFT | + mpu3050->lpf << MPU3050_DLPF_CFG_SHIFT); + if (ret) + return ret; + + /* Set up sampling frequency */ + ret = regmap_write(mpu3050->map, MPU3050_SMPLRT_DIV, mpu3050->divisor); + if (ret) + return ret; + + /* + * Max 50 ms start-up time after setting DLPF_FS_SYNC + * according to the data sheet, then wait for the next sample + * at this frequency T = 1000/f ms. + */ + msleep(50 + 1000 / mpu3050_get_freq(mpu3050)); + + return 0; +} + +static int mpu3050_set_8khz_samplerate(struct mpu3050 *mpu3050) +{ + int ret; + u8 divisor; + enum mpu3050_lpf lpf; + + lpf = mpu3050->lpf; + divisor = mpu3050->divisor; + + mpu3050->lpf = LPF_256_HZ_NOLPF; /* 8 kHz base frequency */ + mpu3050->divisor = 0; /* Divide by 1 */ + ret = mpu3050_start_sampling(mpu3050); + + mpu3050->lpf = lpf; + mpu3050->divisor = divisor; + + return ret; +} + +static int mpu3050_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, + long mask) +{ + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + int ret; + __be16 raw_val; + + switch (mask) { + case IIO_CHAN_INFO_OFFSET: + switch (chan->type) { + case IIO_TEMP: + /* The temperature scaling is (x+23000)/280 Celsius */ + *val = 23000; + return IIO_VAL_INT; + default: + return -EINVAL; + } + case IIO_CHAN_INFO_CALIBBIAS: + switch (chan->type) { + case IIO_ANGL_VEL: + *val = mpu3050->calibration[chan->scan_index-1]; + return IIO_VAL_INT; + default: + return -EINVAL; + } + case IIO_CHAN_INFO_SAMP_FREQ: + *val = mpu3050_get_freq(mpu3050); + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + switch (chan->type) { + case IIO_TEMP: + /* Millidegrees, see about temperature scaling above */ + *val = 1000; + *val2 = 280; + return IIO_VAL_FRACTIONAL; + case IIO_ANGL_VEL: + /* + * Convert to the corresponding full scale in + * radians. All 16 bits are used with sign to + * span the available scale: to account for the one + * missing value if we multiply by 1/S16_MAX, instead + * multiply with 2/U16_MAX. + */ + *val = mpu3050_fs_precision[mpu3050->fullscale] * 2; + *val2 = U16_MAX; + return IIO_VAL_FRACTIONAL; + default: + return -EINVAL; + } + case IIO_CHAN_INFO_RAW: + /* Resume device */ + pm_runtime_get_sync(mpu3050->dev); + mutex_lock(&mpu3050->lock); + + ret = mpu3050_set_8khz_samplerate(mpu3050); + if (ret) + goto out_read_raw_unlock; + + switch (chan->type) { + case IIO_TEMP: + ret = regmap_bulk_read(mpu3050->map, MPU3050_TEMP_H, + &raw_val, sizeof(raw_val)); + if (ret) { + dev_err(mpu3050->dev, + "error reading temperature\n"); + goto out_read_raw_unlock; + } + + *val = be16_to_cpu(raw_val); + ret = IIO_VAL_INT; + + goto out_read_raw_unlock; + case IIO_ANGL_VEL: + ret = regmap_bulk_read(mpu3050->map, + MPU3050_AXIS_REGS(chan->scan_index-1), + &raw_val, + sizeof(raw_val)); + if (ret) { + dev_err(mpu3050->dev, + "error reading axis data\n"); + goto out_read_raw_unlock; + } + + *val = be16_to_cpu(raw_val); + ret = IIO_VAL_INT; + + goto out_read_raw_unlock; + default: + ret = -EINVAL; + goto out_read_raw_unlock; + } + default: + break; + } + + return -EINVAL; + +out_read_raw_unlock: + mutex_unlock(&mpu3050->lock); + pm_runtime_mark_last_busy(mpu3050->dev); + pm_runtime_put_autosuspend(mpu3050->dev); + + return ret; +} + +static int mpu3050_write_raw(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + int val, int val2, long mask) +{ + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + /* + * Couldn't figure out a way to precalculate these at compile time. + */ + unsigned int fs250 = + DIV_ROUND_CLOSEST(mpu3050_fs_precision[0] * 1000000 * 2, + U16_MAX); + unsigned int fs500 = + DIV_ROUND_CLOSEST(mpu3050_fs_precision[1] * 1000000 * 2, + U16_MAX); + unsigned int fs1000 = + DIV_ROUND_CLOSEST(mpu3050_fs_precision[2] * 1000000 * 2, + U16_MAX); + unsigned int fs2000 = + DIV_ROUND_CLOSEST(mpu3050_fs_precision[3] * 1000000 * 2, + U16_MAX); + + switch (mask) { + case IIO_CHAN_INFO_CALIBBIAS: + if (chan->type != IIO_ANGL_VEL) + return -EINVAL; + mpu3050->calibration[chan->scan_index-1] = val; + return 0; + case IIO_CHAN_INFO_SAMP_FREQ: + /* + * The max samplerate is 8000 Hz, the minimum + * 1000 / 256 ~= 4 Hz + */ + if (val < 4 || val > 8000) + return -EINVAL; + + /* + * Above 1000 Hz we must turn off the digital low pass filter + * so we get a base frequency of 8kHz to the divider + */ + if (val > 1000) { + mpu3050->lpf = LPF_256_HZ_NOLPF; + mpu3050->divisor = DIV_ROUND_CLOSEST(8000, val) - 1; + return 0; + } + + mpu3050->lpf = LPF_188_HZ; + mpu3050->divisor = DIV_ROUND_CLOSEST(1000, val) - 1; + return 0; + case IIO_CHAN_INFO_SCALE: + if (chan->type != IIO_ANGL_VEL) + return -EINVAL; + /* + * We support +/-250, +/-500, +/-1000 and +/2000 deg/s + * which means we need to round to the closest radians + * which will be roughly +/-4.3, +/-8.7, +/-17.5, +/-35 + * rad/s. The scale is then for the 16 bits used to cover + * it 2/(2^16) of that. + */ + + /* Just too large, set the max range */ + if (val != 0) { + mpu3050->fullscale = FS_2000_DPS; + return 0; + } + + /* + * Now we're dealing with fractions below zero in millirad/s + * do some integer interpolation and match with the closest + * fullscale in the table. + */ + if (val2 <= fs250 || + val2 < ((fs500 + fs250) / 2)) + mpu3050->fullscale = FS_250_DPS; + else if (val2 <= fs500 || + val2 < ((fs1000 + fs500) / 2)) + mpu3050->fullscale = FS_500_DPS; + else if (val2 <= fs1000 || + val2 < ((fs2000 + fs1000) / 2)) + mpu3050->fullscale = FS_1000_DPS; + else + /* Catch-all */ + mpu3050->fullscale = FS_2000_DPS; + return 0; + default: + break; + } + + return -EINVAL; +} + +static irqreturn_t mpu3050_trigger_handler(int irq, void *p) +{ + const struct iio_poll_func *pf = p; + struct iio_dev *indio_dev = pf->indio_dev; + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + int ret; + /* + * Temperature 1*16 bits + * Three axes 3*16 bits + * Timestamp 64 bits (4*16 bits) + * Sum total 8*16 bits + */ + __be16 hw_values[8]; + s64 timestamp; + unsigned int datums_from_fifo = 0; + + /* + * If we're using the hardware trigger, get the precise timestamp from + * the top half of the threaded IRQ handler. Otherwise get the + * timestamp here so it will be close in time to the actual values + * read from the registers. + */ + if (iio_trigger_using_own(indio_dev)) + timestamp = mpu3050->hw_timestamp; + else + timestamp = iio_get_time_ns(indio_dev); + + mutex_lock(&mpu3050->lock); + + /* Using the hardware IRQ trigger? Check the buffer then. */ + if (mpu3050->hw_irq_trigger) { + __be16 raw_fifocnt; + u16 fifocnt; + /* X, Y, Z + temperature */ + unsigned int bytes_per_datum = 8; + bool fifo_overflow = false; + + ret = regmap_bulk_read(mpu3050->map, + MPU3050_FIFO_COUNT_H, + &raw_fifocnt, + sizeof(raw_fifocnt)); + if (ret) + goto out_trigger_unlock; + fifocnt = be16_to_cpu(raw_fifocnt); + + if (fifocnt == 512) { + dev_info(mpu3050->dev, + "FIFO overflow! Emptying and resetting FIFO\n"); + fifo_overflow = true; + /* Reset and enable the FIFO */ + ret = regmap_update_bits(mpu3050->map, + MPU3050_USR_CTRL, + MPU3050_USR_CTRL_FIFO_EN | + MPU3050_USR_CTRL_FIFO_RST, + MPU3050_USR_CTRL_FIFO_EN | + MPU3050_USR_CTRL_FIFO_RST); + if (ret) { + dev_info(mpu3050->dev, "error resetting FIFO\n"); + goto out_trigger_unlock; + } + mpu3050->pending_fifo_footer = false; + } + + if (fifocnt) + dev_dbg(mpu3050->dev, + "%d bytes in the FIFO\n", + fifocnt); + + while (!fifo_overflow && fifocnt > bytes_per_datum) { + unsigned int toread; + unsigned int offset; + __be16 fifo_values[5]; + + /* + * If there is a FIFO footer in the pipe, first clear + * that out. This follows the complex algorithm in the + * datasheet that states that you may never leave the + * FIFO empty after the first reading: you have to + * always leave two footer bytes in it. The footer is + * in practice just two zero bytes. + */ + if (mpu3050->pending_fifo_footer) { + toread = bytes_per_datum + 2; + offset = 0; + } else { + toread = bytes_per_datum; + offset = 1; + /* Put in some dummy value */ + fifo_values[0] = 0xAAAA; + } + + ret = regmap_bulk_read(mpu3050->map, + MPU3050_FIFO_R, + &fifo_values[offset], + toread); + + dev_dbg(mpu3050->dev, + "%04x %04x %04x %04x %04x\n", + fifo_values[0], + fifo_values[1], + fifo_values[2], + fifo_values[3], + fifo_values[4]); + + /* Index past the footer (fifo_values[0]) and push */ + iio_push_to_buffers_with_timestamp(indio_dev, + &fifo_values[1], + timestamp); + + fifocnt -= toread; + datums_from_fifo++; + mpu3050->pending_fifo_footer = true; + + /* + * If we're emptying the FIFO, just make sure to + * check if something new appeared. + */ + if (fifocnt < bytes_per_datum) { + ret = regmap_bulk_read(mpu3050->map, + MPU3050_FIFO_COUNT_H, + &raw_fifocnt, + sizeof(raw_fifocnt)); + if (ret) + goto out_trigger_unlock; + fifocnt = be16_to_cpu(raw_fifocnt); + } + + if (fifocnt < bytes_per_datum) + dev_dbg(mpu3050->dev, + "%d bytes left in the FIFO\n", + fifocnt); + + /* + * At this point, the timestamp that triggered the + * hardware interrupt is no longer valid for what + * we are reading (the interrupt likely fired for + * the value on the top of the FIFO), so set the + * timestamp to zero and let userspace deal with it. + */ + timestamp = 0; + } + } + + /* + * If we picked some datums from the FIFO that's enough, else + * fall through and just read from the current value registers. + * This happens in two cases: + * + * - We are using some other trigger (external, like an HRTimer) + * than the sensor's own sample generator. In this case the + * sensor is just set to the max sampling frequency and we give + * the trigger a copy of the latest value every time we get here. + * + * - The hardware trigger is active but unused and we actually use + * another trigger which calls here with a frequency higher + * than what the device provides data. We will then just read + * duplicate values directly from the hardware registers. + */ + if (datums_from_fifo) { + dev_dbg(mpu3050->dev, + "read %d datums from the FIFO\n", + datums_from_fifo); + goto out_trigger_unlock; + } + + ret = regmap_bulk_read(mpu3050->map, MPU3050_TEMP_H, &hw_values, + sizeof(hw_values)); + if (ret) { + dev_err(mpu3050->dev, + "error reading axis data\n"); + goto out_trigger_unlock; + } + + iio_push_to_buffers_with_timestamp(indio_dev, hw_values, timestamp); + +out_trigger_unlock: + mutex_unlock(&mpu3050->lock); + iio_trigger_notify_done(indio_dev->trig); + + return IRQ_HANDLED; +} + +static int mpu3050_buffer_preenable(struct iio_dev *indio_dev) +{ + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + + pm_runtime_get_sync(mpu3050->dev); + + /* Unless we have OUR trigger active, run at full speed */ + if (!mpu3050->hw_irq_trigger) + return mpu3050_set_8khz_samplerate(mpu3050); + + return 0; +} + +static int mpu3050_buffer_postdisable(struct iio_dev *indio_dev) +{ + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + + pm_runtime_mark_last_busy(mpu3050->dev); + pm_runtime_put_autosuspend(mpu3050->dev); + + return 0; +} + +static const struct iio_buffer_setup_ops mpu3050_buffer_setup_ops = { + .preenable = mpu3050_buffer_preenable, + .postenable = iio_triggered_buffer_postenable, + .predisable = iio_triggered_buffer_predisable, + .postdisable = mpu3050_buffer_postdisable, +}; + +static const struct iio_mount_matrix * +mpu3050_get_mount_matrix(const struct iio_dev *indio_dev, + const struct iio_chan_spec *chan) +{ + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + + return &mpu3050->orientation; +} + +static const struct iio_chan_spec_ext_info mpu3050_ext_info[] = { + IIO_MOUNT_MATRIX(IIO_SHARED_BY_TYPE, mpu3050_get_mount_matrix), + { }, +}; + +#define MPU3050_AXIS_CHANNEL(axis, index) \ + { \ + .type = IIO_ANGL_VEL, \ + .modified = 1, \ + .channel2 = IIO_MOD_##axis, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_CALIBBIAS), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ),\ + .ext_info = mpu3050_ext_info, \ + .scan_index = index, \ + .scan_type = { \ + .sign = 's', \ + .realbits = 16, \ + .storagebits = 16, \ + .endianness = IIO_BE, \ + }, \ + } + +static const struct iio_chan_spec mpu3050_channels[] = { + { + .type = IIO_TEMP, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | + BIT(IIO_CHAN_INFO_SCALE) | + BIT(IIO_CHAN_INFO_OFFSET), + .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ), + .scan_index = 0, + .scan_type = { + .sign = 's', + .realbits = 16, + .storagebits = 16, + .endianness = IIO_BE, + }, + }, + MPU3050_AXIS_CHANNEL(X, 1), + MPU3050_AXIS_CHANNEL(Y, 2), + MPU3050_AXIS_CHANNEL(Z, 3), + IIO_CHAN_SOFT_TIMESTAMP(4), +}; + +/* Four channels apart from timestamp, scan mask = 0x0f */ +static const unsigned long mpu3050_scan_masks[] = { 0xf, 0 }; + +/* + * These are just the hardcoded factors resulting from the more elaborate + * calculations done with fractions in the scale raw get/set functions. + */ +static IIO_CONST_ATTR(anglevel_scale_available, + "0.000122070 " + "0.000274658 " + "0.000518798 " + "0.001068115"); + +static struct attribute *mpu3050_attributes[] = { + &iio_const_attr_anglevel_scale_available.dev_attr.attr, + NULL, +}; + +static const struct attribute_group mpu3050_attribute_group = { + .attrs = mpu3050_attributes, +}; + +static const struct iio_info mpu3050_info = { + .driver_module = THIS_MODULE, + .read_raw = mpu3050_read_raw, + .write_raw = mpu3050_write_raw, + .attrs = &mpu3050_attribute_group, + .driver_module = THIS_MODULE, +}; + +/** + * mpu3050_read_mem() - read MPU-3050 internal memory + * @mpu3050: device to read from + * @bank: target bank + * @addr: target address + * @len: number of bytes + * @buf: the buffer to store the read bytes in + */ +static int mpu3050_read_mem(struct mpu3050 *mpu3050, + u8 bank, + u8 addr, + u8 len, + u8 *buf) +{ + int ret; + + ret = regmap_write(mpu3050->map, + MPU3050_BANK_SEL, + bank); + if (ret) + return ret; + + ret = regmap_write(mpu3050->map, + MPU3050_MEM_START_ADDR, + addr); + if (ret) + return ret; + + return regmap_bulk_read(mpu3050->map, + MPU3050_MEM_R_W, + buf, + len); +} + +static int mpu3050_hw_init(struct mpu3050 *mpu3050) +{ + int ret; + u8 otp[8]; + + /* Reset */ + ret = regmap_update_bits(mpu3050->map, + MPU3050_PWR_MGM, + MPU3050_PWR_MGM_RESET, + MPU3050_PWR_MGM_RESET); + if (ret) + return ret; + + /* Turn on the PLL */ + ret = regmap_update_bits(mpu3050->map, + MPU3050_PWR_MGM, + MPU3050_PWR_MGM_CLKSEL_MASK, + MPU3050_PWR_MGM_PLL_Z); + if (ret) + return ret; + + /* Disable IRQs */ + ret = regmap_write(mpu3050->map, + MPU3050_INT_CFG, + 0); + if (ret) + return ret; + + /* Read out the 8 bytes of OTP (one-time-programmable) memory */ + ret = mpu3050_read_mem(mpu3050, + (MPU3050_MEM_PRFTCH | + MPU3050_MEM_USER_BANK | + MPU3050_MEM_OTP_BANK_0), + 0, + sizeof(otp), + otp); + if (ret) + return ret; + + /* This is device-unique data so it goes into the entropy pool */ + add_device_randomness(otp, sizeof(otp)); + + dev_info(mpu3050->dev, + "die ID: %04X, wafer ID: %02X, A lot ID: %04X, " + "W lot ID: %03X, WP ID: %01X, rev ID: %02X\n", + /* Die ID, bits 0-12 */ + (otp[1] << 8 | otp[0]) & 0x1fff, + /* Wafer ID, bits 13-17 */ + ((otp[2] << 8 | otp[1]) & 0x03e0) >> 5, + /* A lot ID, bits 18-33 */ + ((otp[4] << 16 | otp[3] << 8 | otp[2]) & 0x3fffc) >> 2, + /* W lot ID, bits 34-45 */ + ((otp[5] << 8 | otp[4]) & 0x3ffc) >> 2, + /* WP ID, bits 47-49 */ + ((otp[6] << 8 | otp[5]) & 0x0380) >> 7, + /* rev ID, bits 50-55 */ + otp[6] >> 2); + + return 0; +} + +static int mpu3050_power_up(struct mpu3050 *mpu3050) +{ + int ret; + + ret = regulator_bulk_enable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs); + if (ret) { + dev_err(mpu3050->dev, "cannot enable regulators\n"); + return ret; + } + /* + * 20-100 ms start-up time for register read/write according to + * the datasheet, be on the safe side and wait 200 ms. + */ + msleep(200); + + /* Take device out of sleep mode */ + ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, + MPU3050_PWR_MGM_SLEEP, 0); + if (ret) { + dev_err(mpu3050->dev, "error setting power mode\n"); + return ret; + } + msleep(10); + + return 0; +} + +static int mpu3050_power_down(struct mpu3050 *mpu3050) +{ + int ret; + + /* + * Put MPU-3050 into sleep mode before cutting regulators. + * This is important, because we may not be the sole user + * of the regulator so the power may stay on after this, and + * then we would be wasting power unless we go to sleep mode + * first. + */ + ret = regmap_update_bits(mpu3050->map, MPU3050_PWR_MGM, + MPU3050_PWR_MGM_SLEEP, MPU3050_PWR_MGM_SLEEP); + if (ret) + dev_err(mpu3050->dev, "error putting to sleep\n"); + + ret = regulator_bulk_disable(ARRAY_SIZE(mpu3050->regs), mpu3050->regs); + if (ret) + dev_err(mpu3050->dev, "error disabling regulators\n"); + + return 0; +} + +static irqreturn_t mpu3050_irq_handler(int irq, void *p) +{ + struct iio_trigger *trig = p; + struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + + if (!mpu3050->hw_irq_trigger) + return IRQ_NONE; + + /* Get the time stamp as close in time as possible */ + mpu3050->hw_timestamp = iio_get_time_ns(indio_dev); + + return IRQ_WAKE_THREAD; +} + +static irqreturn_t mpu3050_irq_thread(int irq, void *p) +{ + struct iio_trigger *trig = p; + struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + unsigned int val; + int ret; + + /* ACK IRQ and check if it was from us */ + ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val); + if (ret) { + dev_err(mpu3050->dev, "error reading IRQ status\n"); + return IRQ_HANDLED; + } + if (!(val & MPU3050_INT_STATUS_RAW_RDY)) + return IRQ_NONE; + + iio_trigger_poll_chained(p); + + return IRQ_HANDLED; +} + +/** + * mpu3050_drdy_trigger_set_state() - set data ready interrupt state + * @trig: trigger instance + * @enable: true if trigger should be enabled, false to disable + */ +static int mpu3050_drdy_trigger_set_state(struct iio_trigger *trig, + bool enable) +{ + struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig); + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + unsigned int val; + int ret; + + /* Disabling trigger: disable interrupt and return */ + if (!enable) { + /* Disable all interrupts */ + ret = regmap_write(mpu3050->map, + MPU3050_INT_CFG, + 0); + if (ret) + dev_err(mpu3050->dev, "error disabling IRQ\n"); + + /* Clear IRQ flag */ + ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val); + if (ret) + dev_err(mpu3050->dev, "error clearing IRQ status\n"); + + /* Disable all things in the FIFO and reset it */ + ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN, 0); + if (ret) + dev_err(mpu3050->dev, "error disabling FIFO\n"); + + ret = regmap_write(mpu3050->map, MPU3050_USR_CTRL, + MPU3050_USR_CTRL_FIFO_RST); + if (ret) + dev_err(mpu3050->dev, "error resetting FIFO\n"); + + pm_runtime_mark_last_busy(mpu3050->dev); + pm_runtime_put_autosuspend(mpu3050->dev); + mpu3050->hw_irq_trigger = false; + + return 0; + } else { + /* Else we're enabling the trigger from this point */ + pm_runtime_get_sync(mpu3050->dev); + mpu3050->hw_irq_trigger = true; + + /* Disable all things in the FIFO */ + ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN, 0); + if (ret) + return ret; + + /* Reset and enable the FIFO */ + ret = regmap_update_bits(mpu3050->map, MPU3050_USR_CTRL, + MPU3050_USR_CTRL_FIFO_EN | + MPU3050_USR_CTRL_FIFO_RST, + MPU3050_USR_CTRL_FIFO_EN | + MPU3050_USR_CTRL_FIFO_RST); + if (ret) + return ret; + + mpu3050->pending_fifo_footer = false; + + /* Turn on the FIFO for temp+X+Y+Z */ + ret = regmap_write(mpu3050->map, MPU3050_FIFO_EN, + MPU3050_FIFO_EN_TEMP_OUT | + MPU3050_FIFO_EN_GYRO_XOUT | + MPU3050_FIFO_EN_GYRO_YOUT | + MPU3050_FIFO_EN_GYRO_ZOUT | + MPU3050_FIFO_EN_FOOTER); + if (ret) + return ret; + + /* Configure the sample engine */ + ret = mpu3050_start_sampling(mpu3050); + if (ret) + return ret; + + /* Clear IRQ flag */ + ret = regmap_read(mpu3050->map, MPU3050_INT_STATUS, &val); + if (ret) + dev_err(mpu3050->dev, "error clearing IRQ status\n"); + + /* Give us interrupts whenever there is new data ready */ + val = MPU3050_INT_RAW_RDY_EN; + + if (mpu3050->irq_actl) + val |= MPU3050_INT_ACTL; + if (mpu3050->irq_latch) + val |= MPU3050_INT_LATCH_EN; + if (mpu3050->irq_opendrain) + val |= MPU3050_INT_OPEN; + + ret = regmap_write(mpu3050->map, MPU3050_INT_CFG, val); + if (ret) + return ret; + } + + return 0; +} + +static const struct iio_trigger_ops mpu3050_trigger_ops = { + .owner = THIS_MODULE, + .set_trigger_state = mpu3050_drdy_trigger_set_state, +}; + +static int mpu3050_trigger_probe(struct iio_dev *indio_dev, int irq) +{ + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + unsigned long irq_trig; + int ret; + + mpu3050->trig = devm_iio_trigger_alloc(&indio_dev->dev, + "%s-dev%d", + indio_dev->name, + indio_dev->id); + if (!mpu3050->trig) + return -ENOMEM; + + /* Check if IRQ is open drain */ + if (of_property_read_bool(mpu3050->dev->of_node, "drive-open-drain")) + mpu3050->irq_opendrain = true; + + irq_trig = irqd_get_trigger_type(irq_get_irq_data(irq)); + /* + * Configure the interrupt generator hardware to supply whatever + * the interrupt is configured for, edges low/high level low/high, + * we can provide it all. + */ + switch (irq_trig) { + case IRQF_TRIGGER_RISING: + dev_info(&indio_dev->dev, + "pulse interrupts on the rising edge\n"); + if (mpu3050->irq_opendrain) { + dev_info(&indio_dev->dev, + "rising edge incompatible with open drain\n"); + mpu3050->irq_opendrain = false; + } + break; + case IRQF_TRIGGER_FALLING: + mpu3050->irq_actl = true; + dev_info(&indio_dev->dev, + "pulse interrupts on the falling edge\n"); + break; + case IRQF_TRIGGER_HIGH: + mpu3050->irq_latch = true; + dev_info(&indio_dev->dev, + "interrupts active high level\n"); + if (mpu3050->irq_opendrain) { + dev_info(&indio_dev->dev, + "active high incompatible with open drain\n"); + mpu3050->irq_opendrain = false; + } + /* + * With level IRQs, we mask the IRQ until it is processed, + * but with edge IRQs (pulses) we can queue several interrupts + * in the top half. + */ + irq_trig |= IRQF_ONESHOT; + break; + case IRQF_TRIGGER_LOW: + mpu3050->irq_latch = true; + mpu3050->irq_actl = true; + irq_trig |= IRQF_ONESHOT; + dev_info(&indio_dev->dev, + "interrupts active low level\n"); + break; + default: + /* This is the most preferred mode, if possible */ + dev_err(&indio_dev->dev, + "unsupported IRQ trigger specified (%lx), enforce " + "rising edge\n", irq_trig); + irq_trig = IRQF_TRIGGER_RISING; + break; + } + + /* An open drain line can be shared with several devices */ + if (mpu3050->irq_opendrain) + irq_trig |= IRQF_SHARED; + + ret = request_threaded_irq(irq, + mpu3050_irq_handler, + mpu3050_irq_thread, + irq_trig, + mpu3050->trig->name, + mpu3050->trig); + if (ret) { + dev_err(mpu3050->dev, + "can't get IRQ %d, error %d\n", irq, ret); + return ret; + } + + mpu3050->irq = irq; + mpu3050->trig->dev.parent = mpu3050->dev; + mpu3050->trig->ops = &mpu3050_trigger_ops; + iio_trigger_set_drvdata(mpu3050->trig, indio_dev); + + ret = iio_trigger_register(mpu3050->trig); + if (ret) + return ret; + + indio_dev->trig = iio_trigger_get(mpu3050->trig); + + return 0; +} + +int mpu3050_common_probe(struct device *dev, + struct regmap *map, + int irq, + const char *name) +{ + struct iio_dev *indio_dev; + struct mpu3050 *mpu3050; + unsigned int val; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*mpu3050)); + if (!indio_dev) + return -ENOMEM; + mpu3050 = iio_priv(indio_dev); + + mpu3050->dev = dev; + mpu3050->map = map; + mutex_init(&mpu3050->lock); + /* Default fullscale: 2000 degrees per second */ + mpu3050->fullscale = FS_2000_DPS; + /* 1 kHz, divide by 100, default frequency = 10 Hz */ + mpu3050->lpf = MPU3050_DLPF_CFG_188HZ; + mpu3050->divisor = 99; + + /* Read the mounting matrix, if present */ + ret = of_iio_read_mount_matrix(dev, "mount-matrix", + &mpu3050->orientation); + if (ret) + return ret; + + /* Fetch and turn on regulators */ + mpu3050->regs[0].supply = mpu3050_reg_vdd; + mpu3050->regs[1].supply = mpu3050_reg_vlogic; + ret = devm_regulator_bulk_get(dev, ARRAY_SIZE(mpu3050->regs), + mpu3050->regs); + if (ret) { + dev_err(dev, "Cannot get regulators\n"); + return ret; + } + + ret = mpu3050_power_up(mpu3050); + if (ret) + return ret; + + ret = regmap_read(map, MPU3050_CHIP_ID_REG, &val); + if (ret) { + dev_err(dev, "could not read device ID\n"); + ret = -ENODEV; + + goto err_power_down; + } + + if (val != MPU3050_CHIP_ID) { + dev_err(dev, "unsupported chip id %02x\n", (u8)val); + ret = -ENODEV; + goto err_power_down; + } + + ret = regmap_read(map, MPU3050_PRODUCT_ID_REG, &val); + if (ret) { + dev_err(dev, "could not read device ID\n"); + ret = -ENODEV; + + goto err_power_down; + } + dev_info(dev, "found MPU-3050 part no: %d, version: %d\n", + ((val >> 4) & 0xf), (val & 0xf)); + + ret = mpu3050_hw_init(mpu3050); + if (ret) + goto err_power_down; + + indio_dev->dev.parent = dev; + indio_dev->channels = mpu3050_channels; + indio_dev->num_channels = ARRAY_SIZE(mpu3050_channels); + indio_dev->info = &mpu3050_info; + indio_dev->available_scan_masks = mpu3050_scan_masks; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->name = name; + + ret = iio_triggered_buffer_setup(indio_dev, iio_pollfunc_store_time, + mpu3050_trigger_handler, + &mpu3050_buffer_setup_ops); + if (ret) { + dev_err(dev, "triggered buffer setup failed\n"); + goto err_power_down; + } + + ret = iio_device_register(indio_dev); + if (ret) { + dev_err(dev, "device register failed\n"); + goto err_cleanup_buffer; + } + + dev_set_drvdata(dev, indio_dev); + + /* Check if we have an assigned IRQ to use as trigger */ + if (irq) { + ret = mpu3050_trigger_probe(indio_dev, irq); + if (ret) + dev_err(dev, "failed to register trigger\n"); + } + + /* Enable runtime PM */ + pm_runtime_get_noresume(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + /* + * Set autosuspend to two orders of magnitude larger than the + * start-up time. 100ms start-up time means 10000ms autosuspend, + * i.e. 10 seconds. + */ + pm_runtime_set_autosuspend_delay(dev, 10000); + pm_runtime_use_autosuspend(dev); + pm_runtime_put(dev); + + return 0; + +err_cleanup_buffer: + iio_triggered_buffer_cleanup(indio_dev); +err_power_down: + mpu3050_power_down(mpu3050); + + return ret; +} +EXPORT_SYMBOL(mpu3050_common_probe); + +int mpu3050_common_remove(struct device *dev) +{ + struct iio_dev *indio_dev = dev_get_drvdata(dev); + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + + pm_runtime_get_sync(dev); + pm_runtime_put_noidle(dev); + pm_runtime_disable(dev); + iio_triggered_buffer_cleanup(indio_dev); + if (mpu3050->irq) + free_irq(mpu3050->irq, mpu3050); + iio_device_unregister(indio_dev); + mpu3050_power_down(mpu3050); + + return 0; +} +EXPORT_SYMBOL(mpu3050_common_remove); + +#ifdef CONFIG_PM +static int mpu3050_runtime_suspend(struct device *dev) +{ + return mpu3050_power_down(iio_priv(dev_get_drvdata(dev))); +} + +static int mpu3050_runtime_resume(struct device *dev) +{ + return mpu3050_power_up(iio_priv(dev_get_drvdata(dev))); +} +#endif /* CONFIG_PM */ + +const struct dev_pm_ops mpu3050_dev_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SET_RUNTIME_PM_OPS(mpu3050_runtime_suspend, + mpu3050_runtime_resume, NULL) +}; +EXPORT_SYMBOL(mpu3050_dev_pm_ops); + +MODULE_AUTHOR("Linus Walleij"); +MODULE_DESCRIPTION("MPU3050 gyroscope driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/gyro/mpu3050-i2c.c b/drivers/iio/gyro/mpu3050-i2c.c new file mode 100644 index 000000000000..06007200bf49 --- /dev/null +++ b/drivers/iio/gyro/mpu3050-i2c.c @@ -0,0 +1,124 @@ +#include +#include +#include +#include +#include +#include +#include + +#include "mpu3050.h" + +static const struct regmap_config mpu3050_i2c_regmap_config = { + .reg_bits = 8, + .val_bits = 8, +}; + +static int mpu3050_i2c_bypass_select(struct i2c_mux_core *mux, u32 chan_id) +{ + struct mpu3050 *mpu3050 = i2c_mux_priv(mux); + + /* Just power up the device, that is all that is needed */ + pm_runtime_get_sync(mpu3050->dev); + return 0; +} + +static int mpu3050_i2c_bypass_deselect(struct i2c_mux_core *mux, u32 chan_id) +{ + struct mpu3050 *mpu3050 = i2c_mux_priv(mux); + + pm_runtime_mark_last_busy(mpu3050->dev); + pm_runtime_put_autosuspend(mpu3050->dev); + return 0; +} + +static int mpu3050_i2c_probe(struct i2c_client *client, + const struct i2c_device_id *id) +{ + struct regmap *regmap; + const char *name; + struct mpu3050 *mpu3050; + int ret; + + if (!i2c_check_functionality(client->adapter, + I2C_FUNC_SMBUS_I2C_BLOCK)) + return -EOPNOTSUPP; + + if (id) + name = id->name; + else + return -ENODEV; + + regmap = devm_regmap_init_i2c(client, &mpu3050_i2c_regmap_config); + if (IS_ERR(regmap)) { + dev_err(&client->dev, "Failed to register i2c regmap %d\n", + (int)PTR_ERR(regmap)); + return PTR_ERR(regmap); + } + + ret = mpu3050_common_probe(&client->dev, regmap, client->irq, name); + if (ret) + return ret; + + /* The main driver is up, now register the I2C mux */ + mpu3050 = iio_priv(dev_get_drvdata(&client->dev)); + mpu3050->i2cmux = i2c_mux_alloc(client->adapter, &client->dev, + 1, 0, I2C_MUX_LOCKED | I2C_MUX_GATE, + mpu3050_i2c_bypass_select, + mpu3050_i2c_bypass_deselect); + /* Just fail the mux, there is no point in killing the driver */ + if (!mpu3050->i2cmux) + dev_err(&client->dev, "failed to allocate I2C mux\n"); + else { + mpu3050->i2cmux->priv = mpu3050; + ret = i2c_mux_add_adapter(mpu3050->i2cmux, 0, 0, 0); + if (ret) + dev_err(&client->dev, "failed to add I2C mux\n"); + } + + return 0; +} + +static int mpu3050_i2c_remove(struct i2c_client *client) +{ + struct iio_dev *indio_dev = dev_get_drvdata(&client->dev); + struct mpu3050 *mpu3050 = iio_priv(indio_dev); + + if (mpu3050->i2cmux) + i2c_mux_del_adapters(mpu3050->i2cmux); + + return mpu3050_common_remove(&client->dev); +} + +/* + * device id table is used to identify what device can be + * supported by this driver + */ +static const struct i2c_device_id mpu3050_i2c_id[] = { + { "mpu3050" }, + {} +}; +MODULE_DEVICE_TABLE(i2c, mpu3050_i2c_id); + +static const struct of_device_id mpu3050_i2c_of_match[] = { + { .compatible = "invensense,mpu3050", .data = "mpu3050" }, + /* Deprecated vendor ID from the Input driver */ + { .compatible = "invn,mpu3050", .data = "mpu3050" }, + { }, +}; +MODULE_DEVICE_TABLE(of, mpu3050_i2c_of_match); + +static struct i2c_driver mpu3050_i2c_driver = { + .probe = mpu3050_i2c_probe, + .remove = mpu3050_i2c_remove, + .id_table = mpu3050_i2c_id, + .driver = { + .of_match_table = mpu3050_i2c_of_match, + .name = "mpu3050-i2c", + .pm = &mpu3050_dev_pm_ops, + }, +}; +module_i2c_driver(mpu3050_i2c_driver); + +MODULE_AUTHOR("Linus Walleij"); +MODULE_DESCRIPTION("Invensense MPU3050 gyroscope driver"); +MODULE_LICENSE("GPL"); diff --git a/drivers/iio/gyro/mpu3050.h b/drivers/iio/gyro/mpu3050.h new file mode 100644 index 000000000000..bef87a714dc5 --- /dev/null +++ b/drivers/iio/gyro/mpu3050.h @@ -0,0 +1,96 @@ +#include +#include +#include +#include +#include + +/** + * enum mpu3050_fullscale - indicates the full range of the sensor in deg/sec + */ +enum mpu3050_fullscale { + FS_250_DPS = 0, + FS_500_DPS, + FS_1000_DPS, + FS_2000_DPS, +}; + +/** + * enum mpu3050_lpf - indicates the low pass filter width + */ +enum mpu3050_lpf { + /* This implicity sets sample frequency to 8 kHz */ + LPF_256_HZ_NOLPF = 0, + /* All others sets the sample frequency to 1 kHz */ + LPF_188_HZ, + LPF_98_HZ, + LPF_42_HZ, + LPF_20_HZ, + LPF_10_HZ, + LPF_5_HZ, + LPF_2100_HZ_NOLPF, +}; + +enum mpu3050_axis { + AXIS_X = 0, + AXIS_Y, + AXIS_Z, + AXIS_MAX, +}; + +/** + * struct mpu3050 - instance state container for the device + * @dev: parent device for this instance + * @orientation: mounting matrix, flipped axis etc + * @map: regmap to reach the registers + * @lock: serialization lock to marshal all requests + * @irq: the IRQ used for this device + * @regs: the regulators to power this device + * @fullscale: the current fullscale setting for the device + * @lpf: digital low pass filter setting for the device + * @divisor: base frequency divider: divides 8 or 1 kHz + * @calibration: the three signed 16-bit calibration settings that + * get written into the offset registers for each axis to compensate + * for DC offsets + * @trig: trigger for the MPU-3050 interrupt, if present + * @hw_irq_trigger: hardware interrupt trigger is in use + * @irq_actl: interrupt is active low + * @irq_latch: latched IRQ, this means that it is a level IRQ + * @irq_opendrain: the interrupt line shall be configured open drain + * @pending_fifo_footer: tells us if there is a pending footer in the FIFO + * that we have to read out first when handling the FIFO + * @hw_timestamp: latest hardware timestamp from the trigger IRQ, when in + * use + * @i2cmux: an I2C mux reflecting the fact that this sensor is a hub with + * a pass-through I2C interface coming out of it: this device needs to be + * powered up in order to reach devices on the other side of this mux + */ +struct mpu3050 { + struct device *dev; + struct iio_mount_matrix orientation; + struct regmap *map; + struct mutex lock; + int irq; + struct regulator_bulk_data regs[2]; + enum mpu3050_fullscale fullscale; + enum mpu3050_lpf lpf; + u8 divisor; + s16 calibration[3]; + struct iio_trigger *trig; + bool hw_irq_trigger; + bool irq_actl; + bool irq_latch; + bool irq_opendrain; + bool pending_fifo_footer; + s64 hw_timestamp; + struct i2c_mux_core *i2cmux; +}; + +/* Probe called from different transports */ +int mpu3050_common_probe(struct device *dev, + struct regmap *map, + int irq, + const char *name); +int mpu3050_common_remove(struct device *dev); + +/* PM ops */ +extern const struct dev_pm_ops mpu3050_dev_pm_ops; -- cgit v1.2.3 From d8b97569b696a63382bf1d43daf9a08269d5a6e0 Mon Sep 17 00:00:00 2001 From: Stuart Yoder Date: Wed, 26 Oct 2016 11:20:23 -0500 Subject: staging: fsl-mc: update MAINTAINERS -German has moved on to other things and wished to be removed as a maintainer -cleanup the driver description to use the proper name of the driver (i.e. the fsl-mc bus driver) and remove incorrect references to Freescale Signed-off-by: Stuart Yoder Acked-by: J. German Rivera Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 13 ++++++------- 1 file changed, 6 insertions(+), 7 deletions(-) (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 8d9392ac6e78..5adc5ba5e1d6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5098,13 +5098,6 @@ F: sound/soc/fsl/fsl* F: sound/soc/fsl/imx* F: sound/soc/fsl/mpc8610_hpcd.c -FREESCALE QORIQ MANAGEMENT COMPLEX DRIVER -M: "J. German Rivera" -M: Stuart Yoder -L: linux-kernel@vger.kernel.org -S: Maintained -F: drivers/staging/fsl-mc/ - FREEVXFS FILESYSTEM M: Christoph Hellwig W: ftp://ftp.openlinux.org/pub/people/hch/vxfs @@ -9936,6 +9929,12 @@ F: fs/qnx4/ F: include/uapi/linux/qnx4_fs.h F: include/uapi/linux/qnxtypes.h +QORIQ DPAA2 FSL-MC BUS DRIVER +M: Stuart Yoder +L: linux-kernel@vger.kernel.org +S: Maintained +F: drivers/staging/fsl-mc/ + QT1010 MEDIA DRIVER M: Antti Palosaari L: linux-media@vger.kernel.org -- cgit v1.2.3 From 2704e30014dd2f4e27675abda414e91de5bef8a4 Mon Sep 17 00:00:00 2001 From: Peter Rosin Date: Tue, 8 Nov 2016 12:58:53 +0100 Subject: iio: mcp4531: provide range of available raw values Example: $ cat '/sys/bus/iio/devices/iio:device0/out_resistance_raw_available' [0 1 256] Meaning: min 0, step 1 and max 256. Signed-off-by: Peter Rosin Signed-off-by: Jonathan Cameron --- .../testing/sysfs-bus-iio-potentiometer-mcp4531 | 8 ++ MAINTAINERS | 1 + drivers/iio/potentiometer/mcp4531.c | 104 ++++++++++++--------- 3 files changed, 71 insertions(+), 42 deletions(-) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-potentiometer-mcp4531 (limited to 'MAINTAINERS') diff --git a/Documentation/ABI/testing/sysfs-bus-iio-potentiometer-mcp4531 b/Documentation/ABI/testing/sysfs-bus-iio-potentiometer-mcp4531 new file mode 100644 index 000000000000..2a91fbe394fc --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-potentiometer-mcp4531 @@ -0,0 +1,8 @@ +What: /sys/bus/iio/devices/iio:deviceX/out_resistance_raw_available +Date: October 2016 +KernelVersion: 4.9 +Contact: Peter Rosin +Description: + The range of available values represented as the minimum value, + the step and the maximum value, all enclosed in square brackets. + Example: [0 1 256] diff --git a/MAINTAINERS b/MAINTAINERS index ec1ee3ef112e..1395246819d2 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7709,6 +7709,7 @@ MCP4531 MICROCHIP DIGITAL POTENTIOMETER DRIVER M: Peter Rosin L: linux-iio@vger.kernel.org S: Maintained +F: Documentation/ABI/testing/sysfs-bus-iio-potentiometer-mcp4531 F: drivers/iio/potentiometer/mcp4531.c MEASUREMENT COMPUTING CIO-DAC IIO DRIVER diff --git a/drivers/iio/potentiometer/mcp4531.c b/drivers/iio/potentiometer/mcp4531.c index 13b6ae2fcf7b..0d1bcf89ae17 100644 --- a/drivers/iio/potentiometer/mcp4531.c +++ b/drivers/iio/potentiometer/mcp4531.c @@ -38,7 +38,7 @@ struct mcp4531_cfg { int wipers; - int max_pos; + int avail[3]; int kohms; }; @@ -78,38 +78,38 @@ enum mcp4531_type { }; static const struct mcp4531_cfg mcp4531_cfg[] = { - [MCP453x_502] = { .wipers = 1, .max_pos = 128, .kohms = 5, }, - [MCP453x_103] = { .wipers = 1, .max_pos = 128, .kohms = 10, }, - [MCP453x_503] = { .wipers = 1, .max_pos = 128, .kohms = 50, }, - [MCP453x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, }, - [MCP454x_502] = { .wipers = 1, .max_pos = 128, .kohms = 5, }, - [MCP454x_103] = { .wipers = 1, .max_pos = 128, .kohms = 10, }, - [MCP454x_503] = { .wipers = 1, .max_pos = 128, .kohms = 50, }, - [MCP454x_104] = { .wipers = 1, .max_pos = 128, .kohms = 100, }, - [MCP455x_502] = { .wipers = 1, .max_pos = 256, .kohms = 5, }, - [MCP455x_103] = { .wipers = 1, .max_pos = 256, .kohms = 10, }, - [MCP455x_503] = { .wipers = 1, .max_pos = 256, .kohms = 50, }, - [MCP455x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, }, - [MCP456x_502] = { .wipers = 1, .max_pos = 256, .kohms = 5, }, - [MCP456x_103] = { .wipers = 1, .max_pos = 256, .kohms = 10, }, - [MCP456x_503] = { .wipers = 1, .max_pos = 256, .kohms = 50, }, - [MCP456x_104] = { .wipers = 1, .max_pos = 256, .kohms = 100, }, - [MCP463x_502] = { .wipers = 2, .max_pos = 128, .kohms = 5, }, - [MCP463x_103] = { .wipers = 2, .max_pos = 128, .kohms = 10, }, - [MCP463x_503] = { .wipers = 2, .max_pos = 128, .kohms = 50, }, - [MCP463x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, }, - [MCP464x_502] = { .wipers = 2, .max_pos = 128, .kohms = 5, }, - [MCP464x_103] = { .wipers = 2, .max_pos = 128, .kohms = 10, }, - [MCP464x_503] = { .wipers = 2, .max_pos = 128, .kohms = 50, }, - [MCP464x_104] = { .wipers = 2, .max_pos = 128, .kohms = 100, }, - [MCP465x_502] = { .wipers = 2, .max_pos = 256, .kohms = 5, }, - [MCP465x_103] = { .wipers = 2, .max_pos = 256, .kohms = 10, }, - [MCP465x_503] = { .wipers = 2, .max_pos = 256, .kohms = 50, }, - [MCP465x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, }, - [MCP466x_502] = { .wipers = 2, .max_pos = 256, .kohms = 5, }, - [MCP466x_103] = { .wipers = 2, .max_pos = 256, .kohms = 10, }, - [MCP466x_503] = { .wipers = 2, .max_pos = 256, .kohms = 50, }, - [MCP466x_104] = { .wipers = 2, .max_pos = 256, .kohms = 100, }, + [MCP453x_502] = { .wipers = 1, .avail = { 0, 1, 128 }, .kohms = 5, }, + [MCP453x_103] = { .wipers = 1, .avail = { 0, 1, 128 }, .kohms = 10, }, + [MCP453x_503] = { .wipers = 1, .avail = { 0, 1, 128 }, .kohms = 50, }, + [MCP453x_104] = { .wipers = 1, .avail = { 0, 1, 128 }, .kohms = 100, }, + [MCP454x_502] = { .wipers = 1, .avail = { 0, 1, 128 }, .kohms = 5, }, + [MCP454x_103] = { .wipers = 1, .avail = { 0, 1, 128 }, .kohms = 10, }, + [MCP454x_503] = { .wipers = 1, .avail = { 0, 1, 128 }, .kohms = 50, }, + [MCP454x_104] = { .wipers = 1, .avail = { 0, 1, 128 }, .kohms = 100, }, + [MCP455x_502] = { .wipers = 1, .avail = { 0, 1, 256 }, .kohms = 5, }, + [MCP455x_103] = { .wipers = 1, .avail = { 0, 1, 256 }, .kohms = 10, }, + [MCP455x_503] = { .wipers = 1, .avail = { 0, 1, 256 }, .kohms = 50, }, + [MCP455x_104] = { .wipers = 1, .avail = { 0, 1, 256 }, .kohms = 100, }, + [MCP456x_502] = { .wipers = 1, .avail = { 0, 1, 256 }, .kohms = 5, }, + [MCP456x_103] = { .wipers = 1, .avail = { 0, 1, 256 }, .kohms = 10, }, + [MCP456x_503] = { .wipers = 1, .avail = { 0, 1, 256 }, .kohms = 50, }, + [MCP456x_104] = { .wipers = 1, .avail = { 0, 1, 256 }, .kohms = 100, }, + [MCP463x_502] = { .wipers = 2, .avail = { 0, 1, 128 }, .kohms = 5, }, + [MCP463x_103] = { .wipers = 2, .avail = { 0, 1, 128 }, .kohms = 10, }, + [MCP463x_503] = { .wipers = 2, .avail = { 0, 1, 128 }, .kohms = 50, }, + [MCP463x_104] = { .wipers = 2, .avail = { 0, 1, 128 }, .kohms = 100, }, + [MCP464x_502] = { .wipers = 2, .avail = { 0, 1, 128 }, .kohms = 5, }, + [MCP464x_103] = { .wipers = 2, .avail = { 0, 1, 128 }, .kohms = 10, }, + [MCP464x_503] = { .wipers = 2, .avail = { 0, 1, 128 }, .kohms = 50, }, + [MCP464x_104] = { .wipers = 2, .avail = { 0, 1, 128 }, .kohms = 100, }, + [MCP465x_502] = { .wipers = 2, .avail = { 0, 1, 256 }, .kohms = 5, }, + [MCP465x_103] = { .wipers = 2, .avail = { 0, 1, 256 }, .kohms = 10, }, + [MCP465x_503] = { .wipers = 2, .avail = { 0, 1, 256 }, .kohms = 50, }, + [MCP465x_104] = { .wipers = 2, .avail = { 0, 1, 256 }, .kohms = 100, }, + [MCP466x_502] = { .wipers = 2, .avail = { 0, 1, 256 }, .kohms = 5, }, + [MCP466x_103] = { .wipers = 2, .avail = { 0, 1, 256 }, .kohms = 10, }, + [MCP466x_503] = { .wipers = 2, .avail = { 0, 1, 256 }, .kohms = 50, }, + [MCP466x_104] = { .wipers = 2, .avail = { 0, 1, 256 }, .kohms = 100, }, }; #define MCP4531_WRITE (0 << 2) @@ -124,13 +124,14 @@ struct mcp4531_data { const struct mcp4531_cfg *cfg; }; -#define MCP4531_CHANNEL(ch) { \ - .type = IIO_RESISTANCE, \ - .indexed = 1, \ - .output = 1, \ - .channel = (ch), \ - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ +#define MCP4531_CHANNEL(ch) { \ + .type = IIO_RESISTANCE, \ + .indexed = 1, \ + .output = 1, \ + .channel = (ch), \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .info_mask_shared_by_type_available = BIT(IIO_CHAN_INFO_RAW), \ } static const struct iio_chan_spec mcp4531_channels[] = { @@ -156,13 +157,31 @@ static int mcp4531_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: *val = 1000 * data->cfg->kohms; - *val2 = data->cfg->max_pos; + *val2 = data->cfg->avail[2]; return IIO_VAL_FRACTIONAL; } return -EINVAL; } +static int mcp4531_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + struct mcp4531_data *data = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + *length = ARRAY_SIZE(data->cfg->avail); + *vals = data->cfg->avail; + *type = IIO_VAL_INT; + return IIO_AVAIL_RANGE; + } + + return -EINVAL; +} + static int mcp4531_write_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int val, int val2, long mask) @@ -172,7 +191,7 @@ static int mcp4531_write_raw(struct iio_dev *indio_dev, switch (mask) { case IIO_CHAN_INFO_RAW: - if (val > data->cfg->max_pos || val < 0) + if (val > data->cfg->avail[2] || val < 0) return -EINVAL; break; default: @@ -186,6 +205,7 @@ static int mcp4531_write_raw(struct iio_dev *indio_dev, static const struct iio_info mcp4531_info = { .read_raw = mcp4531_read_raw, + .read_avail = mcp4531_read_avail, .write_raw = mcp4531_write_raw, .driver_module = THIS_MODULE, }; -- cgit v1.2.3 From ed13134ba8c021d484d712a54c285da312567b39 Mon Sep 17 00:00:00 2001 From: Peter Rosin Date: Tue, 8 Nov 2016 12:58:55 +0100 Subject: dt-bindings: iio: document dpot-dac bindings Acked-by: Rob Herring Signed-off-by: Peter Rosin Signed-off-by: Jonathan Cameron --- .../devicetree/bindings/iio/dac/dpot-dac.txt | 41 ++++++++++++++++++++++ MAINTAINERS | 6 ++++ 2 files changed, 47 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/dac/dpot-dac.txt (limited to 'MAINTAINERS') diff --git a/Documentation/devicetree/bindings/iio/dac/dpot-dac.txt b/Documentation/devicetree/bindings/iio/dac/dpot-dac.txt new file mode 100644 index 000000000000..fdf47a01bfef --- /dev/null +++ b/Documentation/devicetree/bindings/iio/dac/dpot-dac.txt @@ -0,0 +1,41 @@ +Bindings for DAC emulation using a digital potentiometer + +It is assumed that the dpot is used as a voltage divider between the +current dpot wiper setting and the maximum resistance of the dpot. The +divided voltage is provided by a vref regulator. + + .------. + .-----------. | | + | vref |--' .---. + | regulator |--. | | + '-----------' | | d | + | | p | + | | o | wiper + | | t |<---------+ + | | | + | '---' dac output voltage + | | + '------+------------+ + +Required properties: +- compatible: Should be "dpot-dac" +- vref-supply: The regulator supplying the voltage divider. +- io-channels: Channel node of the dpot to be used for the voltage division. +- io-channel-names: Should be "dpot". + +Example: + + &i2c { + dpot: mcp4651-503@28 { + compatible = "microchip,mcp4651-503"; + reg = <0x28>; + #io-channel-cells = <1>; + }; + }; + + dac { + compatible = "dpot-dac"; + vref-supply = <®_3v3>; + io-channels = <&dpot 0>; + io-channel-names = "dpot"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 1395246819d2..0de06732159d 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6119,6 +6119,12 @@ L: linux-media@vger.kernel.org S: Maintained F: drivers/media/rc/iguanair.c +IIO DIGITAL POTENTIOMETER DAC +M: Peter Rosin +L: linux-iio@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/iio/dac/dpot-dac.txt + IIO SUBSYSTEM AND DRIVERS M: Jonathan Cameron R: Hartmut Knaack -- cgit v1.2.3 From 7fde1484af21f9668e9575bd8a119ebc4fe6fe42 Mon Sep 17 00:00:00 2001 From: Peter Rosin Date: Tue, 8 Nov 2016 12:58:56 +0100 Subject: iio: dpot-dac: DAC driver based on a digital potentiometer It is assumed that the dpot is used as a voltage divider between the current dpot wiper setting and the maximum resistance of the dpot. The divided voltage is provided by a vref regulator. .------. .-----------. | | | vref |--' .---. | regulator |--. | | '-----------' | | d | | | p | | | o | wiper | | t |<---------+ | | | | '---' dac output voltage | | '------+------------+ Signed-off-by: Peter Rosin Signed-off-by: Jonathan Cameron --- .../ABI/testing/sysfs-bus-iio-dac-dpot-dac | 8 + MAINTAINERS | 2 + drivers/iio/dac/Kconfig | 10 + drivers/iio/dac/Makefile | 1 + drivers/iio/dac/dpot-dac.c | 266 +++++++++++++++++++++ 5 files changed, 287 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-dac-dpot-dac create mode 100644 drivers/iio/dac/dpot-dac.c (limited to 'MAINTAINERS') diff --git a/Documentation/ABI/testing/sysfs-bus-iio-dac-dpot-dac b/Documentation/ABI/testing/sysfs-bus-iio-dac-dpot-dac new file mode 100644 index 000000000000..580e93f373f6 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-dac-dpot-dac @@ -0,0 +1,8 @@ +What: /sys/bus/iio/devices/iio:deviceX/out_voltageY_raw_available +Date: October 2016 +KernelVersion: 4.9 +Contact: Peter Rosin +Description: + The range of available values represented as the minimum value, + the step and the maximum value, all enclosed in square brackets. + Example: [0 1 256] diff --git a/MAINTAINERS b/MAINTAINERS index 0de06732159d..e63719d53658 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6123,7 +6123,9 @@ IIO DIGITAL POTENTIOMETER DAC M: Peter Rosin L: linux-iio@vger.kernel.org S: Maintained +F: Documentation/ABI/testing/sysfs-bus-iio-dac-dpot-dac F: Documentation/devicetree/bindings/iio/dac/dpot-dac.txt +F: drivers/iio/dac/dpot-dac.c IIO SUBSYSTEM AND DRIVERS M: Jonathan Cameron diff --git a/drivers/iio/dac/Kconfig b/drivers/iio/dac/Kconfig index 120b24478469..d3084028905b 100644 --- a/drivers/iio/dac/Kconfig +++ b/drivers/iio/dac/Kconfig @@ -200,6 +200,16 @@ config AD8801 To compile this driver as a module choose M here: the module will be called ad8801. +config DPOT_DAC + tristate "DAC emulation using a DPOT" + depends on OF + help + Say yes here to build support for DAC emulation using a digital + potentiometer. + + To compile this driver as a module, choose M here: the module will be + called dpot-dac. + config LPC18XX_DAC tristate "NXP LPC18xx DAC driver" depends on ARCH_LPC18XX || COMPILE_TEST diff --git a/drivers/iio/dac/Makefile b/drivers/iio/dac/Makefile index 27642bbf75f2..f01bf4a99867 100644 --- a/drivers/iio/dac/Makefile +++ b/drivers/iio/dac/Makefile @@ -22,6 +22,7 @@ obj-$(CONFIG_AD5686) += ad5686.o obj-$(CONFIG_AD7303) += ad7303.o obj-$(CONFIG_AD8801) += ad8801.o obj-$(CONFIG_CIO_DAC) += cio-dac.o +obj-$(CONFIG_DPOT_DAC) += dpot-dac.o obj-$(CONFIG_LPC18XX_DAC) += lpc18xx_dac.o obj-$(CONFIG_M62332) += m62332.o obj-$(CONFIG_MAX517) += max517.o diff --git a/drivers/iio/dac/dpot-dac.c b/drivers/iio/dac/dpot-dac.c new file mode 100644 index 000000000000..960a2b430480 --- /dev/null +++ b/drivers/iio/dac/dpot-dac.c @@ -0,0 +1,266 @@ +/* + * IIO DAC emulation driver using a digital potentiometer + * + * Copyright (C) 2016 Axentia Technologies AB + * + * Author: Peter Rosin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * It is assumed that the dpot is used as a voltage divider between the + * current dpot wiper setting and the maximum resistance of the dpot. The + * divided voltage is provided by a vref regulator. + * + * .------. + * .-----------. | | + * | vref |--' .---. + * | regulator |--. | | + * '-----------' | | d | + * | | p | + * | | o | wiper + * | | t |<---------+ + * | | | + * | '---' dac output voltage + * | | + * '------+------------+ + */ + +#include +#include +#include +#include +#include +#include +#include + +struct dpot_dac { + struct regulator *vref; + struct iio_channel *dpot; + u32 max_ohms; +}; + +static const struct iio_chan_spec dpot_dac_iio_channel = { + .type = IIO_VOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) + | BIT(IIO_CHAN_INFO_SCALE), + .info_mask_separate_available = BIT(IIO_CHAN_INFO_RAW), + .output = 1, + .indexed = 1, +}; + +static int dpot_dac_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct dpot_dac *dac = iio_priv(indio_dev); + int ret; + unsigned long long tmp; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + return iio_read_channel_raw(dac->dpot, val); + + case IIO_CHAN_INFO_SCALE: + ret = iio_read_channel_scale(dac->dpot, val, val2); + switch (ret) { + case IIO_VAL_FRACTIONAL_LOG2: + tmp = *val * 1000000000LL; + do_div(tmp, dac->max_ohms); + tmp *= regulator_get_voltage(dac->vref) / 1000; + do_div(tmp, 1000000000LL); + *val = tmp; + return ret; + case IIO_VAL_INT: + /* + * Convert integer scale to fractional scale by + * setting the denominator (val2) to one... + */ + *val2 = 1; + ret = IIO_VAL_FRACTIONAL; + /* ...and fall through. */ + case IIO_VAL_FRACTIONAL: + *val *= regulator_get_voltage(dac->vref) / 1000; + *val2 *= dac->max_ohms; + break; + } + + return ret; + } + + return -EINVAL; +} + +static int dpot_dac_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + struct dpot_dac *dac = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + *type = IIO_VAL_INT; + return iio_read_avail_channel_raw(dac->dpot, vals, length); + } + + return -EINVAL; +} + +static int dpot_dac_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct dpot_dac *dac = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_RAW: + return iio_write_channel_raw(dac->dpot, val); + } + + return -EINVAL; +} + +static const struct iio_info dpot_dac_info = { + .read_raw = dpot_dac_read_raw, + .read_avail = dpot_dac_read_avail, + .write_raw = dpot_dac_write_raw, + .driver_module = THIS_MODULE, +}; + +static int dpot_dac_channel_max_ohms(struct iio_dev *indio_dev) +{ + struct device *dev = &indio_dev->dev; + struct dpot_dac *dac = iio_priv(indio_dev); + unsigned long long tmp; + int ret; + int val; + int val2; + int max; + + ret = iio_read_max_channel_raw(dac->dpot, &max); + if (ret < 0) { + dev_err(dev, "dpot does not indicate its raw maximum value\n"); + return ret; + } + + switch (iio_read_channel_scale(dac->dpot, &val, &val2)) { + case IIO_VAL_INT: + return max * val; + case IIO_VAL_FRACTIONAL: + tmp = (unsigned long long)max * val; + do_div(tmp, val2); + return tmp; + case IIO_VAL_FRACTIONAL_LOG2: + tmp = val * 1000000000LL * max >> val2; + do_div(tmp, 1000000000LL); + return tmp; + default: + dev_err(dev, "dpot has a scale that is too weird\n"); + } + + return -EINVAL; +} + +static int dpot_dac_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct iio_dev *indio_dev; + struct dpot_dac *dac; + enum iio_chan_type type; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*dac)); + if (!indio_dev) + return -ENOMEM; + + platform_set_drvdata(pdev, indio_dev); + dac = iio_priv(indio_dev); + + indio_dev->name = dev_name(dev); + indio_dev->dev.parent = dev; + indio_dev->info = &dpot_dac_info; + indio_dev->modes = INDIO_DIRECT_MODE; + indio_dev->channels = &dpot_dac_iio_channel; + indio_dev->num_channels = 1; + + dac->vref = devm_regulator_get(dev, "vref"); + if (IS_ERR(dac->vref)) { + if (PTR_ERR(dac->vref) != -EPROBE_DEFER) + dev_err(&pdev->dev, "failed to get vref regulator\n"); + return PTR_ERR(dac->vref); + } + + dac->dpot = devm_iio_channel_get(dev, "dpot"); + if (IS_ERR(dac->dpot)) { + if (PTR_ERR(dac->dpot) != -EPROBE_DEFER) + dev_err(dev, "failed to get dpot input channel\n"); + return PTR_ERR(dac->dpot); + } + + ret = iio_get_channel_type(dac->dpot, &type); + if (ret < 0) + return ret; + + if (type != IIO_RESISTANCE) { + dev_err(dev, "dpot is of the wrong type\n"); + return -EINVAL; + } + + ret = dpot_dac_channel_max_ohms(indio_dev); + if (ret < 0) + return ret; + dac->max_ohms = ret; + + ret = regulator_enable(dac->vref); + if (ret) { + dev_err(dev, "failed to enable the vref regulator\n"); + return ret; + } + + ret = iio_device_register(indio_dev); + if (ret) { + dev_err(dev, "failed to register iio device\n"); + goto disable_reg; + } + + return 0; + +disable_reg: + regulator_disable(dac->vref); + return ret; +} + +static int dpot_dac_remove(struct platform_device *pdev) +{ + struct iio_dev *indio_dev = platform_get_drvdata(pdev); + struct dpot_dac *dac = iio_priv(indio_dev); + + iio_device_unregister(indio_dev); + regulator_disable(dac->vref); + + return 0; +} + +static const struct of_device_id dpot_dac_match[] = { + { .compatible = "dpot-dac" }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, dpot_dac_match); + +static struct platform_driver dpot_dac_driver = { + .probe = dpot_dac_probe, + .remove = dpot_dac_remove, + .driver = { + .name = "iio-dpot-dac", + .of_match_table = dpot_dac_match, + }, +}; +module_platform_driver(dpot_dac_driver); + +MODULE_DESCRIPTION("DAC emulation driver using a digital potentiometer"); +MODULE_AUTHOR("Peter Rosin "); +MODULE_LICENSE("GPL v2"); -- cgit v1.2.3 From e778aa142ab0666fa8af789a3bbabfb3334e6ff5 Mon Sep 17 00:00:00 2001 From: Peter Rosin Date: Tue, 8 Nov 2016 12:58:57 +0100 Subject: dt-bindings: iio: document envelope-detector bindings Acked-by: Rob Herring Signed-off-by: Peter Rosin Signed-off-by: Jonathan Cameron --- .../bindings/iio/adc/envelope-detector.txt | 54 ++++++++++++++++++++++ MAINTAINERS | 6 +++ 2 files changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/iio/adc/envelope-detector.txt (limited to 'MAINTAINERS') diff --git a/Documentation/devicetree/bindings/iio/adc/envelope-detector.txt b/Documentation/devicetree/bindings/iio/adc/envelope-detector.txt new file mode 100644 index 000000000000..27544bdd4478 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/envelope-detector.txt @@ -0,0 +1,54 @@ +Bindings for ADC envelope detector using a DAC and a comparator + +The DAC is used to find the peak level of an alternating voltage input +signal by a binary search using the output of a comparator wired to +an interrupt pin. Like so: + _ + | \ + input +------>-------|+ \ + | \ + .-------. | }---. + | | | / | + | dac|-->--|- / | + | | |_/ | + | | | + | | | + | irq|------<-------' + | | + '-------' + +Required properties: +- compatible: Should be "axentia,tse850-envelope-detector" +- io-channels: Channel node of the dac to be used for comparator input. +- io-channel-names: Should be "dac". +- interrupt specification for one client interrupt, + see ../../interrupt-controller/interrupts.txt for details. +- interrupt-names: Should be "comp". + +Example: + + &i2c { + dpot: mcp4651-104@28 { + compatible = "microchip,mcp4651-104"; + reg = <0x28>; + #io-channel-cells = <1>; + }; + }; + + dac: dac { + compatible = "dpot-dac"; + vref-supply = <®_3v3>; + io-channels = <&dpot 0>; + io-channel-names = "dpot"; + #io-channel-cells = <1>; + }; + + envelope-detector { + compatible = "axentia,tse850-envelope-detector"; + io-channels = <&dac 0>; + io-channel-names = "dac"; + + interrupt-parent = <&gpio>; + interrupts = <3 IRQ_TYPE_EDGE_FALLING>; + interrupt-names = "comp"; + }; diff --git a/MAINTAINERS b/MAINTAINERS index e63719d53658..76c3124fd62f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6127,6 +6127,12 @@ F: Documentation/ABI/testing/sysfs-bus-iio-dac-dpot-dac F: Documentation/devicetree/bindings/iio/dac/dpot-dac.txt F: drivers/iio/dac/dpot-dac.c +IIO ENVELOPE DETECTOR +M: Peter Rosin +L: linux-iio@vger.kernel.org +S: Maintained +F: Documentation/devicetree/bindings/iio/adc/envelope-detector.txt + IIO SUBSYSTEM AND DRIVERS M: Jonathan Cameron R: Hartmut Knaack -- cgit v1.2.3 From b475f80b354a1915fda1b34070d712b825b60543 Mon Sep 17 00:00:00 2001 From: Peter Rosin Date: Tue, 8 Nov 2016 12:58:58 +0100 Subject: iio: envelope-detector: ADC driver based on a DAC and a comparator The DAC is used to find the peak level of an alternating voltage input signal by a binary search using the output of a comparator wired to an interrupt pin. Like so: _ | \ input +------>-------|+ \ | \ .-------. | }---. | | | / | | dac|-->--|- / | | | |_/ | | | | | | | | irq|------<-------' | | '-------' Signed-off-by: Peter Rosin Acked-by: Thomas Gleixner Signed-off-by: Jonathan Cameron --- .../testing/sysfs-bus-iio-adc-envelope-detector | 36 ++ MAINTAINERS | 2 + drivers/iio/adc/Kconfig | 10 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/envelope-detector.c | 422 +++++++++++++++++++++ 5 files changed, 471 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-adc-envelope-detector create mode 100644 drivers/iio/adc/envelope-detector.c (limited to 'MAINTAINERS') diff --git a/Documentation/ABI/testing/sysfs-bus-iio-adc-envelope-detector b/Documentation/ABI/testing/sysfs-bus-iio-adc-envelope-detector new file mode 100644 index 000000000000..2071f9bcfaa5 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-adc-envelope-detector @@ -0,0 +1,36 @@ +What: /sys/bus/iio/devices/iio:deviceX/in_altvoltageY_invert +Date: October 2016 +KernelVersion: 4.9 +Contact: Peter Rosin +Description: + The DAC is used to find the peak level of an alternating + voltage input signal by a binary search using the output + of a comparator wired to an interrupt pin. Like so: + _ + | \ + input +------>-------|+ \ + | \ + .-------. | }---. + | | | / | + | dac|-->--|- / | + | | |_/ | + | | | + | | | + | irq|------<-------' + | | + '-------' + The boolean invert attribute (0/1) should be set when the + input signal is centered around the maximum value of the + dac instead of zero. The envelope detector will search + from below in this case and will also invert the result. + The edge/level of the interrupt is also switched to its + opposite value. + +What: /sys/bus/iio/devices/iio:deviceX/in_altvoltageY_compare_interval +Date: October 2016 +KernelVersion: 4.9 +Contact: Peter Rosin +Description: + Number of milliseconds to wait for the comparator in each + step of the binary search for the input peak level. Needs + to relate to the frequency of the input signal. diff --git a/MAINTAINERS b/MAINTAINERS index 76c3124fd62f..0393f1f1bee7 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6131,7 +6131,9 @@ IIO ENVELOPE DETECTOR M: Peter Rosin L: linux-iio@vger.kernel.org S: Maintained +F: Documentation/ABI/testing/sysfs-bus-iio-adc-envelope-detector F: Documentation/devicetree/bindings/iio/adc/envelope-detector.txt +F: drivers/iio/adc/envelope-detector.c IIO SUBSYSTEM AND DRIVERS M: Jonathan Cameron diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 57ebb997072c..6bbee0b0dfff 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -207,6 +207,16 @@ config DA9150_GPADC To compile this driver as a module, choose M here: the module will be called berlin2-adc. +config ENVELOPE_DETECTOR + tristate "Envelope detector using a DAC and a comparator" + depends on OF + help + Say yes here to build support for an envelope detector using a DAC + and a comparator. + + To compile this driver as a module, choose M here: the module will be + called envelope-detector. + config EXYNOS_ADC tristate "Exynos ADC driver support" depends on ARCH_EXYNOS || ARCH_S3C24XX || ARCH_S3C64XX || (OF && COMPILE_TEST) diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index 96894b32300d..9391217648cb 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -21,6 +21,7 @@ obj-$(CONFIG_BCM_IPROC_ADC) += bcm_iproc_adc.o obj-$(CONFIG_BERLIN2_ADC) += berlin2-adc.o obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o +obj-$(CONFIG_ENVELOPE_DETECTOR) += envelope-detector.o obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o obj-$(CONFIG_FSL_MX25_ADC) += fsl-imx25-gcq.o obj-$(CONFIG_HI8435) += hi8435.o diff --git a/drivers/iio/adc/envelope-detector.c b/drivers/iio/adc/envelope-detector.c new file mode 100644 index 000000000000..fef15c0d7c9c --- /dev/null +++ b/drivers/iio/adc/envelope-detector.c @@ -0,0 +1,422 @@ +/* + * Driver for an envelope detector using a DAC and a comparator + * + * Copyright (C) 2016 Axentia Technologies AB + * + * Author: Peter Rosin + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + */ + +/* + * The DAC is used to find the peak level of an alternating voltage input + * signal by a binary search using the output of a comparator wired to + * an interrupt pin. Like so: + * _ + * | \ + * input +------>-------|+ \ + * | \ + * .-------. | }---. + * | | | / | + * | dac|-->--|- / | + * | | |_/ | + * | | | + * | | | + * | irq|------<-------' + * | | + * '-------' + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +struct envelope { + spinlock_t comp_lock; /* protects comp */ + int comp; + + struct mutex read_lock; /* protects everything else */ + + int comp_irq; + u32 comp_irq_trigger; + u32 comp_irq_trigger_inv; + + struct iio_channel *dac; + struct delayed_work comp_timeout; + + unsigned int comp_interval; + bool invert; + u32 dac_max; + + int high; + int level; + int low; + + struct completion done; +}; + +/* + * The envelope_detector_comp_latch function works together with the compare + * interrupt service routine below (envelope_detector_comp_isr) as a latch + * (one-bit memory) for if the interrupt has triggered since last calling + * this function. + * The ..._comp_isr function disables the interrupt so that the cpu does not + * need to service a possible interrupt flood from the comparator when no-one + * cares anyway, and this ..._comp_latch function reenables them again if + * needed. + */ +static int envelope_detector_comp_latch(struct envelope *env) +{ + int comp; + + spin_lock_irq(&env->comp_lock); + comp = env->comp; + env->comp = 0; + spin_unlock_irq(&env->comp_lock); + + if (!comp) + return 0; + + /* + * The irq was disabled, and is reenabled just now. + * But there might have been a pending irq that + * happened while the irq was disabled that fires + * just as the irq is reenabled. That is not what + * is desired. + */ + enable_irq(env->comp_irq); + + /* So, synchronize this possibly pending irq... */ + synchronize_irq(env->comp_irq); + + /* ...and redo the whole dance. */ + spin_lock_irq(&env->comp_lock); + comp = env->comp; + env->comp = 0; + spin_unlock_irq(&env->comp_lock); + + if (comp) + enable_irq(env->comp_irq); + + return 1; +} + +static irqreturn_t envelope_detector_comp_isr(int irq, void *ctx) +{ + struct envelope *env = ctx; + + spin_lock(&env->comp_lock); + env->comp = 1; + disable_irq_nosync(env->comp_irq); + spin_unlock(&env->comp_lock); + + return IRQ_HANDLED; +} + +static void envelope_detector_setup_compare(struct envelope *env) +{ + int ret; + + /* + * Do a binary search for the peak input level, and stop + * when that level is "trapped" between two adjacent DAC + * values. + * When invert is active, use the midpoint floor so that + * env->level ends up as env->low when the termination + * criteria below is fulfilled, and use the midpoint + * ceiling when invert is not active so that env->level + * ends up as env->high in that case. + */ + env->level = (env->high + env->low + !env->invert) / 2; + + if (env->high == env->low + 1) { + complete(&env->done); + return; + } + + /* Set a "safe" DAC level (if there is such a thing)... */ + ret = iio_write_channel_raw(env->dac, env->invert ? 0 : env->dac_max); + if (ret < 0) + goto err; + + /* ...clear the comparison result... */ + envelope_detector_comp_latch(env); + + /* ...set the real DAC level... */ + ret = iio_write_channel_raw(env->dac, env->level); + if (ret < 0) + goto err; + + /* ...and wait for a bit to see if the latch catches anything. */ + schedule_delayed_work(&env->comp_timeout, + msecs_to_jiffies(env->comp_interval)); + return; + +err: + env->level = ret; + complete(&env->done); +} + +static void envelope_detector_timeout(struct work_struct *work) +{ + struct envelope *env = container_of(work, struct envelope, + comp_timeout.work); + + /* Adjust low/high depending on the latch content... */ + if (!envelope_detector_comp_latch(env) ^ !env->invert) + env->low = env->level; + else + env->high = env->level; + + /* ...and continue the search. */ + envelope_detector_setup_compare(env); +} + +static int envelope_detector_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, int *val2, long mask) +{ + struct envelope *env = iio_priv(indio_dev); + int ret; + + switch (mask) { + case IIO_CHAN_INFO_RAW: + /* + * When invert is active, start with high=max+1 and low=0 + * since we will end up with the low value when the + * termination criteria is fulfilled (rounding down). And + * start with high=max and low=-1 when invert is not active + * since we will end up with the high value in that case. + * This ensures that the returned value in both cases are + * in the same range as the DAC and is a value that has not + * triggered the comparator. + */ + mutex_lock(&env->read_lock); + env->high = env->dac_max + env->invert; + env->low = -1 + env->invert; + envelope_detector_setup_compare(env); + wait_for_completion(&env->done); + if (env->level < 0) { + ret = env->level; + goto err_unlock; + } + *val = env->invert ? env->dac_max - env->level : env->level; + mutex_unlock(&env->read_lock); + + return IIO_VAL_INT; + + case IIO_CHAN_INFO_SCALE: + return iio_read_channel_scale(env->dac, val, val2); + } + + return -EINVAL; + +err_unlock: + mutex_unlock(&env->read_lock); + return ret; +} + +static ssize_t envelope_show_invert(struct iio_dev *indio_dev, + uintptr_t private, + struct iio_chan_spec const *ch, char *buf) +{ + struct envelope *env = iio_priv(indio_dev); + + return sprintf(buf, "%u\n", env->invert); +} + +static ssize_t envelope_store_invert(struct iio_dev *indio_dev, + uintptr_t private, + struct iio_chan_spec const *ch, + const char *buf, size_t len) +{ + struct envelope *env = iio_priv(indio_dev); + unsigned long invert; + int ret; + u32 trigger; + + ret = kstrtoul(buf, 0, &invert); + if (ret < 0) + return ret; + if (invert > 1) + return -EINVAL; + + trigger = invert ? env->comp_irq_trigger_inv : env->comp_irq_trigger; + + mutex_lock(&env->read_lock); + if (invert != env->invert) + ret = irq_set_irq_type(env->comp_irq, trigger); + if (!ret) { + env->invert = invert; + ret = len; + } + mutex_unlock(&env->read_lock); + + return ret; +} + +static ssize_t envelope_show_comp_interval(struct iio_dev *indio_dev, + uintptr_t private, + struct iio_chan_spec const *ch, + char *buf) +{ + struct envelope *env = iio_priv(indio_dev); + + return sprintf(buf, "%u\n", env->comp_interval); +} + +static ssize_t envelope_store_comp_interval(struct iio_dev *indio_dev, + uintptr_t private, + struct iio_chan_spec const *ch, + const char *buf, size_t len) +{ + struct envelope *env = iio_priv(indio_dev); + unsigned long interval; + int ret; + + ret = kstrtoul(buf, 0, &interval); + if (ret < 0) + return ret; + if (interval > 1000) + return -EINVAL; + + mutex_lock(&env->read_lock); + env->comp_interval = interval; + mutex_unlock(&env->read_lock); + + return len; +} + +static const struct iio_chan_spec_ext_info envelope_detector_ext_info[] = { + { .name = "invert", + .read = envelope_show_invert, + .write = envelope_store_invert, }, + { .name = "compare_interval", + .read = envelope_show_comp_interval, + .write = envelope_store_comp_interval, }, + { /* sentinel */ } +}; + +static const struct iio_chan_spec envelope_detector_iio_channel = { + .type = IIO_ALTVOLTAGE, + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) + | BIT(IIO_CHAN_INFO_SCALE), + .ext_info = envelope_detector_ext_info, + .indexed = 1, +}; + +static const struct iio_info envelope_detector_info = { + .read_raw = &envelope_detector_read_raw, + .driver_module = THIS_MODULE, +}; + +static int envelope_detector_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct iio_dev *indio_dev; + struct envelope *env; + enum iio_chan_type type; + int ret; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*env)); + if (!indio_dev) + return -ENOMEM; + + platform_set_drvdata(pdev, indio_dev); + env = iio_priv(indio_dev); + env->comp_interval = 50; /* some sensible default? */ + + spin_lock_init(&env->comp_lock); + mutex_init(&env->read_lock); + init_completion(&env->done); + INIT_DELAYED_WORK(&env->comp_timeout, envelope_detector_timeout); + + indio_dev->name = dev_name(dev); + indio_dev->dev.parent = dev; + indio_dev->dev.of_node = dev->of_node; + indio_dev->info = &envelope_detector_info; + indio_dev->channels = &envelope_detector_iio_channel; + indio_dev->num_channels = 1; + + env->dac = devm_iio_channel_get(dev, "dac"); + if (IS_ERR(env->dac)) { + if (PTR_ERR(env->dac) != -EPROBE_DEFER) + dev_err(dev, "failed to get dac input channel\n"); + return PTR_ERR(env->dac); + } + + env->comp_irq = platform_get_irq_byname(pdev, "comp"); + if (env->comp_irq < 0) { + if (env->comp_irq != -EPROBE_DEFER) + dev_err(dev, "failed to get compare interrupt\n"); + return env->comp_irq; + } + + ret = devm_request_irq(dev, env->comp_irq, envelope_detector_comp_isr, + 0, "envelope-detector", env); + if (ret) { + if (ret != -EPROBE_DEFER) + dev_err(dev, "failed to request interrupt\n"); + return ret; + } + env->comp_irq_trigger = irq_get_trigger_type(env->comp_irq); + if (env->comp_irq_trigger & IRQF_TRIGGER_RISING) + env->comp_irq_trigger_inv |= IRQF_TRIGGER_FALLING; + if (env->comp_irq_trigger & IRQF_TRIGGER_FALLING) + env->comp_irq_trigger_inv |= IRQF_TRIGGER_RISING; + if (env->comp_irq_trigger & IRQF_TRIGGER_HIGH) + env->comp_irq_trigger_inv |= IRQF_TRIGGER_LOW; + if (env->comp_irq_trigger & IRQF_TRIGGER_LOW) + env->comp_irq_trigger_inv |= IRQF_TRIGGER_HIGH; + + ret = iio_get_channel_type(env->dac, &type); + if (ret < 0) + return ret; + + if (type != IIO_VOLTAGE) { + dev_err(dev, "dac is of the wrong type\n"); + return -EINVAL; + } + + ret = iio_read_max_channel_raw(env->dac, &env->dac_max); + if (ret < 0) { + dev_err(dev, "dac does not indicate its raw maximum value\n"); + return ret; + } + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct of_device_id envelope_detector_match[] = { + { .compatible = "axentia,tse850-envelope-detector", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, envelope_detector_match); + +static struct platform_driver envelope_detector_driver = { + .probe = envelope_detector_probe, + .driver = { + .name = "iio-envelope-detector", + .of_match_table = envelope_detector_match, + }, +}; +module_platform_driver(envelope_detector_driver); + +MODULE_DESCRIPTION("Envelope detector using a DAC and a comparator"); +MODULE_AUTHOR("Peter Rosin "); +MODULE_LICENSE("GPL v2"); -- cgit v1.2.3 From 0af72df267f2ed865c71a69fb2811ea6fa4736dc Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 6 Dec 2016 18:18:30 +0100 Subject: staging: slicoss: remove the staging driver A "real" driver for this hardware has now landed in the networking tree, so remove this old staging driver so that we don't have multiple drivers for the same hardware, and so people don't waste their time trying to clean up this old code. Cc: Lior Dotan Cc: Christopher Harrer Cc: David Miller Signed-off-by: Greg Kroah-Hartman --- MAINTAINERS | 6 - drivers/staging/Kconfig | 2 - drivers/staging/Makefile | 1 - drivers/staging/slicoss/Kconfig | 14 - drivers/staging/slicoss/Makefile | 1 - drivers/staging/slicoss/README | 7 - drivers/staging/slicoss/TODO | 36 - drivers/staging/slicoss/slic.h | 568 ------- drivers/staging/slicoss/slichw.h | 652 -------- drivers/staging/slicoss/slicoss.c | 3128 ------------------------------------- 10 files changed, 4415 deletions(-) delete mode 100644 drivers/staging/slicoss/Kconfig delete mode 100644 drivers/staging/slicoss/Makefile delete mode 100644 drivers/staging/slicoss/README delete mode 100644 drivers/staging/slicoss/TODO delete mode 100644 drivers/staging/slicoss/slic.h delete mode 100644 drivers/staging/slicoss/slichw.h delete mode 100644 drivers/staging/slicoss/slicoss.c (limited to 'MAINTAINERS') diff --git a/MAINTAINERS b/MAINTAINERS index 2de970d2f332..8695516dc5c4 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11566,12 +11566,6 @@ L: linux-fbdev@vger.kernel.org S: Maintained F: drivers/staging/sm750fb/ -STAGING - SLICOSS -M: Lior Dotan -M: Christopher Harrer -S: Odd Fixes -F: drivers/staging/slicoss/ - STAGING - SPEAKUP CONSOLE SPEECH DRIVER M: William Hubbs M: Chris Brannon diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig index 58a7b3504b82..cd005cd41413 100644 --- a/drivers/staging/Kconfig +++ b/drivers/staging/Kconfig @@ -24,8 +24,6 @@ menuconfig STAGING if STAGING -source "drivers/staging/slicoss/Kconfig" - source "drivers/staging/wlan-ng/Kconfig" source "drivers/staging/comedi/Kconfig" diff --git a/drivers/staging/Makefile b/drivers/staging/Makefile index 323753216999..831e2e891989 100644 --- a/drivers/staging/Makefile +++ b/drivers/staging/Makefile @@ -1,7 +1,6 @@ # Makefile for staging directory obj-y += media/ -obj-$(CONFIG_SLICOSS) += slicoss/ obj-$(CONFIG_PRISM2_USB) += wlan-ng/ obj-$(CONFIG_COMEDI) += comedi/ obj-$(CONFIG_FB_OLPC_DCON) += olpc_dcon/ diff --git a/drivers/staging/slicoss/Kconfig b/drivers/staging/slicoss/Kconfig deleted file mode 100644 index 5c2a15b42dfe..000000000000 --- a/drivers/staging/slicoss/Kconfig +++ /dev/null @@ -1,14 +0,0 @@ -config SLICOSS - tristate "Alacritech Gigabit IS-NIC support" - depends on PCI && X86 && NET - default n - help - This driver supports Alacritech's IS-NIC gigabit ethernet cards. - - This includes the following devices: - Mojave cards (single port PCI Gigabit) both copper and fiber - Oasis cards (single and dual port PCI-x Gigabit) copper and fiber - Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber - - To compile this driver as a module, choose M here: the module - will be called slicoss. diff --git a/drivers/staging/slicoss/Makefile b/drivers/staging/slicoss/Makefile deleted file mode 100644 index 7bc9e9b9d3ab..000000000000 --- a/drivers/staging/slicoss/Makefile +++ /dev/null @@ -1 +0,0 @@ -obj-$(CONFIG_SLICOSS) += slicoss.o diff --git a/drivers/staging/slicoss/README b/drivers/staging/slicoss/README deleted file mode 100644 index 4fa50e73ce86..000000000000 --- a/drivers/staging/slicoss/README +++ /dev/null @@ -1,7 +0,0 @@ -This driver is supposed to support: - - Mojave cards (single port PCI Gigabit) both copper and fiber - Oasis cards (single and dual port PCI-x Gigabit) copper and fiber - Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber - -The driver was actually tested on Oasis and Kalahari cards. diff --git a/drivers/staging/slicoss/TODO b/drivers/staging/slicoss/TODO deleted file mode 100644 index 9019729b7be6..000000000000 --- a/drivers/staging/slicoss/TODO +++ /dev/null @@ -1,36 +0,0 @@ -TODO: - - move firmware loading to request_firmware() - - remove direct memory access of structures - - any remaining sparse and checkpatch.pl warnings - - - use net_device_ops - - use dev->stats rather than adapter->stats - - don't cast netdev_priv it is already void - - GET RID OF MACROS - - work on all architectures - - without CONFIG_X86_64 confusion - - do 64 bit correctly - - don't depend on order of union - - get rid of ASSERT(), use BUG() instead but only where necessary - looks like most aren't really useful - - no new SIOCDEVPRIVATE ioctl allowed - - don't use module_param for configuring interrupt mitigation - use ethtool instead - - reorder code to elminate use of forward declarations - - don't keep private linked list of drivers. - - use PCI_DEVICE() - - do ethtool correctly using ethtool_ops - - NAPI? - - wasted overhead of extra stats - - state variables for things that are - easily available and shouldn't be kept in card structure, cardnum, ... - slotnumber, events, ... - - volatile == bad design => bad code - - locking too fine grained, not designed just throw more locks - at problem - -Please send patches to: - Greg Kroah-Hartman -and Cc: Lior Dotan and Christopher Harrer - as well as they are also able to test out any -changes. diff --git a/drivers/staging/slicoss/slic.h b/drivers/staging/slicoss/slic.h deleted file mode 100644 index 2893bdfbb198..000000000000 --- a/drivers/staging/slicoss/slic.h +++ /dev/null @@ -1,568 +0,0 @@ -/************************************************************************** - * - * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * The views and conclusions contained in the software and documentation - * are those of the authors and should not be interpreted as representing - * official policies, either expressed or implied, of Alacritech, Inc. - * - **************************************************************************/ - -/* - * FILENAME: slic.h - * - * This is the base set of header definitions for the SLICOSS driver. - */ -#ifndef __SLIC_DRIVER_H__ -#define __SLIC_DRIVER_H__ - -/* firmware stuff */ -#define OASIS_UCODE_VERS_STRING "1.2" -#define OASIS_UCODE_VERS_DATE "2006/03/27 15:10:37" -#define OASIS_UCODE_HOSTIF_ID 3 - -#define MOJAVE_UCODE_VERS_STRING "1.2" -#define MOJAVE_UCODE_VERS_DATE "2006/03/27 15:12:22" -#define MOJAVE_UCODE_HOSTIF_ID 3 - -#define GB_RCVUCODE_VERS_STRING "1.2" -#define GB_RCVUCODE_VERS_DATE "2006/03/27 15:12:15" -static u32 oasis_rcv_ucode_len = 512; -static u32 gb_rcv_ucode_len = 512; -#define SECTION_SIZE 65536 - -#define SLIC_RSPQ_PAGES_GB 10 -#define SLIC_RSPQ_BUFSINPAGE (PAGE_SIZE / SLIC_RSPBUF_SIZE) - -struct slic_rspqueue { - u32 offset; - u32 pageindex; - u32 num_pages; - struct slic_rspbuf *rspbuf; - u32 *vaddr[SLIC_RSPQ_PAGES_GB]; - dma_addr_t paddr[SLIC_RSPQ_PAGES_GB]; -}; - -#define SLIC_RCVQ_EXPANSION 1 -#define SLIC_RCVQ_ENTRIES (256 * SLIC_RCVQ_EXPANSION) -#define SLIC_RCVQ_MINENTRIES (SLIC_RCVQ_ENTRIES / 2) -#define SLIC_RCVQ_MAX_PROCESS_ISR ((SLIC_RCVQ_ENTRIES * 4)) -#define SLIC_RCVQ_RCVBUFSIZE 2048 -#define SLIC_RCVQ_FILLENTRIES (16 * SLIC_RCVQ_EXPANSION) -#define SLIC_RCVQ_FILLTHRESH (SLIC_RCVQ_ENTRIES - SLIC_RCVQ_FILLENTRIES) - -struct slic_rcvqueue { - struct sk_buff *head; - struct sk_buff *tail; - u32 count; - u32 size; - u32 errors; -}; - -struct slic_rcvbuf_info { - u32 id; - u32 starttime; - u32 stoptime; - u32 slicworld; - u32 lasttime; - u32 lastid; -}; - -/* - * SLIC Handle structure. Used to restrict handle values to - * 32 bits by using an index rather than an address. - * Simplifies ucode in 64-bit systems - */ -struct slic_handle_word { - union { - struct { - ushort index; - ushort bottombits; /* to denote num bufs to card */ - } parts; - u32 whole; - } handle; -}; - -struct slic_handle { - struct slic_handle_word token; /* token passed between host and card*/ - ushort type; - void *address; /* actual address of the object*/ - ushort offset; - struct slic_handle *other_handle; - struct slic_handle *next; -}; - -#define SLIC_HANDLE_FREE 0x0000 -#define SLIC_HANDLE_DATA 0x0001 -#define SLIC_HANDLE_CMD 0x0002 -#define SLIC_HANDLE_CONTEXT 0x0003 -#define SLIC_HANDLE_TEAM 0x0004 - -#define handle_index handle.parts.index -#define handle_bottom handle.parts.bottombits -#define handle_token handle.whole - -#define SLIC_HOSTCMD_SIZE 512 - -struct slic_hostcmd { - struct slic_host64_cmd cmd64; - u32 type; - struct sk_buff *skb; - u32 paddrl; - u32 paddrh; - u32 busy; - u32 cmdsize; - ushort numbufs; - struct slic_handle *pslic_handle;/* handle associated with command */ - struct slic_hostcmd *next; - struct slic_hostcmd *next_all; -}; - -#define SLIC_CMDQ_CMDSINPAGE (PAGE_SIZE / SLIC_HOSTCMD_SIZE) -#define SLIC_CMD_DUMB 3 -#define SLIC_CMDQ_INITCMDS 256 -#define SLIC_CMDQ_MAXCMDS 256 -#define SLIC_CMDQ_MAXOUTSTAND SLIC_CMDQ_MAXCMDS -#define SLIC_CMDQ_MAXPAGES (SLIC_CMDQ_MAXCMDS / SLIC_CMDQ_CMDSINPAGE) -#define SLIC_CMDQ_INITPAGES (SLIC_CMDQ_INITCMDS / SLIC_CMDQ_CMDSINPAGE) - -struct slic_cmdqmem { - int pagecnt; - u32 *pages[SLIC_CMDQ_MAXPAGES]; - dma_addr_t dma_pages[SLIC_CMDQ_MAXPAGES]; -}; - -struct slic_cmdqueue { - struct slic_hostcmd *head; - struct slic_hostcmd *tail; - int count; - spinlock_t lock; -}; - -#define SLIC_MAX_CARDS 32 -#define SLIC_MAX_PORTS 4 /* Max # of ports per card */ - -struct mcast_address { - unsigned char address[6]; - struct mcast_address *next; -}; - -#define CARD_DOWN 0x00000000 -#define CARD_UP 0x00000001 -#define CARD_FAIL 0x00000002 -#define CARD_DIAG 0x00000003 -#define CARD_SLEEP 0x00000004 - -#define ADAPT_DOWN 0x00 -#define ADAPT_UP 0x01 -#define ADAPT_FAIL 0x02 -#define ADAPT_RESET 0x03 -#define ADAPT_SLEEP 0x04 - -#define ADAPT_FLAGS_BOOTTIME 0x0001 -#define ADAPT_FLAGS_IS64BIT 0x0002 -#define ADAPT_FLAGS_PENDINGLINKDOWN 0x0004 -#define ADAPT_FLAGS_FIBERMEDIA 0x0008 -#define ADAPT_FLAGS_LOCKS_ALLOCED 0x0010 -#define ADAPT_FLAGS_INT_REGISTERED 0x0020 -#define ADAPT_FLAGS_LOAD_TIMER_SET 0x0040 -#define ADAPT_FLAGS_STATS_TIMER_SET 0x0080 -#define ADAPT_FLAGS_RESET_TIMER_SET 0x0100 - -#define LINK_DOWN 0x00 -#define LINK_CONFIG 0x01 -#define LINK_UP 0x02 - -#define LINK_10MB 0x00 -#define LINK_100MB 0x01 -#define LINK_AUTOSPEED 0x02 -#define LINK_1000MB 0x03 -#define LINK_10000MB 0x04 - -#define LINK_HALFD 0x00 -#define LINK_FULLD 0x01 -#define LINK_AUTOD 0x02 - -#define MAC_DIRECTED 0x00000001 -#define MAC_BCAST 0x00000002 -#define MAC_MCAST 0x00000004 -#define MAC_PROMISC 0x00000008 -#define MAC_LOOPBACK 0x00000010 -#define MAC_ALLMCAST 0x00000020 - -static inline const char *slic_linkstate(unsigned char x) -{ - return ((x == LINK_DOWN) ? "Down" : "Up "); -} - -static inline const char *slic_adapter_state(unsigned char x) -{ - return ((x == ADAPT_UP) ? "UP" : "Down"); -} - -static inline const char *slic_card_state(uint x) -{ - return ((x == CARD_UP) ? "UP" : "Down"); -} - -struct slic_iface_stats { - /* - * Stats - */ - u64 xmt_bytes; - u64 xmt_ucast; - u64 xmt_mcast; - u64 xmt_bcast; - u64 xmt_errors; - u64 xmt_discards; - u64 xmit_collisions; - u64 xmit_excess_xmit_collisions; - u64 rcv_bytes; - u64 rcv_ucast; - u64 rcv_mcast; - u64 rcv_bcast; - u64 rcv_errors; - u64 rcv_discards; -}; - -struct sliccp_stats { - u64 xmit_tcp_segs; - u64 xmit_tcp_bytes; - u64 rcv_tcp_segs; - u64 rcv_tcp_bytes; -}; - -struct slicnet_stats { - struct sliccp_stats tcp; - struct slic_iface_stats iface; -}; - -#define SLIC_LOADTIMER_PERIOD 1 -#define SLIC_INTAGG_DEFAULT 200 -#define SLIC_LOAD_0 0 -#define SLIC_INTAGG_0 0 -#define SLIC_LOAD_1 8000 -#define SLIC_LOAD_2 10000 -#define SLIC_LOAD_3 12000 -#define SLIC_LOAD_4 14000 -#define SLIC_LOAD_5 16000 -#define SLIC_INTAGG_1 50 -#define SLIC_INTAGG_2 100 -#define SLIC_INTAGG_3 150 -#define SLIC_INTAGG_4 200 -#define SLIC_INTAGG_5 250 -#define SLIC_LOAD_1GB 3000 -#define SLIC_LOAD_2GB 6000 -#define SLIC_LOAD_3GB 12000 -#define SLIC_LOAD_4GB 24000 -#define SLIC_LOAD_5GB 48000 -#define SLIC_INTAGG_1GB 50 -#define SLIC_INTAGG_2GB 75 -#define SLIC_INTAGG_3GB 100 -#define SLIC_INTAGG_4GB 100 -#define SLIC_INTAGG_5GB 100 - -struct ether_header { - unsigned char ether_dhost[6]; - unsigned char ether_shost[6]; - ushort ether_type; -}; - -struct sliccard { - uint busnumber; - uint slotnumber; - uint state; - uint cardnum; - uint card_size; - uint adapters_activated; - uint adapters_allocated; - uint adapters_sleeping; - uint gennumber; - u32 events; - u32 loadlevel_current; - u32 load; - uint reset_in_progress; - u32 pingstatus; - u32 bad_pingstatus; - struct timer_list loadtimer; - u32 loadtimerset; - uint config_set; - struct slic_config config; - struct adapter *master; - struct adapter *adapter[SLIC_MAX_PORTS]; - struct sliccard *next; - u32 error_interrupts; - u32 error_rmiss_interrupts; - u32 rcv_interrupts; - u32 xmit_interrupts; - u32 num_isrs; - u32 false_interrupts; - u32 max_isr_rcvs; - u32 max_isr_xmits; - u32 rcv_interrupt_yields; - u32 tx_packets; - u32 debug_ix; - ushort reg_type[32]; - ushort reg_offset[32]; - u32 reg_value[32]; - u32 reg_valueh[32]; -}; - -#define NUM_CFG_SPACES 2 -#define NUM_CFG_REGS 64 -#define NUM_CFG_REG_ULONGS (NUM_CFG_REGS / sizeof(u32)) - -struct physcard { - struct adapter *adapter[SLIC_MAX_PORTS]; - struct physcard *next; - uint adapters_allocd; - -/* - * the following is not currently needed - * u32 bridge_busnum; - * u32 bridge_cfg[NUM_CFG_SPACES][NUM_CFG_REG_ULONGS]; - */ -}; - -struct base_driver { - spinlock_t driver_lock; - u32 num_slic_cards; - u32 num_slic_ports; - u32 num_slic_ports_active; - u32 dynamic_intagg; - struct sliccard *slic_card; - struct physcard *phys_card; - uint cardnuminuse[SLIC_MAX_CARDS]; -}; - -struct slic_stats { - /* xmit stats */ - u64 xmit_tcp_bytes; - u64 xmit_tcp_segs; - u64 xmit_bytes; - u64 xmit_collisions; - u64 xmit_unicasts; - u64 xmit_other_error; - u64 xmit_excess_collisions; - /* rcv stats */ - u64 rcv_tcp_bytes; - u64 rcv_tcp_segs; - u64 rcv_bytes; - u64 rcv_unicasts; - u64 rcv_other_error; - u64 rcv_drops; -}; - -struct slic_shmem_data { - u32 isr; - u32 lnkstatus; - struct slic_stats stats; -}; - -struct slic_shmemory { - dma_addr_t isr_phaddr; - dma_addr_t lnkstatus_phaddr; - dma_addr_t stats_phaddr; - struct slic_shmem_data *shmem_data; -}; - -struct slic_upr { - uint adapter; - u32 upr_request; - u32 upr_data; - u32 upr_data_h; - u32 upr_buffer; - u32 upr_buffer_h; - struct slic_upr *next; -}; - -struct slic_ifevents { - uint oflow802; - uint uflow802; - uint tprtoflow; - uint rcvearly; - uint bufov; - uint carre; - uint longe; - uint invp; - uint crc; - uint drbl; - uint code; - uint ip_hlen; - uint ip_len; - uint ip_csum; - uint tp_csum; - uint tp_hlen; -}; - -struct adapter { - void *ifp; - struct sliccard *card; - uint port; - struct physcard *physcard; - uint physport; - uint cardindex; - uint card_size; - uint chipid; - struct net_device *netdev; - spinlock_t adapter_lock; - spinlock_t reset_lock; - struct pci_dev *pcidev; - uint busnumber; - uint slotnumber; - uint functionnumber; - ushort vendid; - ushort devid; - ushort subsysid; - u32 irq; - u32 drambase; - u32 dramlength; - uint queues_initialized; - uint allocated; - uint activated; - u32 intrregistered; - uint isp_initialized; - uint gennumber; - struct slic_shmemory shmem; - dma_addr_t phys_shmem; - void __iomem *regs; - unsigned char state; - unsigned char linkstate; - unsigned char linkspeed; - unsigned char linkduplex; - uint flags; - unsigned char macaddr[6]; - unsigned char currmacaddr[6]; - u32 macopts; - ushort devflags_prev; - u64 mcastmask; - struct mcast_address *mcastaddrs; - struct slic_upr *upr_list; - uint upr_busy; - struct timer_list pingtimer; - u32 pingtimerset; - struct timer_list loadtimer; - u32 loadtimerset; - spinlock_t upr_lock; - spinlock_t bit64reglock; - struct slic_rspqueue rspqueue; - struct slic_rcvqueue rcvqueue; - struct slic_cmdqueue cmdq_free; - struct slic_cmdqueue cmdq_done; - struct slic_cmdqueue cmdq_all; - struct slic_cmdqmem cmdqmem; - /* - * SLIC Handles - */ - /* Object handles*/ - struct slic_handle slic_handles[SLIC_CMDQ_MAXCMDS + 1]; - /* Free object handles*/ - struct slic_handle *pfree_slic_handles; - /* Object handle list lock*/ - spinlock_t handle_lock; - ushort slic_handle_ix; - - u32 xmitq_full; - u32 all_reg_writes; - u32 icr_reg_writes; - u32 isr_reg_writes; - u32 error_interrupts; - u32 error_rmiss_interrupts; - u32 rx_errors; - u32 rcv_drops; - u32 rcv_interrupts; - u32 xmit_interrupts; - u32 linkevent_interrupts; - u32 upr_interrupts; - u32 num_isrs; - u32 false_interrupts; - u32 tx_packets; - u32 xmit_completes; - u32 tx_drops; - u32 rcv_broadcasts; - u32 rcv_multicasts; - u32 rcv_unicasts; - u32 max_isr_rcvs; - u32 max_isr_xmits; - u32 rcv_interrupt_yields; - u32 intagg_period; - u32 intagg_delay; - u32 dynamic_intagg; - struct inicpm_state *inicpm_info; - void *pinicpm_info; - struct slic_ifevents if_events; - struct slic_stats inicstats_prev; - struct slicnet_stats slic_stats; -}; - -static inline u32 slic_read32(struct adapter *adapter, unsigned int reg) -{ - return ioread32(adapter->regs + reg); -} - -static inline void slic_write32(struct adapter *adapter, unsigned int reg, - u32 val) -{ - iowrite32(val, adapter->regs + reg); -} - -static inline void slic_write64(struct adapter *adapter, unsigned int reg, - u32 val, u32 hiaddr) -{ - unsigned long flags; - - spin_lock_irqsave(&adapter->bit64reglock, flags); - slic_write32(adapter, SLIC_REG_ADDR_UPPER, hiaddr); - slic_write32(adapter, reg, val); - mmiowb(); - spin_unlock_irqrestore(&adapter->bit64reglock, flags); -} - -static inline void slic_flush_write(struct adapter *adapter) -{ - ioread32(adapter->regs + SLIC_REG_HOSTID); -} - -#if BITS_PER_LONG == 64 -#define SLIC_GET_ADDR_LOW(_addr) (u32)((u64)(_addr) & \ - 0x00000000FFFFFFFF) -#define SLIC_GET_ADDR_HIGH(_addr) (u32)(((u64)(_addr) >> 32) & \ - 0x00000000FFFFFFFF) -#elif BITS_PER_LONG == 32 -#define SLIC_GET_ADDR_LOW(_addr) (u32)(_addr) -#define SLIC_GET_ADDR_HIGH(_addr) (u32)0 -#else -#error BITS_PER_LONG must be 32 or 64 -#endif - -#define FLUSH true -#define DONT_FLUSH false - -#define SIOCSLICSETINTAGG (SIOCDEVPRIVATE + 10) - -#endif /* __SLIC_DRIVER_H__ */ diff --git a/drivers/staging/slicoss/slichw.h b/drivers/staging/slicoss/slichw.h deleted file mode 100644 index 541d158140bc..000000000000 --- a/drivers/staging/slicoss/slichw.h +++ /dev/null @@ -1,652 +0,0 @@ -/************************************************************************** - * - * Copyright (c) 2000-2002 Alacritech, Inc. All rights reserved. - * - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * - * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * The views and conclusions contained in the software and documentation - * are those of the authors and should not be interpreted as representing - * official policies, either expressed or implied, of Alacritech, Inc. - * - **************************************************************************/ - -/* - * FILENAME: slichw.h - * - * This header file contains definitions that are common to our hardware. - */ -#ifndef __SLICHW_H__ -#define __SLICHW_H__ - -#define PCI_VENDOR_ID_ALACRITECH 0x139A -#define SLIC_1GB_DEVICE_ID 0x0005 -#define SLIC_2GB_DEVICE_ID 0x0007 /* Oasis Device ID */ - -#define SLIC_1GB_CICADA_SUBSYS_ID 0x0008 - -#define SLIC_NBR_MACS 4 - -#define SLIC_RCVBUF_SIZE 2048 -#define SLIC_RCVBUF_HEADSIZE 34 -#define SLIC_RCVBUF_TAILSIZE 0 -#define SLIC_RCVBUF_DATASIZE (SLIC_RCVBUF_SIZE - \ - (SLIC_RCVBUF_HEADSIZE + \ - SLIC_RCVBUF_TAILSIZE)) - -#define VGBSTAT_XPERR 0x40000000 -#define VGBSTAT_XERRSHFT 25 -#define VGBSTAT_XCSERR 0x23 -#define VGBSTAT_XUFLOW 0x22 -#define VGBSTAT_XHLEN 0x20 -#define VGBSTAT_NETERR 0x01000000 -#define VGBSTAT_NERRSHFT 16 -#define VGBSTAT_NERRMSK 0x1ff -#define VGBSTAT_NCSERR 0x103 -#define VGBSTAT_NUFLOW 0x102 -#define VGBSTAT_NHLEN 0x100 -#define VGBSTAT_LNKERR 0x00000080 -#define VGBSTAT_LERRMSK 0xff -#define VGBSTAT_LDEARLY 0x86 -#define VGBSTAT_LBOFLO 0x85 -#define VGBSTAT_LCODERR 0x84 -#define VGBSTAT_LDBLNBL 0x83 -#define VGBSTAT_LCRCERR 0x82 -#define VGBSTAT_LOFLO 0x81 -#define VGBSTAT_LUFLO 0x80 -#define IRHDDR_FLEN_MSK 0x0000ffff -#define IRHDDR_SVALID 0x80000000 -#define IRHDDR_ERR 0x10000000 -#define VRHSTAT_802OE 0x80000000 -#define VRHSTAT_TPOFLO 0x10000000 -#define VRHSTATB_802UE 0x80000000 -#define VRHSTATB_RCVE 0x40000000 -#define VRHSTATB_BUFF 0x20000000 -#define VRHSTATB_CARRE 0x08000000 -#define VRHSTATB_LONGE 0x02000000 -#define VRHSTATB_PREA 0x01000000 -#define VRHSTATB_CRC 0x00800000 -#define VRHSTATB_DRBL 0x00400000 -#define VRHSTATB_CODE 0x00200000 -#define VRHSTATB_TPCSUM 0x00100000 -#define VRHSTATB_TPHLEN 0x00080000 -#define VRHSTATB_IPCSUM 0x00040000 -#define VRHSTATB_IPLERR 0x00020000 -#define VRHSTATB_IPHERR 0x00010000 -#define SLIC_MAX64_BCNT 23 -#define SLIC_MAX32_BCNT 26 -#define IHCMD_XMT_REQ 0x01 -#define IHFLG_IFSHFT 2 -#define SLIC_RSPBUF_SIZE 32 - -#define SLIC_RESET_MAGIC 0xDEAD -#define ICR_INT_OFF 0 -#define ICR_INT_ON 1 -#define ICR_INT_MASK 2 - -#define ISR_ERR 0x80000000 -#define ISR_RCV 0x40000000 -#define ISR_CMD 0x20000000 -#define ISR_IO 0x60000000 -#define ISR_UPC 0x10000000 -#define ISR_LEVENT 0x08000000 -#define ISR_RMISS 0x02000000 -#define ISR_UPCERR 0x01000000 -#define ISR_XDROP 0x00800000 -#define ISR_UPCBSY 0x00020000 -#define ISR_EVMSK 0xffff0000 -#define ISR_PINGMASK 0x00700000 -#define ISR_PINGDSMASK 0x00710000 -#define ISR_UPCMASK 0x11000000 -#define SLIC_WCS_START 0x80000000 -#define SLIC_WCS_COMPARE 0x40000000 -#define SLIC_RCVWCS_BEGIN 0x40000000 -#define SLIC_RCVWCS_FINISH 0x80000000 -#define SLIC_PM_MAXPATTERNS 6 -#define SLIC_PM_PATTERNSIZE 128 -#define SLIC_PMCAPS_WAKEONLAN 0x00000001 -#define MIICR_REG_PCR 0x00000000 -#define MIICR_REG_4 0x00040000 -#define MIICR_REG_9 0x00090000 -#define MIICR_REG_16 0x00100000 -#define PCR_RESET 0x8000 -#define PCR_POWERDOWN 0x0800 -#define PCR_SPEED_100 0x2000 -#define PCR_SPEED_1000 0x0040 -#define PCR_AUTONEG 0x1000 -#define PCR_AUTONEG_RST 0x0200 -#define PCR_DUPLEX_FULL 0x0100 -#define PSR_LINKUP 0x0004 - -#define PAR_ADV100FD 0x0100 -#define PAR_ADV100HD 0x0080 -#define PAR_ADV10FD 0x0040 -#define PAR_ADV10HD 0x0020 -#define PAR_ASYMPAUSE 0x0C00 -#define PAR_802_3 0x0001 - -#define PAR_ADV1000XFD 0x0020 -#define PAR_ADV1000XHD 0x0040 -#define PAR_ASYMPAUSE_FIBER 0x0180 - -#define PGC_ADV1000FD 0x0200 -#define PGC_ADV1000HD 0x0100 -#define SEEQ_LINKFAIL 0x4000 -#define SEEQ_SPEED 0x0080 -#define SEEQ_DUPLEX 0x0040 -#define TDK_DUPLEX 0x0800 -#define TDK_SPEED 0x0400 -#define MRV_REG16_XOVERON 0x0068 -#define MRV_REG16_XOVEROFF 0x0008 -#define MRV_SPEED_1000 0x8000 -#define MRV_SPEED_100 0x4000 -#define MRV_SPEED_10 0x0000 -#define MRV_FULLDUPLEX 0x2000 -#define MRV_LINKUP 0x0400 - -#define GIG_LINKUP 0x0001 -#define GIG_FULLDUPLEX 0x0002 -#define GIG_SPEED_MASK 0x000C -#define GIG_SPEED_1000 0x0008 -#define GIG_SPEED_100 0x0004 -#define GIG_SPEED_10 0x0000 - -#define MCR_RESET 0x80000000 -#define MCR_CRCEN 0x40000000 -#define MCR_FULLD 0x10000000 -#define MCR_PAD 0x02000000 -#define MCR_RETRYLATE 0x01000000 -#define MCR_BOL_SHIFT 21 -#define MCR_IPG1_SHIFT 14 -#define MCR_IPG2_SHIFT 7 -#define MCR_IPG3_SHIFT 0 -#define GMCR_RESET 0x80000000 -#define GMCR_GBIT 0x20000000 -#define GMCR_FULLD 0x10000000 -#define GMCR_GAPBB_SHIFT 14 -#define GMCR_GAPR1_SHIFT 7 -#define GMCR_GAPR2_SHIFT 0 -#define GMCR_GAPBB_1000 0x60 -#define GMCR_GAPR1_1000 0x2C -#define GMCR_GAPR2_1000 0x40 -#define GMCR_GAPBB_100 0x70 -#define GMCR_GAPR1_100 0x2C -#define GMCR_GAPR2_100 0x40 -#define XCR_RESET 0x80000000 -#define XCR_XMTEN 0x40000000 -#define XCR_PAUSEEN 0x20000000 -#define XCR_LOADRNG 0x10000000 -#define RCR_RESET 0x80000000 -#define RCR_RCVEN 0x40000000 -#define RCR_RCVALL 0x20000000 -#define RCR_RCVBAD 0x10000000 -#define RCR_CTLEN 0x08000000 -#define RCR_ADDRAEN 0x02000000 -#define GXCR_RESET 0x80000000 -#define GXCR_XMTEN 0x40000000 -#define GXCR_PAUSEEN 0x20000000 -#define GRCR_RESET 0x80000000 -#define GRCR_RCVEN 0x40000000 -#define GRCR_RCVALL 0x20000000 -#define GRCR_RCVBAD 0x10000000 -#define GRCR_CTLEN 0x08000000 -#define GRCR_ADDRAEN 0x02000000 -#define GRCR_HASHSIZE_SHIFT 17 -#define GRCR_HASHSIZE 14 - -#define SLIC_EEPROM_ID 0xA5A5 -#define SLIC_SRAM_SIZE2GB (64 * 1024) -#define SLIC_SRAM_SIZE1GB (32 * 1024) -#define SLIC_HOSTID_DEFAULT 0xFFFF /* uninitialized hostid */ -#define SLIC_NBR_MACS 4 - -struct slic_rcvbuf { - u8 pad1[6]; - u16 pad2; - u32 pad3; - u32 pad4; - u32 buffer; - u32 length; - u32 status; - u32 pad5; - u16 pad6; - u8 data[SLIC_RCVBUF_DATASIZE]; -}; - -struct slic_hddr_wds { - union { - struct { - u32 frame_status; - u32 frame_status_b; - u32 time_stamp; - u32 checksum; - } hdrs_14port; - struct { - u32 frame_status; - u16 byte_cnt; - u16 tp_chksum; - u16 ctx_hash; - u16 mac_hash; - u32 buf_lnk; - } hdrs_gbit; - } u0; -}; - -#define frame_status14 u0.hdrs_14port.frame_status -#define frame_status_b14 u0.hdrs_14port.frame_status_b -#define frame_status_gb u0.hdrs_gbit.frame_status - -struct slic_host64sg { - u32 paddrl; - u32 paddrh; - u32 length; -}; - -struct slic_host64_cmd { - u32 hosthandle; - u32 RSVD; - u8 command; - u8 flags; - union { - u16 rsv1; - u16 rsv2; - } u0; - union { - struct { - u32 totlen; - struct slic_host64sg bufs[SLIC_MAX64_BCNT]; - } slic_buffers; - } u; -}; - -struct slic_rspbuf { - u32 hosthandle; - u32 pad0; - u32 pad1; - u32 status; - u32 pad2[4]; -}; - -/* Reset Register */ -#define SLIC_REG_RESET 0x0000 -/* Interrupt Control Register */ -#define SLIC_REG_ICR 0x0008 -/* Interrupt status pointer */ -#define SLIC_REG_ISP 0x0010 -/* Interrupt status */ -#define SLIC_REG_ISR 0x0018 -/* - * Header buffer address reg - * 31-8 - phy addr of set of contiguous hdr buffers - * 7-0 - number of buffers passed - * Buffers are 256 bytes long on 256-byte boundaries. - */ -#define SLIC_REG_HBAR 0x0020 -/* - * Data buffer handle & address reg - * 4 sets of registers; Buffers are 2K bytes long 2 per 4K page. - */ -#define SLIC_REG_DBAR 0x0028 -/* - * Xmt Cmd buf addr regs. - * 1 per XMT interface - * 31-5 - phy addr of host command buffer - * 4-0 - length of cmd in multiples of 32 bytes - * Buffers are 32 bytes up to 512 bytes long - */ -#define SLIC_REG_CBAR 0x0030 -/* Write control store */ -#define SLIC_REG_WCS 0x0034 -/* - * Response buffer address reg. - * 31-8 - phy addr of set of contiguous response buffers - * 7-0 - number of buffers passed - * Buffers are 32 bytes long on 32-byte boundaries. - */ -#define SLIC_REG_RBAR 0x0038 -/* Read statistics (UPR) */ -#define SLIC_REG_RSTAT 0x0040 -/* Read link status */ -#define SLIC_REG_LSTAT 0x0048 -/* Write Mac Config */ -#define SLIC_REG_WMCFG 0x0050 -/* Write phy register */ -#define SLIC_REG_WPHY 0x0058 -/* Rcv Cmd buf addr reg */ -#define SLIC_REG_RCBAR 0x0060 -/* Read SLIC Config*/ -#define SLIC_REG_RCONFIG 0x0068 -/* Interrupt aggregation time */ -#define SLIC_REG_INTAGG 0x0070 -/* Write XMIT config reg */ -#define SLIC_REG_WXCFG 0x0078 -/* Write RCV config reg */ -#define SLIC_REG_WRCFG 0x0080 -/* Write rcv addr a low */ -#define SLIC_REG_WRADDRAL 0x0088 -/* Write rcv addr a high */ -#define SLIC_REG_WRADDRAH 0x0090 -/* Write rcv addr b low */ -#define SLIC_REG_WRADDRBL 0x0098 -/* Write rcv addr b high */ -#define SLIC_REG_WRADDRBH 0x00a0 -/* Low bits of mcast mask */ -#define SLIC_REG_MCASTLOW 0x00a8 -/* High bits of mcast mask */ -#define SLIC_REG_MCASTHIGH 0x00b0 -/* Ping the card */ -#define SLIC_REG_PING 0x00b8 -/* Dump command */ -#define SLIC_REG_DUMP_CMD 0x00c0 -/* Dump data pointer */ -#define SLIC_REG_DUMP_DATA 0x00c8 -/* Read card's pci_status register */ -#define SLIC_REG_PCISTATUS 0x00d0 -/* Write hostid field */ -#define SLIC_REG_WRHOSTID 0x00d8 -/* Put card in a low power state */ -#define SLIC_REG_LOW_POWER 0x00e0 -/* Force slic into quiescent state before soft reset */ -#define SLIC_REG_QUIESCE 0x00e8 -/* Reset interface queues */ -#define SLIC_REG_RESET_IFACE 0x00f0 -/* - * Register is only written when it has changed. - * Bits 63-32 for host i/f addrs. - */ -#define SLIC_REG_ADDR_UPPER 0x00f8 -/* 64 bit Header buffer address reg */ -#define SLIC_REG_HBAR64 0x0100 -/* 64 bit Data buffer handle & address reg */ -#define SLIC_REG_DBAR64 0x0108 -/* 64 bit Xmt Cmd buf addr regs. */ -#define SLIC_REG_CBAR64 0x0110 -/* 64 bit Response buffer address reg.*/ -#define SLIC_REG_RBAR64 0x0118 -/* 64 bit Rcv Cmd buf addr reg*/ -#define SLIC_REG_RCBAR64 0x0120 -/* Read statistics (64 bit UPR) */ -#define SLIC_REG_RSTAT64 0x0128 -/* Download Gigabit RCV sequencer ucode */ -#define SLIC_REG_RCV_WCS 0x0130 -/* Write VlanId field */ -#define SLIC_REG_WRVLANID 0x0138 -/* Read Transformer info */ -#define SLIC_REG_READ_XF_INFO 0x0140 -/* Write Transformer info */ -#define SLIC_REG_WRITE_XF_INFO 0x0148 -/* Write card ticks per second */ -#define SLIC_REG_TICKS_PER_SEC 0x0170 - -#define SLIC_REG_HOSTID 0x1554 - -enum UPR_REQUEST { - SLIC_UPR_STATS, - SLIC_UPR_RLSR, - SLIC_UPR_WCFG, - SLIC_UPR_RCONFIG, - SLIC_UPR_RPHY, - SLIC_UPR_ENLB, - SLIC_UPR_ENCT, - SLIC_UPR_PDWN, - SLIC_UPR_PING, - SLIC_UPR_DUMP, -}; - -struct inicpm_wakepattern { - u32 patternlength; - u8 pattern[SLIC_PM_PATTERNSIZE]; - u8 mask[SLIC_PM_PATTERNSIZE]; -}; - -struct inicpm_state { - u32 powercaps; - u32 powerstate; - u32 wake_linkstatus; - u32 wake_magicpacket; - u32 wake_framepattern; - struct inicpm_wakepattern wakepattern[SLIC_PM_MAXPATTERNS]; -}; - -struct slicpm_packet_pattern { - u32 priority; - u32 reserved; - u32 masksize; - u32 patternoffset; - u32 patternsize; - u32 patternflags; -}; - -enum slicpm_power_state { - slicpm_state_unspecified = 0, - slicpm_state_d0, - slicpm_state_d1, - slicpm_state_d2, - slicpm_state_d3, - slicpm_state_maximum -}; - -struct slicpm_wakeup_capabilities { - enum slicpm_power_state min_magic_packet_wakeup; - enum slicpm_power_state min_pattern_wakeup; - enum slicpm_power_state min_link_change_wakeup; -}; - -struct slic_pnp_capabilities { - u32 flags; - struct slicpm_wakeup_capabilities wakeup_capabilities; -}; - -struct slic_config_mac { - u8 macaddr_a[6]; -}; - -#define ATK_FRU_FORMAT 0x00 -#define VENDOR1_FRU_FORMAT 0x01 -#define VENDOR2_FRU_FORMAT 0x02 -#define VENDOR3_FRU_FORMAT 0x03 -#define VENDOR4_FRU_FORMAT 0x04 -#define NO_FRU_FORMAT 0xFF - -struct atk_fru { - u8 assembly[6]; - u8 revision[2]; - u8 serial[14]; - u8 pad[3]; -}; - -struct vendor1_fru { - u8 commodity; - u8 assembly[4]; - u8 revision[2]; - u8 supplier[2]; - u8 date[2]; - u8 sequence[3]; - u8 pad[13]; -}; - -struct vendor2_fru { - u8 part[8]; - u8 supplier[5]; - u8 date[3]; - u8 sequence[4]; - u8 pad[7]; -}; - -struct vendor3_fru { - u8 assembly[6]; - u8 revision[2]; - u8 serial[14]; - u8 pad[3]; -}; - -struct vendor4_fru { - u8 number[8]; - u8 part[8]; - u8 version[8]; - u8 pad[3]; -}; - -union oemfru { - struct vendor1_fru vendor1_fru; - struct vendor2_fru vendor2_fru; - struct vendor3_fru vendor3_fru; - struct vendor4_fru vendor4_fru; -}; - -/* - * SLIC EEPROM structure for Mojave - */ -struct slic_eeprom { - u16 id; /* 00 EEPROM/FLASH Magic code 'A5A5'*/ - u16 eecode_size; /* 01 Size of EEPROM Codes (bytes * 4)*/ - u16 flash_size; /* 02 Flash size */ - u16 eeprom_size; /* 03 EEPROM Size */ - u16 vendor_id; /* 04 Vendor ID */ - u16 device_id; /* 05 Device ID */ - u8 revision_id; /* 06 Revision ID */ - u8 class_code[3]; /* 07 Class Code */ - u8 dbg_int_pin; /* 08 Debug Interrupt pin */ - u8 net_int_pin0; /* Network Interrupt Pin */ - u8 min_grant; /* 09 Minimum grant */ - u8 max_lat; /* Maximum Latency */ - u16 pci_status; /* 10 PCI Status */ - u16 sub_sys_vid; /* 11 Subsystem Vendor Id */ - u16 sub_sys_id; /* 12 Subsystem ID */ - u16 dbg_dev_id; /* 13 Debug Device Id */ - u16 dram_rom_fn; /* 14 Dram/Rom function */ - u16 dsize2pci; /* 15 DRAM size to PCI (bytes * 64K) */ - u16 rsize2pci; /* 16 ROM extension size to PCI (bytes * 4k) */ - u8 net_int_pin1; /* 17 Network Interface Pin 1 - * (simba/leone only) - */ - u8 net_int_pin2; /* Network Interface Pin 2 (simba/leone only)*/ - union { - u8 net_int_pin3;/* 18 Network Interface Pin 3 (simba only) */ - u8 free_time; /* FreeTime setting (leone/mojave only) */ - } u1; - u8 tbi_ctl; /* 10-bit interface control (Mojave only) */ - u16 dram_size; /* 19 DRAM size (bytes * 64k) */ - union { - struct { - /* Mac Interface Specific portions */ - struct slic_config_mac mac_info[SLIC_NBR_MACS]; - } mac; /* MAC access for all boards */ - struct { - /* use above struct for MAC access */ - struct slic_config_mac pad[SLIC_NBR_MACS - 1]; - u16 device_id2; /* Device ID for 2nd PCI function */ - u8 int_pin2; /* Interrupt pin for 2nd PCI function */ - u8 class_code2[3]; /* Class Code for 2nd PCI function */ - } mojave; /* 2nd function access for gigabit board */ - } u2; - u16 cfg_byte6; /* Config Byte 6 */ - u16 pme_capab; /* Power Mgment capabilities */ - u16 nw_clk_ctrls; /* NetworkClockControls */ - u8 fru_format; /* Alacritech FRU format type */ - struct atk_fru atk_fru; /* Alacritech FRU information */ - u8 oem_fru_format; /* optional OEM FRU format type */ - union oemfru oem_fru; /* optional OEM FRU information */ - u8 pad[4]; /* Pad to 128 bytes - includes 2 cksum bytes - * (if OEM FRU info exists) and two unusable - * bytes at the end - */ -}; - -/* SLIC EEPROM structure for Oasis */ -struct oslic_eeprom { - u16 id; /* 00 EEPROM/FLASH Magic code 'A5A5' */ - u16 eecode_size; /* 01 Size of EEPROM Codes (bytes * 4)*/ - u16 flash_config0; /* 02 Flash Config for SPI device 0 */ - u16 flash_config1; /* 03 Flash Config for SPI device 1 */ - u16 vendor_id; /* 04 Vendor ID */ - u16 device_id; /* 05 Device ID (function 0) */ - u8 revision_id; /* 06 Revision ID */ - u8 class_code[3]; /* 07 Class Code for PCI function 0 */ - u8 int_pin1; /* 08 Interrupt pin for PCI function 1*/ - u8 class_code2[3]; /* 09 Class Code for PCI function 1 */ - u8 int_pin2; /* 10 Interrupt pin for PCI function 2*/ - u8 int_pin0; /* Interrupt pin for PCI function 0*/ - u8 min_grant; /* 11 Minimum grant */ - u8 max_lat; /* Maximum Latency */ - u16 sub_sys_vid; /* 12 Subsystem Vendor Id */ - u16 sub_sys_id; /* 13 Subsystem ID */ - u16 flash_size; /* 14 Flash size (bytes / 4K) */ - u16 dsize2pci; /* 15 DRAM size to PCI (bytes / 64K) */ - u16 rsize2pci; /* 16 Flash (ROM extension) size to PCI - * (bytes / 4K) - */ - u16 device_id1; /* 17 Device Id (function 1) */ - u16 device_id2; /* 18 Device Id (function 2) */ - u16 cfg_byte6; /* 19 Device Status Config Bytes 6-7 */ - u16 pme_capab; /* 20 Power Mgment capabilities */ - u8 msi_capab; /* 21 MSI capabilities */ - u8 clock_divider; /* Clock divider */ - u16 pci_status_low; /* 22 PCI Status bits 15:0 */ - u16 pci_status_high; /* 23 PCI Status bits 31:16 */ - u16 dram_config_low; /* 24 DRAM Configuration bits 15:0 */ - u16 dram_config_high; /* 25 DRAM Configuration bits 31:16 */ - u16 dram_size; /* 26 DRAM size (bytes / 64K) */ - u16 gpio_tbi_ctl; /* 27 GPIO/TBI controls for functions 1/0 */ - u16 eeprom_size; /* 28 EEPROM Size */ - struct slic_config_mac mac_info[2]; /* 29 MAC addresses (2 ports) */ - u8 fru_format; /* 35 Alacritech FRU format type */ - struct atk_fru atk_fru; /* Alacritech FRU information */ - u8 oem_fru_format; /* optional OEM FRU format type */ - union oemfru oem_fru; /* optional OEM FRU information */ - u8 pad[4]; /* Pad to 128 bytes - includes 2 checksum bytes - * (if OEM FRU info exists) and two unusable - * bytes at the end - */ -}; - -#define MAX_EECODE_SIZE sizeof(struct slic_eeprom) -#define MIN_EECODE_SIZE 0x62 /* code size without optional OEM FRU stuff */ - -/* - * SLIC CONFIG structure - * - * This structure lives in the CARD structure and is valid for all board types. - * It is filled in from the appropriate EEPROM structure by - * SlicGetConfigData() - */ -struct slic_config { - bool eeprom_valid; /* Valid EEPROM flag (checksum good?) */ - u16 dram_size; /* DRAM size (bytes / 64K) */ - struct slic_config_mac mac_info[SLIC_NBR_MACS]; /* MAC addresses */ - u8 fru_format; /* Alacritech FRU format type */ - struct atk_fru atk_fru; /* Alacritech FRU information */ - u8 oem_fru_format; /* optional OEM FRU format type */ - union { - struct vendor1_fru vendor1_fru; - struct vendor2_fru vendor2_fru; - struct vendor3_fru vendor3_fru; - struct vendor4_fru vendor4_fru; - } oem_fru; -}; - -#pragma pack() - -#endif diff --git a/drivers/staging/slicoss/slicoss.c b/drivers/staging/slicoss/slicoss.c deleted file mode 100644 index a63d2295bd82..000000000000 --- a/drivers/staging/slicoss/slicoss.c +++ /dev/null @@ -1,3128 +0,0 @@ -/************************************************************************** - * - * Copyright 2000-2006 Alacritech, Inc. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions and the following disclaimer. - * 2. Redistributions in binary form must reproduce the above - * copyright notice, this list of conditions and the following - * disclaimer in the documentation and/or other materials provided - * with the distribution. - * - * Alternatively, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2 as published by the Free - * Software Foundation. - * - * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY - * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE - * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL ALACRITECH, INC. OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, - * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT - * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF - * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND - * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, - * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT - * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF - * SUCH DAMAGE. - * - * The views and conclusions contained in the software and documentation - * are those of the authors and should not be interpreted as representing - * official policies, either expressed or implied, of Alacritech, Inc. - * - **************************************************************************/ - -/* - * FILENAME: slicoss.c - * - * The SLICOSS driver for Alacritech's IS-NIC products. - * - * This driver is supposed to support: - * - * Mojave cards (single port PCI Gigabit) both copper and fiber - * Oasis cards (single and dual port PCI-x Gigabit) copper and fiber - * Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber - * - * The driver was actually tested on Oasis and Kalahari cards. - * - * - * NOTE: This is the standard, non-accelerated version of Alacritech's - * IS-NIC driver. - */ - -#define KLUDGE_FOR_4GB_BOUNDARY 1 -#define DEBUG_MICROCODE 1 -#define DBG 1 -#define SLIC_INTERRUPT_PROCESS_LIMIT 1 -#define SLIC_OFFLOAD_IP_CHECKSUM 1 -#define STATS_TIMER_INTERVAL 2 -#define PING_TIMER_INTERVAL 1 -#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include -#include -#include - -#include -#include -#include "slichw.h" -#include "slic.h" - -static uint slic_first_init = 1; -static char *slic_banner = "Alacritech SLIC Technology(tm) Server and Storage Accelerator (Non-Accelerated)"; - -static char *slic_proc_version = "2.0.351 2006/07/14 12:26:00"; - -static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL }; -#define DEFAULT_INTAGG_DELAY 100 -static unsigned int rcv_count; - -#define DRV_NAME "slicoss" -#define DRV_VERSION "2.0.1" -#define DRV_AUTHOR "Alacritech, Inc. Engineering" -#define DRV_DESCRIPTION "Alacritech SLIC Techonology(tm) "\ - "Non-Accelerated Driver" -#define DRV_COPYRIGHT "Copyright 2000-2006 Alacritech, Inc. "\ - "All rights reserved." -#define PFX DRV_NAME " " - -MODULE_AUTHOR(DRV_AUTHOR); -MODULE_DESCRIPTION(DRV_DESCRIPTION); -MODULE_LICENSE("Dual BSD/GPL"); - -static const struct pci_device_id slic_pci_tbl[] = { - { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) }, - { PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) }, - { 0 } -}; - -static const struct ethtool_ops slic_ethtool_ops; - -MODULE_DEVICE_TABLE(pci, slic_pci_tbl); - -static void slic_mcast_set_bit(struct adapter *adapter, char *address) -{ - unsigned char crcpoly; - - /* Get the CRC polynomial for the mac address */ - /* - * we use bits 1-8 (lsb), bitwise reversed, - * msb (= lsb bit 0 before bitrev) is automatically discarded - */ - crcpoly = ether_crc(ETH_ALEN, address) >> 23; - - /* - * We only have space on the SLIC for 64 entries. Lop - * off the top two bits. (2^6 = 64) - */ - crcpoly &= 0x3F; - - /* OR in the new bit into our 64 bit mask. */ - adapter->mcastmask |= (u64)1 << crcpoly; -} - -static void slic_mcast_set_mask(struct adapter *adapter) -{ - if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) { - /* - * Turn on all multicast addresses. We have to do this for - * promiscuous mode as well as ALLMCAST mode. It saves the - * Microcode from having to keep state about the MAC - * configuration. - */ - slic_write32(adapter, SLIC_REG_MCASTLOW, 0xFFFFFFFF); - slic_write32(adapter, SLIC_REG_MCASTHIGH, 0xFFFFFFFF); - } else { - /* - * Commit our multicast mast to the SLIC by writing to the - * multicast address mask registers - */ - slic_write32(adapter, SLIC_REG_MCASTLOW, - (u32)(adapter->mcastmask & 0xFFFFFFFF)); - slic_write32(adapter, SLIC_REG_MCASTHIGH, - (u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF)); - } -} - -static void slic_timer_ping(ulong dev) -{ - struct adapter *adapter; - struct sliccard *card; - - adapter = netdev_priv((struct net_device *)dev); - card = adapter->card; - - adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ); - add_timer(&adapter->pingtimer); -} - -/* - * slic_link_config - * - * Write phy control to configure link duplex/speed - * - */ -static void slic_link_config(struct adapter *adapter, - u32 linkspeed, u32 linkduplex) -{ - u32 speed; - u32 duplex; - u32 phy_config; - u32 phy_advreg; - u32 phy_gctlreg; - - if (adapter->state != ADAPT_UP) - return; - - if (linkspeed > LINK_1000MB) - linkspeed = LINK_AUTOSPEED; - if (linkduplex > LINK_AUTOD) - linkduplex = LINK_AUTOD; - - if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) { - if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) { - /* - * We've got a fiber gigabit interface, and register - * 4 is different in fiber mode than in copper mode - */ - - /* advertise FD only @1000 Mb */ - phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD)); - /* enable PAUSE frames */ - phy_advreg |= PAR_ASYMPAUSE_FIBER; - slic_write32(adapter, SLIC_REG_WPHY, phy_advreg); - - if (linkspeed == LINK_AUTOSPEED) { - /* reset phy, enable auto-neg */ - phy_config = - (MIICR_REG_PCR | - (PCR_RESET | PCR_AUTONEG | - PCR_AUTONEG_RST)); - slic_write32(adapter, SLIC_REG_WPHY, - phy_config); - } else { /* forced 1000 Mb FD*/ - /* - * power down phy to break link - * this may not work) - */ - phy_config = (MIICR_REG_PCR | PCR_POWERDOWN); - slic_write32(adapter, SLIC_REG_WPHY, - phy_config); - slic_flush_write(adapter); - /* - * wait, Marvell says 1 sec, - * try to get away with 10 ms - */ - mdelay(10); - - /* - * disable auto-neg, set speed/duplex, - * soft reset phy, powerup - */ - phy_config = - (MIICR_REG_PCR | - (PCR_RESET | PCR_SPEED_1000 | - PCR_DUPLEX_FULL)); - slic_write32(adapter, SLIC_REG_WPHY, - phy_config); - } - } else { /* copper gigabit */ - - /* - * Auto-Negotiate or 1000 Mb must be auto negotiated - * We've got a copper gigabit interface, and - * register 4 is different in copper mode than - * in fiber mode - */ - if (linkspeed == LINK_AUTOSPEED) { - /* advertise 10/100 Mb modes */ - phy_advreg = - (MIICR_REG_4 | - (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD - | PAR_ADV10HD)); - } else { - /* - * linkspeed == LINK_1000MB - - * don't advertise 10/100 Mb modes - */ - phy_advreg = MIICR_REG_4; - } - /* enable PAUSE frames */ - phy_advreg |= PAR_ASYMPAUSE; - /* required by the Cicada PHY */ - phy_advreg |= PAR_802_3; - slic_write32(adapter, SLIC_REG_WPHY, phy_advreg); - /* advertise FD only @1000 Mb */ - phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD)); - slic_write32(adapter, SLIC_REG_WPHY, phy_gctlreg); - - if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { - /* - * if a Marvell PHY - * enable auto crossover - */ - phy_config = - (MIICR_REG_16 | (MRV_REG16_XOVERON)); - slic_write32(adapter, SLIC_REG_WPHY, - phy_config); - - /* reset phy, enable auto-neg */ - phy_config = - (MIICR_REG_PCR | - (PCR_RESET | PCR_AUTONEG | - PCR_AUTONEG_RST)); - slic_write32(adapter, SLIC_REG_WPHY, - phy_config); - } else { /* it's a Cicada PHY */ - /* enable and restart auto-neg (don't reset) */ - phy_config = - (MIICR_REG_PCR | - (PCR_AUTONEG | PCR_AUTONEG_RST)); - slic_write32(adapter, SLIC_REG_WPHY, - phy_config); - } - } - } else { - /* Forced 10/100 */ - if (linkspeed == LINK_10MB) - speed = 0; - else - speed = PCR_SPEED_100; - if (linkduplex == LINK_HALFD) - duplex = 0; - else - duplex = PCR_DUPLEX_FULL; - - if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { - /* - * if a Marvell PHY - * disable auto crossover - */ - phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF)); - slic_write32(adapter, SLIC_REG_WPHY, phy_config); - } - - /* power down phy to break link (this may not work) */ - phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex)); - slic_write32(adapter, SLIC_REG_WPHY, phy_config); - slic_flush_write(adapter); - /* wait, Marvell says 1 sec, try to get away with 10 ms */ - mdelay(10); - - if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) { - /* - * if a Marvell PHY - * disable auto-neg, set speed, - * soft reset phy, powerup - */ - phy_config = - (MIICR_REG_PCR | (PCR_RESET | speed | duplex)); - slic_write32(adapter, SLIC_REG_WPHY, phy_config); - } else { /* it's a Cicada PHY */ - /* disable auto-neg, set speed, powerup */ - phy_config = (MIICR_REG_PCR | (speed | duplex)); - slic_write32(adapter, SLIC_REG_WPHY, phy_config); - } - } -} - -static int slic_card_download_gbrcv(struct adapter *adapter) -{ - const struct firmware *fw; - const char *file = ""; - int ret; - u32 codeaddr; - u32 instruction; - int index = 0; - u32 rcvucodelen = 0; - - switch (adapter->devid) { - case SLIC_2GB_DEVICE_ID: - file = "slicoss/oasisrcvucode.sys"; - break; - case SLIC_1GB_DEVICE_ID: - file = "slicoss/gbrcvucode.sys"; - break; - default: - return -ENOENT; - } - - ret = request_firmware(&fw, file, &adapter->pcidev->dev); - if (ret) { - dev_err(&adapter->pcidev->dev, - "Failed to load firmware %s\n", file); - return ret; - } - - rcvucodelen = *(u32 *)(fw->data + index); - index += 4; - switch (adapter->devid) { - case SLIC_2GB_DEVICE_ID: - if (rcvucodelen != oasis_rcv_ucode_len) { - release_firmware(fw); - return -EINVAL; - } - break; - case SLIC_1GB_DEVICE_ID: - if (rcvucodelen != gb_rcv_ucode_len) { - release_firmware(fw); - return -EINVAL; - } - break; - } - /* start download */ - slic_write32(adapter, SLIC_REG_RCV_WCS, SLIC_RCVWCS_BEGIN); - /* download the rcv sequencer ucode */ - for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) { - /* write out instruction address */ - slic_write32(adapter, SLIC_REG_RCV_WCS, codeaddr); - - instruction = *(u32 *)(fw->data + index); - index += 4; - /* write out the instruction data low addr */ - slic_write32(adapter, SLIC_REG_RCV_WCS, instruction); - - instruction = *(u8 *)(fw->data + index); - index++; - /* write out the instruction data high addr */ - slic_write32(adapter, SLIC_REG_RCV_WCS, instruction); - } - - /* download finished */ - release_firmware(fw); - slic_write32(adapter, SLIC_REG_RCV_WCS, SLIC_RCVWCS_FINISH); - slic_flush_write(adapter); - - return 0; -} - -MODULE_FIRMWARE("slicoss/oasisrcvucode.sys"); -MODULE_FIRMWARE("slicoss/gbrcvucode.sys"); - -static int slic_card_download(struct adapter *adapter) -{ - const struct firmware *fw; - const char *file = ""; - int ret; - u32 section; - int thissectionsize; - int codeaddr; - u32 instruction; - u32 baseaddress; - u32 i; - u32 numsects = 0; - u32 sectsize[3]; - u32 sectstart[3]; - int ucode_start, index = 0; - - switch (adapter->devid) { - case SLIC_2GB_DEVICE_ID: - file = "slicoss/oasisdownload.sys"; - break; - case SLIC_1GB_DEVICE_ID: - file = "slicoss/gbdownload.sys"; - break; - default: - return -ENOENT; - } - ret = request_firmware(&fw, file, &adapter->pcidev->dev); - if (ret) { - dev_err(&adapter->pcidev->dev, - "Failed to load firmware %s\n", file); - return ret; - } - numsects = *(u32 *)(fw->data + index); - index += 4; - for (i = 0; i < numsects; i++) { - sectsize[i] = *(u32 *)(fw->data + index); - index += 4; - } - for (i = 0; i < numsects; i++) { - sectstart[i] = *(u32 *)(fw->data + index); - index += 4; - } - ucode_start = index; - instruction = *(u32 *)(fw->data + index); - index += 4; - for (section = 0; section < numsects; section++) { - baseaddress = sectstart[section]; - thissectionsize = sectsize[section] >> 3; - - for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { - /* Write out instruction address */ - slic_write32(adapter, SLIC_REG_WCS, - baseaddress + codeaddr); - /* Write out instruction to low addr */ - slic_write32(adapter, SLIC_REG_WCS, - instruction); - instruction = *(u32 *)(fw->data + index); - index += 4; - - /* Write out instruction to high addr */ - slic_write32(adapter, SLIC_REG_WCS, - instruction); - instruction = *(u32 *)(fw->data + index); - index += 4; - } - } - index = ucode_start; - for (section = 0; section < numsects; section++) { - instruction = *(u32 *)(fw->data + index); - baseaddress = sectstart[section]; - if (baseaddress < 0x8000) - continue; - thissectionsize = sectsize[section] >> 3; - - for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) { - /* Write out instruction address */ - slic_write32(adapter, SLIC_REG_WCS, - SLIC_WCS_COMPARE | (baseaddress + - codeaddr)); - /* Write out instruction to low addr */ - slic_write32(adapter, SLIC_REG_WCS, instruction); - instruction = *(u32 *)(fw->data + index); - index += 4; - /* Write out instruction to high addr */ - slic_write32(adapter, SLIC_REG_WCS, instruction); - instruction = *(u32 *)(fw->data + index); - index += 4; - } - } - release_firmware(fw); - /* Everything OK, kick off the card */ - mdelay(10); - - slic_write32(adapter, SLIC_REG_WCS, SLIC_WCS_START); - slic_flush_write(adapter); - /* - * stall for 20 ms, long enough for ucode to init card - * and reach mainloop - */ - mdelay(20); - - return 0; -} - -MODULE_FIRMWARE("slicoss/oasisdownload.sys"); -MODULE_FIRMWARE("slicoss/gbdownload.sys"); - -static void slic_adapter_set_hwaddr(struct adapter *adapter) -{ - struct sliccard *card = adapter->card; - - if ((adapter->card) && (card->config_set)) { - memcpy(adapter->macaddr, - card->config.mac_info[adapter->functionnumber].macaddr_a, - sizeof(struct slic_config_mac)); - if (is_zero_ether_addr(adapter->currmacaddr)) - memcpy(adapter->currmacaddr, adapter->macaddr, - ETH_ALEN); - if (adapter->netdev) - memcpy(adapter->netdev->dev_addr, adapter->currmacaddr, - ETH_ALEN); - } -} - -static void slic_intagg_set(struct adapter *adapter, u32 value) -{ - slic_write32(adapter, SLIC_REG_INTAGG, value); - adapter->card->loadlevel_current = value; -} - -static void slic_soft_reset(struct adapter *adapter) -{ - if (adapter->card->state == CARD_UP) { - slic_write32(adapter, SLIC_REG_QUIESCE, 0); - slic_flush_write(adapter); - mdelay(1); - } - - slic_write32(adapter, SLIC_REG_RESET, SLIC_RESET_MAGIC); - slic_flush_write(adapter); - - mdelay(1); -} - -static void slic_mac_address_config(struct adapter *adapter) -{ - u32 value; - u32 value2; - - value = ntohl(*(__be32 *)&adapter->currmacaddr[2]); - slic_write32(adapter, SLIC_REG_WRADDRAL, value); - slic_write32(adapter, SLIC_REG_WRADDRBL, value); - - value2 = (u32)((adapter->currmacaddr[0] << 8 | - adapter->currmacaddr[1]) & 0xFFFF); - - slic_write32(adapter, SLIC_REG_WRADDRAH, value2); - slic_write32(adapter, SLIC_REG_WRADDRBH, value2); - - /* - * Write our multicast mask out to the card. This is done - * here in addition to the slic_mcast_addr_set routine - * because ALL_MCAST may have been enabled or disabled - */ - slic_mcast_set_mask(adapter); -} - -static void slic_mac_config(struct adapter *adapter) -{ - u32 value; - - /* Setup GMAC gaps */ - if (adapter->linkspeed == LINK_1000MB) { - value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) | - (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) | - (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT)); - } else { - value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) | - (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) | - (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT)); - } - - /* enable GMII */ - if (adapter->linkspeed == LINK_1000MB) - value |= GMCR_GBIT; - - /* enable fullduplex */ - if ((adapter->linkduplex == LINK_FULLD) || - (adapter->macopts & MAC_LOOPBACK)) { - value |= GMCR_FULLD; - } - - /* write mac config */ - slic_write32(adapter, SLIC_REG_WMCFG, value); - - /* setup mac addresses */ - slic_mac_address_config(adapter); -} - -static void slic_config_set(struct adapter *adapter, bool linkchange) -{ - u32 value; - u32 rcr_reset; - - if (linkchange) { - /* Setup MAC */ - slic_mac_config(adapter); - rcr_reset = GRCR_RESET; - } else { - slic_mac_address_config(adapter); - rcr_reset = 0; - } - - if (adapter->linkduplex == LINK_FULLD) { - /* setup xmtcfg */ - value = (GXCR_RESET | /* Always reset */ - GXCR_XMTEN | /* Enable transmit */ - GXCR_PAUSEEN); /* Enable pause */ - - slic_write32(adapter, SLIC_REG_WXCFG, value); - - /* Setup rcvcfg last */ - value = (rcr_reset | /* Reset, if linkchange */ - GRCR_CTLEN | /* Enable CTL frames */ - GRCR_ADDRAEN | /* Address A enable */ - GRCR_RCVBAD | /* Rcv bad frames */ - (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); - } else { - /* setup xmtcfg */ - value = (GXCR_RESET | /* Always reset */ - GXCR_XMTEN); /* Enable transmit */ - - slic_write32(adapter, SLIC_REG_WXCFG, value); - - /* Setup rcvcfg last */ - value = (rcr_reset | /* Reset, if linkchange */ - GRCR_ADDRAEN | /* Address A enable */ - GRCR_RCVBAD | /* Rcv bad frames */ - (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); - } - - if (adapter->state != ADAPT_DOWN) { - /* Only enable receive if we are restarting or running */ - value |= GRCR_RCVEN; - } - - if (adapter->macopts & MAC_PROMISC) - value |= GRCR_RCVALL; - - slic_write32(adapter, SLIC_REG_WRCFG, value); -} - -/* - * Turn off RCV and XMT, power down PHY - */ -static void slic_config_clear(struct adapter *adapter) -{ - u32 value; - u32 phy_config; - - /* Setup xmtcfg */ - value = (GXCR_RESET | /* Always reset */ - GXCR_PAUSEEN); /* Enable pause */ - - slic_write32(adapter, SLIC_REG_WXCFG, value); - - value = (GRCR_RESET | /* Always reset */ - GRCR_CTLEN | /* Enable CTL frames */ - GRCR_ADDRAEN | /* Address A enable */ - (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT)); - - slic_write32(adapter, SLIC_REG_WRCFG, value); - - /* power down phy */ - phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN)); - slic_write32(adapter, SLIC_REG_WPHY, phy_config); -} - -static bool slic_mac_filter(struct adapter *adapter, - struct ether_header *ether_frame) -{ - struct net_device *netdev = adapter->netdev; - u32 opts = adapter->macopts; - - if (opts & MAC_PROMISC) - return true; - - if (is_broadcast_ether_addr(ether_frame->ether_dhost)) { - if (opts & MAC_BCAST) { - adapter->rcv_broadcasts++; - return true; - } - - return false; - } - - if (is_multicast_ether_addr(ether_frame->ether_dhost)) { - if (opts & MAC_ALLMCAST) { - adapter->rcv_multicasts++; - netdev->stats.multicast++; - return true; - } - if (opts & MAC_MCAST) { - struct mcast_address *mcaddr = adapter->mcastaddrs; - - while (mcaddr) { - if (ether_addr_equal(mcaddr->address, - ether_frame->ether_dhost)) { - adapter->rcv_multicasts++; - netdev->stats.multicast++; - return true; - } - mcaddr = mcaddr->next; - } - - return false; - } - - return false; - } - if (opts & MAC_DIRECTED) { - adapter->rcv_unicasts++; - return true; - } - return false; -} - -static int slic_mac_set_address(struct net_device *dev, void *ptr) -{ - struct adapter *adapter = netdev_priv(dev); - struct sockaddr *addr = ptr; - - if (netif_running(dev)) - return -EBUSY; - if (!adapter) - return -EBUSY; - - if (!is_valid_ether_addr(addr->sa_data)) - return -EINVAL; - - memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); - memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len); - - slic_config_set(adapter, true); - return 0; -} - -static void slic_timer_load_check(ulong cardaddr) -{ - struct sliccard *card = (struct sliccard *)cardaddr; - struct adapter *adapter = card->master; - u32 load = card->events; - u32 level = 0; - - if ((adapter) && (adapter->state == ADAPT_UP) && - (card->state == CARD_UP) && (slic_global.dynamic_intagg)) { - if (adapter->devid == SLIC_1GB_DEVICE_ID) { - if (adapter->linkspeed == LINK_1000MB) { - level = 100; - } else { - if (load > SLIC_LOAD_5) - level = SLIC_INTAGG_5; - else if (load > SLIC_LOAD_4) - level = SLIC_INTAGG_4; - else if (load > SLIC_LOAD_3) - level = SLIC_INTAGG_3; - else if (load > SLIC_LOAD_2) - level = SLIC_INTAGG_2; - else if (load > SLIC_LOAD_1) - level = SLIC_INTAGG_1; - else - level = SLIC_INTAGG_0; - } - if (card->loadlevel_current != level) { - card->loadlevel_current = level; - slic_write32(adapter, SLIC_REG_INTAGG, level); - } - } else { - if (load > SLIC_LOAD_5) - level = SLIC_INTAGG_5; - else if (load > SLIC_LOAD_4) - level = SLIC_INTAGG_4; - else if (load > SLIC_LOAD_3) - level = SLIC_INTAGG_3; - else if (load > SLIC_LOAD_2) - level = SLIC_INTAGG_2; - else if (load > SLIC_LOAD_1) - level = SLIC_INTAGG_1; - else - level = SLIC_INTAGG_0; - if (card->loadlevel_current != level) { - card->loadlevel_current = level; - slic_write32(adapter, SLIC_REG_INTAGG, level); - } - } - } - card->events = 0; - card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ); - add_timer(&card->loadtimer); -} - -static int slic_upr_queue_request(struct adapter *adapter, - u32 upr_request, - u32 upr_data, - u32 upr_data_h, - u32 upr_buffer, u32 upr_buffer_h) -{ - struct slic_upr *upr; - struct slic_upr *uprqueue; - - upr = kmalloc(sizeof(*upr), GFP_ATOMIC); - if (!upr) - return -ENOMEM; - - upr->adapter = adapter->port; - upr->upr_request = upr_request; - upr->upr_data = upr_data; - upr->upr_buffer = upr_buffer; - upr->upr_data_h = upr_data_h; - upr->upr_buffer_h = upr_buffer_h; - upr->next = NULL; - if (adapter->upr_list) { - uprqueue = adapter->upr_list; - - while (uprqueue->next) - uprqueue = uprqueue->next; - uprqueue->next = upr; - } else { - adapter->upr_list = upr; - } - return 0; -} - -static void slic_upr_start(struct adapter *adapter) -{ - struct slic_upr *upr; - - upr = adapter->upr_list; - if (!upr) - return; - if (adapter->upr_busy) - return; - adapter->upr_busy = 1; - - switch (upr->upr_request) { - case SLIC_UPR_STATS: - if (upr->upr_data_h == 0) { - slic_write32(adapter, SLIC_REG_RSTAT, upr->upr_data); - } else { - slic_write64(adapter, SLIC_REG_RSTAT64, upr->upr_data, - upr->upr_data_h); - } - break; - - case SLIC_UPR_RLSR: - slic_write64(adapter, SLIC_REG_LSTAT, upr->upr_data, - upr->upr_data_h); - break; - - case SLIC_UPR_RCONFIG: - slic_write64(adapter, SLIC_REG_RCONFIG, upr->upr_data, - upr->upr_data_h); - break; - case SLIC_UPR_PING: - slic_write32(adapter, SLIC_REG_PING, 1); - break; - } - slic_flush_write(adapter); -} - -static int slic_upr_request(struct adapter *adapter, - u32 upr_request, - u32 upr_data, - u32 upr_data_h, - u32 upr_buffer, u32 upr_buffer_h) -{ - unsigned long flags; - int rc; - - spin_lock_irqsave(&adapter->upr_lock, flags); - rc = slic_upr_queue_request(adapter, - upr_request, - upr_data, - upr_data_h, upr_buffer, upr_buffer_h); - if (rc) - goto err_unlock_irq; - - slic_upr_start(adapter); -err_unlock_irq: - spin_unlock_irqrestore(&adapter->upr_lock, flags); - return rc; -} - -static void slic_link_upr_complete(struct adapter *adapter, u32 isr) -{ - struct slic_shmemory *sm = &adapter->shmem; - struct slic_shmem_data *sm_data = sm->shmem_data; - u32 lst = sm_data->lnkstatus; - uint linkup; - unsigned char linkspeed; - unsigned char linkduplex; - - if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { - dma_addr_t phaddr = sm->lnkstatus_phaddr; - - slic_upr_queue_request(adapter, SLIC_UPR_RLSR, - cpu_to_le32(lower_32_bits(phaddr)), - cpu_to_le32(upper_32_bits(phaddr)), - 0, 0); - return; - } - if (adapter->state != ADAPT_UP) - return; - - linkup = lst & GIG_LINKUP ? LINK_UP : LINK_DOWN; - if (lst & GIG_SPEED_1000) - linkspeed = LINK_1000MB; - else if (lst & GIG_SPEED_100) - linkspeed = LINK_100MB; - else - linkspeed = LINK_10MB; - - if (lst & GIG_FULLDUPLEX) - linkduplex = LINK_FULLD; - else - linkduplex = LINK_HALFD; - - if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN)) - return; - - /* link up event, but nothing has changed */ - if ((adapter->linkstate == LINK_UP) && - (linkup == LINK_UP) && - (adapter->linkspeed == linkspeed) && - (adapter->linkduplex == linkduplex)) - return; - - /* link has changed at this point */ - - /* link has gone from up to down */ - if (linkup == LINK_DOWN) { - adapter->linkstate = LINK_DOWN; - netif_carrier_off(adapter->netdev); - return; - } - - /* link has gone from down to up */ - adapter->linkspeed = linkspeed; - adapter->linkduplex = linkduplex; - - if (adapter->linkstate != LINK_UP) { - /* setup the mac */ - slic_config_set(adapter, true); - adapter->linkstate = LINK_UP; - netif_carrier_on(adapter->netdev); - } -} - -static void slic_upr_request_complete(struct adapter *adapter, u32 isr) -{ - struct sliccard *card = adapter->card; - struct slic_upr *upr; - unsigned long flags; - - spin_lock_irqsave(&adapter->upr_lock, flags); - upr = adapter->upr_list; - if (!upr) { - spin_unlock_irqrestore(&adapter->upr_lock, flags); - return; - } - adapter->upr_list = upr->next; - upr->next = NULL; - adapter->upr_busy = 0; - switch (upr->upr_request) { - case SLIC_UPR_STATS: { - struct slic_shmemory *sm = &adapter->shmem; - struct slic_shmem_data *sm_data = sm->shmem_data; - struct slic_stats *stats = &sm_data->stats; - struct slic_stats *old = &adapter->inicstats_prev; - struct slicnet_stats *stst = &adapter->slic_stats; - - if (isr & ISR_UPCERR) { - dev_err(&adapter->netdev->dev, - "SLIC_UPR_STATS command failed isr[%x]\n", isr); - break; - } - - stst->tcp.xmit_tcp_segs += - stats->xmit_tcp_segs - old->xmit_tcp_segs; - - stst->tcp.xmit_tcp_bytes += - stats->xmit_tcp_bytes - old->xmit_tcp_bytes; - - stst->tcp.rcv_tcp_segs += - stats->rcv_tcp_segs - old->rcv_tcp_segs; - - stst->tcp.rcv_tcp_bytes += - stats->rcv_tcp_bytes - old->rcv_tcp_bytes; - - stst->iface.xmt_bytes += - stats->xmit_bytes - old->xmit_bytes; - - stst->iface.xmt_ucast += - stats->xmit_unicasts - old->xmit_unicasts; - - stst->iface.rcv_bytes += - stats->rcv_bytes - old->rcv_bytes; - - stst->iface.rcv_ucast += - stats->rcv_unicasts - old->rcv_unicasts; - - stst->iface.xmt_errors += - stats->xmit_collisions - old->xmit_collisions; - - stst->iface.xmt_errors += stats->xmit_excess_collisions - - old->xmit_excess_collisions; - - stst->iface.xmt_errors += - stats->xmit_other_error - old->xmit_other_error; - - stst->iface.rcv_errors += - stats->rcv_other_error - old->rcv_other_error; - - stst->iface.rcv_discards += stats->rcv_drops - old->rcv_drops; - - if (stats->rcv_drops > old->rcv_drops) - adapter->rcv_drops += (stats->rcv_drops - - old->rcv_drops); - memcpy(old, stats, sizeof(*stats)); - break; - } - case SLIC_UPR_RLSR: - slic_link_upr_complete(adapter, isr); - break; - case SLIC_UPR_RCONFIG: - break; - case SLIC_UPR_PING: - card->pingstatus |= (isr & ISR_PINGDSMASK); - break; - } - kfree(upr); - slic_upr_start(adapter); - spin_unlock_irqrestore(&adapter->upr_lock, flags); -} - -static int slic_config_get(struct adapter *adapter, u32 config, u32 config_h) -{ - return slic_upr_request(adapter, SLIC_UPR_RCONFIG, config, config_h, - 0, 0); -} - -/* - * Compute a checksum of the EEPROM according to RFC 1071. - */ -static u16 slic_eeprom_cksum(void *eeprom, unsigned int len) -{ - u16 *wp = eeprom; - u32 checksum = 0; - - while (len > 1) { - checksum += *(wp++); - len -= 2; - } - - if (len > 0) - checksum += *(u8 *)wp; - - while (checksum >> 16) - checksum = (checksum & 0xFFFF) + ((checksum >> 16) & 0xFFFF); - - return ~checksum; -} - -static void slic_rspqueue_free(struct adapter *adapter) -{ - int i; - struct slic_rspqueue *rspq = &adapter->rspqueue; - - for (i = 0; i < rspq->num_pages; i++) { - if (rspq->vaddr[i]) { - pci_free_consistent(adapter->pcidev, PAGE_SIZE, - rspq->vaddr[i], rspq->paddr[i]); - } - rspq->vaddr[i] = NULL; - rspq->paddr[i] = 0; - } - rspq->offset = 0; - rspq->pageindex = 0; - rspq->rspbuf = NULL; -} - -static int slic_rspqueue_init(struct adapter *adapter) -{ - int i; - struct slic_rspqueue *rspq = &adapter->rspqueue; - u32 paddrh = 0; - - memset(rspq, 0, sizeof(struct slic_rspqueue)); - - rspq->num_pages = SLIC_RSPQ_PAGES_GB; - - for (i = 0; i < rspq->num_pages; i++) { - rspq->vaddr[i] = pci_zalloc_consistent(adapter->pcidev, - PAGE_SIZE, - &rspq->paddr[i]); - if (!rspq->vaddr[i]) { - dev_err(&adapter->pcidev->dev, - "pci_alloc_consistent failed\n"); - slic_rspqueue_free(adapter); - return -ENOMEM; - } - - if (paddrh == 0) { - slic_write32(adapter, SLIC_REG_RBAR, - rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE); - } else { - slic_write64(adapter, SLIC_REG_RBAR64, - rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE, - paddrh); - } - } - rspq->offset = 0; - rspq->pageindex = 0; - rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0]; - return 0; -} - -static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter) -{ - struct slic_rspqueue *rspq = &adapter->rspqueue; - struct slic_rspbuf *buf; - - if (!(rspq->rspbuf->status)) - return NULL; - - buf = rspq->rspbuf; - if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) { - rspq->rspbuf++; - } else { - slic_write64(adapter, SLIC_REG_RBAR64, - rspq->paddr[rspq->pageindex] | - SLIC_RSPQ_BUFSINPAGE, 0); - rspq->pageindex = (rspq->pageindex + 1) % rspq->num_pages; - rspq->offset = 0; - rspq->rspbuf = (struct slic_rspbuf *) - rspq->vaddr[rspq->pageindex]; - } - - return buf; -} - -static void slic_cmdqmem_free(struct adapter *adapter) -{ - struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; - int i; - - for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) { - if (cmdqmem->pages[i]) { - pci_free_consistent(adapter->pcidev, - PAGE_SIZE, - (void *)cmdqmem->pages[i], - cmdqmem->dma_pages[i]); - } - } - memset(cmdqmem, 0, sizeof(struct slic_cmdqmem)); -} - -static u32 *slic_cmdqmem_addpage(struct adapter *adapter) -{ - struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem; - u32 *pageaddr; - - if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES) - return NULL; - pageaddr = pci_alloc_consistent(adapter->pcidev, - PAGE_SIZE, - &cmdqmem->dma_pages[cmdqmem->pagecnt]); - if (!pageaddr) - return NULL; - - cmdqmem->pages[cmdqmem->pagecnt] = pageaddr; - cmdqmem->pagecnt++; - return pageaddr; -} - -static void slic_cmdq_free(struct adapter *adapter) -{ - struct slic_hostcmd *cmd; - - cmd = adapter->cmdq_all.head; - while (cmd) { - if (cmd->busy) { - struct sk_buff *tempskb; - - tempskb = cmd->skb; - if (tempskb) { - cmd->skb = NULL; - dev_kfree_skb_irq(tempskb); - } - } - cmd = cmd->next_all; - } - memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); - memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); - memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); - slic_cmdqmem_free(adapter); -} - -static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page) -{ - struct slic_hostcmd *cmd; - struct slic_hostcmd *prev; - struct slic_hostcmd *tail; - struct slic_cmdqueue *cmdq; - int cmdcnt; - void *cmdaddr; - ulong phys_addr; - u32 phys_addrl; - u32 phys_addrh; - struct slic_handle *pslic_handle; - unsigned long flags; - - cmdaddr = page; - cmd = cmdaddr; - cmdcnt = 0; - - phys_addr = virt_to_bus((void *)page); - phys_addrl = SLIC_GET_ADDR_LOW(phys_addr); - phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr); - - prev = NULL; - tail = cmd; - while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) && - (adapter->slic_handle_ix < 256)) { - /* Allocate and initialize a SLIC_HANDLE for this command */ - spin_lock_irqsave(&adapter->handle_lock, flags); - pslic_handle = adapter->pfree_slic_handles; - adapter->pfree_slic_handles = pslic_handle->next; - spin_unlock_irqrestore(&adapter->handle_lock, flags); - pslic_handle->type = SLIC_HANDLE_CMD; - pslic_handle->address = (void *)cmd; - pslic_handle->offset = (ushort)adapter->slic_handle_ix++; - pslic_handle->other_handle = NULL; - pslic_handle->next = NULL; - - cmd->pslic_handle = pslic_handle; - cmd->cmd64.hosthandle = pslic_handle->token.handle_token; - cmd->busy = false; - cmd->paddrl = phys_addrl; - cmd->paddrh = phys_addrh; - cmd->next_all = prev; - cmd->next = prev; - prev = cmd; - phys_addrl += SLIC_HOSTCMD_SIZE; - cmdaddr += SLIC_HOSTCMD_SIZE; - - cmd = cmdaddr; - cmdcnt++; - } - - cmdq = &adapter->cmdq_all; - cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ - tail->next_all = cmdq->head; - cmdq->head = prev; - cmdq = &adapter->cmdq_free; - spin_lock_irqsave(&cmdq->lock, flags); - cmdq->count += cmdcnt; /* SLIC_CMDQ_CMDSINPAGE; mooktodo */ - tail->next = cmdq->head; - cmdq->head = prev; - spin_unlock_irqrestore(&cmdq->lock, flags); -} - -static int slic_cmdq_init(struct adapter *adapter) -{ - int i; - u32 *pageaddr; - - memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue)); - memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue)); - memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue)); - spin_lock_init(&adapter->cmdq_all.lock); - spin_lock_init(&adapter->cmdq_free.lock); - spin_lock_init(&adapter->cmdq_done.lock); - memset(&adapter->cmdqmem, 0, sizeof(struct slic_cmdqmem)); - adapter->slic_handle_ix = 1; - for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) { - pageaddr = slic_cmdqmem_addpage(adapter); - if (!pageaddr) { - slic_cmdq_free(adapter); - return -ENOMEM; - } - slic_cmdq_addcmdpage(adapter, pageaddr); - } - adapter->slic_handle_ix = 1; - - return 0; -} - -static void slic_cmdq_reset(struct adapter *adapter) -{ - struct slic_hostcmd *hcmd; - struct sk_buff *skb; - u32 outstanding; - unsigned long flags; - - spin_lock_irqsave(&adapter->cmdq_free.lock, flags); - spin_lock(&adapter->cmdq_done.lock); - outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count; - outstanding -= adapter->cmdq_free.count; - hcmd = adapter->cmdq_all.head; - while (hcmd) { - if (hcmd->busy) { - skb = hcmd->skb; - hcmd->busy = 0; - hcmd->skb = NULL; - dev_kfree_skb_irq(skb); - } - hcmd = hcmd->next_all; - } - adapter->cmdq_free.count = 0; - adapter->cmdq_free.head = NULL; - adapter->cmdq_free.tail = NULL; - adapter->cmdq_done.count = 0; - adapter->cmdq_done.head = NULL; - adapter->cmdq_done.tail = NULL; - adapter->cmdq_free.head = adapter->cmdq_all.head; - hcmd = adapter->cmdq_all.head; - while (hcmd) { - adapter->cmdq_free.count++; - hcmd->next = hcmd->next_all; - hcmd = hcmd->next_all; - } - if (adapter->cmdq_free.count != adapter->cmdq_all.count) { - dev_err(&adapter->netdev->dev, - "free_count %d != all count %d\n", - adapter->cmdq_free.count, adapter->cmdq_all.count); - } - spin_unlock(&adapter->cmdq_done.lock); - spin_unlock_irqrestore(&adapter->cmdq_free.lock, flags); -} - -static void slic_cmdq_getdone(struct adapter *adapter) -{ - struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done; - struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free; - unsigned long flags; - - spin_lock_irqsave(&done_cmdq->lock, flags); - - free_cmdq->head = done_cmdq->head; - free_cmdq->count = done_cmdq->count; - done_cmdq->head = NULL; - done_cmdq->tail = NULL; - done_cmdq->count = 0; - spin_unlock_irqrestore(&done_cmdq->lock, flags); -} - -static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter) -{ - struct slic_cmdqueue *cmdq = &adapter->cmdq_free; - struct slic_hostcmd *cmd = NULL; - unsigned long flags; - -lock_and_retry: - spin_lock_irqsave(&cmdq->lock, flags); -retry: - cmd = cmdq->head; - if (cmd) { - cmdq->head = cmd->next; - cmdq->count--; - spin_unlock_irqrestore(&cmdq->lock, flags); - } else { - slic_cmdq_getdone(adapter); - cmd = cmdq->head; - if (cmd) { - goto retry; - } else { - u32 *pageaddr; - - spin_unlock_irqrestore(&cmdq->lock, flags); - pageaddr = slic_cmdqmem_addpage(adapter); - if (pageaddr) { - slic_cmdq_addcmdpage(adapter, pageaddr); - goto lock_and_retry; - } - } - } - return cmd; -} - -static void slic_cmdq_putdone_irq(struct adapter *adapter, - struct slic_hostcmd *cmd) -{ - struct slic_cmdqueue *cmdq = &adapter->cmdq_done; - - spin_lock(&cmdq->lock); - cmd->busy = 0; - cmd->next = cmdq->head; - cmdq->head = cmd; - cmdq->count++; - if ((adapter->xmitq_full) && (cmdq->count > 10)) - netif_wake_queue(adapter->netdev); - spin_unlock(&cmdq->lock); -} - -static int slic_rcvqueue_fill(struct adapter *adapter) -{ - void *paddr; - u32 paddrl; - u32 paddrh; - struct slic_rcvqueue *rcvq = &adapter->rcvqueue; - int i = 0; - struct device *dev = &adapter->netdev->dev; - - while (i < SLIC_RCVQ_FILLENTRIES) { - struct slic_rcvbuf *rcvbuf; - struct sk_buff *skb; -#ifdef KLUDGE_FOR_4GB_BOUNDARY -retry_rcvqfill: -#endif - skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC); - if (skb) { - paddr = (void *)(unsigned long) - pci_map_single(adapter->pcidev, - skb->data, - SLIC_RCVQ_RCVBUFSIZE, - PCI_DMA_FROMDEVICE); - paddrl = SLIC_GET_ADDR_LOW(paddr); - paddrh = SLIC_GET_ADDR_HIGH(paddr); - - skb->len = SLIC_RCVBUF_HEADSIZE; - rcvbuf = (struct slic_rcvbuf *)skb->head; - rcvbuf->status = 0; - skb->next = NULL; -#ifdef KLUDGE_FOR_4GB_BOUNDARY - if (paddrl == 0) { - dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", - __func__); - dev_err(dev, "skb[%p] PROBLEM\n", skb); - dev_err(dev, " skbdata[%p]\n", - skb->data); - dev_err(dev, " skblen[%x]\n", skb->len); - dev_err(dev, " paddr[%p]\n", paddr); - dev_err(dev, " paddrl[%x]\n", paddrl); - dev_err(dev, " paddrh[%x]\n", paddrh); - dev_err(dev, " rcvq->head[%p]\n", - rcvq->head); - dev_err(dev, " rcvq->tail[%p]\n", - rcvq->tail); - dev_err(dev, " rcvq->count[%x]\n", - rcvq->count); - dev_err(dev, "SKIP THIS SKB!!!!!!!!\n"); - goto retry_rcvqfill; - } -#else - if (paddrl == 0) { - dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", - __func__); - dev_err(dev, "skb[%p] PROBLEM\n", skb); - dev_err(dev, " skbdata[%p]\n", - skb->data); - dev_err(dev, " skblen[%x]\n", skb->len); - dev_err(dev, " paddr[%p]\n", paddr); - dev_err(dev, " paddrl[%x]\n", paddrl); - dev_err(dev, " paddrh[%x]\n", paddrh); - dev_err(dev, " rcvq->head[%p]\n", - rcvq->head); - dev_err(dev, " rcvq->tail[%p]\n", - rcvq->tail); - dev_err(dev, " rcvq->count[%x]\n", - rcvq->count); - dev_err(dev, "GIVE TO CARD ANYWAY\n"); - } -#endif - if (paddrh == 0) { - slic_write32(adapter, SLIC_REG_HBAR, - (u32)paddrl); - } else { - slic_write64(adapter, SLIC_REG_HBAR64, paddrl, - paddrh); - } - if (rcvq->head) - rcvq->tail->next = skb; - else - rcvq->head = skb; - rcvq->tail = skb; - rcvq->count++; - i++; - } else { - dev_err(&adapter->netdev->dev, - "slic_rcvqueue_fill could only get [%d] skbuffs\n", - i); - break; - } - } - return i; -} - -static void slic_rcvqueue_free(struct adapter *adapter) -{ - struct slic_rcvqueue *rcvq = &adapter->rcvqueue; - struct sk_buff *skb; - - while (rcvq->head) { - skb = rcvq->head; - rcvq->head = rcvq->head->next; - dev_kfree_skb(skb); - } - rcvq->tail = NULL; - rcvq->head = NULL; - rcvq->count = 0; -} - -static int slic_rcvqueue_init(struct adapter *adapter) -{ - int i, count; - struct slic_rcvqueue *rcvq = &adapter->rcvqueue; - - rcvq->tail = NULL; - rcvq->head = NULL; - rcvq->size = SLIC_RCVQ_ENTRIES; - rcvq->errors = 0; - rcvq->count = 0; - i = SLIC_RCVQ_ENTRIES / SLIC_RCVQ_FILLENTRIES; - count = 0; - while (i) { - count += slic_rcvqueue_fill(adapter); - i--; - } - if (rcvq->count < SLIC_RCVQ_MINENTRIES) { - slic_rcvqueue_free(adapter); - return -ENOMEM; - } - return 0; -} - -static struct sk_buff *slic_rcvqueue_getnext(struct adapter *adapter) -{ - struct slic_rcvqueue *rcvq = &adapter->rcvqueue; - struct sk_buff *skb; - struct slic_rcvbuf *rcvbuf; - int count; - - if (rcvq->count) { - skb = rcvq->head; - rcvbuf = (struct slic_rcvbuf *)skb->head; - - if (rcvbuf->status & IRHDDR_SVALID) { - rcvq->head = rcvq->head->next; - skb->next = NULL; - rcvq->count--; - } else { - skb = NULL; - } - } else { - dev_err(&adapter->netdev->dev, - "RcvQ Empty!! rcvq[%p] count[%x]\n", rcvq, rcvq->count); - skb = NULL; - } - while (rcvq->count < SLIC_RCVQ_FILLTHRESH) { - count = slic_rcvqueue_fill(adapter); - if (!count) - break; - } - if (skb) - rcvq->errors = 0; - return skb; -} - -static u32 slic_rcvqueue_reinsert(struct adapter *adapter, struct sk_buff *skb) -{ - struct slic_rcvqueue *rcvq = &adapter->rcvqueue; - void *paddr; - u32 paddrl; - u32 paddrh; - struct slic_rcvbuf *rcvbuf = (struct slic_rcvbuf *)skb->head; - struct device *dev; - - paddr = (void *)(unsigned long) - pci_map_single(adapter->pcidev, skb->head, - SLIC_RCVQ_RCVBUFSIZE, PCI_DMA_FROMDEVICE); - rcvbuf->status = 0; - skb->next = NULL; - - paddrl = SLIC_GET_ADDR_LOW(paddr); - paddrh = SLIC_GET_ADDR_HIGH(paddr); - - if (paddrl == 0) { - dev = &adapter->netdev->dev; - dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n", - __func__); - dev_err(dev, "skb[%p] PROBLEM\n", skb); - dev_err(dev, " skbdata[%p]\n", skb->data); - dev_err(dev, " skblen[%x]\n", skb->len); - dev_err(dev, " paddr[%p]\n", paddr); - dev_err(dev, " paddrl[%x]\n", paddrl); - dev_err(dev, " paddrh[%x]\n", paddrh); - dev_err(dev, " rcvq->head[%p]\n", rcvq->head); - dev_err(dev, " rcvq->tail[%p]\n", rcvq->tail); - dev_err(dev, " rcvq->count[%x]\n", rcvq->count); - } - if (paddrh == 0) - slic_write32(adapter, SLIC_REG_HBAR, (u32)paddrl); - else - slic_write64(adapter, SLIC_REG_HBAR64, paddrl, paddrh); - if (rcvq->head) - rcvq->tail->next = skb; - else - rcvq->head = skb; - rcvq->tail = skb; - rcvq->count++; - return rcvq->count; -} - -/* - * slic_link_event_handler - - * - * Initiate a link configuration sequence. The link configuration begins - * by issuing a READ_LINK_STATUS command to the Utility Processor on the - * SLIC. Since the command finishes asynchronously, the slic_upr_comlete - * routine will follow it up witha UP configuration write command, which - * will also complete asynchronously. - * - */ -static int slic_link_event_handler(struct adapter *adapter) -{ - int status; - struct slic_shmemory *sm = &adapter->shmem; - dma_addr_t phaddr = sm->lnkstatus_phaddr; - - if (adapter->state != ADAPT_UP) { - /* Adapter is not operational. Ignore. */ - return -ENODEV; - } - /* no 4GB wrap guaranteed */ - status = slic_upr_request(adapter, SLIC_UPR_RLSR, - cpu_to_le32(lower_32_bits(phaddr)), - cpu_to_le32(upper_32_bits(phaddr)), 0, 0); - return status; -} - -static void slic_init_cleanup(struct adapter *adapter) -{ - if (adapter->intrregistered) { - adapter->intrregistered = 0; - free_irq(adapter->netdev->irq, adapter->netdev); - } - - if (adapter->shmem.shmem_data) { - struct slic_shmemory *sm = &adapter->shmem; - struct slic_shmem_data *sm_data = sm->shmem_data; - - pci_free_consistent(adapter->pcidev, sizeof(*sm_data), sm_data, - sm->isr_phaddr); - } - - if (adapter->pingtimerset) { - adapter->pingtimerset = 0; - del_timer(&adapter->pingtimer); - } - - slic_rspqueue_free(adapter); - slic_cmdq_free(adapter); - slic_rcvqueue_free(adapter); -} - -/* - * Allocate a mcast_address structure to hold the multicast address. - * Link it in. - */ -static int slic_mcast_add_list(struct adapter *adapter, char *address) -{ - struct mcast_address *mcaddr, *mlist; - - /* Check to see if it already exists */ - mlist = adapter->mcastaddrs; - while (mlist) { - if (ether_addr_equal(mlist->address, address)) - return 0; - mlist = mlist->next; - } - - /* Doesn't already exist. Allocate a structure to hold it */ - mcaddr = kmalloc(sizeof(*mcaddr), GFP_ATOMIC); - if (!mcaddr) - return 1; - - ether_addr_copy(mcaddr->address, address); - - mcaddr->next = adapter->mcastaddrs; - adapter->mcastaddrs = mcaddr; - - return 0; -} - -static void slic_mcast_set_list(struct net_device *dev) -{ - struct adapter *adapter = netdev_priv(dev); - int status = 0; - char *addresses; - struct netdev_hw_addr *ha; - - netdev_for_each_mc_addr(ha, dev) { - addresses = (char *)&ha->addr; - status = slic_mcast_add_list(adapter, addresses); - if (status != 0) - break; - slic_mcast_set_bit(adapter, addresses); - } - - if (adapter->devflags_prev != dev->flags) { - adapter->macopts = MAC_DIRECTED; - if (dev->flags) { - if (dev->flags & IFF_BROADCAST) - adapter->macopts |= MAC_BCAST; - if (dev->flags & IFF_PROMISC) - adapter->macopts |= MAC_PROMISC; - if (dev->flags & IFF_ALLMULTI) - adapter->macopts |= MAC_ALLMCAST; - if (dev->flags & IFF_MULTICAST) - adapter->macopts |= MAC_MCAST; - } - adapter->devflags_prev = dev->flags; - slic_config_set(adapter, true); - } else { - if (status == 0) - slic_mcast_set_mask(adapter); - } -} - -#define XMIT_FAIL_LINK_STATE 1 -#define XMIT_FAIL_ZERO_LENGTH 2 -#define XMIT_FAIL_HOSTCMD_FAIL 3 - -static void slic_xmit_build_request(struct adapter *adapter, - struct slic_hostcmd *hcmd, - struct sk_buff *skb) -{ - struct slic_host64_cmd *ihcmd; - ulong phys_addr; - - ihcmd = &hcmd->cmd64; - - ihcmd->flags = adapter->port << IHFLG_IFSHFT; - ihcmd->command = IHCMD_XMT_REQ; - ihcmd->u.slic_buffers.totlen = skb->len; - phys_addr = pci_map_single(adapter->pcidev, skb->data, skb->len, - PCI_DMA_TODEVICE); - if (pci_dma_mapping_error(adapter->pcidev, phys_addr)) { - kfree_skb(skb); - dev_err(&adapter->pcidev->dev, "DMA mapping error\n"); - return; - } - ihcmd->u.slic_buffers.bufs[0].paddrl = SLIC_GET_ADDR_LOW(phys_addr); - ihcmd->u.slic_buffers.bufs[0].paddrh = SLIC_GET_ADDR_HIGH(phys_addr); - ihcmd->u.slic_buffers.bufs[0].length = skb->len; -#if BITS_PER_LONG == 64 - hcmd->cmdsize = (u32)((((u64)&ihcmd->u.slic_buffers.bufs[1] - - (u64)hcmd) + 31) >> 5); -#else - hcmd->cmdsize = (((u32)&ihcmd->u.slic_buffers.bufs[1] - - (u32)hcmd) + 31) >> 5; -#endif -} - -static void slic_xmit_fail(struct adapter *adapter, - struct sk_buff *skb, - void *cmd, u32 skbtype, u32 status) -{ - if (adapter->xmitq_full) - netif_stop_queue(adapter->netdev); - if ((!cmd) && (status <= XMIT_FAIL_HOSTCMD_FAIL)) { - switch (status) { - case XMIT_FAIL_LINK_STATE: - dev_err(&adapter->netdev->dev, - "reject xmit skb[%p: %x] linkstate[%s] adapter[%s:%d] card[%s:%d]\n", - skb, skb->pkt_type, - slic_linkstate(adapter->linkstate), - slic_adapter_state(adapter->state), - adapter->state, - slic_card_state(adapter->card->state), - adapter->card->state); - break; - case XMIT_FAIL_ZERO_LENGTH: - dev_err(&adapter->netdev->dev, - "xmit_start skb->len == 0 skb[%p] type[%x]\n", - skb, skb->pkt_type); - break; - case XMIT_FAIL_HOSTCMD_FAIL: - dev_err(&adapter->netdev->dev, - "xmit_start skb[%p] type[%x] No host commands available\n", - skb, skb->pkt_type); - break; - } - } - dev_kfree_skb(skb); - adapter->netdev->stats.tx_dropped++; -} - -static void slic_rcv_handle_error(struct adapter *adapter, - struct slic_rcvbuf *rcvbuf) -{ - struct slic_hddr_wds *hdr = (struct slic_hddr_wds *)rcvbuf->data; - struct net_device *netdev = adapter->netdev; - - if (adapter->devid != SLIC_1GB_DEVICE_ID) { - if (hdr->frame_status14 & VRHSTAT_802OE) - adapter->if_events.oflow802++; - if (hdr->frame_status14 & VRHSTAT_TPOFLO) - adapter->if_events.tprtoflow++; - if (hdr->frame_status_b14 & VRHSTATB_802UE) - adapter->if_events.uflow802++; - if (hdr->frame_status_b14 & VRHSTATB_RCVE) { - adapter->if_events.rcvearly++; - netdev->stats.rx_fifo_errors++; - } - if (hdr->frame_status_b14 & VRHSTATB_BUFF) { - adapter->if_events.bufov++; - netdev->stats.rx_over_errors++; - } - if (hdr->frame_status_b14 & VRHSTATB_CARRE) { - adapter->if_events.carre++; - netdev->stats.tx_carrier_errors++; - } - if (hdr->frame_status_b14 & VRHSTATB_LONGE) - adapter->if_events.longe++; - if (hdr->frame_status_b14 & VRHSTATB_PREA) - adapter->if_events.invp++; - if (hdr->frame_status_b14 & VRHSTATB_CRC) { - adapter->if_events.crc++; - netdev->stats.rx_crc_errors++; - } - if (hdr->frame_status_b14 & VRHSTATB_DRBL) - adapter->if_events.drbl++; - if (hdr->frame_status_b14 & VRHSTATB_CODE) - adapter->if_events.code++; - if (hdr->frame_status_b14 & VRHSTATB_TPCSUM) - adapter->if_events.tp_csum++; - if (hdr->frame_status_b14 & VRHSTATB_TPHLEN) - adapter->if_events.tp_hlen++; - if (hdr->frame_status_b14 & VRHSTATB_IPCSUM) - adapter->if_events.ip_csum++; - if (hdr->frame_status_b14 & VRHSTATB_IPLERR) - adapter->if_events.ip_len++; - if (hdr->frame_status_b14 & VRHSTATB_IPHERR) - adapter->if_events.ip_hlen++; - } else { - if (hdr->frame_status_gb & VGBSTAT_XPERR) { - u32 xerr = hdr->frame_status_gb >> VGBSTAT_XERRSHFT; - - if (xerr == VGBSTAT_XCSERR) - adapter->if_events.tp_csum++; - if (xerr == VGBSTAT_XUFLOW) - adapter->if_events.tprtoflow++; - if (xerr == VGBSTAT_XHLEN) - adapter->if_events.tp_hlen++; - } - if (hdr->frame_status_gb & VGBSTAT_NETERR) { - u32 nerr = - (hdr-> - frame_status_gb >> VGBSTAT_NERRSHFT) & - VGBSTAT_NERRMSK; - if (nerr == VGBSTAT_NCSERR) - adapter->if_events.ip_csum++; - if (nerr == VGBSTAT_NUFLOW) - adapter->if_events.ip_len++; - if (nerr == VGBSTAT_NHLEN) - adapter->if_events.ip_hlen++; - } - if (hdr->frame_status_gb & VGBSTAT_LNKERR) { - u32 lerr = hdr->frame_status_gb & VGBSTAT_LERRMSK; - - if (lerr == VGBSTAT_LDEARLY) - adapter->if_events.rcvearly++; - if (lerr == VGBSTAT_LBOFLO) - adapter->if_events.bufov++; - if (lerr == VGBSTAT_LCODERR) - adapter->if_events.code++; - if (lerr == VGBSTAT_LDBLNBL) - adapter->if_events.drbl++; - if (lerr == VGBSTAT_LCRCERR) - adapter->if_events.crc++; - if (lerr == VGBSTAT_LOFLO) - adapter->if_events.oflow802++; - if (lerr == VGBSTAT_LUFLO) - adapter->if_events.uflow802++; - } - } -} - -#define TCP_OFFLOAD_FRAME_PUSHFLAG 0x10000000 -#define M_FAST_PATH 0x0040 - -static void slic_rcv_handler(struct adapter *adapter) -{ - struct net_device *netdev = adapter->netdev; - struct sk_buff *skb; - struct slic_rcvbuf *rcvbuf; - u32 frames = 0; - - while ((skb = slic_rcvqueue_getnext(adapter))) { - u32 rx_bytes; - - rcvbuf = (struct slic_rcvbuf *)skb->head; - adapter->card->events++; - if (rcvbuf->status & IRHDDR_ERR) { - adapter->rx_errors++; - slic_rcv_handle_error(adapter, rcvbuf); - slic_rcvqueue_reinsert(adapter, skb); - continue; - } - - if (!slic_mac_filter(adapter, (struct ether_header *) - rcvbuf->data)) { - slic_rcvqueue_reinsert(adapter, skb); - continue; - } - skb_pull(skb, SLIC_RCVBUF_HEADSIZE); - rx_bytes = (rcvbuf->length & IRHDDR_FLEN_MSK); - skb_put(skb, rx_bytes); - netdev->stats.rx_packets++; - netdev->stats.rx_bytes += rx_bytes; -#if SLIC_OFFLOAD_IP_CHECKSUM - skb->ip_summed = CHECKSUM_UNNECESSARY; -#endif - - skb->dev = adapter->netdev; - skb->protocol = eth_type_trans(skb, skb->dev); - netif_rx(skb); - - ++frames; -#if SLIC_INTERRUPT_PROCESS_LIMIT - if (frames >= SLIC_RCVQ_MAX_PROCESS_ISR) { - adapter->rcv_interrupt_yields++; - break; - } -#endif - } - adapter->max_isr_rcvs = max(adapter->max_isr_rcvs, frames); -} - -static void slic_xmit_complete(struct adapter *adapter) -{ - struct slic_hostcmd *hcmd; - struct slic_rspbuf *rspbuf; - u32 frames = 0; - struct slic_handle_word slic_handle_word; - - do { - rspbuf = slic_rspqueue_getnext(adapter); - if (!rspbuf) - break; - adapter->xmit_completes++; - adapter->card->events++; - /* - * Get the complete host command buffer - */ - slic_handle_word.handle_token = rspbuf->hosthandle; - hcmd = - adapter->slic_handles[slic_handle_word.handle_index]. - address; -/* hcmd = (struct slic_hostcmd *) rspbuf->hosthandle; */ - if (hcmd->type == SLIC_CMD_DUMB) { - if (hcmd->skb) - dev_kfree_skb_irq(hcmd->skb); - slic_cmdq_putdone_irq(adapter, hcmd); - } - rspbuf->status = 0; - rspbuf->hosthandle = 0; - frames++; - } while (1); - adapter->max_isr_xmits = max(adapter->max_isr_xmits, frames); -} - -static void slic_interrupt_card_up(u32 isr, struct adapter *adapter, - struct net_device *dev) -{ - if (isr & ~ISR_IO) { - if (isr & ISR_ERR) { - adapter->error_interrupts++; - if (isr & ISR_RMISS) { - int count; - int pre_count; - int errors; - - struct slic_rcvqueue *rcvq = - &adapter->rcvqueue; - - adapter->error_rmiss_interrupts++; - - if (!rcvq->errors) - rcv_count = rcvq->count; - pre_count = rcvq->count; - errors = rcvq->errors; - - while (rcvq->count < SLIC_RCVQ_FILLTHRESH) { - count = slic_rcvqueue_fill(adapter); - if (!count) - break; - } - } else if (isr & ISR_XDROP) { - dev_err(&dev->dev, - "isr & ISR_ERR [%x] ISR_XDROP\n", isr); - } else { - dev_err(&dev->dev, - "isr & ISR_ERR [%x]\n", isr); - } - } - - if (isr & ISR_LEVENT) { - adapter->linkevent_interrupts++; - if (slic_link_event_handler(adapter)) - adapter->linkevent_interrupts--; - } - - if ((isr & ISR_UPC) || (isr & ISR_UPCERR) || - (isr & ISR_UPCBSY)) { - adapter->upr_interrupts++; - slic_upr_request_complete(adapter, isr); - } - } - - if (isr & ISR_RCV) { - adapter->rcv_interrupts++; - slic_rcv_handler(adapter); - } - - if (isr & ISR_CMD) { - adapter->xmit_interrupts++; - slic_xmit_complete(adapter); - } -} - -static irqreturn_t slic_interrupt(int irq, void *dev_id) -{ - struct net_device *dev = dev_id; - struct adapter *adapter = netdev_priv(dev); - struct slic_shmemory *sm = &adapter->shmem; - struct slic_shmem_data *sm_data = sm->shmem_data; - u32 isr; - - if (sm_data->isr) { - slic_write32(adapter, SLIC_REG_ICR, ICR_INT_MASK); - slic_flush_write(adapter); - - isr = sm_data->isr; - sm_data->isr = 0; - adapter->num_isrs++; - switch (adapter->card->state) { - case CARD_UP: - slic_interrupt_card_up(isr, adapter, dev); - break; - - case CARD_DOWN: - if ((isr & ISR_UPC) || - (isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) { - adapter->upr_interrupts++; - slic_upr_request_complete(adapter, isr); - } - break; - } - - adapter->all_reg_writes += 2; - adapter->isr_reg_writes++; - slic_write32(adapter, SLIC_REG_ISR, 0); - } else { - adapter->false_interrupts++; - } - return IRQ_HANDLED; -} - -#define NORMAL_ETHFRAME 0 - -static netdev_tx_t slic_xmit_start(struct sk_buff *skb, struct net_device *dev) -{ - struct sliccard *card; - struct adapter *adapter = netdev_priv(dev); - struct slic_hostcmd *hcmd = NULL; - u32 status = 0; - void *offloadcmd = NULL; - - card = adapter->card; - if ((adapter->linkstate != LINK_UP) || - (adapter->state != ADAPT_UP) || (card->state != CARD_UP)) { - status = XMIT_FAIL_LINK_STATE; - goto xmit_fail; - - } else if (skb->len == 0) { - status = XMIT_FAIL_ZERO_LENGTH; - goto xmit_fail; - } - - hcmd = slic_cmdq_getfree(adapter); - if (!hcmd) { - adapter->xmitq_full = 1; - status = XMIT_FAIL_HOSTCMD_FAIL; - goto xmit_fail; - } - hcmd->skb = skb; - hcmd->busy = 1; - hcmd->type = SLIC_CMD_DUMB; - slic_xmit_build_request(adapter, hcmd, skb); - dev->stats.tx_packets++; - dev->stats.tx_bytes += skb->len; - -#ifdef DEBUG_DUMP - if (adapter->kill_card) { - struct slic_host64_cmd ihcmd; - - ihcmd = &hcmd->cmd64; - - ihcmd->flags |= 0x40; - adapter->kill_card = 0; /* only do this once */ - } -#endif - if (hcmd->paddrh == 0) { - slic_write32(adapter, SLIC_REG_CBAR, (hcmd->paddrl | - hcmd->cmdsize)); - } else { - slic_write64(adapter, SLIC_REG_CBAR64, - hcmd->paddrl | hcmd->cmdsize, hcmd->paddrh); - } -xmit_done: - return NETDEV_TX_OK; -xmit_fail: - slic_xmit_fail(adapter, skb, offloadcmd, NORMAL_ETHFRAME, status); - goto xmit_done; -} - -static void slic_adapter_freeresources(struct adapter *adapter) -{ - slic_init_cleanup(adapter); - adapter->error_interrupts = 0; - adapter->rcv_interrupts = 0; - adapter->xmit_interrupts = 0; - adapter->linkevent_interrupts = 0; - adapter->upr_interrupts = 0; - adapter->num_isrs = 0; - adapter->xmit_completes = 0; - adapter->rcv_broadcasts = 0; - adapter->rcv_multicasts = 0; - adapter->rcv_unicasts = 0; -} - -static int slic_adapter_allocresources(struct adapter *adapter, - unsigned long *flags) -{ - if (!adapter->intrregistered) { - int retval; - - spin_unlock_irqrestore(&slic_global.driver_lock, *flags); - - retval = request_irq(adapter->netdev->irq, - &slic_interrupt, - IRQF_SHARED, - adapter->netdev->name, adapter->netdev); - - spin_lock_irqsave(&slic_global.driver_lock, *flags); - - if (retval) { - dev_err(&adapter->netdev->dev, - "request_irq (%s) FAILED [%x]\n", - adapter->netdev->name, retval); - return retval; - } - adapter->intrregistered = 1; - } - return 0; -} - -/* - * slic_if_init - * - * Perform initialization of our slic interface. - * - */ -static int slic_if_init(struct adapter *adapter, unsigned long *flags) -{ - struct sliccard *card = adapter->card; - struct net_device *dev = adapter->netdev; - struct slic_shmemory *sm = &adapter->shmem; - struct slic_shmem_data *sm_data = sm->shmem_data; - int rc; - - /* adapter should be down at this point */ - if (adapter->state != ADAPT_DOWN) { - dev_err(&dev->dev, "%s: adapter->state != ADAPT_DOWN\n", - __func__); - rc = -EIO; - goto err; - } - - adapter->devflags_prev = dev->flags; - adapter->macopts = MAC_DIRECTED; - if (dev->flags) { - if (dev->flags & IFF_BROADCAST) - adapter->macopts |= MAC_BCAST; - if (dev->flags & IFF_PROMISC) - adapter->macopts |= MAC_PROMISC; - if (dev->flags & IFF_ALLMULTI) - adapter->macopts |= MAC_ALLMCAST; - if (dev->flags & IFF_MULTICAST) - adapter->macopts |= MAC_MCAST; - } - rc = slic_adapter_allocresources(adapter, flags); - if (rc) { - dev_err(&dev->dev, "slic_adapter_allocresources FAILED %x\n", - rc); - slic_adapter_freeresources(adapter); - goto err; - } - - if (!adapter->queues_initialized) { - rc = slic_rspqueue_init(adapter); - if (rc) - goto err; - rc = slic_cmdq_init(adapter); - if (rc) - goto err; - rc = slic_rcvqueue_init(adapter); - if (rc) - goto err; - adapter->queues_initialized = 1; - } - - slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF); - slic_flush_write(adapter); - mdelay(1); - - if (!adapter->isp_initialized) { - unsigned long flags; - - spin_lock_irqsave(&adapter->bit64reglock, flags); - slic_write32(adapter, SLIC_REG_ADDR_UPPER, - cpu_to_le32(upper_32_bits(sm->isr_phaddr))); - slic_write32(adapter, SLIC_REG_ISP, - cpu_to_le32(lower_32_bits(sm->isr_phaddr))); - spin_unlock_irqrestore(&adapter->bit64reglock, flags); - - adapter->isp_initialized = 1; - } - - adapter->state = ADAPT_UP; - if (!card->loadtimerset) { - setup_timer(&card->loadtimer, &slic_timer_load_check, - (ulong)card); - card->loadtimer.expires = - jiffies + (SLIC_LOADTIMER_PERIOD * HZ); - add_timer(&card->loadtimer); - - card->loadtimerset = 1; - } - - if (!adapter->pingtimerset) { - setup_timer(&adapter->pingtimer, &slic_timer_ping, (ulong)dev); - adapter->pingtimer.expires = - jiffies + (PING_TIMER_INTERVAL * HZ); - add_timer(&adapter->pingtimer); - adapter->pingtimerset = 1; - adapter->card->pingstatus = ISR_PINGMASK; - } - - /* - * clear any pending events, then enable interrupts - */ - sm_data->isr = 0; - slic_write32(adapter, SLIC_REG_ISR, 0); - slic_write32(adapter, SLIC_REG_ICR, ICR_INT_ON); - - slic_link_config(adapter, LINK_AUTOSPEED, LINK_AUTOD); - slic_flush_write(adapter); - - rc = slic_link_event_handler(adapter); - if (rc) { - /* disable interrupts then clear pending events */ - slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF); - slic_write32(adapter, SLIC_REG_ISR, 0); - slic_flush_write(adapter); - - if (adapter->pingtimerset) { - del_timer(&adapter->pingtimer); - adapter->pingtimerset = 0; - } - if (card->loadtimerset) { - del_timer(&card->loadtimer); - card->loadtimerset = 0; - } - adapter->state = ADAPT_DOWN; - slic_adapter_freeresources(adapter); - } - -err: - return rc; -} - -static int slic_entry_open(struct net_device *dev) -{ - struct adapter *adapter = netdev_priv(dev); - struct sliccard *card = adapter->card; - unsigned long flags; - int status; - - netif_carrier_off(dev); - - spin_lock_irqsave(&slic_global.driver_lock, flags); - if (!adapter->activated) { - card->adapters_activated++; - slic_global.num_slic_ports_active++; - adapter->activated = 1; - } - status = slic_if_init(adapter, &flags); - - if (status != 0) { - if (adapter->activated) { - card->adapters_activated--; - slic_global.num_slic_ports_active--; - adapter->activated = 0; - } - goto spin_unlock; - } - if (!card->master) - card->master = adapter; - -spin_unlock: - spin_unlock_irqrestore(&slic_global.driver_lock, flags); - - netif_start_queue(adapter->netdev); - - return status; -} - -static void slic_card_cleanup(struct sliccard *card) -{ - if (card->loadtimerset) { - card->loadtimerset = 0; - del_timer_sync(&card->loadtimer); - } - - kfree(card); -} - -static void slic_entry_remove(struct pci_dev *pcidev) -{ - struct net_device *dev = pci_get_drvdata(pcidev); - struct adapter *adapter = netdev_priv(dev); - struct sliccard *card; - struct mcast_address *mcaddr, *mlist; - - unregister_netdev(dev); - - slic_adapter_freeresources(adapter); - iounmap(adapter->regs); - - /* free multicast addresses */ - mlist = adapter->mcastaddrs; - while (mlist) { - mcaddr = mlist; - mlist = mlist->next; - kfree(mcaddr); - } - card = adapter->card; - card->adapters_allocated--; - adapter->allocated = 0; - if (!card->adapters_allocated) { - struct sliccard *curr_card = slic_global.slic_card; - - if (curr_card == card) { - slic_global.slic_card = card->next; - } else { - while (curr_card->next != card) - curr_card = curr_card->next; - curr_card->next = card->next; - } - slic_global.num_slic_cards--; - slic_card_cleanup(card); - } - free_netdev(dev); - pci_release_regions(pcidev); - pci_disable_device(pcidev); -} - -static int slic_entry_halt(struct net_device *dev) -{ - struct adapter *adapter = netdev_priv(dev); - struct sliccard *card = adapter->card; - unsigned long flags; - - spin_lock_irqsave(&slic_global.driver_lock, flags); - netif_stop_queue(adapter->netdev); - adapter->state = ADAPT_DOWN; - adapter->linkstate = LINK_DOWN; - adapter->upr_list = NULL; - adapter->upr_busy = 0; - adapter->devflags_prev = 0; - slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF); - adapter->all_reg_writes++; - adapter->icr_reg_writes++; - slic_config_clear(adapter); - if (adapter->activated) { - card->adapters_activated--; - slic_global.num_slic_ports_active--; - adapter->activated = 0; - } -#ifdef AUTOMATIC_RESET - slic_write32(adapter, SLIC_REG_RESET_IFACE, 0); -#endif - slic_flush_write(adapter); - - /* - * Reset the adapter's cmd queues - */ - slic_cmdq_reset(adapter); - -#ifdef AUTOMATIC_RESET - if (!card->adapters_activated) - slic_card_init(card, adapter); -#endif - - spin_unlock_irqrestore(&slic_global.driver_lock, flags); - - netif_carrier_off(dev); - - return 0; -} - -static struct net_device_stats *slic_get_stats(struct net_device *dev) -{ - struct adapter *adapter = netdev_priv(dev); - - dev->stats.collisions = adapter->slic_stats.iface.xmit_collisions; - dev->stats.rx_errors = adapter->slic_stats.iface.rcv_errors; - dev->stats.tx_errors = adapter->slic_stats.iface.xmt_errors; - dev->stats.rx_missed_errors = adapter->slic_stats.iface.rcv_discards; - dev->stats.tx_heartbeat_errors = 0; - dev->stats.tx_aborted_errors = 0; - dev->stats.tx_window_errors = 0; - dev->stats.tx_fifo_errors = 0; - dev->stats.rx_frame_errors = 0; - dev->stats.rx_length_errors = 0; - - return &dev->stats; -} - -static int slic_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) -{ - struct adapter *adapter = netdev_priv(dev); - struct ethtool_cmd edata; - struct ethtool_cmd ecmd; - u32 data[7]; - u32 intagg; - - switch (cmd) { - case SIOCSLICSETINTAGG: - if (copy_from_user(data, rq->ifr_data, 28)) - return -EFAULT; - intagg = data[0]; - dev_err(&dev->dev, "set interrupt aggregation to %d\n", - intagg); - slic_intagg_set(adapter, intagg); - return 0; - - case SIOCETHTOOL: - if (copy_from_user(&ecmd, rq->ifr_data, sizeof(ecmd))) - return -EFAULT; - - if (ecmd.cmd == ETHTOOL_GSET) { - memset(&edata, 0, sizeof(edata)); - edata.supported = (SUPPORTED_10baseT_Half | - SUPPORTED_10baseT_Full | - SUPPORTED_100baseT_Half | - SUPPORTED_100baseT_Full | - SUPPORTED_Autoneg | SUPPORTED_MII); - edata.port = PORT_MII; - edata.transceiver = XCVR_INTERNAL; - edata.phy_address = 0; - if (adapter->linkspeed == LINK_100MB) - edata.speed = SPEED_100; - else if (adapter->linkspeed == LINK_10MB) - edata.speed = SPEED_10; - else - edata.speed = 0; - - if (adapter->linkduplex == LINK_FULLD) - edata.duplex = DUPLEX_FULL; - else - edata.duplex = DUPLEX_HALF; - - edata.autoneg = AUTONEG_ENABLE; - edata.maxtxpkt = 1; - edata.maxrxpkt = 1; - if (copy_to_user(rq->ifr_data, &edata, sizeof(edata))) - return -EFAULT; - - } else if (ecmd.cmd == ETHTOOL_SSET) { - if (!capable(CAP_NET_ADMIN)) - return -EPERM; - - if (adapter->linkspeed == LINK_100MB) - edata.speed = SPEED_100; - else if (adapter->linkspeed == LINK_10MB) - edata.speed = SPEED_10; - else - edata.speed = 0; - - if (adapter->linkduplex == LINK_FULLD) - edata.duplex = DUPLEX_FULL; - else - edata.duplex = DUPLEX_HALF; - - edata.autoneg = AUTONEG_ENABLE; - edata.maxtxpkt = 1; - edata.maxrxpkt = 1; - if ((ecmd.speed != edata.speed) || - (ecmd.duplex != edata.duplex)) { - u32 speed; - u32 duplex; - - if (ecmd.speed == SPEED_10) - speed = 0; - else - speed = PCR_SPEED_100; - if (ecmd.duplex == DUPLEX_FULL) - duplex = PCR_DUPLEX_FULL; - else - duplex = 0; - slic_link_config(adapter, speed, duplex); - if (slic_link_event_handler(adapter)) - return -EFAULT; - } - } - return 0; - default: - return -EOPNOTSUPP; - } -} - -static void slic_config_pci(struct pci_dev *pcidev) -{ - u16 pci_command; - u16 new_command; - - pci_read_config_word(pcidev, PCI_COMMAND, &pci_command); - - new_command = pci_command | PCI_COMMAND_MASTER - | PCI_COMMAND_MEMORY - | PCI_COMMAND_INVALIDATE - | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | PCI_COMMAND_FAST_BACK; - if (pci_command != new_command) - pci_write_config_word(pcidev, PCI_COMMAND, new_command); -} - -static int slic_card_init(struct sliccard *card, struct adapter *adapter) -{ - struct slic_shmemory *sm = &adapter->shmem; - struct slic_shmem_data *sm_data = sm->shmem_data; - struct slic_eeprom *peeprom; - struct oslic_eeprom *poeeprom; - dma_addr_t phys_config; - u32 phys_configh; - u32 phys_configl; - u32 i = 0; - int status; - uint macaddrs = card->card_size; - ushort eecodesize; - ushort dramsize; - ushort ee_chksum; - ushort calc_chksum; - struct slic_config_mac *pmac; - unsigned char fruformat; - unsigned char oemfruformat; - struct atk_fru *patkfru; - union oemfru *poemfru; - unsigned long flags; - - /* Reset everything except PCI configuration space */ - slic_soft_reset(adapter); - - /* Download the microcode */ - status = slic_card_download(adapter); - if (status) - return status; - - if (!card->config_set) { - peeprom = pci_alloc_consistent(adapter->pcidev, - sizeof(struct slic_eeprom), - &phys_config); - - if (!peeprom) { - dev_err(&adapter->pcidev->dev, - "Failed to allocate DMA memory for EEPROM.\n"); - return -ENOMEM; - } - - phys_configl = SLIC_GET_ADDR_LOW(phys_config); - phys_configh = SLIC_GET_ADDR_HIGH(phys_config); - - memset(peeprom, 0, sizeof(struct slic_eeprom)); - - slic_write32(adapter, SLIC_REG_ICR, ICR_INT_OFF); - slic_flush_write(adapter); - mdelay(1); - - spin_lock_irqsave(&adapter->bit64reglock, flags); - slic_write32(adapter, SLIC_REG_ADDR_UPPER, - cpu_to_le32(upper_32_bits(sm->isr_phaddr))); - slic_write32(adapter, SLIC_REG_ISP, - cpu_to_le32(lower_32_bits(sm->isr_phaddr))); - spin_unlock_irqrestore(&adapter->bit64reglock, flags); - - status = slic_config_get(adapter, phys_configl, phys_configh); - if (status) { - dev_err(&adapter->pcidev->dev, - "Failed to fetch config data from device.\n"); - goto card_init_err; - } - - for (;;) { - if (sm_data->isr) { - if (sm_data->isr & ISR_UPC) { - sm_data->isr = 0; - slic_write64(adapter, SLIC_REG_ISP, 0, - 0); - slic_write32(adapter, SLIC_REG_ISR, 0); - slic_flush_write(adapter); - - slic_upr_request_complete(adapter, 0); - break; - } - - sm_data->isr = 0; - slic_write32(adapter, SLIC_REG_ISR, 0); - slic_flush_write(adapter); - } else { - mdelay(1); - i++; - if (i > 5000) { - dev_err(&adapter->pcidev->dev, - "Fetch of config data timed out.\n"); - slic_write64(adapter, SLIC_REG_ISP, - 0, 0); - slic_flush_write(adapter); - - status = -EINVAL; - goto card_init_err; - } - } - } - - switch (adapter->devid) { - /* Oasis card */ - case SLIC_2GB_DEVICE_ID: - /* extract EEPROM data and pointers to EEPROM data */ - poeeprom = (struct oslic_eeprom *)peeprom; - eecodesize = poeeprom->eecode_size; - dramsize = poeeprom->dram_size; - pmac = poeeprom->mac_info; - fruformat = poeeprom->fru_format; - patkfru = &poeeprom->atk_fru; - oemfruformat = poeeprom->oem_fru_format; - poemfru = &poeeprom->oem_fru; - macaddrs = 2; - /* - * Minor kludge for Oasis card - * get 2 MAC addresses from the - * EEPROM to ensure that function 1 - * gets the Port 1 MAC address - */ - break; - default: - /* extract EEPROM data and pointers to EEPROM data */ - eecodesize = peeprom->eecode_size; - dramsize = peeprom->dram_size; - pmac = peeprom->u2.mac.mac_info; - fruformat = peeprom->fru_format; - patkfru = &peeprom->atk_fru; - oemfruformat = peeprom->oem_fru_format; - poemfru = &peeprom->oem_fru; - break; - } - - card->config.eeprom_valid = false; - - /* see if the EEPROM is valid by checking it's checksum */ - if ((eecodesize <= MAX_EECODE_SIZE) && - (eecodesize >= MIN_EECODE_SIZE)) { - ee_chksum = - *(u16 *)((char *)peeprom + (eecodesize - 2)); - /* - * calculate the EEPROM checksum - */ - calc_chksum = slic_eeprom_cksum(peeprom, - eecodesize - 2); - /* - * if the ucdoe chksum flag bit worked, - * we wouldn't need this - */ - if (ee_chksum == calc_chksum) - card->config.eeprom_valid = true; - } - /* copy in the DRAM size */ - card->config.dram_size = dramsize; - - /* copy in the MAC address(es) */ - for (i = 0; i < macaddrs; i++) { - memcpy(&card->config.mac_info[i], - &pmac[i], sizeof(struct slic_config_mac)); - } - - /* copy the Alacritech FRU information */ - card->config.fru_format = fruformat; - memcpy(&card->config.atk_fru, patkfru, sizeof(struct atk_fru)); - - pci_free_consistent(adapter->pcidev, - sizeof(struct slic_eeprom), - peeprom, phys_config); - - if (!card->config.eeprom_valid) { - slic_write64(adapter, SLIC_REG_ISP, 0, 0); - slic_flush_write(adapter); - dev_err(&adapter->pcidev->dev, "EEPROM invalid.\n"); - return -EINVAL; - } - - card->config_set = 1; - } - - status = slic_card_download_gbrcv(adapter); - if (status) - return status; - - if (slic_global.dynamic_intagg) - slic_intagg_set(adapter, 0); - else - slic_intagg_set(adapter, adapter->intagg_delay); - - /* - * Initialize ping status to "ok" - */ - card->pingstatus = ISR_PINGMASK; - - /* - * Lastly, mark our card state as up and return success - */ - card->state = CARD_UP; - card->reset_in_progress = 0; - - return 0; - -card_init_err: - pci_free_consistent(adapter->pcidev, sizeof(struct slic_eeprom), - peeprom, phys_config); - return status; -} - -static int slic_get_coalesce(struct net_device *dev, - struct ethtool_coalesce *coalesce) -{ - struct adapter *adapter = netdev_priv(dev); - - adapter->intagg_delay = coalesce->rx_coalesce_usecs; - adapter->dynamic_intagg = coalesce->use_adaptive_rx_coalesce; - return 0; -} - -static int slic_set_coalesce(struct net_device *dev, - struct ethtool_coalesce *coalesce) -{ - struct adapter *adapter = netdev_priv(dev); - - coalesce->rx_coalesce_usecs = adapter->intagg_delay; - coalesce->use_adaptive_rx_coalesce = adapter->dynamic_intagg; - return 0; -} - -static void slic_init_driver(void) -{ - if (slic_first_init) { - slic_first_init = 0; - spin_lock_init(&slic_global.driver_lock); - } -} - -static int slic_init_adapter(struct net_device *netdev, - struct pci_dev *pcidev, - const struct pci_device_id *pci_tbl_entry, - void __iomem *memaddr, int chip_idx) -{ - ushort index; - struct slic_handle *pslic_handle; - struct adapter *adapter = netdev_priv(netdev); - struct slic_shmemory *sm = &adapter->shmem; - struct slic_shmem_data *sm_data; - dma_addr_t phaddr; - -/* adapter->pcidev = pcidev;*/ - adapter->vendid = pci_tbl_entry->vendor; - adapter->devid = pci_tbl_entry->device; - adapter->subsysid = pci_tbl_entry->subdevice; - adapter->busnumber = pcidev->bus->number; - adapter->slotnumber = ((pcidev->devfn >> 3) & 0x1F); - adapter->functionnumber = (pcidev->devfn & 0x7); - adapter->regs = memaddr; - adapter->irq = pcidev->irq; - adapter->chipid = chip_idx; - adapter->port = 0; - adapter->cardindex = adapter->port; - spin_lock_init(&adapter->upr_lock); - spin_lock_init(&adapter->bit64reglock); - spin_lock_init(&adapter->adapter_lock); - spin_lock_init(&adapter->reset_lock); - spin_lock_init(&adapter->handle_lock); - - adapter->card_size = 1; - /* - * Initialize slic_handle array - */ - /* - * Start with 1. 0 is an invalid host handle. - */ - for (index = 1, pslic_handle = &adapter->slic_handles[1]; - index < SLIC_CMDQ_MAXCMDS; index++, pslic_handle++) { - pslic_handle->token.handle_index = index; - pslic_handle->type = SLIC_HANDLE_FREE; - pslic_handle->next = adapter->pfree_slic_handles; - adapter->pfree_slic_handles = pslic_handle; - } - sm_data = pci_zalloc_consistent(adapter->pcidev, sizeof(*sm_data), - &phaddr); - if (!sm_data) - return -ENOMEM; - - sm->shmem_data = sm_data; - sm->isr_phaddr = phaddr; - sm->lnkstatus_phaddr = phaddr + offsetof(struct slic_shmem_data, - lnkstatus); - sm->stats_phaddr = phaddr + offsetof(struct slic_shmem_data, stats); - - return 0; -} - -static const struct net_device_ops slic_netdev_ops = { - .ndo_open = slic_entry_open, - .ndo_stop = slic_entry_halt, - .ndo_start_xmit = slic_xmit_start, - .ndo_do_ioctl = slic_ioctl, - .ndo_set_mac_address = slic_mac_set_address, - .ndo_get_stats = slic_get_stats, - .ndo_set_rx_mode = slic_mcast_set_list, - .ndo_validate_addr = eth_validate_addr, - .ndo_change_mtu = eth_change_mtu, -}; - -static u32 slic_card_locate(struct adapter *adapter) -{ - struct sliccard *card = slic_global.slic_card; - struct physcard *physcard = slic_global.phys_card; - ushort card_hostid; - uint i; - - card_hostid = slic_read32(adapter, SLIC_REG_HOSTID); - - /* Initialize a new card structure if need be */ - if (card_hostid == SLIC_HOSTID_DEFAULT) { - card = kzalloc(sizeof(*card), GFP_KERNEL); - if (!card) - return -ENOMEM; - - card->next = slic_global.slic_card; - slic_global.slic_card = card; - card->busnumber = adapter->busnumber; - card->slotnumber = adapter->slotnumber; - - /* Find an available cardnum */ - for (i = 0; i < SLIC_MAX_CARDS; i++) { - if (slic_global.cardnuminuse[i] == 0) { - slic_global.cardnuminuse[i] = 1; - card->cardnum = i; - break; - } - } - slic_global.num_slic_cards++; - } else { - /* Card exists, find the card this adapter belongs to */ - while (card) { - if (card->cardnum == card_hostid) - break; - card = card->next; - } - } - - if (!card) - return -ENXIO; - /* Put the adapter in the card's adapter list */ - if (!card->adapter[adapter->port]) { - card->adapter[adapter->port] = adapter; - adapter->card = card; - } - - card->card_size = 1; /* one port per *logical* card */ - - while (physcard) { - for (i = 0; i < SLIC_MAX_PORTS; i++) { - if (physcard->adapter[i]) - break; - } - if (i == SLIC_MAX_PORTS) - break; - - if (physcard->adapter[i]->slotnumber == adapter->slotnumber) - break; - physcard = physcard->next; - } - if (!physcard) { - /* no structure allocated for this physical card yet */ - physcard = kzalloc(sizeof(*physcard), GFP_ATOMIC); - if (!physcard) { - if (card_hostid == SLIC_HOSTID_DEFAULT) - kfree(card); - return -ENOMEM; - } - - physcard->next = slic_global.phys_card; - slic_global.phys_card = physcard; - physcard->adapters_allocd = 1; - } else { - physcard->adapters_allocd++; - } - /* Note - this is ZERO relative */ - adapter->physport = physcard->adapters_allocd - 1; - - physcard->adapter[adapter->physport] = adapter; - adapter->physcard = physcard; - - return 0; -} - -static int slic_entry_probe(struct pci_dev *pcidev, - const struct pci_device_id *pci_tbl_entry) -{ - static int cards_found; - static int did_version; - int err = -ENODEV; - struct net_device *netdev; - struct adapter *adapter; - void __iomem *memmapped_ioaddr = NULL; - ulong mmio_start = 0; - ulong mmio_len = 0; - struct sliccard *card = NULL; - int pci_using_dac = 0; - - err = pci_enable_device(pcidev); - - if (err) - return err; - - if (did_version++ == 0) { - dev_info(&pcidev->dev, "%s\n", slic_banner); - dev_info(&pcidev->dev, "%s\n", slic_proc_version); - } - - if (!pci_set_dma_mask(pcidev, DMA_BIT_MASK(64))) { - pci_using_dac = 1; - err = pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(64)); - if (err) { - dev_err(&pcidev->dev, "unable to obtain 64-bit DMA for consistent allocations\n"); - goto err_out_disable_pci; - } - } else { - err = pci_set_dma_mask(pcidev, DMA_BIT_MASK(32)); - if (err) { - dev_err(&pcidev->dev, "no usable DMA configuration\n"); - goto err_out_disable_pci; - } - pci_using_dac = 0; - pci_set_consistent_dma_mask(pcidev, DMA_BIT_MASK(32)); - } - - err = pci_request_regions(pcidev, DRV_NAME); - if (err) { - dev_err(&pcidev->dev, "can't obtain PCI resources\n"); - goto err_out_disable_pci; - } - - pci_set_master(pcidev); - - netdev = alloc_etherdev(sizeof(struct adapter)); - if (!netdev) { - err = -ENOMEM; - goto err_out_exit_slic_probe; - } - - netdev->ethtool_ops = &slic_ethtool_ops; - SET_NETDEV_DEV(netdev, &pcidev->dev); - - pci_set_drvdata(pcidev, netdev); - adapter = netdev_priv(netdev); - adapter->netdev = netdev; - adapter->pcidev = pcidev; - slic_global.dynamic_intagg = adapter->dynamic_intagg; - if (pci_using_dac) - netdev->features |= NETIF_F_HIGHDMA; - - mmio_start = pci_resource_start(pcidev, 0); - mmio_len = pci_resource_len(pcidev, 0); - - memmapped_ioaddr = ioremap_nocache(mmio_start, mmio_len); - if (!memmapped_ioaddr) { - dev_err(&pcidev->dev, "cannot remap MMIO region %lx @ %lx\n", - mmio_len, mmio_start); - err = -ENOMEM; - goto err_out_free_netdev; - } - - slic_config_pci(pcidev); - - slic_init_driver(); - - err = slic_init_adapter(netdev, pcidev, pci_tbl_entry, memmapped_ioaddr, - cards_found); - if (err) { - dev_err(&pcidev->dev, "failed to init adapter: %i\n", err); - goto err_out_unmap; - } - - err = slic_card_locate(adapter); - if (err) { - dev_err(&pcidev->dev, "cannot locate card\n"); - goto err_clean_init; - } - - card = adapter->card; - - if (!adapter->allocated) { - card->adapters_allocated++; - adapter->allocated = 1; - } - - err = slic_card_init(card, adapter); - if (err) - goto err_clean_init; - - slic_adapter_set_hwaddr(adapter); - - netdev->base_addr = (unsigned long)memmapped_ioaddr; - netdev->irq = adapter->irq; - netdev->netdev_ops = &slic_netdev_ops; - - netif_carrier_off(netdev); - - strcpy(netdev->name, "eth%d"); - err = register_netdev(netdev); - if (err) { - dev_err(&pcidev->dev, "Cannot register net device, aborting.\n"); - goto err_clean_init; - } - - cards_found++; - - return 0; - -err_clean_init: - slic_init_cleanup(adapter); -err_out_unmap: - iounmap(memmapped_ioaddr); -err_out_free_netdev: - free_netdev(netdev); -err_out_exit_slic_probe: - pci_release_regions(pcidev); -err_out_disable_pci: - pci_disable_device(pcidev); - return err; -} - -static struct pci_driver slic_driver = { - .name = DRV_NAME, - .id_table = slic_pci_tbl, - .probe = slic_entry_probe, - .remove = slic_entry_remove, -}; - -static int __init slic_module_init(void) -{ - slic_init_driver(); - - return pci_register_driver(&slic_driver); -} - -static void __exit slic_module_cleanup(void) -{ - pci_unregister_driver(&slic_driver); -} - -static const struct ethtool_ops slic_ethtool_ops = { - .get_coalesce = slic_get_coalesce, - .set_coalesce = slic_set_coalesce -}; - -module_init(slic_module_init); -module_exit(slic_module_cleanup); -- cgit v1.2.3