From 6b81c427c08c572ef9e4f20024e71eacbb1a70b6 Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Wed, 2 Jan 2013 15:53:50 -0800 Subject: ARM: DT: tegra: Add board level compatible properties The compatible properties of Tegra SoC based boards or machines need to be documented. This patch adds these board levle compatible properties into device tree binding document. Signed-off-by: Bryan Wu Signed-off-by: Stephen Warren --- Documentation/devicetree/bindings/arm/tegra.txt | 29 ++++++++++++++++++++----- 1 file changed, 23 insertions(+), 6 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt index 6e69d2e5e766..665c54d6112e 100644 --- a/Documentation/devicetree/bindings/arm/tegra.txt +++ b/Documentation/devicetree/bindings/arm/tegra.txt @@ -1,14 +1,31 @@ NVIDIA Tegra device tree bindings ------------------------------------------- -Boards with the tegra20 SoC shall have the following properties: +SoCs +------------------------------------------- -Required root node property: +Each device tree must specify which Tegra SoC it uses, using one of the +following compatible values: -compatible = "nvidia,tegra20"; + nvidia,tegra20 + nvidia,tegra30 -Boards with the tegra30 SoC shall have the following properties: +Boards +------------------------------------------- -Required root node property: +Each device tree must specify which one or more of the following +board-specific compatible values: -compatible = "nvidia,tegra30"; + ad,medcom-wide + ad,plutux + ad,tamonten + ad,tec + compal,paz00 + compulab,trimslice + nvidia,cardhu + nvidia,cardhu-a02 + nvidia,cardhu-a04 + nvidia,harmony + nvidia,seaboard + nvidia,ventana + nvidia,whistler -- cgit v1.2.3 From d7df69fe256587c5f78961c4d69a95d4a5b12c71 Mon Sep 17 00:00:00 2001 From: Bryan Wu Date: Wed, 2 Jan 2013 15:53:51 -0800 Subject: ARM: DT: tegra: Add Tegra30 Beaver board support This patch adds support for Tegra30 Beaver board in upstream kernel. Beaver board is a Tegra30 SoC based development board, it has following features: - T30 or T33 SoC (Qual core ARM Cortex A9) - 2 GB DDR3L - 16 GB EMMC - 1 SD slot - 1 USB Standart A port and 1 USB micro AB port - PCI-E Gig Ethernet - Audio input/output - SATA port - HDMI output - UART and JTAG Signed-off-by: Bryan Wu Signed-off-by: Stephen Warren --- Documentation/devicetree/bindings/arm/tegra.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/tegra30-beaver.dts | 374 ++++++++++++++++++++++++ 3 files changed, 376 insertions(+) create mode 100644 arch/arm/boot/dts/tegra30-beaver.dts (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt index 665c54d6112e..a5d33534285e 100644 --- a/Documentation/devicetree/bindings/arm/tegra.txt +++ b/Documentation/devicetree/bindings/arm/tegra.txt @@ -22,6 +22,7 @@ board-specific compatible values: ad,tec compal,paz00 compulab,trimslice + nvidia,beaver nvidia,cardhu nvidia,cardhu-a02 nvidia,cardhu-a04 diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index b53f18f8d5d9..6854c1bff199 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -142,6 +142,7 @@ dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ tegra20-trimslice.dtb \ tegra20-ventana.dtb \ tegra20-whistler.dtb \ + tegra30-beaver.dtb \ tegra30-cardhu-a02.dtb \ tegra30-cardhu-a04.dtb \ tegra114-dalmore.dtb \ diff --git a/arch/arm/boot/dts/tegra30-beaver.dts b/arch/arm/boot/dts/tegra30-beaver.dts new file mode 100644 index 000000000000..0f296a439eac --- /dev/null +++ b/arch/arm/boot/dts/tegra30-beaver.dts @@ -0,0 +1,374 @@ +/dts-v1/; + +/include/ "tegra30.dtsi" + +/ { + model = "NVIDIA Tegra30 Beaver evaluation board"; + compatible = "nvidia,beaver", "nvidia,tegra30"; + + memory { + reg = <0x80000000 0x80000000>; + }; + + pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + sdmmc1_clk_pz0 { + nvidia,pins = "sdmmc1_clk_pz0"; + nvidia,function = "sdmmc1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + sdmmc1_cmd_pz1 { + nvidia,pins = "sdmmc1_cmd_pz1", + "sdmmc1_dat0_py7", + "sdmmc1_dat1_py6", + "sdmmc1_dat2_py5", + "sdmmc1_dat3_py4"; + nvidia,function = "sdmmc1"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + }; + sdmmc3_clk_pa6 { + nvidia,pins = "sdmmc3_clk_pa6"; + nvidia,function = "sdmmc3"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + sdmmc3_cmd_pa7 { + nvidia,pins = "sdmmc3_cmd_pa7", + "sdmmc3_dat0_pb7", + "sdmmc3_dat1_pb6", + "sdmmc3_dat2_pb5", + "sdmmc3_dat3_pb4"; + nvidia,function = "sdmmc3"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + }; + sdmmc4_clk_pcc4 { + nvidia,pins = "sdmmc4_clk_pcc4", + "sdmmc4_rst_n_pcc3"; + nvidia,function = "sdmmc4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + sdmmc4_dat0_paa0 { + nvidia,pins = "sdmmc4_dat0_paa0", + "sdmmc4_dat1_paa1", + "sdmmc4_dat2_paa2", + "sdmmc4_dat3_paa3", + "sdmmc4_dat4_paa4", + "sdmmc4_dat5_paa5", + "sdmmc4_dat6_paa6", + "sdmmc4_dat7_paa7"; + nvidia,function = "sdmmc4"; + nvidia,pull = <2>; + nvidia,tristate = <0>; + }; + dap2_fs_pa2 { + nvidia,pins = "dap2_fs_pa2", + "dap2_sclk_pa3", + "dap2_din_pa4", + "dap2_dout_pa5"; + nvidia,function = "i2s1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + sdio3 { + nvidia,pins = "drive_sdio3"; + nvidia,high-speed-mode = <0>; + nvidia,schmitt = <0>; + nvidia,pull-down-strength = <46>; + nvidia,pull-up-strength = <42>; + nvidia,slew-rate-rising = <1>; + nvidia,slew-rate-falling = <1>; + }; + }; + }; + + serial@70006000 { + status = "okay"; + clock-frequency = <408000000>; + }; + + i2c@7000c000 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c400 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c500 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000c700 { + status = "okay"; + clock-frequency = <100000>; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <100000>; + + tps62361 { + compatible = "ti,tps62361"; + reg = <0x60>; + + regulator-name = "tps62361-vout"; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <1500000>; + regulator-boot-on; + regulator-always-on; + ti,vsel0-state-high; + ti,vsel1-state-high; + }; + + pmic: tps65911@2d { + compatible = "ti,tps65911"; + reg = <0x2d>; + + interrupts = <0 86 0x4>; + #interrupt-cells = <2>; + interrupt-controller; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + vcc1-supply = <&vdd_5v_in_reg>; + vcc2-supply = <&vdd_5v_in_reg>; + vcc3-supply = <&vio_reg>; + vcc4-supply = <&vdd_5v_in_reg>; + vcc5-supply = <&vdd_5v_in_reg>; + vcc6-supply = <&vdd2_reg>; + vcc7-supply = <&vdd_5v_in_reg>; + vccio-supply = <&vdd_5v_in_reg>; + + regulators { + #address-cells = <1>; + #size-cells = <0>; + + vdd1_reg: vdd1 { + regulator-name = "vddio_ddr_1v2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + vdd2_reg: vdd2 { + regulator-name = "vdd_1v5_gen"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + }; + + vddctrl_reg: vddctrl { + regulator-name = "vdd_cpu,vdd_sys"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + + vio_reg: vio { + regulator-name = "vdd_1v8_gen"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo1_reg: ldo1 { + regulator-name = "vdd_pexa,vdd_pexb"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + ldo2_reg: ldo2 { + regulator-name = "vdd_sata,avdd_plle"; + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1050000>; + }; + + /* LDO3 is not connected to anything */ + + ldo4_reg: ldo4 { + regulator-name = "vdd_rtc"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + ldo5_reg: ldo5 { + regulator-name = "vddio_sdmmc,avdd_vdac"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + ldo6_reg: ldo6 { + regulator-name = "avdd_dsi_csi,pwrdet_mipi"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + ldo7_reg: ldo7 { + regulator-name = "vdd_pllm,x,u,a_p_c_s"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-always-on; + }; + + ldo8_reg: ldo8 { + regulator-name = "vdd_ddr_hs"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + }; + }; + }; + }; + + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + spi-flash@1 { + compatible = "winbond,w25q32"; + reg = <1>; + spi-max-frequency = <20000000>; + }; + }; + + ahub { + i2s@70080400 { + status = "okay"; + }; + }; + + pmc { + status = "okay"; + nvidia,invert-interrupt; + }; + + sdhci@78000000 { + status = "okay"; + cd-gpios = <&gpio 69 0>; /* gpio PI5 */ + wp-gpios = <&gpio 155 0>; /* gpio PT3 */ + power-gpios = <&gpio 31 0>; /* gpio PD7 */ + bus-width = <4>; + }; + + sdhci@78000600 { + status = "okay"; + bus-width = <8>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + vdd_5v_in_reg: regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "vdd_5v_in"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + chargepump_5v_reg: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "chargepump_5v"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + enable-active-high; + gpio = <&pmic 0 0>; /* PMIC TPS65911 GPIO0 */ + }; + + ddr_reg: regulator@2 { + compatible = "regulator-fixed"; + reg = <2>; + regulator-name = "vdd_ddr"; + regulator-min-microvolt = <1500000>; + regulator-max-microvolt = <1500000>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&pmic 7 0>; /* PMIC TPS65911 GPIO7 */ + vin-supply = <&vdd_5v_in_reg>; + }; + + vdd_5v_sata_reg: regulator@3 { + compatible = "regulator-fixed"; + reg = <3>; + regulator-name = "vdd_5v_sata"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio 30 0>; /* gpio PD6 */ + vin-supply = <&vdd_5v_in_reg>; + }; + + usb1_vbus_reg: regulator@4 { + compatible = "regulator-fixed"; + reg = <4>; + regulator-name = "usb1_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio 68 0>; /* GPIO PI4 */ + gpio-open-drain; + vin-supply = <&vdd_5v_in_reg>; + }; + + usb3_vbus_reg: regulator@5 { + compatible = "regulator-fixed"; + reg = <5>; + regulator-name = "usb3_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio 63 0>; /* GPIO PH7 */ + gpio-open-drain; + vin-supply = <&vdd_5v_in_reg>; + }; + + sys_3v3_reg: regulator@6 { + compatible = "regulator-fixed"; + reg = <6>; + regulator-name = "sys_3v3,vdd_3v3_alw"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&pmic 6 0>; /* PMIC TPS65911 GPIO6 */ + vin-supply = <&vdd_5v_in_reg>; + }; + + sys_3v3_pexs_reg: regulator@7 { + compatible = "regulator-fixed"; + reg = <7>; + regulator-name = "sys_3v3_pexs"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + enable-active-high; + gpio = <&gpio 95 0>; /* gpio PL7 */ + vin-supply = <&sys_3v3_reg>; + }; + }; +}; -- cgit v1.2.3 From fc9c713a62e2e456418079e747572170997bc3b4 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 22 Jan 2013 22:46:08 +0100 Subject: ARM: tegra: Add Colibri T20 512MB COM device tree This adds the device tree include file for the Toradex Colibri T20 Computer on Module (COM). It's only valid for the 512MB RAM version of the module, as the 256MB version needs different EMC tables and flash configuration. To make this clear the suffix -512 was added to the board compatible string. The Colibri T20 uses a Tegra20 SoC and has onboard USB Ethernet and AC97 sound. Still some things like onboard NAND support missing, but should be a good base for further development. Signed-off-by: Lucas Stach Signed-off-by: Stephen Warren --- Documentation/devicetree/bindings/arm/tegra.txt | 1 + arch/arm/boot/dts/tegra20-colibri-512.dtsi | 491 ++++++++++++++++++++++++ 2 files changed, 492 insertions(+) create mode 100644 arch/arm/boot/dts/tegra20-colibri-512.dtsi (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt index a5d33534285e..ccd4ef4b10c1 100644 --- a/Documentation/devicetree/bindings/arm/tegra.txt +++ b/Documentation/devicetree/bindings/arm/tegra.txt @@ -30,3 +30,4 @@ board-specific compatible values: nvidia,seaboard nvidia,ventana nvidia,whistler + toradex,colibri_t20-512 diff --git a/arch/arm/boot/dts/tegra20-colibri-512.dtsi b/arch/arm/boot/dts/tegra20-colibri-512.dtsi new file mode 100644 index 000000000000..444162090042 --- /dev/null +++ b/arch/arm/boot/dts/tegra20-colibri-512.dtsi @@ -0,0 +1,491 @@ +/include/ "tegra20.dtsi" + +/ { + model = "Toradex Colibri T20 512MB"; + compatible = "toradex,colibri_t20-512", "nvidia,tegra20"; + + memory { + reg = <0x00000000 0x20000000>; + }; + + host1x { + hdmi { + vdd-supply = <&hdmi_vdd_reg>; + pll-supply = <&hdmi_pll_reg>; + + nvidia,ddc-i2c-bus = <&i2c_ddc>; + nvidia,hpd-gpio = <&gpio 111 0>; /* PN7 */ + }; + }; + + pinmux { + pinctrl-names = "default"; + pinctrl-0 = <&state_default>; + + state_default: pinmux { + audio_refclk { + nvidia,pins = "cdev1"; + nvidia,function = "plla_out"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + crt { + nvidia,pins = "crtp"; + nvidia,function = "crt"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + dap3 { + nvidia,pins = "dap3"; + nvidia,function = "dap3"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + displaya { + nvidia,pins = "ld0", "ld1", "ld2", "ld3", + "ld4", "ld5", "ld6", "ld7", "ld8", + "ld9", "ld10", "ld11", "ld12", "ld13", + "ld14", "ld15", "ld16", "ld17", + "lhs", "lpw0", "lpw2", "lsc0", + "lsc1", "lsck", "lsda", "lspi", "lvs"; + nvidia,function = "displaya"; + nvidia,tristate = <1>; + }; + gpio_dte { + nvidia,pins = "dte"; + nvidia,function = "rsvd1"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + gpio_gmi { + nvidia,pins = "ata", "atc", "atd", "ate", + "dap1", "dap2", "dap4", "gpu", "irrx", + "irtx", "spia", "spib", "spic"; + nvidia,function = "gmi"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + gpio_pta { + nvidia,pins = "pta"; + nvidia,function = "rsvd4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + gpio_uac { + nvidia,pins = "uac"; + nvidia,function = "rsvd2"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + hdint { + nvidia,pins = "hdint"; + nvidia,function = "hdmi"; + nvidia,tristate = <1>; + }; + i2c1 { + nvidia,pins = "rm"; + nvidia,function = "i2c1"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + i2c3 { + nvidia,pins = "dtf"; + nvidia,function = "i2c3"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + i2cddc { + nvidia,pins = "ddc"; + nvidia,function = "i2c2"; + nvidia,pull = <2>; + nvidia,tristate = <1>; + }; + i2cp { + nvidia,pins = "i2cp"; + nvidia,function = "i2cp"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + irda { + nvidia,pins = "uad"; + nvidia,function = "irda"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + nand { + nvidia,pins = "kbca", "kbcc", "kbcd", + "kbce", "kbcf"; + nvidia,function = "nand"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + owc { + nvidia,pins = "owc"; + nvidia,function = "owr"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + pmc { + nvidia,pins = "pmc"; + nvidia,function = "pwr_on"; + nvidia,tristate = <0>; + }; + pwm { + nvidia,pins = "sdb", "sdc", "sdd"; + nvidia,function = "pwm"; + nvidia,tristate = <1>; + }; + sdio4 { + nvidia,pins = "atb", "gma", "gme"; + nvidia,function = "sdio4"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + spi1 { + nvidia,pins = "spid", "spie", "spif"; + nvidia,function = "spi1"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + spi4 { + nvidia,pins = "slxa", "slxc", "slxd", "slxk"; + nvidia,function = "spi4"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + uarta { + nvidia,pins = "sdio1"; + nvidia,function = "uarta"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + uartd { + nvidia,pins = "gmc"; + nvidia,function = "uartd"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + ulpi { + nvidia,pins = "uaa", "uab", "uda"; + nvidia,function = "ulpi"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + ulpi_refclk { + nvidia,pins = "cdev2"; + nvidia,function = "pllp_out4"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + usb_gpio { + nvidia,pins = "spig", "spih"; + nvidia,function = "spi2_alt"; + nvidia,pull = <0>; + nvidia,tristate = <0>; + }; + vi { + nvidia,pins = "dta", "dtb", "dtc", "dtd"; + nvidia,function = "vi"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + vi_sc { + nvidia,pins = "csus"; + nvidia,function = "vi_sensor_clk"; + nvidia,pull = <0>; + nvidia,tristate = <1>; + }; + }; + }; + + i2c@7000c000 { + clock-frequency = <400000>; + }; + + i2c_ddc: i2c@7000c400 { + clock-frequency = <100000>; + }; + + i2c@7000c500 { + clock-frequency = <400000>; + }; + + i2c@7000d000 { + status = "okay"; + clock-frequency = <400000>; + + pmic: tps6586x@34 { + compatible = "ti,tps6586x"; + reg = <0x34>; + interrupts = <0 86 0x4>; + + ti,system-power-controller; + + #gpio-cells = <2>; + gpio-controller; + + sys-supply = <&vdd_5v0_reg>; + vin-sm0-supply = <&sys_reg>; + vin-sm1-supply = <&sys_reg>; + vin-sm2-supply = <&sys_reg>; + vinldo01-supply = <&sm2_reg>; + vinldo23-supply = <&sm2_reg>; + vinldo4-supply = <&sm2_reg>; + vinldo678-supply = <&sm2_reg>; + vinldo9-supply = <&sm2_reg>; + + regulators { + #address-cells = <1>; + #size-cells = <0>; + + sys_reg: regulator@0 { + reg = <0>; + regulator-compatible = "sys"; + regulator-name = "vdd_sys"; + regulator-always-on; + }; + + regulator@1 { + reg = <1>; + regulator-compatible = "sm0"; + regulator-name = "vdd_sm0,vdd_core"; + regulator-min-microvolt = <1275000>; + regulator-max-microvolt = <1275000>; + regulator-always-on; + }; + + regulator@2 { + reg = <2>; + regulator-compatible = "sm1"; + regulator-name = "vdd_sm1,vdd_cpu"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + sm2_reg: regulator@3 { + reg = <3>; + regulator-compatible = "sm2"; + regulator-name = "vdd_sm2,vin_ldo*"; + regulator-min-microvolt = <3700000>; + regulator-max-microvolt = <3700000>; + regulator-always-on; + }; + + /* LDO0 is not connected to anything */ + + regulator@5 { + reg = <5>; + regulator-compatible = "ldo1"; + regulator-name = "vdd_ldo1,avdd_pll*"; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + regulator-always-on; + }; + + regulator@6 { + reg = <6>; + regulator-compatible = "ldo2"; + regulator-name = "vdd_ldo2,vdd_rtc"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + }; + + /* LDO3 is not connected to anything */ + + regulator@8 { + reg = <8>; + regulator-compatible = "ldo4"; + regulator-name = "vdd_ldo4,avdd_osc,vddio_sys"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + }; + + ldo5_reg: regulator@9 { + reg = <9>; + regulator-compatible = "ldo5"; + regulator-name = "vdd_ldo5,vdd_fuse"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + + regulator@10 { + reg = <10>; + regulator-compatible = "ldo6"; + regulator-name = "vdd_ldo6,avdd_vdac,vddio_vi,vddio_cam"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + hdmi_vdd_reg: regulator@11 { + reg = <11>; + regulator-compatible = "ldo7"; + regulator-name = "vdd_ldo7,avdd_hdmi"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + hdmi_pll_reg: regulator@12 { + reg = <12>; + regulator-compatible = "ldo8"; + regulator-name = "vdd_ldo8,avdd_hdmi_pll"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + }; + + regulator@13 { + reg = <13>; + regulator-compatible = "ldo9"; + regulator-name = "vdd_ldo9,avdd_2v85,vdd_ddr_rx"; + regulator-min-microvolt = <2850000>; + regulator-max-microvolt = <2850000>; + regulator-always-on; + }; + + regulator@14 { + reg = <14>; + regulator-compatible = "ldo_rtc"; + regulator-name = "vdd_rtc_out,vdd_cell"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + }; + }; + }; + + temperature-sensor@4c { + compatible = "national,lm95245"; + reg = <0x4c>; + }; + }; + + memory-controller@7000f400 { + emc-table@83250 { + reg = <83250>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <83250>; + nvidia,emc-registers = <0x00000005 0x00000011 + 0x00000004 0x00000002 0x00000004 0x00000004 + 0x00000001 0x0000000a 0x00000002 0x00000002 + 0x00000001 0x00000001 0x00000003 0x00000004 + 0x00000003 0x00000009 0x0000000c 0x0000025f + 0x00000000 0x00000003 0x00000003 0x00000002 + 0x00000002 0x00000001 0x00000008 0x000000c8 + 0x00000003 0x00000005 0x00000003 0x0000000c + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0x00520006 + 0x00000010 0x00000008 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; + emc-table@133200 { + reg = <133200>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <133200>; + nvidia,emc-registers = <0x00000008 0x00000019 + 0x00000006 0x00000002 0x00000004 0x00000004 + 0x00000001 0x0000000a 0x00000002 0x00000002 + 0x00000002 0x00000001 0x00000003 0x00000004 + 0x00000003 0x00000009 0x0000000c 0x0000039f + 0x00000000 0x00000003 0x00000003 0x00000002 + 0x00000002 0x00000001 0x00000008 0x000000c8 + 0x00000003 0x00000007 0x00000003 0x0000000c + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0x00510006 + 0x00000010 0x00000008 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; + emc-table@166500 { + reg = <166500>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <166500>; + nvidia,emc-registers = <0x0000000a 0x00000021 + 0x00000008 0x00000003 0x00000004 0x00000004 + 0x00000002 0x0000000a 0x00000003 0x00000003 + 0x00000002 0x00000001 0x00000003 0x00000004 + 0x00000003 0x00000009 0x0000000c 0x000004df + 0x00000000 0x00000003 0x00000003 0x00000003 + 0x00000003 0x00000001 0x00000009 0x000000c8 + 0x00000003 0x00000009 0x00000004 0x0000000c + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0x004f0006 + 0x00000010 0x00000008 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; + emc-table@333000 { + reg = <333000>; + compatible = "nvidia,tegra20-emc-table"; + clock-frequency = <333000>; + nvidia,emc-registers = <0x00000014 0x00000041 + 0x0000000f 0x00000005 0x00000004 0x00000005 + 0x00000003 0x0000000a 0x00000005 0x00000005 + 0x00000004 0x00000001 0x00000003 0x00000004 + 0x00000003 0x00000009 0x0000000c 0x000009ff + 0x00000000 0x00000003 0x00000003 0x00000005 + 0x00000005 0x00000001 0x0000000e 0x000000c8 + 0x00000003 0x00000011 0x00000006 0x0000000c + 0x00000002 0x00000000 0x00000000 0x00000002 + 0x00000000 0x00000000 0x00000083 0x00380006 + 0x00000010 0x00000008 0x00000000 0x00000000 + 0x00000000 0x00000000 0x00000000 0x00000000>; + }; + }; + + ac97: ac97 { + status = "okay"; + nvidia,codec-reset-gpio = <&gpio 168 0>; /* gpio PV0 */ + nvidia,codec-sync-gpio = <&gpio 120 0>; /* gpio PP0 */ + }; + + usb@c5004000 { + status = "okay"; + nvidia,phy-reset-gpio = <&gpio 169 0>; /* gpio PV1 */ + }; + + sdhci@c8000600 { + cd-gpios = <&gpio 23 0>; /* gpio PC7 */ + }; + + sound { + compatible = "nvidia,tegra-audio-wm9712-colibri_t20", + "nvidia,tegra-audio-wm9712"; + nvidia,model = "Colibri T20 AC97 Audio"; + + nvidia,audio-routing = + "Headphone", "HPOUTL", + "Headphone", "HPOUTR", + "LineIn", "LINEINL", + "LineIn", "LINEINR", + "Mic", "MIC1"; + + nvidia,ac97-controller = <&ac97>; + }; + + regulators { + compatible = "simple-bus"; + #address-cells = <1>; + #size-cells = <0>; + + vdd_5v0_reg: regulator@100 { + compatible = "regulator-fixed"; + reg = <100>; + regulator-name = "vdd_5v0"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-always-on; + }; + + regulator@101 { + compatible = "regulator-fixed"; + reg = <101>; + regulator-name = "internal_usb"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + regulator-boot-on; + regulator-always-on; + gpio = <&gpio 217 0>; + }; + }; +}; -- cgit v1.2.3 From bf5fcc76d31418950b214542440d5de6e48c7998 Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Tue, 22 Jan 2013 22:46:09 +0100 Subject: ARM: tegra: Add Toradex Iris carrier board DT with T20 512MB COM This adds the device tree for the Toradex Iris carrier board used together with a Colibri T20 512MB COM. The Iris has the following features, in brackets the current status: - DVI and VGA output through DVI-I connector (DVI-D enabled and tested) - LVDS output - 1 USB host port (enabled and tested) - 1 USB OTG port (enabled) - 100 MBit Ethernet (enabled and tested) - 5 UART ports (2 on 10way headers enabled and tested) - 1 MicroSD Slot (enabled and tested) - Audio connectors (enabled, only HP out and Line-in tested) - i2c RTC - GPIO connector (enabled, only sparsely tested) - external i2c bus - 4 PWM out - analog in Signed-off-by: Lucas Stach Signed-off-by: Stephen Warren --- Documentation/devicetree/bindings/arm/tegra.txt | 1 + arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/tegra20-iris-512.dts | 89 +++++++++++++++++++++++++ 3 files changed, 91 insertions(+) create mode 100644 arch/arm/boot/dts/tegra20-iris-512.dts (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/tegra.txt b/Documentation/devicetree/bindings/arm/tegra.txt index ccd4ef4b10c1..ed9c85334436 100644 --- a/Documentation/devicetree/bindings/arm/tegra.txt +++ b/Documentation/devicetree/bindings/arm/tegra.txt @@ -31,3 +31,4 @@ board-specific compatible values: nvidia,ventana nvidia,whistler toradex,colibri_t20-512 + toradex,iris diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 6854c1bff199..a919e80876fb 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -134,6 +134,7 @@ dtb-$(CONFIG_ARCH_SPEAR6XX)+= spear600-evb.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun4i-a10-cubieboard.dtb \ sun5i-a13-olinuxino.dtb dtb-$(CONFIG_ARCH_TEGRA) += tegra20-harmony.dtb \ + tegra20-iris-512.dtb \ tegra20-medcom-wide.dtb \ tegra20-paz00.dtb \ tegra20-plutux.dtb \ diff --git a/arch/arm/boot/dts/tegra20-iris-512.dts b/arch/arm/boot/dts/tegra20-iris-512.dts new file mode 100644 index 000000000000..52f1103907d7 --- /dev/null +++ b/arch/arm/boot/dts/tegra20-iris-512.dts @@ -0,0 +1,89 @@ +/dts-v1/; + +/include/ "tegra20-colibri-512.dtsi" + +/ { + model = "Toradex Colibri T20 512MB on Iris"; + compatible = "toradex,iris", "toradex,colibri_t20-512", "nvidia,tegra20"; + + host1x { + hdmi { + status = "okay"; + }; + }; + + pinmux { + state_default: pinmux { + hdint { + nvidia,tristate = <0>; + }; + + i2cddc { + nvidia,tristate = <0>; + }; + + sdio4 { + nvidia,tristate = <0>; + }; + + uarta { + nvidia,tristate = <0>; + }; + + uartd { + nvidia,tristate = <0>; + }; + }; + }; + + usb@c5000000 { + status = "okay"; + dr_mode = "otg"; + }; + + usb@c5008000 { + status = "okay"; + }; + + serial@70006000 { + status = "okay"; + }; + + serial@70006300 { + status = "okay"; + }; + + i2c_ddc: i2c@7000c400 { + status = "okay"; + }; + + sdhci@c8000600 { + status = "okay"; + bus-width = <4>; + vmmc-supply = <&vcc_sd_reg>; + vqmmc-supply = <&vcc_sd_reg>; + }; + + regulators { + regulator@0 { + compatible = "regulator-fixed"; + reg = <0>; + regulator-name = "usb_host_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + regulator-boot-on; + regulator-always-on; + gpio = <&gpio 178 0>; + }; + + vcc_sd_reg: regulator@1 { + compatible = "regulator-fixed"; + reg = <1>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-boot-on; + regulator-always-on; + }; + }; +}; -- cgit v1.2.3 From f8635abd38776a413d1e84c79353693b8ecf45c9 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 5 Jan 2013 00:29:31 +0100 Subject: ARM: nomadik: initial devicetree support Support basic device tree boot on the Nomadik. Implement the support in the cpu file with the intent of deleting the board files later. At this stage IRQ controllers, system timer, l2x0 cache, UARTs and thus console boot is fully functional. Patch out the code adding devices by initcalls for now so as not to disturb the boot. Signed-off-by: Linus Walleij --- .../devicetree/bindings/arm/ste-nomadik.txt | 19 +++++ arch/arm/boot/dts/Makefile | 1 + arch/arm/boot/dts/ste-nomadik-s8815.dts | 20 ++++++ arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 80 ++++++++++++++++++++++ arch/arm/mach-nomadik/board-nhk8815.c | 4 ++ arch/arm/mach-nomadik/cpu-8815.c | 78 ++++++++++++++++++++- arch/arm/mach-nomadik/cpu-8815.h | 1 + arch/arm/mach-nomadik/i2c-8815nhk.c | 5 ++ 8 files changed, 207 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/arm/ste-nomadik.txt create mode 100644 arch/arm/boot/dts/ste-nomadik-s8815.dts create mode 100644 arch/arm/boot/dts/ste-nomadik-stn8815.dtsi (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/ste-nomadik.txt b/Documentation/devicetree/bindings/arm/ste-nomadik.txt new file mode 100644 index 000000000000..23f32bddebf9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/ste-nomadik.txt @@ -0,0 +1,19 @@ +ST-Ericsson Nomadik Device Tree Bindings + +For various board the "board" node may contain specific properties +that pertain to this particular board, such as board-specific GPIOs. + +Boards with the Nomadik SoC include: + +S8815 "MiniKit" manufactured by Calao Systems: + +Required root node property: + +compatible="calaosystems,usb-s8815"; + +Required node: usb-s8815 + +Example: + +usb-s8815 { +}; diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index e44da40d984f..7bc5ba738041 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -100,6 +100,7 @@ dtb-$(CONFIG_ARCH_MXS) += imx23-evk.dtb \ imx28-m28evk.dtb \ imx28-sps1.dtb \ imx28-tx28.dtb +dtb-$(CONFIG_ARCH_NOMADIK) += ste-nomadik-s8815.dtb dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \ omap3-beagle.dtb \ omap3-beagle-xm.dtb \ diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts new file mode 100644 index 000000000000..97b7d1df5aaa --- /dev/null +++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts @@ -0,0 +1,20 @@ +/* + * Device Tree for the ST-Ericsson Nomadik S8815 board + * Produced by Calao Systems + */ + +/dts-v1/; +/include/ "ste-nomadik-stn8815.dtsi" + +/ { + model = "Calao Systems USB-S8815"; + compatible = "calaosystems,usb-s8815"; + + chosen { + bootargs = "root=/dev/ram0 console=ttyAMA1,115200n8 earlyprintk"; + }; + + /* Custom board node with GPIO pins to active etc */ + usb-s8815 { + }; +}; diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi new file mode 100644 index 000000000000..0a5b670430de --- /dev/null +++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi @@ -0,0 +1,80 @@ +/* + * Device Tree for the ST-Ericsson Nomadik 8815 STn8815 SoC + */ +/include/ "skeleton.dtsi" + +/ { + #address-cells = <1>; + #size-cells = <1>; + + memory { + reg = <0x00000000 0x04000000>, + <0x08000000 0x04000000>; + }; + + L2: l2-cache { + compatible = "arm,l210-cache"; + reg = <0x10210000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <30>; + cache-unified; + cache-level = <2>; + }; + + mtu0 { + /* Nomadik system timer */ + reg = <0x101e2000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <4>; + }; + + mtu1 { + /* Secondary timer */ + reg = <0x101e3000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <5>; + }; + + amba { + compatible = "arm,amba-bus"; + #address-cells = <1>; + #size-cells = <1>; + ranges; + + vica: intc@0x10140000 { + compatible = "arm,versatile-vic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x10140000 0x20>; + }; + + vicb: intc@0x10140020 { + compatible = "arm,versatile-vic"; + interrupt-controller; + #interrupt-cells = <1>; + reg = <0x10140020 0x20>; + }; + + uart0: uart@101fd000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x101fd000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <12>; + }; + + uart1: uart@101fb000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x101fb000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <17>; + }; + + uart2: uart@101f2000 { + compatible = "arm,pl011", "arm,primecell"; + reg = <0x101f2000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <28>; + status = "disabled"; + }; + }; +}; diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 72ec3fad2ba6..d152d7bdf411 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -204,6 +204,10 @@ static int __init nhk8815_mmcsd_init(void) { int ret; + /* For e.g. devicetree boot */ + if (!machine_is_nomadik()) + return 0; + ret = gpio_request(112, "card detect bias"); if (ret) return ret; diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 351404673f6c..7c8e3487f4eb 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c @@ -25,13 +25,19 @@ #include #include #include -#include +#include #include #include +#include +#include +#include +#include #include #include +#include #include +#include #include #include @@ -160,3 +166,73 @@ void cpu8815_restart(char mode, const char *cmd) /* Write anything to Reset status register */ writel(1, src_rstsr); } + +#ifdef CONFIG_OF + +/* Initial value for SRC control register: all timers use MXTAL/8 source */ +#define SRC_CR_INIT_MASK 0x00007fff +#define SRC_CR_INIT_VAL 0x2aaa8000 + +static void __init cpu8815_timer_init_of(void) +{ + struct device_node *mtu; + void __iomem *base; + int irq; + u32 src_cr; + + /* We need this to be up now */ + nomadik_clk_init(); + + mtu = of_find_node_by_path("/mtu0"); + if (!mtu) + return; + base = of_iomap(mtu, 0); + if (WARN_ON(!base)) + return; + irq = irq_of_parse_and_map(mtu, 0); + + pr_info("Remapped MTU @ %p, irq: %d\n", base, irq); + + /* Configure timer sources in "system reset controller" ctrl reg */ + src_cr = readl(base); + src_cr &= SRC_CR_INIT_MASK; + src_cr |= SRC_CR_INIT_VAL; + writel(src_cr, base); + + nmdk_timer_init(base, irq); +} + +/* These are mostly to get the right device names for the clock lookups */ +static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = { + OF_DEV_AUXDATA("arm,primecell", NOMADIK_UART0_BASE, + "uart0", NULL), + OF_DEV_AUXDATA("arm,primecell", NOMADIK_UART1_BASE, + "uart1", NULL), + { /* sentinel */ }, +}; + +static void __init cpu8815_init_of(void) +{ +#ifdef CONFIG_CACHE_L2X0 + /* At full speed latency must be >=2, so 0x249 in low bits */ + l2x0_of_init(0x00730249, 0xfe000fff); +#endif + of_platform_populate(NULL, of_default_bus_match_table, + cpu8815_auxdata_lookup, NULL); +} + +static const char * cpu8815_board_compat[] = { + "calaosystems,usb-s8815", + NULL, +}; + +DT_MACHINE_START(NOMADIK_DT, "Nomadik STn8815") + .map_io = cpu8815_map_io, + .init_irq = irqchip_init, + .init_time = cpu8815_timer_init_of, + .init_machine = cpu8815_init_of, + .restart = cpu8815_restart, + .dt_compat = cpu8815_board_compat, +MACHINE_END + +#endif diff --git a/arch/arm/mach-nomadik/cpu-8815.h b/arch/arm/mach-nomadik/cpu-8815.h index 71c21e8a11dc..d6c7830e4799 100644 --- a/arch/arm/mach-nomadik/cpu-8815.h +++ b/arch/arm/mach-nomadik/cpu-8815.h @@ -2,3 +2,4 @@ extern void cpu8815_map_io(void); extern void cpu8815_platform_init(void); extern void cpu8815_init_irq(void); extern void cpu8815_restart(char, const char *); +extern struct sys_timer cpu8815_timer; diff --git a/arch/arm/mach-nomadik/i2c-8815nhk.c b/arch/arm/mach-nomadik/i2c-8815nhk.c index f0e9e64f731a..299ff5a687bc 100644 --- a/arch/arm/mach-nomadik/i2c-8815nhk.c +++ b/arch/arm/mach-nomadik/i2c-8815nhk.c @@ -4,6 +4,7 @@ #include #include #include +#include /* * There are two busses in the 8815NHK. @@ -58,6 +59,10 @@ static struct platform_device nhk8815_i2c_dev2 = { static int __init nhk8815_i2c_init(void) { + /* For e.g. devicetree boot */ + if (!machine_is_nomadik()) + return 0; + platform_device_register(&nhk8815_i2c_dev0); platform_device_register(&nhk8815_i2c_dev1); platform_device_register(&nhk8815_i2c_dev2); -- cgit v1.2.3 From ba785205502f9a03d4ee31bdc3a1228ba5465f00 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sat, 5 Jan 2013 22:28:32 +0100 Subject: ARM: nomadik: add FSMC NAND This adds the FSMC NAND driver and flash partitions to the Nomadik device tree. The only compatible string accepted by this driver is currently "st,spear600-fsmc-nand" which is inappropriate for this system, so this patch adds the compatible value "stericsson,fsmc-nand" as well. Cc: linux-mtd@vger.kernel.org Cc: David Woodhouse Cc: Artem Bityutskiy Signed-off-by: Linus Walleij --- .../devicetree/bindings/mtd/fsmc-nand.txt | 2 +- arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 38 ++++++++++++++++++++++ arch/arm/mach-nomadik/cpu-8815.c | 15 +++++++++ drivers/mtd/nand/fsmc_nand.c | 1 + 4 files changed, 55 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/mtd/fsmc-nand.txt b/Documentation/devicetree/bindings/mtd/fsmc-nand.txt index e3ea32e7de3e..2240ac09f6ba 100644 --- a/Documentation/devicetree/bindings/mtd/fsmc-nand.txt +++ b/Documentation/devicetree/bindings/mtd/fsmc-nand.txt @@ -1,7 +1,7 @@ * FSMC NAND Required properties: -- compatible : "st,spear600-fsmc-nand" +- compatible : "st,spear600-fsmc-nand", "stericsson,fsmc-nand" - reg : Address range of the mtd chip - reg-names: Should contain the reg names "fsmc_regs", "nand_data", "nand_addr" and "nand_cmd" diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi index 88fb98f910cf..c73df370373b 100644 --- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi +++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi @@ -35,6 +35,44 @@ interrupts = <5>; }; + /* A NAND flash of 128 MiB */ + fsmc: flash@40000000 { + compatible = "stericsson,fsmc-nand"; + #address-cells = <1>; + #size-cells = <1>; + reg = <0x10100000 0x1000>, /* FSMC Register*/ + <0x40000000 0x2000>, /* NAND Base DATA */ + <0x41000000 0x2000>, /* NAND Base ADDR */ + <0x40800000 0x2000>; /* NAND Base CMD */ + reg-names = "fsmc_regs", "nand_data", "nand_addr", "nand_cmd"; + status = "okay"; + + partition@0 { + label = "X-Loader(NAND)"; + reg = <0x0 0x40000>; + }; + partition@40000 { + label = "MemInit(NAND)"; + reg = <0x40000 0x40000>; + }; + partition@80000 { + label = "BootLoader(NAND)"; + reg = <0x80000 0x200000>; + }; + partition@280000 { + label = "Kernel zImage(NAND)"; + reg = <0x280000 0x300000>; + }; + partition@580000 { + label = "Root Filesystem(NAND)"; + reg = <0x580000 0x1600000>; + }; + partition@1b80000 { + label = "User Filesystem(NAND)"; + reg = <0x1b80000 0x6480000>; + }; + }; + amba { compatible = "arm,amba-bus"; #address-cells = <1>; diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 8d071d2769b5..a3894ca45bb8 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c @@ -33,6 +33,7 @@ #include #include #include +#include #include #include @@ -249,6 +250,17 @@ static void __init cpu8815_timer_init_of(void) nmdk_timer_init(base, irq); } +static struct fsmc_nand_timings cpu8815_nand_timings = { + .thiz = 0, + .thold = 0x10, + .twait = 0x0A, + .tset = 0, +}; + +static struct fsmc_nand_platform_data cpu8815_nand_data = { + .nand_timings = &cpu8815_nand_timings, +}; + /* These are mostly to get the right device names for the clock lookups */ static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("arm,primecell", NOMADIK_UART0_BASE, @@ -259,6 +271,9 @@ static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = { "rng", NULL), OF_DEV_AUXDATA("arm,primecell", NOMADIK_RTC_BASE, "rtc-pl031", NULL), + OF_DEV_AUXDATA("stericsson,fsmc-nand", NOMADIK_FSMC_BASE, + "fsmc-nand", &cpu8815_nand_data), + { /* sentinel */ }, }; diff --git a/drivers/mtd/nand/fsmc_nand.c b/drivers/mtd/nand/fsmc_nand.c index 67e62d3d495c..61043a92c007 100644 --- a/drivers/mtd/nand/fsmc_nand.c +++ b/drivers/mtd/nand/fsmc_nand.c @@ -1218,6 +1218,7 @@ static SIMPLE_DEV_PM_OPS(fsmc_nand_pm_ops, fsmc_nand_suspend, fsmc_nand_resume); #ifdef CONFIG_OF static const struct of_device_id fsmc_nand_id_table[] = { { .compatible = "st,spear600-fsmc-nand" }, + { .compatible = "stericsson,fsmc-nand" }, {} }; MODULE_DEVICE_TABLE(of, fsmc_nand_id_table); -- cgit v1.2.3 From 2ad6e39867cf026e668a4c566725c2c65dbde406 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sun, 6 Jan 2013 01:02:42 +0100 Subject: ARM: nomadik: convert SMSC91x ethernet to device tree This converts the SMSC91x ethernet controller to use device tree. The existing solution from the board file, to request the GPIO triggering the ethernet IRQ from the board file is kept for the time being, but the GPIO number assignment is moved over to the device tree. Signed-off-by: Linus Walleij --- .../devicetree/bindings/arm/ste-nomadik.txt | 5 ++++ arch/arm/boot/dts/ste-nomadik-s8815.dts | 6 ++++ arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 12 ++++++++ arch/arm/mach-nomadik/board-nhk8815.c | 2 ++ arch/arm/mach-nomadik/cpu-8815.c | 34 ++++++++++++++++++++++ 5 files changed, 59 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/ste-nomadik.txt b/Documentation/devicetree/bindings/arm/ste-nomadik.txt index 23f32bddebf9..a97316073afe 100644 --- a/Documentation/devicetree/bindings/arm/ste-nomadik.txt +++ b/Documentation/devicetree/bindings/arm/ste-nomadik.txt @@ -16,4 +16,9 @@ Required node: usb-s8815 Example: usb-s8815 { + ethernet-gpio { + gpios = <&gpio3 19 0x1>; + interrupts = <19 0x1>; + interrupt-parent = <&gpio3>; + }; }; diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts index 97b7d1df5aaa..cc777109f98f 100644 --- a/arch/arm/boot/dts/ste-nomadik-s8815.dts +++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts @@ -16,5 +16,11 @@ /* Custom board node with GPIO pins to active etc */ usb-s8815 { + /* The S8815 is using this very GPIO pin for the SMSC91x IRQs */ + ethernet-gpio { + gpios = <&gpio3 19 0x1>; + interrupts = <19 0x1>; + interrupt-parent = <&gpio3>; + }; }; }; diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi index 2c8aaa5c6ac4..f129425883a4 100644 --- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi +++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi @@ -125,6 +125,18 @@ }; }; + external-bus@34000000 { + compatible = "simple-bus"; + reg = <0x34000000 0x1000000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x34000000 0x1000000>; + ethernet@300 { + compatible = "smsc,lan91c111"; + reg = <0x300 0x0fd00>; + }; + }; + amba { compatible = "arm,amba-bus"; #address-cells = <1>; diff --git a/arch/arm/mach-nomadik/board-nhk8815.c b/arch/arm/mach-nomadik/board-nhk8815.c index 2f2c96bee7df..e7b216cb6802 100644 --- a/arch/arm/mach-nomadik/board-nhk8815.c +++ b/arch/arm/mach-nomadik/board-nhk8815.c @@ -239,6 +239,8 @@ static int __init nhk8815_eth_init(void) int gpio_nr = 115; /* hardwired in the board */ int err; + if (!machine_is_nomadik()) + return 0; err = gpio_request(gpio_nr, "eth_irq"); if (!err) err = gpio_direction_input(gpio_nr); if (err) diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 3a59459d6e9a..339496f15138 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c @@ -31,9 +31,11 @@ #include #include #include +#include #include #include #include +#include #include #include @@ -263,6 +265,38 @@ static struct fsmc_nand_platform_data cpu8815_nand_data = { .nand_timings = &cpu8815_nand_timings, }; +/* + * The SMSC911x IRQ is connected to a GPIO pin, but the driver expects + * to simply request an IRQ passed as a resource. So the GPIO pin needs + * to be requested by this hog and set as input. + */ +static int __init cpu8815_eth_init(void) +{ + struct device_node *eth; + int gpio, irq, err; + + eth = of_find_node_by_path("/usb-s8815/ethernet-gpio"); + if (!eth) { + pr_info("could not find any ethernet GPIO\n"); + return 0; + } + gpio = of_get_gpio(eth, 0); + err = gpio_request(gpio, "eth_irq"); + if (err) { + pr_info("failed to request ethernet GPIO\n"); + return -ENODEV; + } + err = gpio_direction_input(gpio); + if (err) { + pr_info("failed to set ethernet GPIO as input\n"); + return -ENODEV; + } + irq = gpio_to_irq(gpio); + pr_info("enabled USB-S8815 ethernet GPIO %d, IRQ %d\n", gpio, irq); + return 0; +} +device_initcall(cpu8815_eth_init); + /* These are mostly to get the right device names for the clock lookups */ static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO0_BASE, -- cgit v1.2.3 From 4fd243c6c083ea159ae1a9f9a24198c350034439 Mon Sep 17 00:00:00 2001 From: Linus Walleij Date: Sun, 6 Jan 2013 01:47:29 +0100 Subject: ARM: nomadik: migrate MMC/SD card support to device tree This moves over the MMC/SD card support to the device tree probe path. The special GPIO to bias the card detect line is kept, but the pin property is moved to the device tree as part of the MMC/SD card node. Signed-off-by: Linus Walleij --- .../devicetree/bindings/arm/ste-nomadik.txt | 3 ++ arch/arm/boot/dts/ste-nomadik-s8815.dts | 4 ++ arch/arm/boot/dts/ste-nomadik-stn8815.dtsi | 13 ++++++ arch/arm/mach-nomadik/cpu-8815.c | 48 +++++++++++++++++++++- 4 files changed, 67 insertions(+), 1 deletion(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/arm/ste-nomadik.txt b/Documentation/devicetree/bindings/arm/ste-nomadik.txt index a97316073afe..19bca04b81c9 100644 --- a/Documentation/devicetree/bindings/arm/ste-nomadik.txt +++ b/Documentation/devicetree/bindings/arm/ste-nomadik.txt @@ -21,4 +21,7 @@ usb-s8815 { interrupts = <19 0x1>; interrupt-parent = <&gpio3>; }; + mmcsd-gpio { + gpios = <&gpio3 16 0x1>; + }; }; diff --git a/arch/arm/boot/dts/ste-nomadik-s8815.dts b/arch/arm/boot/dts/ste-nomadik-s8815.dts index cc777109f98f..b28fbf3408e3 100644 --- a/arch/arm/boot/dts/ste-nomadik-s8815.dts +++ b/arch/arm/boot/dts/ste-nomadik-s8815.dts @@ -22,5 +22,9 @@ interrupts = <19 0x1>; interrupt-parent = <&gpio3>; }; + /* This will bias the MMC/SD card detect line */ + mmcsd-gpio { + gpios = <&gpio3 16 0x1>; + }; }; }; diff --git a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi index f129425883a4..0164edc78eed 100644 --- a/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi +++ b/arch/arm/boot/dts/ste-nomadik-stn8815.dtsi @@ -190,5 +190,18 @@ interrupt-parent = <&vica>; interrupts = <10>; }; + + mmcsd: sdi@101f6000 { + compatible = "arm,pl18x", "arm,primecell"; + reg = <0x101f6000 0x1000>; + interrupt-parent = <&vica>; + interrupts = <22>; + max-frequency = <48000000>; + bus-width = <4>; + mmc-cap-mmc-highspeed; + mmc-cap-sd-highspeed; + cd-gpios = <&gpio3 15 0x1>; + cd-inverted; + }; }; }; diff --git a/arch/arm/mach-nomadik/cpu-8815.c b/arch/arm/mach-nomadik/cpu-8815.c index 339496f15138..5ad301e4eb2f 100644 --- a/arch/arm/mach-nomadik/cpu-8815.c +++ b/arch/arm/mach-nomadik/cpu-8815.c @@ -36,6 +36,7 @@ #include #include #include +#include #include #include @@ -297,6 +298,50 @@ static int __init cpu8815_eth_init(void) } device_initcall(cpu8815_eth_init); +/* + * TODO: + * cannot be set from device tree, convert to a proper DT + * binding. + */ +static struct mmci_platform_data mmcsd_plat_data = { + .ocr_mask = MMC_VDD_29_30, +}; + +/* + * This GPIO pin turns on a line that is used to detect card insertion + * on this board. + */ +static int __init cpu8815_mmcsd_init(void) +{ + struct device_node *cdbias; + int gpio, err; + + cdbias = of_find_node_by_path("/usb-s8815/mmcsd-gpio"); + if (!cdbias) { + pr_info("could not find MMC/SD card detect bias node\n"); + return 0; + } + gpio = of_get_gpio(cdbias, 0); + if (gpio < 0) { + pr_info("could not obtain MMC/SD card detect bias GPIO\n"); + return 0; + } + err = gpio_request(gpio, "card detect bias"); + if (err) { + pr_info("failed to request card detect bias GPIO %d\n", gpio); + return -ENODEV; + } + err = gpio_direction_output(gpio, 0); + if (err){ + pr_info("failed to set GPIO %d as output, low\n", gpio); + return err; + } + pr_info("enabled USB-S8815 CD bias GPIO %d, low\n", gpio); + return 0; +} +device_initcall(cpu8815_mmcsd_init); + + /* These are mostly to get the right device names for the clock lookups */ static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = { OF_DEV_AUXDATA("st,nomadik-gpio", NOMADIK_GPIO0_BASE, @@ -319,7 +364,8 @@ static struct of_dev_auxdata cpu8815_auxdata_lookup[] __initdata = { "rtc-pl031", NULL), OF_DEV_AUXDATA("stericsson,fsmc-nand", NOMADIK_FSMC_BASE, "fsmc-nand", &cpu8815_nand_data), - + OF_DEV_AUXDATA("arm,primecell", NOMADIK_SDI_BASE, + "mmci", &mmcsd_plat_data), { /* sentinel */ }, }; -- cgit v1.2.3