From f720002d8468f46c3cce8ab2b9f93aeedac4b602 Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Wed, 2 Feb 2022 20:17:31 -0600 Subject: dt-bindings: rtc: sun6i: Clean up repetition - Use "enum" for compatibles instead of several "const" alternatives. - Merge the H6 clock-output-names minItems/maxItems constraint into the identical block above. Reviewed-by: Rob Herring Signed-off-by: Samuel Holland Reviewed-by: Maxime Ripard Signed-off-by: Alexandre Belloni Link: https://lore.kernel.org/r/20220203021736.13434-2-samuel@sholland.org --- .../bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 28 +++++++--------------- 1 file changed, 9 insertions(+), 19 deletions(-) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml index beeb90e55727..a88d46ffb457 100644 --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml @@ -16,16 +16,17 @@ properties: compatible: oneOf: - - const: allwinner,sun6i-a31-rtc - - const: allwinner,sun8i-a23-rtc - - const: allwinner,sun8i-h3-rtc - - const: allwinner,sun8i-r40-rtc - - const: allwinner,sun8i-v3-rtc - - const: allwinner,sun50i-h5-rtc + - enum: + - allwinner,sun6i-a31-rtc + - allwinner,sun8i-a23-rtc + - allwinner,sun8i-h3-rtc + - allwinner,sun8i-r40-rtc + - allwinner,sun8i-v3-rtc + - allwinner,sun50i-h5-rtc + - allwinner,sun50i-h6-rtc - items: - const: allwinner,sun50i-a64-rtc - const: allwinner,sun8i-h3-rtc - - const: allwinner,sun50i-h6-rtc reg: maxItems: 1 @@ -85,18 +86,7 @@ allOf: enum: - allwinner,sun8i-h3-rtc - allwinner,sun50i-h5-rtc - - then: - properties: - clock-output-names: - minItems: 3 - maxItems: 3 - - - if: - properties: - compatible: - contains: - const: allwinner,sun50i-h6-rtc + - allwinner,sun50i-h6-rtc then: properties: -- cgit v1.2.3 From 8487614a8a8a70d44957a11693dbefd8350f402c Mon Sep 17 00:00:00 2001 From: Samuel Holland Date: Wed, 2 Feb 2022 20:17:32 -0600 Subject: dt-bindings: rtc: sun6i: Add H616, R329, and D1 support These new RTC variants all have a single alarm, like the R40 variant. For the new SoCs, start requiring a complete list of input clocks. The H616 has three required clocks. The R329 also has three required clocks (but one is different), plus an optional crystal oscillator input. The D1 RTC is identical to the one in the R329. And since these new SoCs will have a well-defined output clock order as well, they do not need the clock-output-names property. Signed-off-by: Samuel Holland Reviewed-by: Rob Herring Reviewed-by: Maxime Ripard Signed-off-by: Alexandre Belloni Link: https://lore.kernel.org/r/20220203021736.13434-3-samuel@sholland.org --- .../bindings/rtc/allwinner,sun6i-a31-rtc.yaml | 76 +++++++++++++++++++++- include/dt-bindings/clock/sun6i-rtc.h | 10 +++ 2 files changed, 83 insertions(+), 3 deletions(-) create mode 100644 include/dt-bindings/clock/sun6i-rtc.h (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml index a88d46ffb457..0b767fec39d8 100644 --- a/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/allwinner,sun6i-a31-rtc.yaml @@ -24,9 +24,14 @@ properties: - allwinner,sun8i-v3-rtc - allwinner,sun50i-h5-rtc - allwinner,sun50i-h6-rtc + - allwinner,sun50i-h616-rtc + - allwinner,sun50i-r329-rtc - items: - const: allwinner,sun50i-a64-rtc - const: allwinner,sun8i-h3-rtc + - items: + - const: allwinner,sun20i-d1-rtc + - const: allwinner,sun50i-r329-rtc reg: maxItems: 1 @@ -38,7 +43,12 @@ properties: - description: RTC Alarm 1 clocks: - maxItems: 1 + minItems: 1 + maxItems: 4 + + clock-names: + minItems: 1 + maxItems: 4 clock-output-names: minItems: 1 @@ -98,7 +108,68 @@ allOf: properties: compatible: contains: - const: allwinner,sun8i-r40-rtc + const: allwinner,sun50i-h616-rtc + + then: + properties: + clocks: + minItems: 3 + maxItems: 3 + items: + - description: Bus clock for register access + - description: 24 MHz oscillator + - description: 32 kHz clock from the CCU + + clock-names: + minItems: 3 + maxItems: 3 + items: + - const: bus + - const: hosc + - const: pll-32k + + required: + - clocks + - clock-names + + - if: + properties: + compatible: + contains: + const: allwinner,sun50i-r329-rtc + + then: + properties: + clocks: + minItems: 3 + maxItems: 4 + items: + - description: Bus clock for register access + - description: 24 MHz oscillator + - description: AHB parent for internal SPI clock + - description: External 32768 Hz oscillator + + clock-names: + minItems: 3 + maxItems: 4 + items: + - const: bus + - const: hosc + - const: ahb + - const: ext-osc32k + + required: + - clocks + - clock-names + + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun8i-r40-rtc + - allwinner,sun50i-h616-rtc + - allwinner,sun50i-r329-rtc then: properties: @@ -117,7 +188,6 @@ required: - compatible - reg - interrupts - - clock-output-names additionalProperties: false diff --git a/include/dt-bindings/clock/sun6i-rtc.h b/include/dt-bindings/clock/sun6i-rtc.h new file mode 100644 index 000000000000..c845493e4d37 --- /dev/null +++ b/include/dt-bindings/clock/sun6i-rtc.h @@ -0,0 +1,10 @@ +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ + +#ifndef _DT_BINDINGS_CLK_SUN6I_RTC_H_ +#define _DT_BINDINGS_CLK_SUN6I_RTC_H_ + +#define CLK_OSC32K 0 +#define CLK_OSC32K_FANOUT 1 +#define CLK_IOSC 2 + +#endif /* _DT_BINDINGS_CLK_SUN6I_RTC_H_ */ -- cgit v1.2.3 From 5b05198b3108d5d287da8c457183855fb91ae4cc Mon Sep 17 00:00:00 2001 From: Sergiu Moga Date: Fri, 4 Mar 2022 18:11:58 +0200 Subject: dt-bindings: rtc: convert at91sam9 bindings to json-schema Convert RTC binding for Atmel/Microchip SoCs to Device Tree Schema format. Signed-off-by: Sergiu Moga Reviewed-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Signed-off-by: Alexandre Belloni Link: https://lore.kernel.org/r/20220304161159.147784-4-sergiu.moga@microchip.com --- .../devicetree/bindings/rtc/atmel,at91sam9-rtc.txt | 25 --------- .../bindings/rtc/atmel,at91sam9-rtc.yaml | 65 ++++++++++++++++++++++ 2 files changed, 65 insertions(+), 25 deletions(-) delete mode 100644 Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt create mode 100644 Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt b/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt deleted file mode 100644 index 3f0e2a5950eb..000000000000 --- a/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.txt +++ /dev/null @@ -1,25 +0,0 @@ -Atmel AT91SAM9260 Real Time Timer - -Required properties: -- compatible: should be one of the following: - - "atmel,at91sam9260-rtt" - - "microchip,sam9x60-rtt", "atmel,at91sam9260-rtt" -- reg: should encode the memory region of the RTT controller -- interrupts: rtt alarm/event interrupt -- clocks: should contain the 32 KHz slow clk that will drive the RTT block. -- atmel,rtt-rtc-time-reg: should encode the GPBR register used to store - the time base when the RTT is used as an RTC. - The first cell should point to the GPBR node and the second one - encode the offset within the GPBR block (or in other words, the - GPBR register used to store the time base). - - -Example: - -rtt@fffffd20 { - compatible = "atmel,at91sam9260-rtt"; - reg = <0xfffffd20 0x10>; - interrupts = <1 4 7>; - clocks = <&clk32k>; - atmel,rtt-rtc-time-reg = <&gpbr 0x0>; -}; diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml new file mode 100644 index 000000000000..d2452067bfe4 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/atmel,at91sam9-rtc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel AT91 RTT Device Tree Bindings + +allOf: + - $ref: "rtc.yaml#" + +maintainers: + - Alexandre Belloni + +properties: + compatible: + oneOf: + - items: + - const: atmel,at91sam9260-rtt + - items: + - const: microchip,sam9x60-rtt + - const: atmel,at91sam9260-rtt + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + atmel,rtt-rtc-time-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the GPBR node. + - description: Offset within the GPBR block. + description: + Should encode the GPBR register used to store the time base when the + RTT is used as an RTC. The first cell should point to the GPBR node + and the second one encodes the offset within the GPBR block (or in + other words, the GPBR register used to store the time base). + +required: + - compatible + - reg + - interrupts + - clocks + - atmel,rtt-rtc-time-reg + +unevaluatedProperties: false + +examples: + - | + #include + + rtc@fffffd20 { + compatible = "atmel,at91sam9260-rtt"; + reg = <0xfffffd20 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&clk32k>; + atmel,rtt-rtc-time-reg = <&gpbr 0x0>; + }; -- cgit v1.2.3 From 64a6497017843fc23d4c18542bdd4cfcca7878c9 Mon Sep 17 00:00:00 2001 From: Sergiu Moga Date: Fri, 4 Mar 2022 18:11:59 +0200 Subject: dt-bindings: rtc: at91: Add SAMA7G5 compatible strings list Add compatible strings list for SAMA7G5. Signed-off-by: Sergiu Moga Reviewed-by: Krzysztof Kozlowski Reviewed-by: Tudor Ambarus Signed-off-by: Alexandre Belloni Link: https://lore.kernel.org/r/20220304161159.147784-5-sergiu.moga@microchip.com --- Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml index d2452067bfe4..e5c3c384e172 100644 --- a/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml +++ b/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml @@ -21,6 +21,10 @@ properties: - items: - const: microchip,sam9x60-rtt - const: atmel,at91sam9260-rtt + - items: + - const: microchip,sama7g5-rtt + - const: microchip,sam9x60-rtt + - const: atmel,at91sam9260-rtt reg: maxItems: 1 -- cgit v1.2.3 From eb74f47bb6b0c0494d7c90491ee321f3b699f93f Mon Sep 17 00:00:00 2001 From: Alexandre Belloni Date: Tue, 8 Mar 2022 16:57:35 +0100 Subject: dt-bindings: rtc: at91: rename rtt bindings file atmel,at91sam9-rtc is a confusing name for this file as it is documenting the RTT used as an RTC and not the other regular RTC (atmel,at91rm9200-rtc and atmel,at91sam9x5-rtc) Signed-off-by: Alexandre Belloni Acked-by: Nicolas Ferre Link: https://lore.kernel.org/r/20220308155735.54146-1-alexandre.belloni@bootlin.com --- .../bindings/rtc/atmel,at91sam9-rtc.yaml | 69 ---------------------- .../bindings/rtc/atmel,at91sam9260-rtt.yaml | 69 ++++++++++++++++++++++ 2 files changed, 69 insertions(+), 69 deletions(-) delete mode 100644 Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml create mode 100644 Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml (limited to 'Documentation') diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml deleted file mode 100644 index e5c3c384e172..000000000000 --- a/Documentation/devicetree/bindings/rtc/atmel,at91sam9-rtc.yaml +++ /dev/null @@ -1,69 +0,0 @@ -# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) -# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries -%YAML 1.2 ---- -$id: http://devicetree.org/schemas/rtc/atmel,at91sam9-rtc.yaml# -$schema: http://devicetree.org/meta-schemas/core.yaml# - -title: Atmel AT91 RTT Device Tree Bindings - -allOf: - - $ref: "rtc.yaml#" - -maintainers: - - Alexandre Belloni - -properties: - compatible: - oneOf: - - items: - - const: atmel,at91sam9260-rtt - - items: - - const: microchip,sam9x60-rtt - - const: atmel,at91sam9260-rtt - - items: - - const: microchip,sama7g5-rtt - - const: microchip,sam9x60-rtt - - const: atmel,at91sam9260-rtt - - reg: - maxItems: 1 - - interrupts: - maxItems: 1 - - clocks: - maxItems: 1 - - atmel,rtt-rtc-time-reg: - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - - items: - - description: Phandle to the GPBR node. - - description: Offset within the GPBR block. - description: - Should encode the GPBR register used to store the time base when the - RTT is used as an RTC. The first cell should point to the GPBR node - and the second one encodes the offset within the GPBR block (or in - other words, the GPBR register used to store the time base). - -required: - - compatible - - reg - - interrupts - - clocks - - atmel,rtt-rtc-time-reg - -unevaluatedProperties: false - -examples: - - | - #include - - rtc@fffffd20 { - compatible = "atmel,at91sam9260-rtt"; - reg = <0xfffffd20 0x10>; - interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; - clocks = <&clk32k>; - atmel,rtt-rtc-time-reg = <&gpbr 0x0>; - }; diff --git a/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml b/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml new file mode 100644 index 000000000000..0ef1b7ff4a77 --- /dev/null +++ b/Documentation/devicetree/bindings/rtc/atmel,at91sam9260-rtt.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright (C) 2022 Microchip Technology, Inc. and its subsidiaries +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/rtc/atmel,at91sam9260-rtt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Atmel AT91 RTT Device Tree Bindings + +allOf: + - $ref: "rtc.yaml#" + +maintainers: + - Alexandre Belloni + +properties: + compatible: + oneOf: + - items: + - const: atmel,at91sam9260-rtt + - items: + - const: microchip,sam9x60-rtt + - const: atmel,at91sam9260-rtt + - items: + - const: microchip,sama7g5-rtt + - const: microchip,sam9x60-rtt + - const: atmel,at91sam9260-rtt + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + maxItems: 1 + + atmel,rtt-rtc-time-reg: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the GPBR node. + - description: Offset within the GPBR block. + description: + Should encode the GPBR register used to store the time base when the + RTT is used as an RTC. The first cell should point to the GPBR node + and the second one encodes the offset within the GPBR block (or in + other words, the GPBR register used to store the time base). + +required: + - compatible + - reg + - interrupts + - clocks + - atmel,rtt-rtc-time-reg + +unevaluatedProperties: false + +examples: + - | + #include + + rtc@fffffd20 { + compatible = "atmel,at91sam9260-rtt"; + reg = <0xfffffd20 0x10>; + interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>; + clocks = <&clk32k>; + atmel,rtt-rtc-time-reg = <&gpbr 0x0>; + }; -- cgit v1.2.3