From e19c33dbfe95e1807be3eb6f252aa60ad5ace531 Mon Sep 17 00:00:00 2001 From: Ludovic Barre Date: Tue, 28 Jan 2020 10:06:32 +0100 Subject: dt-bindings: mmc: mmci: add delay block base register for sdmmc To support the sdr104 mode, the sdmmc variant has a hardware delay block to manage the clock phase when sampling data received by the card. This patch adds a second base register (optional) for sdmmc delay block. Signed-off-by: Ludovic Barre Acked-by: Rob Herring Link: https://lore.kernel.org/r/20200128090636.13689-6-ludovic.barre@st.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/mmci.txt | 2 ++ 1 file changed, 2 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/mmc/mmci.txt b/Documentation/devicetree/bindings/mmc/mmci.txt index 6d3c626e017d..4ec921e4bf34 100644 --- a/Documentation/devicetree/bindings/mmc/mmci.txt +++ b/Documentation/devicetree/bindings/mmc/mmci.txt @@ -28,6 +28,8 @@ specific for ux500 variant: - st,sig-pin-fbclk : feedback clock signal pin used. specific for sdmmc variant: +- reg : a second base register may be defined if a delay + block is present and used for tuning. - st,sig-dir : signal direction polarity used for cmd, dat0 dat123. - st,neg-edge : data & command phase relation, generated on sd clock falling edge. -- cgit v1.2.3 From 70fd681e7ee1c27b02255010f201ac138862bb05 Mon Sep 17 00:00:00 2001 From: Faiz Abbas Date: Wed, 8 Jan 2020 20:39:18 +0530 Subject: dt-bindings: mmc: sdhci-am654: Update Output tap delay binding According to latest AM65x Data Manual[1], a different output tap delay value is recommended for all speed modes. Therefore, replace the ti,otap-del-sel binding with one ti,otap-del-sel- for each MMC/SD speed mode. [1] http://www.ti.com/lit/gpn/am6526 Signed-off-by: Faiz Abbas Link: https://lore.kernel.org/r/20200108150920.14547-2-faiz_abbas@ti.com Signed-off-by: Ulf Hansson --- .../devicetree/bindings/mmc/sdhci-am654.txt | 21 +++++++++++++++++++-- 1 file changed, 19 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-am654.txt b/Documentation/devicetree/bindings/mmc/sdhci-am654.txt index 50e87df47971..c6ccecb9ae5a 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-am654.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-am654.txt @@ -18,7 +18,20 @@ Required Properties: - clocks: Handles to the clock inputs. - clock-names: Tuple including "clk_xin" and "clk_ahb" - interrupts: Interrupt specifiers - - ti,otap-del-sel: Output Tap Delay select + Output tap delay for each speed mode: + - ti,otap-del-sel-legacy + - ti,otap-del-sel-mmc-hs + - ti,otap-del-sel-sd-hs + - ti,otap-del-sel-sdr12 + - ti,otap-del-sel-sdr25 + - ti,otap-del-sel-sdr50 + - ti,otap-del-sel-sdr104 + - ti,otap-del-sel-ddr50 + - ti,otap-del-sel-ddr52 + - ti,otap-del-sel-hs200 + - ti,otap-del-sel-hs400 + These bindings must be provided otherwise the driver will disable the + corresponding speed mode (i.e. all nodes must provide at least -legacy) Optional Properties (Required for ti,am654-sdhci-5.1 and ti,j721e-sdhci-8bit): - ti,trm-icp: DLL trim select @@ -38,6 +51,10 @@ Example: interrupts = ; sdhci-caps-mask = <0x80000007 0x0>; mmc-ddr-1_8v; - ti,otap-del-sel = <0x2>; + ti,otap-del-sel-legacy = <0x0>; + ti,otap-del-sel-mmc-hs = <0x0>; + ti,otap-del-sel-ddr52 = <0x5>; + ti,otap-del-sel-hs200 = <0x5>; + ti,otap-del-sel-hs400 = <0x0>; ti,trm-icp = <0x8>; }; -- cgit v1.2.3 From 0299138af65869af7809ed2a6edb897c8fdfc52a Mon Sep 17 00:00:00 2001 From: Haibo Chen Date: Wed, 19 Feb 2020 16:25:04 +0800 Subject: doc: dt: fsl-imx-esdhc: add strobe-dll-delay-target binding Add fsl,strobe-dll-delay-target binding. Signed-off-by: Haibo Chen Link: https://lore.kernel.org/r/1582100704-20601-1-git-send-email-haibo.chen@nxp.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt | 5 +++++ 1 file changed, 5 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt index 0f97d711444e..de1b8bd550d3 100644 --- a/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt +++ b/Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt @@ -43,6 +43,11 @@ Optional properties: This property allows user to change the tuning step to more than one delay cells which is useful for some special boards or cards when the default tuning step can't find the proper delay window within limited tuning retries. +- fsl,strobe-dll-delay-target: Specify the strobe dll control slave delay target. + This delay target programming host controller loopback read clock, and this + property allows user to change the delay target for the strobe input read clock. + If not use this property, driver default set the delay target to value 7. + Only eMMC HS400 mode need to take care of this property. Examples: -- cgit v1.2.3 From d79100c91ae57a08c2bc7fdefccd348a2f345829 Mon Sep 17 00:00:00 2001 From: Veerabhadrarao Badiganti Date: Mon, 24 Feb 2020 17:27:50 +0530 Subject: dt-bindings: mmc: sdhci-msm: Add CQE reg map CQE feature has been enabled on sdhci-msm. Add CQE reg map and reg names that need to be supplied for supporting CQE feature. Signed-off-by: Veerabhadrarao Badiganti Reviewed-by: Douglas Anderson Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/1582545470-11530-1-git-send-email-vbadigan@codeaurora.org Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/sdhci-msm.txt | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt index 7ee639b1af03..5445931c5ab9 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-msm.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-msm.txt @@ -26,7 +26,13 @@ Required properties: - reg: Base address and length of the register in the following order: - Host controller register map (required) - - SD Core register map (required for msm-v4 and below) + - SD Core register map (required for controllers earlier than msm-v5) + - CQE register map (Optional, CQE support is present on SDHC instance meant + for eMMC and version v4.2 and above) +- reg-names: When CQE register map is supplied, below reg-names are required + - "hc" for Host controller register map + - "core" for SD core register map + - "cqhci" for CQE register map - interrupts: Should contain an interrupt-specifiers for the interrupts: - Host controller interrupt (required) - pinctrl-names: Should contain only one value - "default". -- cgit v1.2.3 From 398b25003d3a2747109015f3fe719bbee94cb82b Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sat, 7 Mar 2020 17:05:56 +0100 Subject: dt-bindings: mmc: synopsys-dw-mshc: fix clock-freq-min-max in example A test with the command below does not detect all errors in combination with 'additionalProperties: false' and allOf: - $ref: "synopsys-dw-mshc-common.yaml#" allOf: - $ref: "mmc-controller.yaml#" 'additionalProperties' applies to all properties that are not accounted-for by 'properties' or 'patternProperties' in the immediate schema. First when we combine synopsys-dw-mshc.yaml, synopsys-dw-mshc-common.yaml and mmc-controller.yaml it gives this error: Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.example.dt.yaml: mmc@12200000: 'clock-freq-min-max' does not match any of the regexes: '^.*@[0-9]+$', '^clk-phase-(legacy|sd-hs|mmc-(hs|hs[24]00|ddr52)| uhs-(sdr(12|25|50|104)|ddr50))$', 'pinctrl-[0-9]+' 'clock-freq-min-max' is deprecated, so replace it by 'max-frequency'. make ARCH=arm dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20200307160556.16226-1-jbx6244@gmail.com Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml index 05f9f36dcb75..dd2c1b147142 100644 --- a/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml +++ b/Documentation/devicetree/bindings/mmc/synopsys-dw-mshc.yaml @@ -62,7 +62,7 @@ examples: cap-mmc-highspeed; cap-sd-highspeed; card-detect-delay = <200>; - clock-freq-min-max = <400000 200000000>; + max-frequency = <200000000>; clock-frequency = <400000000>; data-addr = <0x200>; fifo-depth = <0x80>; -- cgit v1.2.3 From ffae422dfe149b9af8ed5dfcd6f948ff656321df Mon Sep 17 00:00:00 2001 From: Lubomir Rintel Date: Tue, 17 Mar 2020 10:39:12 +0100 Subject: dt-bindings: mmc: Fix node name in an example The $nodename allows only "mmc@*" whereas the example node is named "sdhci". Signed-off-by: Lubomir Rintel Link: https://lore.kernel.org/r/20200317093922.20785-19-lkundrak@v3.sk Signed-off-by: Ulf Hansson --- Documentation/devicetree/bindings/mmc/mmc-controller.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml index 8fded83c519a..acc9f10871d4 100644 --- a/Documentation/devicetree/bindings/mmc/mmc-controller.yaml +++ b/Documentation/devicetree/bindings/mmc/mmc-controller.yaml @@ -351,7 +351,7 @@ dependencies: examples: - | - sdhci@ab000000 { + mmc@ab000000 { compatible = "sdhci"; reg = <0xab000000 0x200>; interrupts = <23>; -- cgit v1.2.3