From 7121926d4ca5869b730da760c1fdf3dc1d723224 Mon Sep 17 00:00:00 2001 From: Yannick Fertre Date: Fri, 14 Apr 2017 12:13:33 +0200 Subject: dt-bindings: display: Add STM32 LTDC driver This patch adds documentation of device tree bindings for the STM32 LTDC (Lcd-Tft Display Controller). Acked-by: Rob Herring Signed-off-by: Yannick Fertre Signed-off-by: Eric Anholt Link: http://patchwork.freedesktop.org/patch/msgid/1492164819-10513-4-git-send-email-yannick.fertre@st.com --- .../devicetree/bindings/display/st,stm32-ltdc.txt | 36 ++++++++++++++++++++++ 1 file changed, 36 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/st,stm32-ltdc.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt new file mode 100644 index 000000000000..8e1476941c0f --- /dev/null +++ b/Documentation/devicetree/bindings/display/st,stm32-ltdc.txt @@ -0,0 +1,36 @@ +* STMicroelectronics STM32 lcd-tft display controller + +- ltdc: lcd-tft display controller host + must be a sub-node of st-display-subsystem + Required properties: + - compatible: "st,stm32-ltdc" + - reg: Physical base address of the IP registers and length of memory mapped region. + - clocks: A list of phandle + clock-specifier pairs, one for each + entry in 'clock-names'. + - clock-names: A list of clock names. For ltdc it should contain: + - "lcd" for the clock feeding the output pixel clock & IP clock. + - resets: reset to be used by the device (defined by use of RCC macro). + Required nodes: + - Video port for RGB output. + +Example: + +/ { + ... + soc { + ... + ltdc: display-controller@40016800 { + compatible = "st,stm32-ltdc"; + reg = <0x40016800 0x200>; + interrupts = <88>, <89>; + resets = <&rcc STM32F4_APB2_RESET(LTDC)>; + clocks = <&rcc 1 CLK_LCD>; + clock-names = "lcd"; + + port { + ltdc_out_rgb: endpoint { + }; + }; + }; + }; +}; -- cgit v1.2.3 From cd4b298334ebc7b7bd0384c6c81de398c983c6e3 Mon Sep 17 00:00:00 2001 From: Shawn Guo Date: Thu, 6 Apr 2017 23:01:09 +0800 Subject: dt-bindings: display: add support for ZTE VGA device It adds bindings doc for ZTE VOU VGA output device. Signed-off-by: Shawn Guo Acked-by: Rob Herring Link: http://patchwork.freedesktop.org/patch/msgid/1491490870-6330-4-git-send-email-shawnguo@kernel.org --- .../devicetree/bindings/display/zte,vou.txt | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/zte,vou.txt b/Documentation/devicetree/bindings/display/zte,vou.txt index 9c356284232b..38476475fd60 100644 --- a/Documentation/devicetree/bindings/display/zte,vou.txt +++ b/Documentation/devicetree/bindings/display/zte,vou.txt @@ -58,6 +58,18 @@ Required properties: integer cells. The first cell is the offset of SYSCTRL register used to control TV Encoder DAC power, and the second cell is the bit mask. +* VGA output device + +Required properties: + - compatible: should be "zte,zx296718-vga" + - reg: Physical base address and length of the VGA device IO region + - interrupts : VGA interrupt number to CPU + - clocks: Phandle with clock-specifier pointing to VGA I2C clock. + - clock-names: Must be "i2c_wclk". + - zte,vga-power-control: the phandle to SYSCTRL block followed by two + integer cells. The first cell is the offset of SYSCTRL register used + to control VGA DAC power, and the second cell is the bit mask. + Example: vou: vou@1440000 { @@ -81,6 +93,15 @@ vou: vou@1440000 { "main_wclk", "aux_wclk"; }; + vga: vga@8000 { + compatible = "zte,zx296718-vga"; + reg = <0x8000 0x1000>; + interrupts = ; + clocks = <&topcrm VGA_I2C_WCLK>; + clock-names = "i2c_wclk"; + zte,vga-power-control = <&sysctrl 0x170 0xe0>; + }; + hdmi: hdmi@c000 { compatible = "zte,zx296718-hdmi"; reg = <0xc000 0x4000>; -- cgit v1.2.3 From b72a2816e3711474f7a85dee0565dd68eeea2f58 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 28 Apr 2017 15:42:21 -0700 Subject: drm/vc4: Turn the V3D clock on at runtime. For the Raspberry Pi's bindings, the power domain also implicitly turns on the clock and deasserts reset, but for the new Cygnus port we start representing the clock in the devicetree. v2: Document the clock-names property, check for -ENOENT for no clock in DT. v3: Drop NULL checks around clk calls which embed NULL checks. v4: Drop clk-names (feedback by Rob Herring) Signed-off-by: Eric Anholt Acked-by: Rob Herring Link: http://patchwork.freedesktop.org/patch/msgid/20170428224223.21904-1-eric@anholt.net --- .../devicetree/bindings/display/brcm,bcm-vc4.txt | 3 +++ drivers/gpu/drm/vc4/vc4_drv.h | 1 + drivers/gpu/drm/vc4/vc4_v3d.c | 31 +++++++++++++++++++++- 3 files changed, 34 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt index ca02d3e4db91..bc1756f4f791 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt +++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt @@ -59,6 +59,9 @@ Required properties for V3D: - interrupts: The interrupt number See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt +Optional properties for V3D: +- clocks: The clock the unit runs on + Required properties for DSI: - compatible: Should be "brcm,bcm2835-dsi0" or "brcm,bcm2835-dsi1" - reg: Physical base address and length of the DSI block's registers diff --git a/drivers/gpu/drm/vc4/vc4_drv.h b/drivers/gpu/drm/vc4/vc4_drv.h index b0967e2f7e88..92eb7d811bf2 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.h +++ b/drivers/gpu/drm/vc4/vc4_drv.h @@ -200,6 +200,7 @@ struct vc4_v3d { struct vc4_dev *vc4; struct platform_device *pdev; void __iomem *regs; + struct clk *clk; }; struct vc4_hvs { diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c index a88078d7c9d1..7500820e5cd5 100644 --- a/drivers/gpu/drm/vc4/vc4_v3d.c +++ b/drivers/gpu/drm/vc4/vc4_v3d.c @@ -16,6 +16,7 @@ * this program. If not, see . */ +#include "linux/clk.h" #include "linux/component.h" #include "linux/pm_runtime.h" #include "vc4_drv.h" @@ -305,6 +306,8 @@ static int vc4_v3d_runtime_suspend(struct device *dev) drm_gem_object_put_unlocked(&vc4->bin_bo->base.base); vc4->bin_bo = NULL; + clk_disable_unprepare(v3d->clk); + return 0; } @@ -318,6 +321,10 @@ static int vc4_v3d_runtime_resume(struct device *dev) if (ret) return ret; + ret = clk_prepare_enable(v3d->clk); + if (ret != 0) + return ret; + vc4_v3d_init_hw(vc4->dev); vc4_irq_postinstall(vc4->dev); @@ -348,15 +355,37 @@ static int vc4_v3d_bind(struct device *dev, struct device *master, void *data) vc4->v3d = v3d; v3d->vc4 = vc4; + v3d->clk = devm_clk_get(dev, NULL); + if (IS_ERR(v3d->clk)) { + int ret = PTR_ERR(v3d->clk); + + if (ret == -ENOENT) { + /* bcm2835 didn't have a clock reference in the DT. */ + ret = 0; + v3d->clk = NULL; + } else { + if (ret != -EPROBE_DEFER) + dev_err(dev, "Failed to get V3D clock: %d\n", + ret); + return ret; + } + } + if (V3D_READ(V3D_IDENT0) != V3D_EXPECTED_IDENT0) { DRM_ERROR("V3D_IDENT0 read 0x%08x instead of 0x%08x\n", V3D_READ(V3D_IDENT0), V3D_EXPECTED_IDENT0); return -EINVAL; } + ret = clk_prepare_enable(v3d->clk); + if (ret != 0) + return ret; + ret = vc4_allocate_bin_bo(drm); - if (ret) + if (ret) { + clk_disable_unprepare(v3d->clk); return ret; + } /* Reset the binner overflow address/size at setup, to be sure * we don't reuse an old one. -- cgit v1.2.3 From b3f7787b4687b1292e6ac9a3308002adfd9bd394 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Fri, 28 Apr 2017 15:42:23 -0700 Subject: drm/vc4: Add specific compatible strings for Cygnus. Cygnus has V3D 2.6 instead of 2.1, and doesn't use the VC4 display modules. The V3D can be uniquely identified by the IDENT[01] registers, and there's nothing to key off of for the display change other than the lack of DT nodes for the display components, but it's convention to have new compatible strings anyway. Signed-off-by: Eric Anholt Acked-by: Rob Herring Link: http://patchwork.freedesktop.org/patch/msgid/20170428224223.21904-3-eric@anholt.net --- Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt | 4 ++-- drivers/gpu/drm/vc4/vc4_drv.c | 1 + drivers/gpu/drm/vc4/vc4_v3d.c | 1 + 3 files changed, 4 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt index bc1756f4f791..284e2b14cfbe 100644 --- a/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt +++ b/Documentation/devicetree/bindings/display/brcm,bcm-vc4.txt @@ -5,7 +5,7 @@ with HDMI output and the HVS (Hardware Video Scaler) for compositing display planes. Required properties for VC4: -- compatible: Should be "brcm,bcm2835-vc4" +- compatible: Should be "brcm,bcm2835-vc4" or "brcm,cygnus-vc4" Required properties for Pixel Valve: - compatible: Should be one of "brcm,bcm2835-pixelvalve0", @@ -54,7 +54,7 @@ Required properties for VEC: See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt Required properties for V3D: -- compatible: Should be "brcm,bcm2835-v3d" +- compatible: Should be "brcm,bcm2835-v3d" or "brcm,cygnus-v3d" - reg: Physical base address and length of the V3D's registers - interrupts: The interrupt number See bindings/interrupt-controller/brcm,bcm2835-armctrl-ic.txt diff --git a/drivers/gpu/drm/vc4/vc4_drv.c b/drivers/gpu/drm/vc4/vc4_drv.c index 92fb9a41fe7c..754ce76d4b98 100644 --- a/drivers/gpu/drm/vc4/vc4_drv.c +++ b/drivers/gpu/drm/vc4/vc4_drv.c @@ -335,6 +335,7 @@ static int vc4_platform_drm_remove(struct platform_device *pdev) static const struct of_device_id vc4_of_match[] = { { .compatible = "brcm,bcm2835-vc4", }, + { .compatible = "brcm,cygnus-vc4", }, {}, }; MODULE_DEVICE_TABLE(of, vc4_of_match); diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm/vc4/vc4_v3d.c index 7500820e5cd5..c53afec34586 100644 --- a/drivers/gpu/drm/vc4/vc4_v3d.c +++ b/drivers/gpu/drm/vc4/vc4_v3d.c @@ -450,6 +450,7 @@ static int vc4_v3d_dev_remove(struct platform_device *pdev) static const struct of_device_id vc4_v3d_dt_match[] = { { .compatible = "brcm,bcm2835-v3d" }, + { .compatible = "brcm,cygnus-v3d" }, { .compatible = "brcm,vc4-v3d" }, {} }; -- cgit v1.2.3 From de120d092eeb69b5285586a9fd33b1778ce9ee27 Mon Sep 17 00:00:00 2001 From: Chen-Yu Tsai Date: Fri, 21 Apr 2017 16:38:49 +0800 Subject: dt-bindings: display: sun4i: Add component endpoint ID numbering scheme The Allwinner display pipeline contains many hardware components, some of which can consume data from one of multiple upstream components. The numbering scheme of these components must be encoded into the device tree so the driver can figure out which component out of two or more of the same type it is supposed to use or program. This patch adds the constraint that local endpoint IDs must be the index or number of the remote endpoint's hardware block, for all components in the display pipeline up to the TCONs. Signed-off-by: Chen-Yu Tsai Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 10 ++++++++++ 1 file changed, 10 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 57a8d0610062..7acdbf14ae1c 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -4,6 +4,16 @@ Allwinner A10 Display Pipeline The Allwinner A10 Display pipeline is composed of several components that are going to be documented below: +For the input port of all components up to the TCON in the display +pipeline, if there are multiple components, the local endpoint IDs +must correspond to the index of the upstream block. For example, if +the remote endpoint is Frontend 1, then the local endpoint ID must +be 1. + +Conversely, for the output ports of the same group, the remote endpoint +ID must be the index of the local hardware block. If the local backend +is backend 1, then the remote endpoint ID must be 1. + TV Encoder ---------- -- cgit v1.2.3 From f23c68a992def240fe46df8517f15171d7bd6ec2 Mon Sep 17 00:00:00 2001 From: Icenowy Zheng Date: Mon, 15 May 2017 00:30:35 +0800 Subject: dt-bindings: add bindings for DE2 on V3s SoC Allwinner V3s SoC have a display engine which have a different pipeline with older SoCs. Add document for it (new compatibles and the new "mixer" part). Signed-off-by: Icenowy Zheng Acked-by: Rob Herring Signed-off-by: Maxime Ripard --- .../bindings/display/sunxi/sun4i-drm.txt | 26 ++++++++++++++++++++-- 1 file changed, 24 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 7acdbf14ae1c..66b85a195ef2 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -41,6 +41,7 @@ Required properties: * allwinner,sun6i-a31-tcon * allwinner,sun6i-a31s-tcon * allwinner,sun8i-a33-tcon + * allwinner,sun8i-v3s-tcon - reg: base address and size of memory-mapped region - interrupts: interrupt associated to this IP - clocks: phandles to the clocks feeding the TCON. Three are needed: @@ -62,7 +63,7 @@ Required properties: second the block connected to the TCON channel 1 (usually the TV encoder) -On SoCs other than the A33, there is one more clock required: +On SoCs other than the A33 and V3s, there is one more clock required: - 'tcon-ch1': The clock driving the TCON channel 1 DRC @@ -148,6 +149,26 @@ Required properties: Documentation/devicetree/bindings/media/video-interfaces.txt. The first port should be the input endpoints, the second one the outputs +Display Engine 2.0 Mixer +------------------------ + +The DE2 mixer have many functionalities, currently only layer blending is +supported. + +Required properties: + - compatible: value must be one of: + * allwinner,sun8i-v3s-de2-mixer + - reg: base address and size of the memory-mapped region. + - clocks: phandles to the clocks feeding the mixer + * bus: the mixer interface clock + * mod: the mixer module clock + - clock-names: the clock names mentioned above + - resets: phandles to the reset controllers driving the mixer + +- ports: A ports node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. The + first port should be the input endpoints, the second one the output + Display Engine Pipeline ----------------------- @@ -162,9 +183,10 @@ Required properties: * allwinner,sun6i-a31-display-engine * allwinner,sun6i-a31s-display-engine * allwinner,sun8i-a33-display-engine + * allwinner,sun8i-v3s-display-engine - allwinner,pipelines: list of phandle to the display engine - frontends available. + frontends (DE 1.0) or mixers (DE 2.0) available. Example: -- cgit v1.2.3 From a8875f8214b6644e3c08d6b7ce1d419fdfb2b4f4 Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Wed, 5 Apr 2017 09:28:30 +0200 Subject: dt-bindings: exynos5433-decon: fix interrupts bindings DECON requires different interrupts depending on mode of work, which depends on panel it is connected to. Signed-off-by: Andrzej Hajda Signed-off-by: Inki Dae --- .../devicetree/bindings/display/exynos/exynos5433-decon.txt | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt b/Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt index c9fd7b3807e7..ba6be99cb794 100644 --- a/Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt +++ b/Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt @@ -8,12 +8,12 @@ Required properties: - compatible: value should be one of: "samsung,exynos5433-decon", "samsung,exynos5433-decon-tv"; - reg: physical base address and length of the DECON registers set. -- interrupts: should contain a list of all DECON IP block interrupts in the - order: VSYNC, LCD_SYSTEM. The interrupt specifier format - depends on the interrupt controller used. -- interrupt-names: should contain the interrupt names: "vsync", "lcd_sys" - in the same order as they were listed in the interrupts - property. +- interrupt-names: should contain the interrupt names depending on mode of work: + video mode: "vsync", + command mode: "lcd_sys". +- interrupts or interrupts-extended: list of interrupt specifiers corresponding + to names privided in interrupt-names, as described in + interrupt-controller/interrupts.txt - clocks: must include clock specifiers corresponding to entries in the clock-names property. - clock-names: list of clock names sorted in the same order as the clocks -- cgit v1.2.3 From f8b7f1f86fbebe81d996dcb51231bc0536569a4f Mon Sep 17 00:00:00 2001 From: Andrzej Hajda Date: Wed, 5 Apr 2017 09:28:31 +0200 Subject: dt-bindings: exynos5433-decon: add TE interrupt binding DECON command mode can use hardware trigger where transmission is triggered automatically, or software trigger - where TE interrupt handler should trigger transmission. DECON will use software trigger if TE interrupt is specified. Signed-off-by: Andrzej Hajda Signed-off-by: Inki Dae --- Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt b/Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt index ba6be99cb794..549c538b38a5 100644 --- a/Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt +++ b/Documentation/devicetree/bindings/display/exynos/exynos5433-decon.txt @@ -10,7 +10,8 @@ Required properties: - reg: physical base address and length of the DECON registers set. - interrupt-names: should contain the interrupt names depending on mode of work: video mode: "vsync", - command mode: "lcd_sys". + command mode: "lcd_sys", + command mode with software trigger: "lcd_sys", "te". - interrupts or interrupts-extended: list of interrupt specifiers corresponding to names privided in interrupt-names, as described in interrupt-controller/interrupts.txt -- cgit v1.2.3 From 1240f0b9eaa88c6c287c379f6edf303ebe9ec979 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Sat, 27 May 2017 18:09:33 +0200 Subject: dt-bindings: display: sun4i: Add HDMI display bindings One of the possible output of the display pipeline, on the SoCs that have it, is the HDMI controller. Add a binding for it. Acked-by: Chen-Yu Tsai Acked-by: Rob Herring Signed-off-by: Maxime Ripard --- .../bindings/display/sunxi/sun4i-drm.txt | 79 ++++++++++++++++++++++ 1 file changed, 79 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 66b85a195ef2..c6ad76d7438a 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -14,6 +14,34 @@ Conversely, for the output ports of the same group, the remote endpoint ID must be the index of the local hardware block. If the local backend is backend 1, then the remote endpoint ID must be 1. +HDMI Encoder +------------ + +The HDMI Encoder supports the HDMI video and audio outputs, and does +CEC. It is one end of the pipeline. + +Required properties: + - compatible: value must be one of: + * allwinner,sun5i-a10s-hdmi + - reg: base address and size of memory-mapped region + - interrupts: interrupt associated to this IP + - clocks: phandles to the clocks feeding the HDMI encoder + * ahb: the HDMI interface clock + * mod: the HDMI module clock + * pll-0: the first video PLL + * pll-1: the second video PLL + - clock-names: the clock names mentioned above + - dmas: phandles to the DMA channels used by the HDMI encoder + * ddc-tx: The channel for DDC transmission + * ddc-rx: The channel for DDC reception + * audio-tx: The channel used for audio transmission + - dma-names: the channel names mentioned above + + - ports: A ports node with endpoint definitions as defined in + Documentation/devicetree/bindings/media/video-interfaces.txt. The + first port should be the input endpoint. The second should be the + output, usually to an HDMI connector. + TV Encoder ---------- @@ -205,6 +233,57 @@ panel: panel { }; }; +connector { + compatible = "hdmi-connector"; + type = "a"; + + port { + hdmi_con_in: endpoint { + remote-endpoint = <&hdmi_out_con>; + }; + }; +}; + +hdmi: hdmi@01c16000 { + compatible = "allwinner,sun5i-a10s-hdmi"; + reg = <0x01c16000 0x1000>; + interrupts = <58>; + clocks = <&ccu CLK_AHB_HDMI>, <&ccu CLK_HDMI>, + <&ccu CLK_PLL_VIDEO0_2X>, + <&ccu CLK_PLL_VIDEO1_2X>; + clock-names = "ahb", "mod", "pll-0", "pll-1"; + dmas = <&dma SUN4I_DMA_NORMAL 16>, + <&dma SUN4I_DMA_NORMAL 16>, + <&dma SUN4I_DMA_DEDICATED 24>; + dma-names = "ddc-tx", "ddc-rx", "audio-tx"; + status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + #address-cells = <1>; + #size-cells = <0>; + reg = <0>; + + hdmi_in_tcon0: endpoint { + remote-endpoint = <&tcon0_out_hdmi>; + }; + }; + + port@1 { + #address-cells = <1>; + #size-cells = <0>; + reg = <1>; + + hdmi_out_con: endpoint { + remote-endpoint = <&hdmi_con_in>; + }; + }; + }; +}; + tve0: tv-encoder@01c0a000 { compatible = "allwinner,sun4i-a10-tv-encoder"; reg = <0x01c0a000 0x1000>; -- cgit v1.2.3 From 22662f12768f971809b478386d9cc4947d00497a Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Sat, 27 May 2017 18:09:34 +0200 Subject: dt-bindings: display: sun4i: Add allwinner,tcon-channel property The Allwinner Timings Controller has two, mutually exclusive, channels. When the binding has been introduced, it was assumed that there would be only a single user per channel in the system. While this is likely for the channel 0 which only connects to LCD displays, it turns out that the channel 1 can be connected to multiple controllers in the SoC (HDMI and TV encoders for example). And while the simultaneous use of HDMI and TV outputs cannot be achieved, switching from one to the other at runtime definitely sounds plausible. Add an extra property, allwinner,tcon-channel, to specify for a given endpoint which TCON channel it is connected to, while falling back to the previous mechanism if that property is missing. Acked-by: Chen-Yu Tsai Acked-by: Rob Herring Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index c6ad76d7438a..58fa32900184 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -86,10 +86,13 @@ Required properties: Documentation/devicetree/bindings/media/video-interfaces.txt. The first port should be the input endpoint, the second one the output - The output should have two endpoints. The first is the block - connected to the TCON channel 0 (usually a panel or a bridge), the - second the block connected to the TCON channel 1 (usually the TV - encoder) + The output may have multiple endpoints. The TCON has two channels, + usually with the first channel being used for the panels interfaces + (RGB, LVDS, etc.), and the second being used for the outputs that + require another controller (TV Encoder, HDMI, etc.). The endpoints + will take an extra property, allwinner,tcon-channel, to specify the + channel the endpoint is associated to. If that property is not + present, the endpoint number will be used as the channel number. On SoCs other than the A33 and V3s, there is one more clock required: - 'tcon-ch1': The clock driving the TCON channel 1 -- cgit v1.2.3 From 110d33dd428ea49b9482bcb780fb096dfb4dcd3e Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Sat, 27 May 2017 18:09:36 +0200 Subject: drm/sun4i: Add compatible for the A10s pipeline The A10s has a slightly different display pipeline than the A13, with an HDMI controller. Add a compatible for it. Reviewed-by: Chen-Yu Tsai Acked-by: Rob Herring Signed-off-by: Maxime Ripard --- Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt | 1 + drivers/gpu/drm/sun4i/sun4i_drv.c | 1 + 2 files changed, 2 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt index 58fa32900184..b83e6018041d 100644 --- a/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt +++ b/Documentation/devicetree/bindings/display/sunxi/sun4i-drm.txt @@ -210,6 +210,7 @@ extra node. Required properties: - compatible: value must be one of: + * allwinner,sun5i-a10s-display-engine * allwinner,sun5i-a13-display-engine * allwinner,sun6i-a31-display-engine * allwinner,sun6i-a31s-display-engine diff --git a/drivers/gpu/drm/sun4i/sun4i_drv.c b/drivers/gpu/drm/sun4i/sun4i_drv.c index cfc0b2fcb0a6..f19100c91c2b 100644 --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@ -305,6 +305,7 @@ static int sun4i_drv_remove(struct platform_device *pdev) } static const struct of_device_id sun4i_drv_of_table[] = { + { .compatible = "allwinner,sun5i-a10s-display-engine" }, { .compatible = "allwinner,sun5i-a13-display-engine" }, { .compatible = "allwinner,sun6i-a31-display-engine" }, { .compatible = "allwinner,sun6i-a31s-display-engine" }, -- cgit v1.2.3 From ead9d5b1769442ca19daa5da1d43fbf9e391d826 Mon Sep 17 00:00:00 2001 From: Chris Zhong Date: Fri, 24 Mar 2017 08:51:31 +0800 Subject: dt-bindings: Add INNOLUX P079ZCA panel bindings The Innolux P079ZCA is a 7.85" panel with a 768X1024 resolution and connected to DSI using four lanes. Signed-off-by: Chris Zhong Reviewed-by: Brian Norris Acked-by: Rob Herring Signed-off-by: Thierry Reding Link: http://patchwork.freedesktop.org/patch/msgid/1490316692-20506-1-git-send-email-zyw@rock-chips.com --- .../bindings/display/panel/innolux,p079zca.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/innolux,p079zca.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/panel/innolux,p079zca.txt b/Documentation/devicetree/bindings/display/panel/innolux,p079zca.txt new file mode 100644 index 000000000000..5c70a8380e58 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/innolux,p079zca.txt @@ -0,0 +1,23 @@ +Innolux P079ZCA 7.85" 768x1024 TFT LCD panel + +Required properties: +- compatible: should be "innolux,p079zca" +- reg: DSI virtual channel of the peripheral +- power-supply: phandle of the regulator that provides the supply voltage +- enable-gpios: panel enable gpio + +Optional properties: +- backlight: phandle of the backlight device attached to the panel + +Example: + + &mipi_dsi { + panel { + compatible = "innolux,p079zca"; + reg = <0>; + power-supply = <...>; + backlight = <&backlight>; + enable-gpios = <&gpio1 13 GPIO_ACTIVE_HIGH>; + status = "okay"; + }; + }; -- cgit v1.2.3 From 01bacc13a39d65c052f087180f6c97863282403a Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 8 Jun 2017 20:07:55 +0200 Subject: drm/panel: simple: add support for NEC NL12880B20-05 This adds support for the NEC LCD Technologies, Ltd. 12.1" WXGA (1280x800) LVDS TFT LCD panel, which can be supported by the simple panel driver. Signed-off-by: Lucas Stach Signed-off-by: Thierry Reding Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-1-l.stach@pengutronix.de --- .../bindings/display/panel/nec,nl12880b20-05.txt | 8 ++++++ drivers/gpu/drm/panel/panel-simple.c | 30 ++++++++++++++++++++++ 2 files changed, 38 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/nec,nl12880b20-05.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/panel/nec,nl12880b20-05.txt b/Documentation/devicetree/bindings/display/panel/nec,nl12880b20-05.txt new file mode 100644 index 000000000000..71cbc49ecfab --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/nec,nl12880b20-05.txt @@ -0,0 +1,8 @@ +NEC LCD Technologies, Ltd. 12.1" WXGA (1280x800) LVDS TFT LCD panel + +Required properties: +- compatible: should be "nec,nl12880bc20-05" +- power-supply: as specified in the base binding + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index c4566ce8fda7..585b37f9171a 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1322,6 +1322,33 @@ static const struct panel_desc lg_lp129qe = { }, }; +static const struct display_timing nec_nl12880bc20_05_timing = { + .pixelclock = { 67000000, 71000000, 75000000 }, + .hactive = { 1280, 1280, 1280 }, + .hfront_porch = { 2, 30, 30 }, + .hback_porch = { 6, 100, 100 }, + .hsync_len = { 2, 30, 30 }, + .vactive = { 800, 800, 800 }, + .vfront_porch = { 5, 5, 5 }, + .vback_porch = { 11, 11, 11 }, + .vsync_len = { 7, 7, 7 }, +}; + +static const struct panel_desc nec_nl12880bc20_05 = { + .timings = &nec_nl12880bc20_05_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 261, + .height = 163, + }, + .delay = { + .enable = 50, + .disable = 50, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, +}; + static const struct drm_display_mode nec_nl4827hc19_05b_mode = { .clock = 10870, .hdisplay = 480, @@ -1971,6 +1998,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "lg,lp129qe", .data = &lg_lp129qe, + }, { + .compatible = "nec,nl12880bc20-05", + .data = &nec_nl12880bc20_05, }, { .compatible = "nec,nl4827hc19-05b", .data = &nec_nl4827hc19_05b, -- cgit v1.2.3 From fa9b4b6ff44e2e1747b2f5e5401d4e94b283999c Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 8 Jun 2017 20:07:56 +0200 Subject: dt-bindings: add vendor prefix for NLT Technologies, Ltd. NLT technologies is the former NEC display business, but changed its name to NLT Technologies when forming a joint venture with Shenzhen AVIC OPTOELECTRONICS, Ltd. Signed-off-by: Lucas Stach Acked-by: Rob Herring Signed-off-by: Thierry Reding Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-2-l.stach@pengutronix.de --- Documentation/devicetree/bindings/vendor-prefixes.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt index c03d20140366..f08284e7439b 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.txt +++ b/Documentation/devicetree/bindings/vendor-prefixes.txt @@ -219,6 +219,7 @@ nexbox Nexbox newhaven Newhaven Display International ni National Instruments nintendo Nintendo +nlt NLT Technologies, Ltd. nokia Nokia nordic Nordic Semiconductor nuvoton Nuvoton Technology Corporation -- cgit v1.2.3 From 4177fa66a3248e3a5f4b512380a7fc5fce68e76d Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 8 Jun 2017 20:07:57 +0200 Subject: drm/panel: simple: add support for NLT NL192108AC18-02D This adds support for the NLT Technologies NL192108AC18-02D 15.6" LVDS FullHD TFT LCD panel, which can be supported by the simple panel driver. Timings are taken from the preliminary datasheet, as a final one is not yet available. Signed-off-by: Lucas Stach Acked-by: Rob Herring Signed-off-by: Thierry Reding Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-3-l.stach@pengutronix.de --- .../display/panel/nlt,nl192108ac18-02d.txt | 8 ++++++ drivers/gpu/drm/panel/panel-simple.c | 29 ++++++++++++++++++++++ 2 files changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/nlt,nl192108ac18-02d.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/panel/nlt,nl192108ac18-02d.txt b/Documentation/devicetree/bindings/display/panel/nlt,nl192108ac18-02d.txt new file mode 100644 index 000000000000..1a639fd8778d --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/nlt,nl192108ac18-02d.txt @@ -0,0 +1,8 @@ +NLT Technologies, Ltd. 15.6" FHD (1920x1080) LVDS TFT LCD panel + +Required properties: +- compatible: should be "nlt,nl192108ac18-02d" +- power-supply: as specified in the base binding + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 585b37f9171a..99758e38525e 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -1398,6 +1398,32 @@ static const struct panel_desc netron_dy_e231732 = { .bus_format = MEDIA_BUS_FMT_RGB666_1X18, }; +static const struct display_timing nlt_nl192108ac18_02d_timing = { + .pixelclock = { 130000000, 148350000, 163000000 }, + .hactive = { 1920, 1920, 1920 }, + .hfront_porch = { 80, 100, 100 }, + .hback_porch = { 100, 120, 120 }, + .hsync_len = { 50, 60, 60 }, + .vactive = { 1080, 1080, 1080 }, + .vfront_porch = { 12, 30, 30 }, + .vback_porch = { 4, 10, 10 }, + .vsync_len = { 4, 5, 5 }, +}; + +static const struct panel_desc nlt_nl192108ac18_02d = { + .timings = &nlt_nl192108ac18_02d_timing, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 344, + .height = 194, + }, + .delay = { + .unprepare = 500, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, +}; + static const struct drm_display_mode nvd_9128_mode = { .clock = 29500, .hdisplay = 800, @@ -2007,6 +2033,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "netron-dy,e231732", .data = &netron_dy_e231732, + }, { + .compatible = "nlt,nl192108ac18-02d", + .data = &nlt_nl192108ac18_02d, }, { .compatible = "nvd,9128", .data = &nvd_9128, -- cgit v1.2.3 From 70c0d5b783f518889e1df43dd70260790816b1dc Mon Sep 17 00:00:00 2001 From: Lucas Stach Date: Thu, 8 Jun 2017 20:07:58 +0200 Subject: drm/panel: simple: add support for AUO P320HVN03 This adds support for the AU Optronics Corporation 31.5" FHD (1920x1080) LVDS TFT LCD panel, which can be supported by the simple panel driver Signed-off-by: Lucas Stach Acked-by: Rob Herring Signed-off-by: Thierry Reding Link: http://patchwork.freedesktop.org/patch/msgid/20170608180758.31020-4-l.stach@pengutronix.de --- .../bindings/display/panel/auo,p320hvn03.txt | 8 ++++++ drivers/gpu/drm/panel/panel-simple.c | 31 ++++++++++++++++++++++ 2 files changed, 39 insertions(+) create mode 100644 Documentation/devicetree/bindings/display/panel/auo,p320hvn03.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/panel/auo,p320hvn03.txt b/Documentation/devicetree/bindings/display/panel/auo,p320hvn03.txt new file mode 100644 index 000000000000..59bb6cd8aa75 --- /dev/null +++ b/Documentation/devicetree/bindings/display/panel/auo,p320hvn03.txt @@ -0,0 +1,8 @@ +AU Optronics Corporation 31.5" FHD (1920x1080) TFT LCD panel + +Required properties: +- compatible: should be "auo,p320hvn03" +- power-supply: as specified in the base binding + +This binding is compatible with the simple-panel binding, which is specified +in simple-panel.txt in this directory. diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 99758e38525e..474fa759e06e 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -638,6 +638,34 @@ static const struct panel_desc auo_g185han01 = { .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_SPWG, }; +static const struct display_timing auo_p320hvn03_timings = { + .pixelclock = { 106000000, 148500000, 164000000 }, + .hactive = { 1920, 1920, 1920 }, + .hfront_porch = { 25, 50, 130 }, + .hback_porch = { 25, 50, 130 }, + .hsync_len = { 20, 40, 105 }, + .vactive = { 1080, 1080, 1080 }, + .vfront_porch = { 8, 17, 150 }, + .vback_porch = { 8, 17, 150 }, + .vsync_len = { 4, 11, 100 }, +}; + +static const struct panel_desc auo_p320hvn03 = { + .timings = &auo_p320hvn03_timings, + .num_timings = 1, + .bpc = 8, + .size = { + .width = 698, + .height = 393, + }, + .delay = { + .prepare = 1, + .enable = 450, + .unprepare = 500, + }, + .bus_format = MEDIA_BUS_FMT_RGB888_1X7X4_JEIDA, +}; + static const struct drm_display_mode auo_t215hvn01_mode = { .clock = 148800, .hdisplay = 1920, @@ -1940,6 +1968,9 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "auo,g185han01", .data = &auo_g185han01, + }, { + .compatible = "auo,p320hvn03", + .data = &auo_p320hvn03, }, { .compatible = "auo,t215hvn01", .data = &auo_t215hvn01, -- cgit v1.2.3 From 60ee02bf9a54b925d8b655069ad9a1444667ee40 Mon Sep 17 00:00:00 2001 From: Hoegeun Kwon Date: Tue, 18 Apr 2017 17:40:34 +0900 Subject: dt-bindings: Add support for samsung s6e3hf2 panel The samsung s6e3hf2 panel is a 5.65" 1600x2560 AMOLED panel connected using MIPI-DSI interfaces. The s6e3hf2 is add to samsung,s6e3ha2.txt binding because it is a panel similar to the s6e3ha2. So add the compatible string and comments. Signed-off-by: Hoegeun Kwon Reviewed-by: Andrzej Hajda Acked-by: Rob Herring Signed-off-by: Thierry Reding Link: http://patchwork.freedesktop.org/patch/msgid/1492504836-19225-2-git-send-email-hoegeun.kwon@samsung.com --- Documentation/devicetree/bindings/display/panel/samsung,s6e3ha2.txt | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/display/panel/samsung,s6e3ha2.txt b/Documentation/devicetree/bindings/display/panel/samsung,s6e3ha2.txt index 18854f4c8376..4acea25c244b 100644 --- a/Documentation/devicetree/bindings/display/panel/samsung,s6e3ha2.txt +++ b/Documentation/devicetree/bindings/display/panel/samsung,s6e3ha2.txt @@ -1,7 +1,10 @@ Samsung S6E3HA2 5.7" 1440x2560 AMOLED panel +Samsung S6E3HF2 5.65" 1600x2560 AMOLED panel Required properties: - - compatible: "samsung,s6e3ha2" + - compatible: should be one of: + "samsung,s6e3ha2", + "samsung,s6e3hf2". - reg: the virtual channel number of a DSI peripheral - vdd3-supply: I/O voltage supply - vci-supply: voltage supply for analog circuits -- cgit v1.2.3