From 62b0a1b3e7593e0647db9ecc5e7809e4410acb81 Mon Sep 17 00:00:00 2001 From: Alexander Shiyan Date: Sat, 6 Sep 2014 07:20:15 +0400 Subject: serial: clps711x: Use mctrl_gpio helpers for handling modem signals CLPS711X serial driver uses the system wide registers to control the modem signals. Now gpio-syscon driver can be used for this purposes. mctrl_gpio helpers allow us to create GPIO bindings for any of modem/tty control signals that extends the functionality of the driver. This patch makes such change. This change does not break any current DT bindings, since DT support for this platform is not introduced yet. Signed-off-by: Alexander Shiyan Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/cirrus,clps711x-uart.txt | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/serial/cirrus,clps711x-uart.txt b/Documentation/devicetree/bindings/serial/cirrus,clps711x-uart.txt index 12f3cf834deb..caaeb2583579 100644 --- a/Documentation/devicetree/bindings/serial/cirrus,clps711x-uart.txt +++ b/Documentation/devicetree/bindings/serial/cirrus,clps711x-uart.txt @@ -8,7 +8,8 @@ Required properties: - syscon: Phandle to SYSCON node, which contain UART control bits. Optional properties: -- uart-use-ms: Indicate the UART has modem signal (DCD, DSR, CTS). +- {rts,cts,dtr,dsr,rng,dcd}-gpios: specify a GPIO for RTS/CTS/DTR/DSR/RI/DCD + line respectively. Note: Each UART port should have an alias correctly numbered in "aliases" node. @@ -24,5 +25,7 @@ Example: interrupts = <12 13>; clocks = <&clks 11>; syscon = <&syscon1>; - uart-use-ms; + cts-gpios = <&sysgpio 0 GPIO_ACTIVE_LOW>; + dsr-gpios = <&sysgpio 1 GPIO_ACTIVE_LOW>; + dcd-gpios = <&sysgpio 2 GPIO_ACTIVE_LOW>; }; -- cgit v1.2.3 From a6eec92ec0815ce8ce57e4746e9f717d4146d869 Mon Sep 17 00:00:00 2001 From: Peter Hurley Date: Tue, 2 Sep 2014 17:39:10 -0400 Subject: Revert "serial: uart: add hw flow control support configuration" This reverts commit 06aa82e498c144c7784a6f3d3b55458b272d6146. This commit purports to enable auto CTS flow control for the 8250 UART driver. However, the 8250 UART driver already supports auto CTS flow control via UART_CAP_AFE and UART_CAP_EFR. Indeed, this patch introduces another DT attribute for which an existing firmware flag already exists ("auto-flow-control"). Furthermore, the use of UPF_HARD_FLOW requires the UART driver to define .throttle and .unthrottle methods, neither of which are defined for the 8250 UART driver (which will result in a NULL ptr dereference). Finally, this patch supposes to fix existing bugs in the serial core for auto CTS-enabled hardware, but does not include the class of hardware for which these bugs exist. CC: Murali Karicheri CC: Rob Herring Signed-off-by: Peter Hurley Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/of-serial.txt | 1 - drivers/tty/serial/8250/8250_core.c | 6 ++---- drivers/tty/serial/of_serial.c | 4 ---- drivers/tty/serial/serial_core.c | 12 +++--------- 4 files changed, 5 insertions(+), 18 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt index 77054772a8f4..1928a3e83cd0 100644 --- a/Documentation/devicetree/bindings/serial/of-serial.txt +++ b/Documentation/devicetree/bindings/serial/of-serial.txt @@ -37,7 +37,6 @@ Optional properties: - auto-flow-control: one way to enable automatic flow control support. The driver is allowed to detect support for the capability even without this property. -- has-hw-flow-control: the hardware has flow control capability. Example: diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c index b28ed1beb50f..46c1f5fc44d3 100644 --- a/drivers/tty/serial/8250/8250_core.c +++ b/drivers/tty/serial/8250/8250_core.c @@ -2319,11 +2319,9 @@ serial8250_do_set_termios(struct uart_port *port, struct ktermios *termios, * the trigger, or the MCR RTS bit is cleared. In the case where * the remote UART is not using CTS auto flow control, we must * have sufficient FIFO entries for the latency of the remote - * UART to respond. IOW, at least 32 bytes of FIFO. Also enable - * AFE if hw flow control is supported + * UART to respond. IOW, at least 32 bytes of FIFO. */ - if ((up->capabilities & UART_CAP_AFE && (port->fifosize >= 32)) || - (port->flags & UPF_HARD_FLOW)) { + if (up->capabilities & UART_CAP_AFE && port->fifosize >= 32) { up->mcr &= ~UART_MCR_AFE; if (termios->c_cflag & CRTSCTS) up->mcr |= UART_MCR_AFE; diff --git a/drivers/tty/serial/of_serial.c b/drivers/tty/serial/of_serial.c index 68d4455f3cf9..27981e2b9430 100644 --- a/drivers/tty/serial/of_serial.c +++ b/drivers/tty/serial/of_serial.c @@ -183,10 +183,6 @@ static int of_platform_serial_probe(struct platform_device *ofdev) "auto-flow-control")) port8250.capabilities |= UART_CAP_AFE; - if (of_property_read_bool(ofdev->dev.of_node, - "has-hw-flow-control")) - port8250.port.flags |= UPF_HARD_FLOW; - ret = serial8250_register_8250_port(&port8250); break; } diff --git a/drivers/tty/serial/serial_core.c b/drivers/tty/serial/serial_core.c index 079f18d84b03..2e57d5b6347d 100644 --- a/drivers/tty/serial/serial_core.c +++ b/drivers/tty/serial/serial_core.c @@ -175,12 +175,8 @@ static int uart_port_startup(struct tty_struct *tty, struct uart_state *state, if (tty->termios.c_cflag & CBAUD) uart_set_mctrl(uport, TIOCM_RTS | TIOCM_DTR); } - /* - * if hw support flow control without software intervention, - * then skip the below check - */ - if (tty_port_cts_enabled(port) && - !(uport->flags & UPF_HARD_FLOW)) { + + if (tty_port_cts_enabled(port)) { spin_lock_irq(&uport->lock); if (!(uport->ops->get_mctrl(uport) & TIOCM_CTS)) tty->hw_stopped = 1; @@ -2789,9 +2785,7 @@ void uart_handle_cts_change(struct uart_port *uport, unsigned int status) uport->icount.cts++; - /* skip below code if the hw flow control is supported */ - if (tty_port_cts_enabled(port) && - !(uport->flags & UPF_HARD_FLOW)) { + if (tty_port_cts_enabled(port)) { if (tty->hw_stopped) { if (status) { tty->hw_stopped = 0; -- cgit v1.2.3 From 7d480ef776b53c43ec70155bfefbddc71b4d0883 Mon Sep 17 00:00:00 2001 From: Jingchang Lu Date: Fri, 5 Sep 2014 10:35:14 +0800 Subject: doc: dt-binding: of-serial: add Freescale 64-byte FIFO mode uart binding This add the 64-byte FIFO mode device tree binding for Freescale DUART. Signed-off-by: Jingchang Lu Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/serial/of-serial.txt | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/of-serial.txt index 1928a3e83cd0..8c4fd0332028 100644 --- a/Documentation/devicetree/bindings/serial/of-serial.txt +++ b/Documentation/devicetree/bindings/serial/of-serial.txt @@ -14,6 +14,7 @@ Required properties: - "altr,16550-FIFO32" - "altr,16550-FIFO64" - "altr,16550-FIFO128" + - "fsl,16550-FIFO64" - "serial" if the port type is unknown. - reg : offset and length of the register set for the device. - interrupts : should contain uart interrupt. -- cgit v1.2.3 From ae382735247e2daebeed3bafd400ff71039d2241 Mon Sep 17 00:00:00 2001 From: Alexey Charkov Date: Sat, 6 Sep 2014 21:21:12 +0400 Subject: tty: vt8500_serial: add support for UART in WM8880 chips Newer WonderMedia chips introduced another flag in the UART line control register, which controls whether RTS/CTS signalling should be handled in the driver or by the hardware itself. This patch ensures that the kernel can control RTS/CTS (including disabling it altogether) by forcing this flag to software mode on affected chips (only WM8880 so far). Also remove the redundant copy of the binding doc, while we are here. Signed-off-by: Alexey Charkov Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/serial/via,vt8500-uart.txt | 17 ------ .../devicetree/bindings/serial/vt8500-uart.txt | 3 +- drivers/tty/serial/vt8500_serial.c | 70 +++++++++++++++++----- 3 files changed, 58 insertions(+), 32 deletions(-) delete mode 100644 Documentation/devicetree/bindings/serial/via,vt8500-uart.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/serial/via,vt8500-uart.txt b/Documentation/devicetree/bindings/serial/via,vt8500-uart.txt deleted file mode 100644 index 5feef1ef167d..000000000000 --- a/Documentation/devicetree/bindings/serial/via,vt8500-uart.txt +++ /dev/null @@ -1,17 +0,0 @@ -VIA/Wondermedia VT8500 UART Controller ------------------------------------------------------ - -Required properties: -- compatible : "via,vt8500-uart" -- reg : Should contain 1 register ranges(address and length) -- interrupts : UART interrupt -- clocks : phandle to the uart source clock (usually a 24Mhz fixed clock) - -Example: - - uart@d8210000 { - compatible = "via,vt8500-uart"; - reg = <0xd8210000 0x1040>; - interrupts = <47>; - clocks = <&ref24>; - }; diff --git a/Documentation/devicetree/bindings/serial/vt8500-uart.txt b/Documentation/devicetree/bindings/serial/vt8500-uart.txt index 795c393d09c4..2b64e6107fb3 100644 --- a/Documentation/devicetree/bindings/serial/vt8500-uart.txt +++ b/Documentation/devicetree/bindings/serial/vt8500-uart.txt @@ -1,7 +1,8 @@ * VIA VT8500 and WonderMedia WM8xxx UART Controller Required properties: -- compatible: should be "via,vt8500-uart" +- compatible: should be "via,vt8500-uart" (for VIA/WonderMedia chips up to and + including WM8850/WM8950), or "wm,wm8880-uart" (for WM8880 and later) - reg: base physical address of the controller and length of memory mapped region. diff --git a/drivers/tty/serial/vt8500_serial.c b/drivers/tty/serial/vt8500_serial.c index 15ad6fcda88b..f22571915185 100644 --- a/drivers/tty/serial/vt8500_serial.c +++ b/drivers/tty/serial/vt8500_serial.c @@ -33,8 +33,8 @@ #include #include #include -#include #include +#include #include /* @@ -78,6 +78,29 @@ #define RX_FIFO_INTS (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT) #define TX_FIFO_INTS (TXFAE | TXFE | TXUDR) +/* + * Line control bits + */ + +#define VT8500_TXEN (1 << 0) /* Enable transmit logic */ +#define VT8500_RXEN (1 << 1) /* Enable receive logic */ +#define VT8500_CS8 (1 << 2) /* 8-bit data length (vs. 7-bit) */ +#define VT8500_CSTOPB (1 << 3) /* 2 stop bits (vs. 1) */ +#define VT8500_PARENB (1 << 4) /* Enable parity */ +#define VT8500_PARODD (1 << 5) /* Odd parity (vs. even) */ +#define VT8500_RTS (1 << 6) /* Ready to send */ +#define VT8500_LOOPBK (1 << 7) /* Enable internal loopback */ +#define VT8500_DMA (1 << 8) /* Enable DMA mode (needs FIFO) */ +#define VT8500_BREAK (1 << 9) /* Initiate break signal */ +#define VT8500_PSLVERR (1 << 10) /* APB error upon empty RX FIFO read */ +#define VT8500_SWRTSCTS (1 << 11) /* Software-controlled RTS/CTS */ + +/* + * Capability flags (driver-internal) + */ + +#define VT8500_HAS_SWRTSCTS_SWITCH (1 << 1) + #define VT8500_MAX_PORTS 6 struct vt8500_port { @@ -85,6 +108,7 @@ struct vt8500_port { char name[16]; struct clk *clk; unsigned int ier; + unsigned int vt8500_uart_flags; }; /* @@ -272,7 +296,8 @@ static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl) static void vt8500_break_ctl(struct uart_port *port, int break_ctl) { if (break_ctl) - vt8500_write(port, vt8500_read(port, VT8500_URLCR) | (1 << 9), + vt8500_write(port, + vt8500_read(port, VT8500_URLCR) | VT8500_BREAK, VT8500_URLCR); } @@ -347,31 +372,35 @@ static void vt8500_set_termios(struct uart_port *port, /* calculate parity */ lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR); - lcr &= ~((1 << 5) | (1 << 4)); + lcr &= ~(VT8500_PARENB | VT8500_PARODD); if (termios->c_cflag & PARENB) { - lcr |= (1 << 4); + lcr |= VT8500_PARENB; termios->c_cflag &= ~CMSPAR; if (termios->c_cflag & PARODD) - lcr |= (1 << 5); + lcr |= VT8500_PARODD; } /* calculate bits per char */ - lcr &= ~(1 << 2); + lcr &= ~VT8500_CS8; switch (termios->c_cflag & CSIZE) { case CS7: break; case CS8: default: - lcr |= (1 << 2); + lcr |= VT8500_CS8; termios->c_cflag &= ~CSIZE; termios->c_cflag |= CS8; break; } /* calculate stop bits */ - lcr &= ~(1 << 3); + lcr &= ~VT8500_CSTOPB; if (termios->c_cflag & CSTOPB) - lcr |= (1 << 3); + lcr |= VT8500_CSTOPB; + + lcr &= ~VT8500_SWRTSCTS; + if (vt8500_port->vt8500_uart_flags & VT8500_HAS_SWRTSCTS_SWITCH) + lcr |= VT8500_SWRTSCTS; /* set parity, bits per char, and stop bit */ vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR); @@ -548,14 +577,31 @@ static struct uart_driver vt8500_uart_driver = { .cons = VT8500_CONSOLE, }; +static unsigned int vt8500_flags; /* none required so far */ +static unsigned int wm8880_flags = VT8500_HAS_SWRTSCTS_SWITCH; + +static const struct of_device_id wmt_dt_ids[] = { + { .compatible = "via,vt8500-uart", .data = &vt8500_flags}, + { .compatible = "wm,wm8880-uart", .data = &wm8880_flags}, + {} +}; + static int vt8500_serial_probe(struct platform_device *pdev) { struct vt8500_port *vt8500_port; struct resource *mmres, *irqres; struct device_node *np = pdev->dev.of_node; + const struct of_device_id *match; + const unsigned int *flags; int ret; int port; + match = of_match_device(wmt_dt_ids, &pdev->dev); + if (!match) + return -EINVAL; + + flags = match->data; + mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); if (!mmres || !irqres) @@ -605,6 +651,7 @@ static int vt8500_serial_probe(struct platform_device *pdev) return ret; } + vt8500_port->vt8500_uart_flags = *flags; vt8500_port->uart.type = PORT_VT8500; vt8500_port->uart.iotype = UPIO_MEM; vt8500_port->uart.mapbase = mmres->start; @@ -639,11 +686,6 @@ static int vt8500_serial_remove(struct platform_device *pdev) return 0; } -static const struct of_device_id wmt_dt_ids[] = { - { .compatible = "via,vt8500-uart", }, - {} -}; - static struct platform_driver vt8500_platform_driver = { .probe = vt8500_serial_probe, .remove = vt8500_serial_remove, -- cgit v1.2.3 From 76ce677063e9194d48d9d44377c4f7f7c1c2e3d3 Mon Sep 17 00:00:00 2001 From: Matthias Brugger Date: Tue, 9 Sep 2014 17:31:43 +0200 Subject: DTS: serial: Add bindings documention for the Mediatek UARTs This patch adds the devicetree documentation for the Mediatek UART. Signed-off-by: Matthias Brugger Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/serial/mtk-uart.txt | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 Documentation/devicetree/bindings/serial/mtk-uart.txt (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/serial/mtk-uart.txt b/Documentation/devicetree/bindings/serial/mtk-uart.txt new file mode 100644 index 000000000000..48358a33ea7d --- /dev/null +++ b/Documentation/devicetree/bindings/serial/mtk-uart.txt @@ -0,0 +1,22 @@ +* Mediatek Universal Asynchronous Receiver/Transmitter (UART) + +Required properties: +- compatible should contain: + * "mediatek,mt6589-uart" for MT6589 compatible UARTS + * "mediatek,mt6582-uart" for MT6582 compatible UARTS + * "mediatek,mt6577-uart" for all compatible UARTS (MT6589, MT6582, MT6577) + +- reg: The base address of the UART register bank. + +- interrupts: A single interrupt specifier. + +- clocks: Clock driving the hardware. + +Example: + + uart0: serial@11006000 { + compatible = "mediatek,mt6589-uart", "mediatek,mt6577-uart"; + reg = <0x11006000 0x400>; + interrupts = ; + clocks = <&uart_clk>; + }; -- cgit v1.2.3