From ee11ae36b2c8e3b11a6eff4bf51eb3065ce5f94b Mon Sep 17 00:00:00 2001 From: Aswath Govindraju Date: Thu, 14 Apr 2022 16:02:08 +0530 Subject: dt-bindings: usb: Add documentation for AM62 USB Wrapper module Add bindings for the TI's AM62 wrapper module for the Synopsys USBSS-DRD controller. Reviewed-by: Rob Herring Signed-off-by: Aswath Govindraju Link: https://lore.kernel.org/r/20220414103211.16202-2-a-govindraju@ti.com Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/ti,am62-usb.yaml | 103 +++++++++++++++++++++ 1 file changed, 103 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/ti,am62-usb.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml b/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml new file mode 100644 index 000000000000..d25fc708e32c --- /dev/null +++ b/Documentation/devicetree/bindings/usb/ti,am62-usb.yaml @@ -0,0 +1,103 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller + +maintainers: + - Aswath Govindraju + +properties: + compatible: + const: ti,am62-usb + + reg: + maxItems: 1 + + ranges: true + + power-domains: + description: + PM domain provider node and an args specifier containing + the USB ISO device id value. See, + Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml + maxItems: 1 + + clocks: + description: Clock phandle to usb2_refclk + maxItems: 1 + + clock-names: + items: + - const: ref + + ti,vbus-divider: + description: + Should be present if USB VBUS line is connected to the + VBUS pin of the SoC via a 1/3 voltage divider. + type: boolean + + ti,syscon-phy-pll-refclk: + $ref: /schemas/types.yaml#/definitions/phandle-array + items: + - items: + - description: Phandle to the SYSCON entry + - description: USB phy control register offset within SYSCON + description: + Specifier for conveying frequency of ref clock input, for the + operation of USB2PHY. + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + +patternProperties: + "^usb@[0-9a-f]+$": + $ref: snps,dwc3.yaml# + description: Required child node + +required: + - compatible + - reg + - power-domains + - clocks + - clock-names + - ti,syscon-phy-pll-refclk + +additionalProperties: false + +examples: + - | + #include + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + usbss1: usb@f910000 { + compatible = "ti,am62-usb"; + reg = <0x00 0x0f910000 0x00 0x800>; + clocks = <&k3_clks 162 3>; + clock-names = "ref"; + ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>; + power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>; + #address-cells = <2>; + #size-cells = <2>; + + usb@31100000 { + compatible = "snps,dwc3"; + reg =<0x00 0x31100000 0x00 0x50000>; + interrupts = , /* irq.0 */ + ; /* irq.0 */ + interrupt-names = "host", "peripheral"; + maximum-speed = "high-speed"; + dr_mode = "otg"; + }; + }; + }; -- cgit v1.2.3 From 1e2b2f06c1be6f9676ed99f36bc263f1cda12c9c Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 19 Apr 2022 14:10:13 +0200 Subject: dt-bindings: usb: samsung,exynos-usb2: include usb-hcd schema Remove parts duplicated with usb-hcd.yaml DT schema and include it directly. Reviewed-by: Rob Herring Reviewed-by: Alim Akhtar Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220419121013.250023-1-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/samsung,exynos-usb2.yaml | 15 ++------------- 1 file changed, 2 insertions(+), 13 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml index fbf07d6e707a..c21139dcc91f 100644 --- a/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml +++ b/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml @@ -15,9 +15,6 @@ properties: - samsung,exynos4210-ehci - samsung,exynos4210-ohci - '#address-cells': - const: 1 - clocks: maxItems: 1 @@ -46,15 +43,6 @@ properties: Only for controller in EHCI mode, if present, specifies the GPIO that needs to be pulled up for the bus to be powered. - '#size-cells': - const: 0 - -patternProperties: - "^.*@[0-9a-f]{1,2}$": - description: The hard wired USB devices - type: object - $ref: /usb/usb-device.yaml - required: - compatible - clocks @@ -64,6 +52,7 @@ required: - phy-names allOf: + - $ref: usb-hcd.yaml# - if: properties: compatible: @@ -73,7 +62,7 @@ allOf: properties: samsung,vbus-gpio: false -additionalProperties: false +unevaluatedProperties: false examples: - | -- cgit v1.2.3 From 8a722fe86e5678b12ea576f4d07c2374603ec181 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 19 Apr 2022 14:08:27 +0200 Subject: dt-bindings: usb: samsung,exynos-usb2: add missing required reg "reg" property is required on Samsung S5PV210/Exynos EHCI/OHCI controllers. Fixes: 4bf2283cb208 ("dt-bindings: usb: samsung,exynos-usb2: convert to dtschema") Reviewed-by: Alim Akhtar Acked-by: Rob Herring Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220419120827.249627-1-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml b/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml index c21139dcc91f..76e25b9efebd 100644 --- a/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml +++ b/Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml @@ -50,6 +50,7 @@ required: - interrupts - phys - phy-names + - reg allOf: - $ref: usb-hcd.yaml# -- cgit v1.2.3 From 9cd6576f46be175f7ef0769554ce120470bb2ccf Mon Sep 17 00:00:00 2001 From: "周琰杰 (Zhou Yanjie)" Date: Fri, 15 Apr 2022 03:25:35 +0800 Subject: dt-bindings: dwc2: Add bindings for new Ingenic SoCs. MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add the dwc2 bindings for the JZ4775 SoC, the JZ4780 SoC, the X1000 SoC, the X1600 SoC, the X1700 SoC, the X1830 SoC, and the X2000 SoC from Ingenic. Acked-by: Rob Herring Signed-off-by: 周琰杰 (Zhou Yanjie) Link: https://lore.kernel.org/r/1649964337-114337-2-git-send-email-zhouyanjie@wanyeetech.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/dwc2.yaml | 7 +++++++ 1 file changed, 7 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml index 4cebce682d16..c6e8c0b7a4e1 100644 --- a/Documentation/devicetree/bindings/usb/dwc2.yaml +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml @@ -17,6 +17,13 @@ properties: oneOf: - const: brcm,bcm2835-usb - const: hisilicon,hi6220-usb + - const: ingenic,jz4775-otg + - const: ingenic,jz4780-otg + - const: ingenic,x1000-otg + - const: ingenic,x1600-otg + - const: ingenic,x1700-otg + - const: ingenic,x1830-otg + - const: ingenic,x2000-otg - items: - const: rockchip,rk3066-usb - const: snps,dwc2 -- cgit v1.2.3 From 7a60fa06e80596dba5381fb018f5102ae4897658 Mon Sep 17 00:00:00 2001 From: Biju Das Date: Mon, 25 Apr 2022 15:02:15 +0100 Subject: dt-bindings: usb: renesas,usbhs: Document RZ/G2UL bindings Document RZ/G2ULSoC bindings. USBHS block is identical to one found on RZ/A2 SoC. No driver changes are required as generic compatible string "renesas,rza2-usbhs" will be used as a fallback. While at it, make the resets property required on RZ/{G2L,G2UL,V2L} SoC. Reviewed-by: Geert Uytterhoeven Acked-by: Krzysztof Kozlowski Signed-off-by: Biju Das Link: https://lore.kernel.org/r/20220425140215.186797-1-biju.das.jz@bp.renesas.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/renesas,usbhs.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml b/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml index 0bb841b28003..bad55dfb2fa0 100644 --- a/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml +++ b/Documentation/devicetree/bindings/usb/renesas,usbhs.yaml @@ -19,6 +19,7 @@ properties: - items: - enum: - renesas,usbhs-r7s9210 # RZ/A2 + - renesas,usbhs-r9a07g043 # RZ/G2UL - renesas,usbhs-r9a07g044 # RZ/G2{L,LC} - renesas,usbhs-r9a07g054 # RZ/V2L - const: renesas,rza2-usbhs @@ -118,6 +119,7 @@ allOf: compatible: contains: enum: + - renesas,usbhs-r9a07g043 - renesas,usbhs-r9a07g044 - renesas,usbhs-r9a07g054 then: @@ -128,6 +130,8 @@ allOf: - description: U2P_INT_DMA[0] - description: U2P_INT_DMA[1] - description: U2P_INT_DMAERR + required: + - resets else: properties: interrupts: -- cgit v1.2.3 From 01afa882f12dbd4a452c86215dbb6d2d05f69e4c Mon Sep 17 00:00:00 2001 From: Bjorn Andersson Date: Fri, 22 Apr 2022 15:23:50 -0700 Subject: dt-bindings: usb: Add binding for fcs,fsa4480 The Fairchild/ON Semiconductor FSA4480 Analog Audio switch is used in USB Type-C configurations for muxing analog audio onto the USB connector, and as such used to control the SBU signals for altmodes such as DisplayPort. Add a binding for this hardware block. Reviewed-by: Rob Herring Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20220422222351.1297276-7-bjorn.andersson@linaro.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/fcs,fsa4480.yaml | 72 ++++++++++++++++++++++ 1 file changed, 72 insertions(+) create mode 100644 Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml new file mode 100644 index 000000000000..9473f26b0621 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml @@ -0,0 +1,72 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/usb/fcs,fsa4480.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: ON Semiconductor Analog Audio Switch + +maintainers: + - Bjorn Andersson + +properties: + compatible: + enum: + - fcs,fsa4480 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vcc-supply: + description: power supply (2.7V-5.5V) + + mode-switch: + description: Flag the port as possible handle of altmode switching + type: boolean + + orientation-switch: + description: Flag the port as possible handler of orientation switching + type: boolean + + port: + $ref: /schemas/graph.yaml#/properties/port + description: + A port node to link the FSA4480 to a TypeC controller for the purpose of + handling altmode muxing and orientation switching. + +required: + - compatible + - reg + - port + +additionalProperties: false + +examples: + - | + #include + i2c13 { + #address-cells = <1>; + #size-cells = <0>; + + fsa4480@42 { + compatible = "fcs,fsa4480"; + reg = <0x42>; + + interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>; + + vcc-supply = <&vreg_bob>; + + mode-switch; + orientation-switch; + + port { + fsa4480_ept: endpoint { + remote-endpoint = <&typec_controller>; + }; + }; + }; + }; +... -- cgit v1.2.3 From 501c12a6a774ee25c1f07e724c08f72ec7042f88 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Thu, 21 Apr 2022 14:21:29 -0500 Subject: dt-bindings: usb: generic-ehci: Add HPE GXP ehci binding Add hpe,gxp-ehci to the generic-ehci list. This is to enable the device tree. Signed-off-by: Nick Hawkins Link: https://lore.kernel.org/r/20220421192132.109954-9-nick.hawkins@hpe.com Acked-by: Krzysztof Kozlowski Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/generic-ehci.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/generic-ehci.yaml b/Documentation/devicetree/bindings/usb/generic-ehci.yaml index 8913497624de..0b4524b6409e 100644 --- a/Documentation/devicetree/bindings/usb/generic-ehci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ehci.yaml @@ -55,6 +55,7 @@ properties: - brcm,bcm7420-ehci - brcm,bcm7425-ehci - brcm,bcm7435-ehci + - hpe,gxp-ehci - ibm,476gtr-ehci - nxp,lpc1850-ehci - qca,ar7100-ehci -- cgit v1.2.3 From 9c1c0fdd04b5758aa35ac0f7ea802a1a599777a2 Mon Sep 17 00:00:00 2001 From: Nick Hawkins Date: Thu, 21 Apr 2022 14:21:30 -0500 Subject: dt-bindings: usb: generic-ohci: Add HPE GXP ohci binding Add hpe,gxp-ohci to the generic-ohci list. This is to enable the device tree support. Signed-off-by: Nick Hawkins Link: https://lore.kernel.org/r/20220421192132.109954-10-nick.hawkins@hpe.com Acked-by: Krzysztof Kozlowski Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/generic-ohci.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/generic-ohci.yaml b/Documentation/devicetree/bindings/usb/generic-ohci.yaml index acbf94fa5f74..e2ac84665316 100644 --- a/Documentation/devicetree/bindings/usb/generic-ohci.yaml +++ b/Documentation/devicetree/bindings/usb/generic-ohci.yaml @@ -42,6 +42,7 @@ properties: - brcm,bcm7420-ohci - brcm,bcm7425-ohci - brcm,bcm7435-ohci + - hpe,gxp-ohci - ibm,476gtr-ohci - ingenic,jz4740-ohci - snps,hsdk-v1.0-ohci -- cgit v1.2.3 From 9a922c042a63bc68a53da2bc5e5e4cccee58d9df Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Tue, 26 Apr 2022 15:40:59 +0200 Subject: dt-bindings: usb: mediatek,mtu3: add binding for MT8195 SoC Add binding to support the mtu3 driver on the MT8195 SoC. Signed-off-by: Fabien Parent Acked-by: Krzysztof Kozlowski Reviewed-by: Macpaul Lin Link: https://lore.kernel.org/r/20220426134106.242353-2-fparent@baylibre.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml index df766f8de872..37b02a841dc4 100644 --- a/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml +++ b/Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml @@ -25,6 +25,7 @@ properties: - mediatek,mt8173-mtu3 - mediatek,mt8183-mtu3 - mediatek,mt8192-mtu3 + - mediatek,mt8195-mtu3 - const: mediatek,mtu3 reg: -- cgit v1.2.3 From 3a538f8f0946053c0da6a13f73d4046cb7717e61 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 3 May 2022 08:51:56 +0200 Subject: dt-bindings: usb: am33xx-usb: deprecate '#dma-channels' The generic property, used in most of the drivers and defined in generic dma-common DT bindings, is 'dma-channels'. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Reviewed-by: Tony Lindgren Link: https://lore.kernel.org/r/20220503065201.51818-2-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/am33xx-usb.txt | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/am33xx-usb.txt b/Documentation/devicetree/bindings/usb/am33xx-usb.txt index 7a198a30408a..654ffc62d013 100644 --- a/Documentation/devicetree/bindings/usb/am33xx-usb.txt +++ b/Documentation/devicetree/bindings/usb/am33xx-usb.txt @@ -61,8 +61,9 @@ DMA endpoint number (0 … 14 for endpoints 1 … 15 on instance 0 and 15 … 29 for endpoints 1 … 15 on instance 1). The second number is 0 for RX and 1 for TX transfers. -- #dma-channels: should be set to 30 representing the 15 endpoints for +- dma-channels: should be set to 30 representing the 15 endpoints for each USB instance. +- #dma-channels: deprecated Example: ~~~~~~~~ @@ -193,7 +194,7 @@ usb: usb@47400000 { interrupts = <17>; interrupt-names = "glue"; #dma-cells = <2>; - #dma-channels = <30>; - #dma-requests = <256>; + dma-channels = <30>; + dma-requests = <256>; }; }; -- cgit v1.2.3 From 29f84af6abb590411418e2c0f948a6bf557ec0ea Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 3 May 2022 08:51:57 +0200 Subject: dt-bindings: usb: da8xx-usb: deprecate '#dma-channels' The generic property, used in most of the drivers and defined in generic dma-common DT bindings, is 'dma-channels'. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/20220503065201.51818-3-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/da8xx-usb.txt | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/da8xx-usb.txt b/Documentation/devicetree/bindings/usb/da8xx-usb.txt index 9ce22551b2b3..fb2027a7d80d 100644 --- a/Documentation/devicetree/bindings/usb/da8xx-usb.txt +++ b/Documentation/devicetree/bindings/usb/da8xx-usb.txt @@ -36,7 +36,8 @@ DMA - #dma-cells: should be set to 2. The first number represents the channel number (0 … 3 for endpoints 1 … 4). The second number is 0 for RX and 1 for TX transfers. -- #dma-channels: should be set to 4 representing the 4 endpoints. +- dma-channels: should be set to 4 representing the 4 endpoints. +- #dma-channels: deprecated Example: usb_phy: usb-phy { @@ -74,7 +75,7 @@ Example: reg-names = "controller", "scheduler", "queuemgr"; interrupts = <58>; #dma-cells = <2>; - #dma-channels = <4>; + dma-channels = <4>; }; }; -- cgit v1.2.3 From 78489569b7d775fcb4dba8822be6526761efe3ae Mon Sep 17 00:00:00 2001 From: Rohit Agarwal Date: Mon, 2 May 2022 14:36:33 +0530 Subject: dt-bindings: usb: qcom,dwc3: Add binding for SDX65 Add devicetree binding for SDX65 USB controller based on Qcom designware IP. Signed-off-by: Rohit Agarwal Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/1651482395-29443-3-git-send-email-quic_rohiagar@quicinc.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 1 + 1 file changed, 1 insertion(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index ce252db2aab3..2d73b03ae6ab 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -24,6 +24,7 @@ properties: - qcom,sdm660-dwc3 - qcom,sdm845-dwc3 - qcom,sdx55-dwc3 + - qcom,sdx65-dwc3 - qcom,sm4250-dwc3 - qcom,sm6115-dwc3 - qcom,sm6350-dwc3 -- cgit v1.2.3 From 1cda12b15d5035663e5a1d92e33d6443c285332c Mon Sep 17 00:00:00 2001 From: Piyush Mehta Date: Wed, 4 May 2022 13:23:08 +0530 Subject: dt-bindings: usb: dwc3-xilinx: add optional property reset-gpios Added optional property support reset-gpios for the dwc3-Xilinx glue driver. Signed-off-by: Piyush Mehta Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220504075309.6244-2-piyush.mehta@xilinx.com Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml index f77c16e203d5..098b73134a1b 100644 --- a/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml +++ b/Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml @@ -71,6 +71,10 @@ properties: - usb2-phy - usb3-phy + reset-gpios: + description: GPIO used for the reset ulpi-phy + maxItems: 1 + # Required child node: patternProperties: -- cgit v1.2.3 From d5591aa079537942aeb6f6914e57e29389800f17 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 May 2022 15:19:13 +0200 Subject: dt-bindings: usb: qcom,dwc3: add IPQ8074, MSM8994, QCS404 and SM6125 Add compatibles for dedicated USB DWC3 blocks on Qualcomm IPQ8074, MSM8994, QCS404 and SM6125. They differ against other variants in clock and/or interrupts. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220504131923.214367-4-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 4 ++++ 1 file changed, 4 insertions(+) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 2d73b03ae6ab..5a0fc060e08f 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -16,9 +16,12 @@ properties: - qcom,ipq4019-dwc3 - qcom,ipq6018-dwc3 - qcom,ipq8064-dwc3 + - qcom,ipq8074-dwc3 - qcom,msm8953-dwc3 + - qcom,msm8994-dwc3 - qcom,msm8996-dwc3 - qcom,msm8998-dwc3 + - qcom,qcs404-dwc3 - qcom,sc7180-dwc3 - qcom,sc7280-dwc3 - qcom,sdm660-dwc3 @@ -27,6 +30,7 @@ properties: - qcom,sdx65-dwc3 - qcom,sm4250-dwc3 - qcom,sm6115-dwc3 + - qcom,sm6125-dwc3 - qcom,sm6350-dwc3 - qcom,sm8150-dwc3 - qcom,sm8250-dwc3 -- cgit v1.2.3 From 16946a60715c1043fa4b265334969778b9be9fee Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 4 May 2022 15:19:14 +0200 Subject: dt-bindings: usb: qcom,dwc3: fix clock matching The bindings defined strict clocks but several variants do not use them in such order. Split the clocks and clock-names per variants to match current DTS usage. In few cases this might not be complete match, due to incomplete DTS. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220504131923.214367-5-krzysztof.kozlowski@linaro.org Signed-off-by: Greg Kroah-Hartman --- .../devicetree/bindings/usb/qcom,dwc3.yaml | 222 +++++++++++++++++++-- 1 file changed, 200 insertions(+), 22 deletions(-) (limited to 'Documentation/devicetree') diff --git a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml index 5a0fc060e08f..e336fe2e03cc 100644 --- a/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/qcom,dwc3.yaml @@ -55,26 +55,22 @@ properties: maxItems: 1 clocks: - description: - A list of phandle and clock-specifier pairs for the clocks - listed in clock-names. - items: - - description: System Config NOC clock. - - description: Master/Core clock, has to be >= 125 MHz - for SS operation and >= 60MHz for HS operation. - - description: System bus AXI clock. - - description: Mock utmi clock needed for ITP/SOF generation - in host mode. Its frequency should be 19.2MHz. - - description: Sleep clock, used for wakeup when - USB3 core goes into low power mode (U3). + description: | + Several clocks are used, depending on the variant. Typical ones are:: + - cfg_noc:: System Config NOC clock. + - core:: Master/Core clock, has to be >= 125 MHz for SS operation and >= + 60MHz for HS operation. + - iface:: System bus AXI clock. + - sleep:: Sleep clock, used for wakeup when USB3 core goes into low + power mode (U3). + - mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host + mode. Its frequency should be 19.2MHz. + minItems: 1 + maxItems: 6 clock-names: - items: - - const: cfg_noc - - const: core - - const: iface - - const: mock_utmi - - const: sleep + minItems: 1 + maxItems: 6 assigned-clocks: items: @@ -137,6 +133,185 @@ required: - interrupts - interrupt-names +allOf: + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq4019-dwc3 + then: + properties: + clocks: + maxItems: 3 + clock-names: + items: + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8064-dwc3 + then: + properties: + clocks: + items: + - description: Master/Core clock, has to be >= 125 MHz + for SS operation and >= 60MHz for HS operation. + clock-names: + items: + - const: core + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8953-dwc3 + - qcom,msm8996-dwc3 + - qcom,msm8998-dwc3 + - qcom,sc7180-dwc3 + - qcom,sc7280-dwc3 + - qcom,sdm845-dwc3 + - qcom,sdx55-dwc3 + - qcom,sm6350-dwc3 + then: + properties: + clocks: + maxItems: 5 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq6018-dwc3 + then: + properties: + clocks: + minItems: 3 + maxItems: 4 + clock-names: + oneOf: + - items: + - const: core + - const: sleep + - const: mock_utmi + - items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,ipq8074-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: cfg_noc + - const: core + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,msm8994-dwc3 + - qcom,qcs404-dwc3 + then: + properties: + clocks: + maxItems: 4 + clock-names: + items: + - const: core + - const: iface + - const: sleep + - const: mock_utmi + + - if: + properties: + compatible: + contains: + enum: + - qcom,sdm660-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: bus + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm6125-dwc3 + - qcom,sm8150-dwc3 + - qcom,sm8250-dwc3 + - qcom,sm8450-dwc3 + then: + properties: + clocks: + minItems: 6 + clock-names: + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + - if: + properties: + compatible: + contains: + enum: + - qcom,sm8350-dwc3 + then: + properties: + clocks: + minItems: 5 + maxItems: 6 + clock-names: + minItems: 5 + items: + - const: cfg_noc + - const: core + - const: iface + - const: sleep + - const: mock_utmi + - const: xo + + additionalProperties: false examples: @@ -158,10 +333,13 @@ examples: clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>, <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>, - <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, - <&gcc GCC_USB30_PRIM_SLEEP_CLK>; - clock-names = "cfg_noc", "core", "iface", "mock_utmi", - "sleep"; + <&gcc GCC_USB30_PRIM_SLEEP_CLK>, + <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>; + clock-names = "cfg_noc", + "core", + "iface", + "sleep", + "mock_utmi"; assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>, <&gcc GCC_USB30_PRIM_MASTER_CLK>; -- cgit v1.2.3