From 5d814b2c3326c939c66bd52e472aabb9254bb2ce Mon Sep 17 00:00:00 2001
From: Philipp Zabel
Date: Thu, 7 Apr 2022 17:43:25 +0200
Subject: dt-bindings: reset: amlogic,meson-axg-audio-arb: Convert to yaml
Convert the device tree bindings for the Amlogic audio memory arbiter
controller to YAML schema to allow participating in DT validation.
Signed-off-by: Philipp Zabel
Cc: Kevin Hilman
Cc: Jerome Brunet
Cc: Martin Blumenstingl
Reviewed-by: Martin Blumenstingl
Reviewed-by: Rob Herring
Link: https://lore.kernel.org/r/20220407154338.4190674-1-p.zabel@pengutronix.de
---
.../bindings/reset/amlogic,meson-axg-audio-arb.txt | 22 ----------------------
1 file changed, 22 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt
(limited to 'Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt')
diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt b/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt
deleted file mode 100644
index 43e580ef64ba..000000000000
--- a/Documentation/devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt
+++ /dev/null
@@ -1,22 +0,0 @@
-* Amlogic audio memory arbiter controller
-
-The Amlogic Audio ARB is a simple device which enables or
-disables the access of Audio FIFOs to DDR on AXG based SoC.
-
-Required properties:
-- compatible: 'amlogic,meson-axg-audio-arb' or
- 'amlogic,meson-sm1-audio-arb'
-- reg: physical base address of the controller and length of memory
- mapped region.
-- clocks: phandle to the fifo peripheral clock provided by the audio
- clock controller.
-- #reset-cells: must be 1.
-
-Example on the A113 SoC:
-
-arb: reset-controller@280 {
- compatible = "amlogic,meson-axg-audio-arb";
- reg = <0x0 0x280 0x0 0x4>;
- #reset-cells = <1>;
- clocks = <&clkc_audio AUD_CLKID_DDR_ARB>;
-};
--
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