From d955cf3df3c26097aeab5712bc76f1c62a4ce86f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Tue, 5 Jul 2022 17:50:38 +0200 Subject: dt-bindings: hwinfo: renesas,prr: move from soc directory Group devices like Chip ID or SoC information under "hwinfo" directory. Signed-off-by: Krzysztof Kozlowski Acked-by: Rob Herring Link: https://lore.kernel.org/r/20220705155038.454251-1-krzysztof.kozlowski@linaro.org Signed-off-by: Geert Uytterhoeven --- .../devicetree/bindings/hwinfo/renesas,prr.yaml | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml (limited to 'Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml') diff --git a/Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml b/Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml new file mode 100644 index 000000000000..792f371cec03 --- /dev/null +++ b/Documentation/devicetree/bindings/hwinfo/renesas,prr.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/hwinfo/renesas,prr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Product Register + +maintainers: + - Geert Uytterhoeven + - Magnus Damm + +description: | + Most Renesas ARM SoCs have a Product Register or Boundary Scan ID + Register that allows to retrieve SoC product and revision information. + If present, a device node for this register should be added. + +properties: + compatible: + enum: + - renesas,prr + - renesas,bsid + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + prr: chipid@ff000044 { + compatible = "renesas,prr"; + reg = <0xff000044 4>; + }; -- cgit v1.2.3