From b51adeae29d1ca07090d4f9c9c886499351e0129 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Thu, 3 Jun 2010 02:37:17 +0200 Subject: of/mtd: nand: fix build breakage in drivers Fixes build errors in drivers caused by the OF device_node pointer being moved into struct device Signed-off-by: Anatolij Gustschin Signed-off-by: David Woodhouse --- drivers/mtd/nand/fsl_upm.c | 17 +++++++++-------- drivers/mtd/nand/socrates_nand.c | 4 ++-- 2 files changed, 11 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/fsl_upm.c b/drivers/mtd/nand/fsl_upm.c index 2d215ccb564d..3efceb61e74b 100644 --- a/drivers/mtd/nand/fsl_upm.c +++ b/drivers/mtd/nand/fsl_upm.c @@ -232,7 +232,7 @@ static int __devinit fun_probe(struct of_device *ofdev, if (!fun) return -ENOMEM; - ret = of_address_to_resource(ofdev->node, 0, &io_res); + ret = of_address_to_resource(ofdev->dev.of_node, 0, &io_res); if (ret) { dev_err(&ofdev->dev, "can't get IO base\n"); goto err1; @@ -244,7 +244,8 @@ static int __devinit fun_probe(struct of_device *ofdev, goto err1; } - prop = of_get_property(ofdev->node, "fsl,upm-addr-offset", &size); + prop = of_get_property(ofdev->dev.of_node, "fsl,upm-addr-offset", + &size); if (!prop || size != sizeof(uint32_t)) { dev_err(&ofdev->dev, "can't get UPM address offset\n"); ret = -EINVAL; @@ -252,7 +253,7 @@ static int __devinit fun_probe(struct of_device *ofdev, } fun->upm_addr_offset = *prop; - prop = of_get_property(ofdev->node, "fsl,upm-cmd-offset", &size); + prop = of_get_property(ofdev->dev.of_node, "fsl,upm-cmd-offset", &size); if (!prop || size != sizeof(uint32_t)) { dev_err(&ofdev->dev, "can't get UPM command offset\n"); ret = -EINVAL; @@ -260,7 +261,7 @@ static int __devinit fun_probe(struct of_device *ofdev, } fun->upm_cmd_offset = *prop; - prop = of_get_property(ofdev->node, + prop = of_get_property(ofdev->dev.of_node, "fsl,upm-addr-line-cs-offsets", &size); if (prop && (size / sizeof(uint32_t)) > 0) { fun->mchip_count = size / sizeof(uint32_t); @@ -276,7 +277,7 @@ static int __devinit fun_probe(struct of_device *ofdev, for (i = 0; i < fun->mchip_count; i++) { fun->rnb_gpio[i] = -1; - rnb_gpio = of_get_gpio(ofdev->node, i); + rnb_gpio = of_get_gpio(ofdev->dev.of_node, i); if (rnb_gpio >= 0) { ret = gpio_request(rnb_gpio, dev_name(&ofdev->dev)); if (ret) { @@ -292,13 +293,13 @@ static int __devinit fun_probe(struct of_device *ofdev, } } - prop = of_get_property(ofdev->node, "chip-delay", NULL); + prop = of_get_property(ofdev->dev.of_node, "chip-delay", NULL); if (prop) fun->chip_delay = *prop; else fun->chip_delay = 50; - prop = of_get_property(ofdev->node, "fsl,upm-wait-flags", &size); + prop = of_get_property(ofdev->dev.of_node, "fsl,upm-wait-flags", &size); if (prop && size == sizeof(uint32_t)) fun->wait_flags = *prop; else @@ -315,7 +316,7 @@ static int __devinit fun_probe(struct of_device *ofdev, fun->dev = &ofdev->dev; fun->last_ctrl = NAND_CLE; - ret = fun_chip_init(fun, ofdev->node, &io_res); + ret = fun_chip_init(fun, ofdev->dev.of_node, &io_res); if (ret) goto err2; diff --git a/drivers/mtd/nand/socrates_nand.c b/drivers/mtd/nand/socrates_nand.c index b37cbde6e7db..f02f8e23d905 100644 --- a/drivers/mtd/nand/socrates_nand.c +++ b/drivers/mtd/nand/socrates_nand.c @@ -183,7 +183,7 @@ static int __devinit socrates_nand_probe(struct of_device *ofdev, return -ENOMEM; } - host->io_base = of_iomap(ofdev->node, 0); + host->io_base = of_iomap(ofdev->dev.of_node, 0); if (host->io_base == NULL) { printk(KERN_ERR "socrates_nand: ioremap failed\n"); kfree(host); @@ -244,7 +244,7 @@ static int __devinit socrates_nand_probe(struct of_device *ofdev, #ifdef CONFIG_MTD_OF_PARTS if (num_partitions == 0) { num_partitions = of_mtd_parse_partitions(&ofdev->dev, - ofdev->node, + ofdev->dev.of_node, &partitions); if (num_partitions < 0) { res = num_partitions; -- cgit v1.2.3 From 00b275dbfc2ae3e3312a910736dd9a6bd5110c2b Mon Sep 17 00:00:00 2001 From: Julia Lawall Date: Tue, 1 Jun 2010 16:34:20 +0200 Subject: drivers/mtd/maps: introduce missing kfree Error handling code following a kmalloc should free the allocated data. The semantic match that finds the problem is as follows: (http://www.emn.fr/x-info/coccinelle/) // @r exists@ local idexpression x; statement S; expression E; identifier f,f1,l; position p1,p2; expression *ptr != NULL; @@ x@p1 = \(kmalloc\|kzalloc\|kcalloc\)(...); ... if (x == NULL) S <... when != x when != if (...) { <+...x...+> } ( x->f1 = E | (x->f1 == NULL || ...) | f(...,x->f1,...) ) ...> ( return \(0\|<+...x...+>\|ptr\); | return@p2 ...; ) @script:python@ p1 << r.p1; p2 << r.p2; @@ print "* file: %s kmalloc %s return %s" % (p1[0].file,p1[0].line,p2[0].line) // Signed-off-by: Julia Lawall Signed-off-by: David Woodhouse --- drivers/mtd/maps/physmap_of.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/maps/physmap_of.c b/drivers/mtd/maps/physmap_of.c index 36dbcee1ac29..859664ad9e78 100644 --- a/drivers/mtd/maps/physmap_of.c +++ b/drivers/mtd/maps/physmap_of.c @@ -353,7 +353,7 @@ static int __devinit of_flash_probe(struct of_device *dev, &info->parts, 0); if (err < 0) { of_free_probes(part_probe_types); - return err; + goto err_out; } of_free_probes(part_probe_types); @@ -361,14 +361,14 @@ static int __devinit of_flash_probe(struct of_device *dev, if (err == 0) { err = of_mtd_parse_partitions(&dev->dev, dp, &info->parts); if (err < 0) - return err; + goto err_out; } #endif if (err == 0) { err = parse_obsolete_partitions(dev, info, dp); if (err < 0) - return err; + goto err_out; } if (err > 0) -- cgit v1.2.3 From a4b81ca50974051195b11ca173da073b961f94d5 Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Sat, 22 May 2010 22:16:26 +0200 Subject: mtd: sst25l: check for null consistently The rest of the function assumes that "data" can be null. I don't know the code well enough to say whether it can actually be null, but there is no harm in checking here. Signed-off-by: Dan Carpenter Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/devices/sst25l.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/devices/sst25l.c b/drivers/mtd/devices/sst25l.c index ab5d8cd02a15..684247a8a5ed 100644 --- a/drivers/mtd/devices/sst25l.c +++ b/drivers/mtd/devices/sst25l.c @@ -454,7 +454,7 @@ static int __init sst25l_probe(struct spi_device *spi) parts, nr_parts); } - } else if (data->nr_parts) { + } else if (data && data->nr_parts) { dev_warn(&spi->dev, "ignoring %d default partitions on %s\n", data->nr_parts, data->name); } -- cgit v1.2.3 From 6c49939869c20550512386610ece45aceb65e7f4 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 28 May 2010 10:02:17 +0200 Subject: mtd: mxc_nand: fix OOB accesses on i.MX27 The OOB handling in the mxc_nand driver is broken for v1 type controllers (i.MX27/31) with 512 byte page size. This perhaps did not show up because ubi does not use OOB. Update the driver to always read/write a whole page even if only OOB is requested. With this patch the driver passes the mtd_oobtest on i.MX27 with 512 byte page size. Also tested with 2048 byte page size and on i.MX35 (v2 type controller) Signed-off-by: Sascha Hauer Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 31 +++++-------------------------- 1 file changed, 5 insertions(+), 26 deletions(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 82e94389824e..6e8aa34e4dfc 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -623,8 +623,7 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, else host->buf_start = column + mtd->writesize; - if (mtd->writesize > 512) - command = NAND_CMD_READ0; /* only READ0 is valid */ + command = NAND_CMD_READ0; /* only READ0 is valid */ send_cmd(host, command, false); mxc_do_addr_cycle(mtd, column, page_addr); @@ -639,31 +638,11 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, break; case NAND_CMD_SEQIN: - if (column >= mtd->writesize) { - /* - * FIXME: before send SEQIN command for write OOB, - * We must read one page out. - * For K9F1GXX has no READ1 command to set current HW - * pointer to spare area, we must write the whole page - * including OOB together. - */ - if (mtd->writesize > 512) - /* call ourself to read a page */ - mxc_nand_command(mtd, NAND_CMD_READ0, 0, - page_addr); - - host->buf_start = column; - - /* Set program pointer to spare region */ - if (mtd->writesize == 512) - send_cmd(host, NAND_CMD_READOOB, false); - } else { - host->buf_start = column; + if (column >= mtd->writesize) + /* call ourself to read a page */ + mxc_nand_command(mtd, NAND_CMD_READ0, 0, page_addr); - /* Set program pointer to page start */ - if (mtd->writesize == 512) - send_cmd(host, NAND_CMD_READ0, false); - } + host->buf_start = column; send_cmd(host, command, false); mxc_do_addr_cycle(mtd, column, page_addr); -- cgit v1.2.3 From 8c1a1158c98b810d34b469c787840ac16904e5fa Mon Sep 17 00:00:00 2001 From: Kyle Spaans Date: Tue, 8 Jun 2010 09:48:22 -0400 Subject: mtd: remove redundant dependency checks in Kconfig files Look for dependency checks for "FOO" when inside of an "if FOO" block and remove them. Signed-off-by: Kyle Spaans Reviewed-by: Robert P. J. Day Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/Kconfig | 1 - drivers/mtd/nand/Kconfig | 30 ++++++++++++++---------------- drivers/mtd/onenand/Kconfig | 4 ++-- 3 files changed, 16 insertions(+), 19 deletions(-) diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index f8210bf2d241..71eda03b925f 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -319,7 +319,6 @@ config SM_FTL config MTD_OOPS tristate "Log panic/oops to an MTD buffer" - depends on MTD help This enables panic and oops messages to be logged to a circular buffer in a flash partition where it can be read back at some diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index ffc3720929f1..4d4066f315be 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -37,7 +37,6 @@ config MTD_SM_COMMON config MTD_NAND_MUSEUM_IDS bool "Enable chip ids for obsolete ancient NAND devices" - depends on MTD_NAND default n help Enable this option only when your board has first generation @@ -101,13 +100,13 @@ config MTD_NAND_AMS_DELTA config MTD_NAND_OMAP2 tristate "NAND Flash device on OMAP2 and OMAP3" - depends on ARM && MTD_NAND && (ARCH_OMAP2 || ARCH_OMAP3) + depends on ARM && (ARCH_OMAP2 || ARCH_OMAP3) help Support for NAND flash on Texas Instruments OMAP2 and OMAP3 platforms. config MTD_NAND_OMAP_PREFETCH bool "GPMC prefetch support for NAND Flash device" - depends on MTD_NAND && MTD_NAND_OMAP2 + depends on MTD_NAND_OMAP2 default y help The NAND device can be accessed for Read/Write using GPMC PREFETCH engine @@ -146,7 +145,7 @@ config MTD_NAND_AU1550 config MTD_NAND_BF5XX tristate "Blackfin on-chip NAND Flash Controller driver" - depends on (BF54x || BF52x) && MTD_NAND + depends on BF54x || BF52x help This enables the Blackfin on-chip NAND flash controller @@ -236,7 +235,7 @@ config MTD_NAND_S3C2410_CLKSTOP config MTD_NAND_BCM_UMI tristate "NAND Flash support for BCM Reference Boards" - depends on ARCH_BCMRING && MTD_NAND + depends on ARCH_BCMRING help This enables the NAND flash controller on the BCM UMI block. @@ -395,7 +394,7 @@ endchoice config MTD_NAND_PXA3xx tristate "Support for NAND flash devices on PXA3xx" - depends on MTD_NAND && (PXA3xx || ARCH_MMP) + depends on PXA3xx || ARCH_MMP help This enables the driver for the NAND flash device found on PXA3xx processors @@ -409,18 +408,18 @@ config MTD_NAND_PXA3xx_BUILTIN config MTD_NAND_CM_X270 tristate "Support for NAND Flash on CM-X270 modules" - depends on MTD_NAND && MACH_ARMCORE + depends on MACH_ARMCORE config MTD_NAND_PASEMI tristate "NAND support for PA Semi PWRficient" - depends on MTD_NAND && PPC_PASEMI + depends on PPC_PASEMI help Enables support for NAND Flash interface on PA Semi PWRficient based boards config MTD_NAND_TMIO tristate "NAND Flash device on Toshiba Mobile IO Controller" - depends on MTD_NAND && MFD_TMIO + depends on MFD_TMIO help Support for NAND flash connected to a Toshiba Mobile IO Controller in some PDAs, including the Sharp SL6000x. @@ -434,7 +433,6 @@ config MTD_NAND_NANDSIM config MTD_NAND_PLATFORM tristate "Support for generic platform NAND driver" - depends on MTD_NAND help This implements a generic NAND driver for on-SOC platform devices. You will need to provide platform-specific functions @@ -442,14 +440,14 @@ config MTD_NAND_PLATFORM config MTD_ALAUDA tristate "MTD driver for Olympus MAUSB-10 and Fujifilm DPC-R1" - depends on MTD_NAND && USB + depends on USB help These two (and possibly other) Alauda-based cardreaders for SmartMedia and xD allow raw flash access. config MTD_NAND_ORION tristate "NAND Flash support for Marvell Orion SoC" - depends on PLAT_ORION && MTD_NAND + depends on PLAT_ORION help This enables the NAND flash controller on Orion machines. @@ -458,7 +456,7 @@ config MTD_NAND_ORION config MTD_NAND_FSL_ELBC tristate "NAND support for Freescale eLBC controllers" - depends on MTD_NAND && PPC_OF + depends on PPC_OF help Various Freescale chips, including the 8313, include a NAND Flash Controller Module with built-in hardware ECC capabilities. @@ -467,7 +465,7 @@ config MTD_NAND_FSL_ELBC config MTD_NAND_FSL_UPM tristate "Support for NAND on Freescale UPM" - depends on MTD_NAND && (PPC_83xx || PPC_85xx) + depends on PPC_83xx || PPC_85xx select FSL_LBC help Enables support for NAND Flash chips wired onto Freescale PowerPC @@ -495,7 +493,7 @@ config MTD_NAND_NOMADIK config MTD_NAND_SH_FLCTL tristate "Support for NAND on Renesas SuperH FLCTL" - depends on MTD_NAND && (SUPERH || ARCH_SHMOBILE) + depends on SUPERH || ARCH_SHMOBILE help Several Renesas SuperH CPU has FLCTL. This option enables support for NAND Flash using FLCTL. @@ -515,7 +513,7 @@ config MTD_NAND_TXX9NDFMC config MTD_NAND_SOCRATES tristate "Support for NAND on Socrates board" - depends on MTD_NAND && SOCRATES + depends on SOCRATES help Enables support for NAND Flash chips wired onto Socrates board. diff --git a/drivers/mtd/onenand/Kconfig b/drivers/mtd/onenand/Kconfig index 9a49d68ba5f9..3f32289fdbb5 100644 --- a/drivers/mtd/onenand/Kconfig +++ b/drivers/mtd/onenand/Kconfig @@ -25,14 +25,14 @@ config MTD_ONENAND_GENERIC config MTD_ONENAND_OMAP2 tristate "OneNAND on OMAP2/OMAP3 support" - depends on MTD_ONENAND && (ARCH_OMAP2 || ARCH_OMAP3) + depends on ARCH_OMAP2 || ARCH_OMAP3 help Support for a OneNAND flash device connected to an OMAP2/OMAP3 CPU via the GPMC memory controller. config MTD_ONENAND_SAMSUNG tristate "OneNAND on Samsung SOC controller support" - depends on MTD_ONENAND && (ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210) + depends on ARCH_S3C64XX || ARCH_S5PC100 || ARCH_S5PV210 help Support for a OneNAND flash device connected to an Samsung SOC S3C64XX/S5PC1XX controller. -- cgit v1.2.3 From 007c2d8769139f3c9e99114219d6800aeccdfaef Mon Sep 17 00:00:00 2001 From: Dan Carpenter Date: Mon, 31 May 2010 16:03:38 +0200 Subject: mtd: return success on blktrans_ioctl There was a break missing so we returned -ENOTTY on success instead of zero. This was introduced by 048d8719956: "mtd: blktrans: Hotplug fixes" Signed-off-by: Dan Carpenter Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/mtd_blkdevs.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c index 03e19c1965cc..a6bb5863e8f3 100644 --- a/drivers/mtd/mtd_blkdevs.c +++ b/drivers/mtd/mtd_blkdevs.c @@ -245,6 +245,7 @@ static int blktrans_ioctl(struct block_device *bdev, fmode_t mode, switch (cmd) { case BLKFLSBUF: ret = dev->tr->flush ? dev->tr->flush(dev) : 0; + break; default: ret = -ENOTTY; } -- cgit v1.2.3 From 6175f4a194653fad46218167fac05386972d995c Mon Sep 17 00:00:00 2001 From: Martin Michlmayr Date: Mon, 7 Jun 2010 19:31:01 +0100 Subject: mtd: m25p80: Add support for Macronix 25L8005 Add support for Macronix 25L8005. Tested on a HP t5325 Thin Client. Signed-off-by: Martin Michlmayr Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/devices/m25p80.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 81e49a9b017e..372df59f79e2 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -641,6 +641,7 @@ static const struct spi_device_id m25p_ids[] = { /* Macronix */ { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) }, + { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) }, { "mx25l3205d", INFO(0xc22016, 0, 64 * 1024, 64, 0) }, { "mx25l6405d", INFO(0xc22017, 0, 64 * 1024, 128, 0) }, { "mx25l12805d", INFO(0xc22018, 0, 64 * 1024, 256, 0) }, -- cgit v1.2.3 From 1df620637fc3b252b69c92ced486b5b6b643dd1a Mon Sep 17 00:00:00 2001 From: Karl Beldan Date: Sat, 12 Jun 2010 12:25:13 +0200 Subject: mtd: denali: add Kconfig dependency Signed-off-by: Karl Beldan Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 4d4066f315be..1d69920a2c93 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -60,6 +60,7 @@ config MTD_NAND_DENALI config MTD_NAND_DENALI_SCRATCH_REG_ADDR hex "Denali NAND size scratch register address" default "0xFF108018" + depends on MTD_NAND_DENALI help Some platforms place the NAND chip size in a scratch register because (some versions of) the driver aren't able to automatically -- cgit v1.2.3 From 9938424f0c4d208883cbf32083ec2bfcc220f85b Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Mon, 14 Jun 2010 18:10:33 +0200 Subject: mtd: add an ioctl to query the lock status of a flash sector This patchs adds a way for user space programs to find out whether a flash sector is locked. An optional driver method in the mtd_info struct provides the information. Signed-off-by: Richard Cochran Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/chips/cfi_cmdset_0001.c | 10 ++++++++++ drivers/mtd/mtdchar.c | 14 ++++++++++++++ drivers/mtd/mtdpart.c | 10 ++++++++++ include/linux/mtd/mtd.h | 1 + include/mtd/mtd-abi.h | 1 + 5 files changed, 36 insertions(+) diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index 62f3ea9de848..2fadb0239ba3 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -63,6 +63,8 @@ static int cfi_intelext_erase_varsize(struct mtd_info *, struct erase_info *); static void cfi_intelext_sync (struct mtd_info *); static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len); static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len); +static int cfi_intelext_is_locked(struct mtd_info *mtd, loff_t ofs, + uint64_t len); #ifdef CONFIG_MTD_OTP static int cfi_intelext_read_fact_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *); static int cfi_intelext_read_user_prot_reg (struct mtd_info *, loff_t, size_t, size_t *, u_char *); @@ -448,6 +450,7 @@ struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary) mtd->sync = cfi_intelext_sync; mtd->lock = cfi_intelext_lock; mtd->unlock = cfi_intelext_unlock; + mtd->is_locked = cfi_intelext_is_locked; mtd->suspend = cfi_intelext_suspend; mtd->resume = cfi_intelext_resume; mtd->flags = MTD_CAP_NORFLASH; @@ -2139,6 +2142,13 @@ static int cfi_intelext_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) return ret; } +static int cfi_intelext_is_locked(struct mtd_info *mtd, loff_t ofs, + uint64_t len) +{ + return cfi_varsize_frob(mtd, do_getlockstatus_oneblock, + ofs, len, NULL) ? 1 : 0; +} + #ifdef CONFIG_MTD_OTP typedef int (*otp_op_t)(struct map_info *map, struct flchip *chip, diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index 8b223c0343ee..a8e69dd2b2e4 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c @@ -676,6 +676,20 @@ static int mtd_ioctl(struct inode *inode, struct file *file, break; } + case MEMISLOCKED: + { + struct erase_info_user einfo; + + if (copy_from_user(&einfo, argp, sizeof(einfo))) + return -EFAULT; + + if (!mtd->is_locked) + ret = -EOPNOTSUPP; + else + ret = mtd->is_locked(mtd, einfo.start, einfo.length); + break; + } + /* Legacy interface */ case MEMGETOOBSEL: { diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index b8043a9ba32d..4c539ded0b70 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -264,6 +264,14 @@ static int part_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) return part->master->unlock(part->master, ofs + part->offset, len); } +static int part_is_locked(struct mtd_info *mtd, loff_t ofs, uint64_t len) +{ + struct mtd_part *part = PART(mtd); + if ((len + ofs) > mtd->size) + return -EINVAL; + return part->master->is_locked(part->master, ofs + part->offset, len); +} + static void part_sync(struct mtd_info *mtd) { struct mtd_part *part = PART(mtd); @@ -402,6 +410,8 @@ static struct mtd_part *add_one_partition(struct mtd_info *master, slave->mtd.lock = part_lock; if (master->unlock) slave->mtd.unlock = part_unlock; + if (master->is_locked) + slave->mtd.is_locked = part_is_locked; if (master->block_isbad) slave->mtd.block_isbad = part_block_isbad; if (master->block_markbad) diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 5326435a7571..43b7d72c6116 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -216,6 +216,7 @@ struct mtd_info { /* Chip-supported device locking */ int (*lock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); int (*unlock) (struct mtd_info *mtd, loff_t ofs, uint64_t len); + int (*is_locked) (struct mtd_info *mtd, loff_t ofs, uint64_t len); /* Power Management functions */ int (*suspend) (struct mtd_info *mtd); diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h index be51ae2bd0ff..e12872e3c694 100644 --- a/include/mtd/mtd-abi.h +++ b/include/mtd/mtd-abi.h @@ -110,6 +110,7 @@ struct otp_info { #define MEMERASE64 _IOW('M', 20, struct erase_info_user64) #define MEMWRITEOOB64 _IOWR('M', 21, struct mtd_oob_buf64) #define MEMREADOOB64 _IOWR('M', 22, struct mtd_oob_buf64) +#define MEMISLOCKED _IOR('M', 23, struct erase_info_user) /* * Obsolete legacy interface. Keep it in order not to break userspace -- cgit v1.2.3 From 1d90d2c3d4ef8ba4f8e05b3578900397333b1bd1 Mon Sep 17 00:00:00 2001 From: H Hartley Sweeten Date: Mon, 14 Jun 2010 11:57:54 -0500 Subject: mtd: physmap: use resource_size() Signed-off-by: H Hartley Sweeten Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/maps/physmap.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c index 426461a5f0d4..829aa4bee54f 100644 --- a/drivers/mtd/maps/physmap.c +++ b/drivers/mtd/maps/physmap.c @@ -106,12 +106,12 @@ static int physmap_flash_probe(struct platform_device *dev) for (i = 0; i < dev->num_resources; i++) { printk(KERN_NOTICE "physmap platform flash device: %.8llx at %.8llx\n", - (unsigned long long)(dev->resource[i].end - dev->resource[i].start + 1), + (unsigned long long)resource_size(&dev->resource[i]), (unsigned long long)dev->resource[i].start); if (!devm_request_mem_region(&dev->dev, dev->resource[i].start, - dev->resource[i].end - dev->resource[i].start + 1, + resource_size(&dev->resource[i]), dev_name(&dev->dev))) { dev_err(&dev->dev, "Could not reserve memory region\n"); err = -ENOMEM; @@ -120,7 +120,7 @@ static int physmap_flash_probe(struct platform_device *dev) info->map[i].name = dev_name(&dev->dev); info->map[i].phys = dev->resource[i].start; - info->map[i].size = dev->resource[i].end - dev->resource[i].start + 1; + info->map[i].size = resource_size(&dev->resource[i]); info->map[i].bankwidth = physmap_data->width; info->map[i].set_vpp = physmap_data->set_vpp; info->map[i].pfow_base = physmap_data->pfow_base; -- cgit v1.2.3 From e2c848833c1835b6261e46836b2317fc9c3c2787 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Mon, 14 Jun 2010 09:01:51 +0200 Subject: mtd: mxc_nand: remove unused variable MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This fixes: drivers/mtd/nand/mxc_nand.c: In function 'mxcnd_resume': drivers/mtd/nand/mxc_nand.c:901: warning: unused variable 'host' Removing this variable was missed in 9c14b153e6af. Signed-off-by: Uwe Kleine-König Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 6e8aa34e4dfc..68a7d37fd17c 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -896,7 +896,6 @@ static int mxcnd_resume(struct platform_device *pdev) { struct mtd_info *mtd = platform_get_drvdata(pdev); struct nand_chip *nand_chip = mtd->priv; - struct mxc_nand_host *host = nand_chip->priv; int ret = 0; DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND : NAND resume\n"); -- cgit v1.2.3 From 24cc7b8a2a48a5707637e918a51ea547efe24892 Mon Sep 17 00:00:00 2001 From: Brian Norris Date: Thu, 17 Jun 2010 12:35:11 -0700 Subject: mtd: nand_ids: add two entries for NAND chips Included the basic size info for NAND chips with ID of 0xAD or 0xD7. The first can be found in Hynix HY27SF161G2M, while the second can be found in Micron MT29F64G08 and the Samsung K9LBG08U0D (among others). Also, some 64 Gbit (or larger) chips identify as 0xD7 because they contain multiple smaller 32 Gbit chips. I assume it's safe to classify these under the 32 Gbit listing. Signed-off-by: Brian Norris Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/nand_ids.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/nand/nand_ids.c b/drivers/mtd/nand/nand_ids.c index 89907ed99009..a04b89105b65 100644 --- a/drivers/mtd/nand/nand_ids.c +++ b/drivers/mtd/nand/nand_ids.c @@ -85,6 +85,7 @@ struct nand_flash_dev nand_flash_ids[] = { {"NAND 128MiB 3,3V 8-bit", 0xD1, 0, 128, 0, LP_OPTIONS}, {"NAND 128MiB 1,8V 16-bit", 0xB1, 0, 128, 0, LP_OPTIONS16}, {"NAND 128MiB 3,3V 16-bit", 0xC1, 0, 128, 0, LP_OPTIONS16}, + {"NAND 128MiB 1,8V 16-bit", 0xAD, 0, 128, 0, LP_OPTIONS16}, /* 2 Gigabit */ {"NAND 256MiB 1,8V 8-bit", 0xAA, 0, 256, 0, LP_OPTIONS}, @@ -110,6 +111,9 @@ struct nand_flash_dev nand_flash_ids[] = { {"NAND 2GiB 1,8V 16-bit", 0xB5, 0, 2048, 0, LP_OPTIONS16}, {"NAND 2GiB 3,3V 16-bit", 0xC5, 0, 2048, 0, LP_OPTIONS16}, + /* 32 Gigabit */ + {"NAND 4GiB 3,3V 8-bit", 0xD7, 0, 4096, 0, LP_OPTIONS16}, + /* * Renesas AND 1 Gigabit. Those chips do not support extended id and * have a strange page/block layout ! The chosen minimum erasesize is -- cgit v1.2.3 From e1d0fe3cddf2306e3ac32569aa152f1909c9b46e Mon Sep 17 00:00:00 2001 From: Martin Krause Date: Tue, 22 Jun 2010 15:00:19 +0200 Subject: mtd: mtdconcat: fix bug with uninitialized lock and unlock functions Test if a lock or unlock function is present (pointer not NULL) before calling it, to prevent a kernel dump. Artem: removed extra blank lines Signed-off-by: Martin Krause Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/mtdconcat.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c index 7e075621bbf4..4567bc373780 100644 --- a/drivers/mtd/mtdconcat.c +++ b/drivers/mtd/mtdconcat.c @@ -540,10 +540,12 @@ static int concat_lock(struct mtd_info *mtd, loff_t ofs, uint64_t len) else size = len; - err = subdev->lock(subdev, ofs, size); - - if (err) - break; + if (subdev->lock) { + err = subdev->lock(subdev, ofs, size); + if (err) + break; + } else + err = -EOPNOTSUPP; len -= size; if (len == 0) @@ -578,10 +580,12 @@ static int concat_unlock(struct mtd_info *mtd, loff_t ofs, uint64_t len) else size = len; - err = subdev->unlock(subdev, ofs, size); - - if (err) - break; + if (subdev->unlock) { + err = subdev->unlock(subdev, ofs, size); + if (err) + break; + } else + err = -EOPNOTSUPP; len -= size; if (len == 0) -- cgit v1.2.3 From 30fe8115b55223cb84530ce04c4a20ba9d6dcf0b Mon Sep 17 00:00:00 2001 From: Brian Norris Date: Wed, 23 Jun 2010 13:36:02 -0700 Subject: mtd: nand: edit macro flag for BBT scan of last page in block NAND_BB_LAST_PAGE used to be in nand.h, but it pertained to bad block management and so belongs next to NAND_BBT_SCAN2NDPAGE in bbm.h. Also, its previous flag value (0x00000400) conflicted with NAND_BBT_SCANALLPAGES so I changed its value to 0x00008000. All uses of the name were modified to provide consistency with other "NAND_BBT_*" flags. Signed-off-by: Brian Norris Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/nand_base.c | 6 +++--- drivers/mtd/nand/nand_bbt.c | 2 +- include/linux/mtd/bbm.h | 2 ++ include/linux/mtd/nand.h | 2 -- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index 4a7b86423ee9..e6cf9aefef13 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -347,7 +347,7 @@ static int nand_block_bad(struct mtd_info *mtd, loff_t ofs, int getchip) struct nand_chip *chip = mtd->priv; u16 bad; - if (chip->options & NAND_BB_LAST_PAGE) + if (chip->options & NAND_BBT_SCANLASTPAGE) ofs += mtd->erasesize - mtd->writesize; page = (int)(ofs >> chip->page_shift) & chip->pagemask; @@ -399,7 +399,7 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) uint8_t buf[2] = { 0, 0 }; int block, ret; - if (chip->options & NAND_BB_LAST_PAGE) + if (chip->options & NAND_BBT_SCANLASTPAGE) ofs += mtd->erasesize - mtd->writesize; /* Get block number */ @@ -2946,7 +2946,7 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) && (*maf_id == NAND_MFR_SAMSUNG || *maf_id == NAND_MFR_HYNIX)) - chip->options |= NAND_BB_LAST_PAGE; + chip->options |= NAND_BBT_SCANLASTPAGE; /* Check for AND chips with 4 page planes */ if (chip->options & NAND_4PAGE_ARRAY) diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index ad97c0ce73b2..71d83be24ff6 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -432,7 +432,7 @@ static int create_bbt(struct mtd_info *mtd, uint8_t *buf, from = (loff_t)startblock << (this->bbt_erase_shift - 1); } - if (this->options & NAND_BB_LAST_PAGE) + if (this->options & NAND_BBT_SCANLASTPAGE) from += mtd->erasesize - (mtd->writesize * len); for (i = startblock; i < numblocks;) { diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h index 9c3757c5759d..8ad0b8629c3f 100644 --- a/include/linux/mtd/bbm.h +++ b/include/linux/mtd/bbm.h @@ -82,6 +82,8 @@ struct nand_bbt_descr { #define NAND_BBT_SAVECONTENT 0x00002000 /* Search good / bad pattern on the first and the second page */ #define NAND_BBT_SCAN2NDPAGE 0x00004000 +/* Search good / bad pattern on the last page of the eraseblock */ +#define NAND_BBT_SCANLASTPAGE 0x00008000 /* The maximum number of blocks to scan for a bbt */ #define NAND_BBT_SCAN_MAXBLOCKS 4 diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index a81b185e23a7..50f3aa00a452 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -181,8 +181,6 @@ typedef enum { #define NAND_NO_READRDY 0x00000100 /* Chip does not allow subpage writes */ #define NAND_NO_SUBPAGE_WRITE 0x00000200 -/* Chip stores bad block marker on the last page of the eraseblock */ -#define NAND_BB_LAST_PAGE 0x00000400 /* Device is one of 'new' xD cards that expose fake nand command set */ #define NAND_BROKEN_XD 0x00000400 -- cgit v1.2.3 From 771a115a6df06c45cf783e24c3f1f08b3e9aac4c Mon Sep 17 00:00:00 2001 From: Guillaume LECERF Date: Tue, 29 Jun 2010 10:32:37 +0200 Subject: mtd: cfi_probe: print manufacturer and id of probed chip Signed-off-by: Guillaume LECERF Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/chips/cfi_probe.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/chips/cfi_probe.c b/drivers/mtd/chips/cfi_probe.c index b2acd32f4fbf..8f5b96aa87a0 100644 --- a/drivers/mtd/chips/cfi_probe.c +++ b/drivers/mtd/chips/cfi_probe.c @@ -235,9 +235,9 @@ static int __xipram cfi_chip_setup(struct map_info *map, cfi_qry_mode_off(base, map, cfi); xip_allowed(base, map); - printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n", + printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank. Manufacturer ID %#08x Chip ID %#08x\n", map->name, cfi->interleave, cfi->device_type*8, base, - map->bankwidth*8); + map->bankwidth*8, cfi->mfr, cfi->id); return 1; } -- cgit v1.2.3 From d5af6dcffabdab199ecca0141a3a00201e948275 Mon Sep 17 00:00:00 2001 From: Kulikov Vasiliy Date: Tue, 29 Jun 2010 14:14:57 +0400 Subject: mtd: r852: remove casts from void Remove unnesessary casts from void*. Signed-off-by: Kulikov Vasiliy Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/r852.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/r852.c b/drivers/mtd/nand/r852.c index bcfc851fe550..9c9af62b7a0c 100644 --- a/drivers/mtd/nand/r852.c +++ b/drivers/mtd/nand/r852.c @@ -64,8 +64,8 @@ static inline void r852_write_reg_dword(struct r852_device *dev, /* returns pointer to our private structure */ static inline struct r852_device *r852_get_dev(struct mtd_info *mtd) { - struct nand_chip *chip = (struct nand_chip *)mtd->priv; - return (struct r852_device *)chip->priv; + struct nand_chip *chip = mtd->priv; + return chip->priv; } -- cgit v1.2.3 From 42845d2a49e574788823ae5e91c39e64c25cd872 Mon Sep 17 00:00:00 2001 From: Kulikov Vasiliy Date: Tue, 29 Jun 2010 14:15:13 +0400 Subject: mtd: dataflash: remove casts from void Remove unnesessary casts from void*. Signed-off-by: Kulikov Vasiliy Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/devices/mtd_dataflash.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/mtd/devices/mtd_dataflash.c b/drivers/mtd/devices/mtd_dataflash.c index 19817404ce7d..c5015cc721d5 100644 --- a/drivers/mtd/devices/mtd_dataflash.c +++ b/drivers/mtd/devices/mtd_dataflash.c @@ -141,7 +141,7 @@ static int dataflash_waitready(struct spi_device *spi) */ static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) { - struct dataflash *priv = (struct dataflash *)mtd->priv; + struct dataflash *priv = mtd->priv; struct spi_device *spi = priv->spi; struct spi_transfer x = { .tx_dma = 0, }; struct spi_message msg; @@ -231,7 +231,7 @@ static int dataflash_erase(struct mtd_info *mtd, struct erase_info *instr) static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) { - struct dataflash *priv = (struct dataflash *)mtd->priv; + struct dataflash *priv = mtd->priv; struct spi_transfer x[2] = { { .tx_dma = 0, }, }; struct spi_message msg; unsigned int addr; @@ -304,7 +304,7 @@ static int dataflash_read(struct mtd_info *mtd, loff_t from, size_t len, static int dataflash_write(struct mtd_info *mtd, loff_t to, size_t len, size_t * retlen, const u_char * buf) { - struct dataflash *priv = (struct dataflash *)mtd->priv; + struct dataflash *priv = mtd->priv; struct spi_device *spi = priv->spi; struct spi_transfer x[2] = { { .tx_dma = 0, }, }; struct spi_message msg; @@ -515,7 +515,7 @@ static ssize_t otp_read(struct spi_device *spi, unsigned base, static int dataflash_read_fact_otp(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) { - struct dataflash *priv = (struct dataflash *)mtd->priv; + struct dataflash *priv = mtd->priv; int status; /* 64 bytes, from 0..63 ... start at 64 on-chip */ @@ -532,7 +532,7 @@ static int dataflash_read_fact_otp(struct mtd_info *mtd, static int dataflash_read_user_otp(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) { - struct dataflash *priv = (struct dataflash *)mtd->priv; + struct dataflash *priv = mtd->priv; int status; /* 64 bytes, from 0..63 ... start at 0 on-chip */ @@ -553,7 +553,7 @@ static int dataflash_write_user_otp(struct mtd_info *mtd, const size_t l = 4 + 64; uint8_t *scratch; struct spi_transfer t; - struct dataflash *priv = (struct dataflash *)mtd->priv; + struct dataflash *priv = mtd->priv; int status; if (len > 64) -- cgit v1.2.3 From 7b8516b780ec639f26a4c6cdb51e342d8feecd44 Mon Sep 17 00:00:00 2001 From: Kulikov Vasiliy Date: Tue, 29 Jun 2010 14:15:17 +0400 Subject: mtd: nandsim: remove casts from void Remove unnesessary casts from void*. Signed-off-by: Kulikov Vasiliy Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/nandsim.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/mtd/nand/nandsim.c b/drivers/mtd/nand/nandsim.c index 261337efe0ee..c25648bb5793 100644 --- a/drivers/mtd/nand/nandsim.c +++ b/drivers/mtd/nand/nandsim.c @@ -553,8 +553,8 @@ static uint64_t divide(uint64_t n, uint32_t d) */ static int init_nandsim(struct mtd_info *mtd) { - struct nand_chip *chip = (struct nand_chip *)mtd->priv; - struct nandsim *ns = (struct nandsim *)(chip->priv); + struct nand_chip *chip = mtd->priv; + struct nandsim *ns = chip->priv; int i, ret = 0; uint64_t remains; uint64_t next_offset; @@ -1877,7 +1877,7 @@ static void switch_state(struct nandsim *ns) static u_char ns_nand_read_byte(struct mtd_info *mtd) { - struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv; + struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; u_char outb = 0x00; /* Sanity and correctness checks */ @@ -1950,7 +1950,7 @@ static u_char ns_nand_read_byte(struct mtd_info *mtd) static void ns_nand_write_byte(struct mtd_info *mtd, u_char byte) { - struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv; + struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; /* Sanity and correctness checks */ if (!ns->lines.ce) { @@ -2132,7 +2132,7 @@ static uint16_t ns_nand_read_word(struct mtd_info *mtd) static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) { - struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv; + struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; /* Check that chip is expecting data input */ if (!(ns->state & STATE_DATAIN_MASK)) { @@ -2159,7 +2159,7 @@ static void ns_nand_write_buf(struct mtd_info *mtd, const u_char *buf, int len) static void ns_nand_read_buf(struct mtd_info *mtd, u_char *buf, int len) { - struct nandsim *ns = (struct nandsim *)((struct nand_chip *)mtd->priv)->priv; + struct nandsim *ns = ((struct nand_chip *)mtd->priv)->priv; /* Sanity and correctness checks */ if (!ns->lines.ce) { @@ -2352,7 +2352,7 @@ module_init(ns_init_module); */ static void __exit ns_cleanup_module(void) { - struct nandsim *ns = (struct nandsim *)(((struct nand_chip *)nsmtd->priv)->priv); + struct nandsim *ns = ((struct nand_chip *)nsmtd->priv)->priv; int i; free_nandsim(ns); /* Free nandsim private resources */ -- cgit v1.2.3 From 029919c1ed79e409cbcdbfaf621b2077e72ccea6 Mon Sep 17 00:00:00 2001 From: Kulikov Vasiliy Date: Tue, 29 Jun 2010 14:15:20 +0400 Subject: mtd: r852: remove casts from void Remove unnesessary casts from void*. Signed-off-by: Kulikov Vasiliy Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/r852.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/r852.c b/drivers/mtd/nand/r852.c index 9c9af62b7a0c..5169ca6a66bc 100644 --- a/drivers/mtd/nand/r852.c +++ b/drivers/mtd/nand/r852.c @@ -380,7 +380,7 @@ void r852_cmdctl(struct mtd_info *mtd, int dat, unsigned int ctrl) */ int r852_wait(struct mtd_info *mtd, struct nand_chip *chip) { - struct r852_device *dev = (struct r852_device *)chip->priv; + struct r852_device *dev = chip->priv; unsigned long timeout; int status; -- cgit v1.2.3 From ece0ac98a13a555e6d46a02225fa15934abe7a3d Mon Sep 17 00:00:00 2001 From: Kulikov Vasiliy Date: Tue, 29 Jun 2010 14:15:24 +0400 Subject: mtd: sm_common: remove casts from void Remove unnesessary casts from void*. Signed-off-by: Kulikov Vasiliy Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/sm_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/sm_common.c b/drivers/mtd/nand/sm_common.c index ac80fb362e63..4a8f367c295c 100644 --- a/drivers/mtd/nand/sm_common.c +++ b/drivers/mtd/nand/sm_common.c @@ -109,7 +109,7 @@ static struct nand_flash_dev nand_xd_flash_ids[] = { int sm_register_device(struct mtd_info *mtd, int smartmedia) { - struct nand_chip *chip = (struct nand_chip *)mtd->priv; + struct nand_chip *chip = mtd->priv; int ret; chip->options |= NAND_SKIP_BBTSCAN; -- cgit v1.2.3 From 7fc14bcee0fc0fe1b7e1bd78d4fc0da395ebef35 Mon Sep 17 00:00:00 2001 From: Roel Kluin Date: Tue, 13 Jul 2010 13:24:31 +0300 Subject: mtd: tests: return -1 if verify failed Signed-off-by: Roel Kluin Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/tests/mtd_pagetest.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/mtd/tests/mtd_pagetest.c b/drivers/mtd/tests/mtd_pagetest.c index 6bc1b8276c62..00b937e38c1d 100644 --- a/drivers/mtd/tests/mtd_pagetest.c +++ b/drivers/mtd/tests/mtd_pagetest.c @@ -310,7 +310,7 @@ static int crosstest(void) static int erasecrosstest(void) { size_t read = 0, written = 0; - int err = 0, i, ebnum, ok = 1, ebnum2; + int err = 0, i, ebnum, ebnum2; loff_t addr0; char *readbuf = twopages; @@ -357,8 +357,7 @@ static int erasecrosstest(void) if (memcmp(writebuf, readbuf, pgsize)) { printk(PRINT_PREF "verify failed!\n"); errcnt += 1; - ok = 0; - return err; + return -1; } printk(PRINT_PREF "erasing block %d\n", ebnum); @@ -396,10 +395,10 @@ static int erasecrosstest(void) if (memcmp(writebuf, readbuf, pgsize)) { printk(PRINT_PREF "verify failed!\n"); errcnt += 1; - ok = 0; + return -1; } - if (ok && !err) + if (!err) printk(PRINT_PREF "erasecrosstest ok\n"); return err; } -- cgit v1.2.3 From 6a8cfcfb0de881735df4031eb5cc99be3d0971e9 Mon Sep 17 00:00:00 2001 From: Eric Bénard Date: Thu, 10 Jun 2010 16:03:04 +0200 Subject: mtd: mxc_nand: fix unbalanced enable for IRQ MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit * preset should be done before sending the reset command * without this, I get the following error on an i.MX35 : [ 0.900000] ------------[ cut here ]------------ [ 0.900000] WARNING: at kernel/irq/manage.c:290 __enable_irq+0x4c/0x88() [ 0.900000] Unbalanced enable for IRQ 33 [ 0.900000] Modules linked in: [ 0.900000] [] (unwind_backtrace+0x0/0xf0) from [] (dump_stack+0x18/0x1c) [ 0.900000] [] (dump_stack+0x18/0x1c) from [] (warn_slowpath_common+0x54/0x6c) [ 0.900000] [] (warn_slowpath_common+0x54/0x6c) from [] (warn_slowpath_fmt+0x38/0x40) [ 0.900000] [] (warn_slowpath_fmt+0x38/0x40) from [] (__enable_irq+0x4c/0x88) [ 0.900000] [] (__enable_irq+0x4c/0x88) from [] (enable_irq+0x54/0x98) [ 0.900000] [] (enable_irq+0x54/0x98) from [] (wait_op_done+0x40/0x134) [ 0.900000] [] (wait_op_done+0x40/0x134) from [] (send_cmd+0x30/0x38) [ 0.900000] [] (send_cmd+0x30/0x38) from [] (mxc_nand_command+0x26c/0x328) [ 0.900000] [] (mxc_nand_command+0x26c/0x328) from [] (nand_scan_ident+0x188/0x6c0) [ 0.900000] [] (nand_scan_ident+0x188/0x6c0) from [] (mxcnd_probe+0x2b8/0x3d0) [ 0.900000] [] (mxcnd_probe+0x2b8/0x3d0) from [] (platform_drv_probe+0x20/0x24) [ 0.900000] [] (platform_drv_probe+0x20/0x24) from [] (driver_probe_device+0xb0/0x164) [ 0.900000] [] (driver_probe_device+0xb0/0x164) from [] (__driver_attach+0x68/0x8c) [ 0.900000] [] (__driver_attach+0x68/0x8c) from [] (bus_for_each_dev+0x50/0x84) [ 0.900000] [] (bus_for_each_dev+0x50/0x84) from [] (driver_attach+0x20/0x28) [ 0.900000] [] (driver_attach+0x20/0x28) from [] (bus_add_driver+0x144/0x2dc) [ 0.900000] [] (bus_add_driver+0x144/0x2dc) from [] (driver_register+0xb0/0x13c) [ 0.900000] [] (driver_register+0xb0/0x13c) from [] (platform_driver_register+0x4c/0x60) [ 0.900000] [] (platform_driver_register+0x4c/0x60) from [] (platform_driver_probe+0x20/0xa0) [ 0.900000] [] (platform_driver_probe+0x20/0xa0) from [] (mxc_nd_init+0x18/0x24) [ 0.900000] [] (mxc_nd_init+0x18/0x24) from [] (do_one_initcall+0x64/0x1bc) [ 0.900000] [] (do_one_initcall+0x64/0x1bc) from [] (kernel_init+0xe8/0x1ac) [ 0.900000] [] (kernel_init+0xe8/0x1ac) from [] (kernel_thread_exit+0x0/0x8) [ 0.900000] ---[ end trace 8bf72ac6ba089a19 ]--- [ 1.140000] NAND device: Manufacturer ID: 0x2c, Chip ID: 0xda (Micron NAND 256MiB 3,3V 8-bit) Signed-off-by: Eric Bénard Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 68a7d37fd17c..b464f6b23d0d 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -604,8 +604,8 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, /* Command pre-processing step */ switch (command) { case NAND_CMD_RESET: - send_cmd(host, command, false); preset(mtd); + send_cmd(host, command, false); break; case NAND_CMD_STATUS: -- cgit v1.2.3 From 78d1022439e501bc4a1a32bfaad5a321b8a9d5d6 Mon Sep 17 00:00:00 2001 From: Conke Hu Date: Tue, 13 Jul 2010 12:56:30 +0800 Subject: mtd: s3c nand: parsing command-line partitions prior to set->partitions Current driver prevents command-line partitions from being parsed when built-in partitions are defined in s3c2410_nand_set object, but it is not desirable in some cases. This patch tries to parse commad-line partitions prior to the built-in. Signed-off-by: Conke Hu Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/s3c2410.c | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c index 239aadfd01b0..33d832dddfdd 100644 --- a/drivers/mtd/nand/s3c2410.c +++ b/drivers/mtd/nand/s3c2410.c @@ -727,15 +727,12 @@ static int s3c2410_nand_add_partition(struct s3c2410_nand_info *info, if (set == NULL) return add_mtd_device(&mtd->mtd); - if (set->nr_partitions == 0) { - mtd->mtd.name = set->name; - nr_part = parse_mtd_partitions(&mtd->mtd, part_probes, - &part_info, 0); - } else { - if (set->nr_partitions > 0 && set->partitions != NULL) { - nr_part = set->nr_partitions; - part_info = set->partitions; - } + mtd->mtd.name = set->name; + nr_part = parse_mtd_partitions(&mtd->mtd, part_probes, &part_info, 0); + + if (nr_part <= 0 && set->nr_partitions > 0) { + nr_part = set->nr_partitions; + part_info = set->partitions; } if (nr_part > 0 && part_info) -- cgit v1.2.3 From c7b28e25cb9beb943aead770ff14551b55fa8c79 Mon Sep 17 00:00:00 2001 From: Brian Norris Date: Tue, 13 Jul 2010 15:13:00 -0700 Subject: mtd: nand: refactor BB marker detection Some level of support for various scanning locations was already built in, but this required clean-up. First, BB marker location cannot be determined _only_ by the page size. Instead, I implemented some heuristic detection based on data sheets from various manufacturers (all found in nand_base.c:nand_get_flash_type()). Second, once these options were identified, they were not handled properly by nand_bbt.c:nand_default_bbt(). I updated the static nand_bbt_desc structs to reflect the need for more combinations of detection. The memory allocation here probably needs to be done dynamically in the very near future (see next patches). Signed-off-by: Brian Norris Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/nand_base.c | 24 +++++++++++++++++++---- drivers/mtd/nand/nand_bbt.c | 45 +++++++++++++++++++++++++++++++++++++------- 2 files changed, 58 insertions(+), 11 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index e6cf9aefef13..bd697909db53 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2920,9 +2920,14 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, chip->chip_shift = ffs((unsigned)(chip->chipsize >> 32)) + 32 - 1; /* Set the bad block position */ - chip->badblockpos = mtd->writesize > 512 ? - NAND_LARGE_BADBLOCK_POS : NAND_SMALL_BADBLOCK_POS; - chip->badblockbits = 8; + if (!(busw & NAND_BUSWIDTH_16) && (*maf_id == NAND_MFR_STMICRO || + (*maf_id == NAND_MFR_SAMSUNG && + mtd->writesize == 512) || + *maf_id == NAND_MFR_AMD)) + chip->badblockpos = NAND_SMALL_BADBLOCK_POS; + else + chip->badblockpos = NAND_LARGE_BADBLOCK_POS; + /* Get chip options, preserve non chip based options */ chip->options &= ~NAND_CHIPOPTIONS_MSK; @@ -2941,12 +2946,23 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, /* * Bad block marker is stored in the last page of each block - * on Samsung and Hynix MLC devices + * on Samsung and Hynix MLC devices; stored in first two pages + * of each block on Micron devices with 2KiB pages and on + * SLC Samsung, Hynix, and AMD/Spansion. All others scan only + * the first page. */ if ((chip->cellinfo & NAND_CI_CELLTYPE_MSK) && (*maf_id == NAND_MFR_SAMSUNG || *maf_id == NAND_MFR_HYNIX)) chip->options |= NAND_BBT_SCANLASTPAGE; + else if ((!(chip->cellinfo & NAND_CI_CELLTYPE_MSK) && + (*maf_id == NAND_MFR_SAMSUNG || + *maf_id == NAND_MFR_HYNIX || + *maf_id == NAND_MFR_AMD)) || + (mtd->writesize == 2048 && + *maf_id == NAND_MFR_MICRON)) + chip->options |= NAND_BBT_SCAN2NDPAGE; + /* Check for AND chips with 4 page planes */ if (chip->options & NAND_4PAGE_ARRAY) diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index 71d83be24ff6..ec1700eaf198 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -1093,29 +1093,50 @@ int nand_update_bbt(struct mtd_info *mtd, loff_t offs) static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; static struct nand_bbt_descr smallpage_memorybased = { - .options = NAND_BBT_SCAN2NDPAGE, - .offs = 5, + .options = 0, + .offs = NAND_SMALL_BADBLOCK_POS, .len = 1, .pattern = scan_ff_pattern }; +static struct nand_bbt_descr smallpage_scan2nd_memorybased = { + .options = NAND_BBT_SCAN2NDPAGE, + .offs = NAND_SMALL_BADBLOCK_POS, + .len = 2, + .pattern = scan_ff_pattern +}; + static struct nand_bbt_descr largepage_memorybased = { .options = 0, - .offs = 0, + .offs = NAND_LARGE_BADBLOCK_POS, + .len = 1, + .pattern = scan_ff_pattern +}; + +static struct nand_bbt_descr largepage_scan2nd_memorybased = { + .options = NAND_BBT_SCAN2NDPAGE, + .offs = NAND_LARGE_BADBLOCK_POS, .len = 2, .pattern = scan_ff_pattern }; +static struct nand_bbt_descr lastpage_memorybased = { + .options = NAND_BBT_SCANLASTPAGE, + .offs = 0, + .len = 1, + .pattern = scan_ff_pattern +}; + static struct nand_bbt_descr smallpage_flashbased = { .options = NAND_BBT_SCAN2NDPAGE, - .offs = 5, + .offs = NAND_SMALL_BADBLOCK_POS, .len = 1, .pattern = scan_ff_pattern }; static struct nand_bbt_descr largepage_flashbased = { .options = NAND_BBT_SCAN2NDPAGE, - .offs = 0, + .offs = NAND_LARGE_BADBLOCK_POS, .len = 2, .pattern = scan_ff_pattern }; @@ -1197,8 +1218,18 @@ int nand_default_bbt(struct mtd_info *mtd) this->bbt_td = NULL; this->bbt_md = NULL; if (!this->badblock_pattern) { - this->badblock_pattern = (mtd->writesize > 512) ? - &largepage_memorybased : &smallpage_memorybased; + if (this->options & NAND_BBT_SCANLASTPAGE) + this->badblock_pattern = &lastpage_memorybased; + else if (this->options & NAND_BBT_SCAN2NDPAGE) + this->badblock_pattern = this->badblockpos == + NAND_SMALL_BADBLOCK_POS ? + &smallpage_scan2nd_memorybased : + &largepage_scan2nd_memorybased; + else + this->badblock_pattern = this->badblockpos == + NAND_SMALL_BADBLOCK_POS ? + &smallpage_memorybased : + &largepage_memorybased; } } return nand_scan_bbt(mtd, this->badblock_pattern); -- cgit v1.2.3 From 58373ff0afff4cc8ac40608872995f4d87eb72ec Mon Sep 17 00:00:00 2001 From: Brian Norris Date: Thu, 15 Jul 2010 12:15:44 -0700 Subject: mtd: nand: more BB Detection refactoring and dynamic scan options This is a revision to PATCH 2/2 that I sent. Link: http://lists.infradead.org/pipermail/linux-mtd/2010-July/030911.html Added new flag for scanning of both bytes 1 and 6 of the OOB for a BB marker (instead of simply one or the other). The "check_pattern" and "check_short_pattern" functions were updated to include support for scanning the two different locations in the OOB. In order to handle increases in variety of necessary scanning patterns, I implemented dynamic memory allocation of nand_bbt_descr structs in new function 'nand_create_default_bbt_descr()'. This replaces some increasingly-unwieldy, statically-declared descriptors. It can replace several more (e.g. "flashbased" structs). However, I do not test the flashbased options personally. How this was tested: I referenced 30+ data sheets (covering 100+ parts), and I tested a selection of 10 different chips to varying degrees. Particularly, I tested the creation of bad-block descriptors and basic BB scanning on three parts: ST NAND04GW3B2D, 2K page ST NAND128W3A, 512B page Samsung K9F1G08U0A, 2K page To test these, I wrote some fake bad block markers to the flash (in OOB bytes 1, 6, and elsewhere) to see if the scanning routine would detect them properly. However, this method was somewhat limited because the driver I am using has some bugs in its OOB write functionality. Signed-off-by: Brian Norris Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/nand_base.c | 14 +++++ drivers/mtd/nand/nand_bbt.c | 127 ++++++++++++++++++++++++------------------- include/linux/mtd/bbm.h | 4 ++ 3 files changed, 90 insertions(+), 55 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index bd697909db53..c2901bd126f9 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -2963,6 +2963,15 @@ static struct nand_flash_dev *nand_get_flash_type(struct mtd_info *mtd, *maf_id == NAND_MFR_MICRON)) chip->options |= NAND_BBT_SCAN2NDPAGE; + /* + * Numonyx/ST 2K pages, x8 bus use BOTH byte 1 and 6 + */ + if (!(busw & NAND_BUSWIDTH_16) && + *maf_id == NAND_MFR_STMICRO && + mtd->writesize == 2048) { + chip->options |= NAND_BBT_SCANBYTE1AND6; + chip->badblockpos = 0; + } /* Check for AND chips with 4 page planes */ if (chip->options & NAND_4PAGE_ARRAY) @@ -3322,6 +3331,11 @@ void nand_release(struct mtd_info *mtd) kfree(chip->bbt); if (!(chip->options & NAND_OWN_BUFFERS)) kfree(chip->buffers); + + /* Free bad block descriptor memory */ + if (chip->badblock_pattern && chip->badblock_pattern->options + & NAND_BBT_DYNAMICSTRUCT) + kfree(chip->badblock_pattern); } EXPORT_SYMBOL_GPL(nand_lock); diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index ec1700eaf198..469de17107e5 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -93,6 +93,28 @@ static int check_pattern(uint8_t *buf, int len, int paglen, struct nand_bbt_desc return -1; } + /* Check both positions 1 and 6 for pattern? */ + if (td->options & NAND_BBT_SCANBYTE1AND6) { + if (td->options & NAND_BBT_SCANEMPTY) { + p += td->len; + end += NAND_SMALL_BADBLOCK_POS - td->offs; + /* Check region between positions 1 and 6 */ + for (i = 0; i < NAND_SMALL_BADBLOCK_POS - td->offs - td->len; + i++) { + if (*p++ != 0xff) + return -1; + } + } + else { + p += NAND_SMALL_BADBLOCK_POS - td->offs; + } + /* Compare the pattern */ + for (i = 0; i < td->len; i++) { + if (p[i] != td->pattern[i]) + return -1; + } + } + if (td->options & NAND_BBT_SCANEMPTY) { p += td->len; end += td->len; @@ -124,6 +146,13 @@ static int check_short_pattern(uint8_t *buf, struct nand_bbt_descr *td) if (p[td->offs + i] != td->pattern[i]) return -1; } + /* Need to check location 1 AND 6? */ + if (td->options & NAND_BBT_SCANBYTE1AND6) { + for (i = 0; i < td->len; i++) { + if (p[NAND_SMALL_BADBLOCK_POS + i] != td->pattern[i]) + return -1; + } + } return 0; } @@ -397,12 +426,10 @@ static int create_bbt(struct mtd_info *mtd, uint8_t *buf, if (bd->options & NAND_BBT_SCANALLPAGES) len = 1 << (this->bbt_erase_shift - this->page_shift); - else { - if (bd->options & NAND_BBT_SCAN2NDPAGE) - len = 2; - else - len = 1; - } + else if (bd->options & NAND_BBT_SCAN2NDPAGE) + len = 2; + else + len = 1; if (!(bd->options & NAND_BBT_SCANEMPTY)) { /* We need only read few bytes from the OOB area */ @@ -1092,41 +1119,6 @@ int nand_update_bbt(struct mtd_info *mtd, loff_t offs) * while scanning a device for factory marked good / bad blocks. */ static uint8_t scan_ff_pattern[] = { 0xff, 0xff }; -static struct nand_bbt_descr smallpage_memorybased = { - .options = 0, - .offs = NAND_SMALL_BADBLOCK_POS, - .len = 1, - .pattern = scan_ff_pattern -}; - -static struct nand_bbt_descr smallpage_scan2nd_memorybased = { - .options = NAND_BBT_SCAN2NDPAGE, - .offs = NAND_SMALL_BADBLOCK_POS, - .len = 2, - .pattern = scan_ff_pattern -}; - -static struct nand_bbt_descr largepage_memorybased = { - .options = 0, - .offs = NAND_LARGE_BADBLOCK_POS, - .len = 1, - .pattern = scan_ff_pattern -}; - -static struct nand_bbt_descr largepage_scan2nd_memorybased = { - .options = NAND_BBT_SCAN2NDPAGE, - .offs = NAND_LARGE_BADBLOCK_POS, - .len = 2, - .pattern = scan_ff_pattern -}; - -static struct nand_bbt_descr lastpage_memorybased = { - .options = NAND_BBT_SCANLASTPAGE, - .offs = 0, - .len = 1, - .pattern = scan_ff_pattern -}; - static struct nand_bbt_descr smallpage_flashbased = { .options = NAND_BBT_SCAN2NDPAGE, .offs = NAND_SMALL_BADBLOCK_POS, @@ -1175,6 +1167,43 @@ static struct nand_bbt_descr bbt_mirror_descr = { .pattern = mirror_pattern }; +#define BBT_SCAN_OPTIONS (NAND_BBT_SCANLASTPAGE | NAND_BBT_SCAN2NDPAGE | \ + NAND_BBT_SCANBYTE1AND6) +/** + * nand_create_default_bbt_descr - [Internal] Creates a BBT descriptor structure + * @this: NAND chip to create descriptor for + * + * This function allocates and initializes a nand_bbt_descr for BBM detection + * based on the properties of "this". The new descriptor is stored in + * this->badblock_pattern. Thus, this->badblock_pattern should be NULL when + * passed to this function. + * + * TODO: Handle other flags, replace other static structs + * (e.g. handle NAND_BBT_FLASH for flash-based BBT, + * replace smallpage_flashbased) + * + */ +static int nand_create_default_bbt_descr(struct nand_chip *this) +{ + struct nand_bbt_descr *bd; + if (this->badblock_pattern) { + printk(KERN_WARNING "BBT descr already allocated; not replacing.\n"); + return -EINVAL; + } + bd = kzalloc(sizeof(*bd), GFP_KERNEL); + if (!bd) { + printk(KERN_ERR "nand_create_default_bbt_descr: Out of memory\n"); + return -ENOMEM; + } + bd->options = this->options & BBT_SCAN_OPTIONS; + bd->offs = this->badblockpos; + bd->len = (this->options & NAND_BUSWIDTH_16) ? 2 : 1; + bd->pattern = scan_ff_pattern; + bd->options |= NAND_BBT_DYNAMICSTRUCT; + this->badblock_pattern = bd; + return 0; +} + /** * nand_default_bbt - [NAND Interface] Select a default bad block table for the device * @mtd: MTD device structure @@ -1217,20 +1246,8 @@ int nand_default_bbt(struct mtd_info *mtd) } else { this->bbt_td = NULL; this->bbt_md = NULL; - if (!this->badblock_pattern) { - if (this->options & NAND_BBT_SCANLASTPAGE) - this->badblock_pattern = &lastpage_memorybased; - else if (this->options & NAND_BBT_SCAN2NDPAGE) - this->badblock_pattern = this->badblockpos == - NAND_SMALL_BADBLOCK_POS ? - &smallpage_scan2nd_memorybased : - &largepage_scan2nd_memorybased; - else - this->badblock_pattern = this->badblockpos == - NAND_SMALL_BADBLOCK_POS ? - &smallpage_memorybased : - &largepage_memorybased; - } + if (!this->badblock_pattern) + nand_create_default_bbt_descr(this); } return nand_scan_bbt(mtd, this->badblock_pattern); } diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h index 8ad0b8629c3f..a04b962492a8 100644 --- a/include/linux/mtd/bbm.h +++ b/include/linux/mtd/bbm.h @@ -84,6 +84,10 @@ struct nand_bbt_descr { #define NAND_BBT_SCAN2NDPAGE 0x00004000 /* Search good / bad pattern on the last page of the eraseblock */ #define NAND_BBT_SCANLASTPAGE 0x00008000 +/* Chip stores bad block marker on BOTH 1st and 6th bytes of OOB */ +#define NAND_BBT_SCANBYTE1AND6 0x00100000 +/* The nand_bbt_descr was created dynamicaly and must be freed */ +#define NAND_BBT_DYNAMICSTRUCT 0x00200000 /* The maximum number of blocks to scan for a bbt */ #define NAND_BBT_SCAN_MAXBLOCKS 4 -- cgit v1.2.3 From 1c3275b656045aff9a75bb2c9f3251af1043ebb3 Mon Sep 17 00:00:00 2001 From: Sudhakar Rajashekhara Date: Tue, 20 Jul 2010 15:24:01 -0700 Subject: mtd: nand: davinci: correct 4-bit error correction On TI's DA830/OMAP-L137, DA850/OMAP-L138 and DM365, after setting the 4BITECC_ADD_CALC_START bit in the NAND Flash control register to 1 and before waiting for the NAND Flash status register to be equal to 1, 2 or 3, we have to wait till the ECC HW goes to correction state. Without this wait, ECC correction calculations will not be proper. This has been tested on DA830/OMAP-L137, DA850/OMAP-L138, DM355 and DM365 EVMs. Signed-off-by: Sudhakar Rajashekhara Acked-by: Sneha Narnakaje Signed-off-by: Andrew Morton Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/davinci_nand.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/drivers/mtd/nand/davinci_nand.c b/drivers/mtd/nand/davinci_nand.c index 9c9d893affeb..2ac7367afe77 100644 --- a/drivers/mtd/nand/davinci_nand.c +++ b/drivers/mtd/nand/davinci_nand.c @@ -311,7 +311,9 @@ static int nand_davinci_correct_4bit(struct mtd_info *mtd, unsigned short ecc10[8]; unsigned short *ecc16; u32 syndrome[4]; + u32 ecc_state; unsigned num_errors, corrected; + unsigned long timeo = jiffies + msecs_to_jiffies(100); /* All bytes 0xff? It's an erased page; ignore its ECC. */ for (i = 0; i < 10; i++) { @@ -361,6 +363,21 @@ compare: */ davinci_nand_writel(info, NANDFCR_OFFSET, davinci_nand_readl(info, NANDFCR_OFFSET) | BIT(13)); + + /* + * ECC_STATE field reads 0x3 (Error correction complete) immediately + * after setting the 4BITECC_ADD_CALC_START bit. So if you immediately + * begin trying to poll for the state, you may fall right out of your + * loop without any of the correction calculations having taken place. + * The recommendation from the hardware team is to wait till ECC_STATE + * reads less than 4, which means ECC HW has entered correction state. + */ + do { + ecc_state = (davinci_nand_readl(info, + NANDFSR_OFFSET) >> 8) & 0x0f; + cpu_relax(); + } while ((ecc_state < 4) && time_before(jiffies, timeo)); + for (;;) { u32 fsr = davinci_nand_readl(info, NANDFSR_OFFSET); -- cgit v1.2.3 From 6ea9ad24186d1242320bf02082e02c8c5a8073be Mon Sep 17 00:00:00 2001 From: "Dong, Chuanxiao" Date: Thu, 22 Jul 2010 01:32:26 +0800 Subject: mtd: denali.h: fixed checkpatch errors Fix all checkpatch.pl complaints. Artem: tweaked a little and fix tab indentations, so now this is not only about checkpatch, but also about making indentations look sane. Signed-off-by: Chuanxiao Dong Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.h | 160 ++++++++++++++++++++++------------------------ 1 file changed, 78 insertions(+), 82 deletions(-) diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 422a29ab2f60..b56fa3c7c166 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -17,7 +17,7 @@ * */ -#include +#include #define DEVICE_RESET 0x0 #define DEVICE_RESET__BANK0 0x0001 @@ -29,7 +29,7 @@ #define TRANSFER_SPARE_REG__FLAG 0x0001 #define LOAD_WAIT_CNT 0x20 -#define LOAD_WAIT_CNT__VALUE 0xffff +#define LOAD_WAIT_CNT__VALUE 0xffff #define PROGRAM_WAIT_CNT 0x30 #define PROGRAM_WAIT_CNT__VALUE 0xffff @@ -83,7 +83,7 @@ #define RE_2_WE 0x120 #define RE_2_WE__VALUE 0x003f -#define ACC_CLKS 0x130 +#define ACC_CLKS 0x130 #define ACC_CLKS__VALUE 0x000f #define NUMBER_OF_PLANES 0x140 @@ -140,7 +140,7 @@ #define DEVICES_CONNECTED 0x250 #define DEVICES_CONNECTED__VALUE 0x0007 -#define DIE_MASK 0x260 +#define DIE_MASK 0x260 #define DIE_MASK__VALUE 0x00ff #define FIRST_BLOCK_OF_NEXT_PLANE 0x270 @@ -152,7 +152,7 @@ #define RE_2_RE 0x290 #define RE_2_RE__VALUE 0x003f -#define MANUFACTURER_ID 0x300 +#define MANUFACTURER_ID 0x300 #define MANUFACTURER_ID__VALUE 0x00ff #define DEVICE_ID 0x310 @@ -173,13 +173,13 @@ #define LOGICAL_PAGE_SPARE_SIZE 0x360 #define LOGICAL_PAGE_SPARE_SIZE__VALUE 0xffff -#define REVISION 0x370 +#define REVISION 0x370 #define REVISION__VALUE 0xffff #define ONFI_DEVICE_FEATURES 0x380 #define ONFI_DEVICE_FEATURES__VALUE 0x003f -#define ONFI_OPTIONAL_COMMANDS 0x390 +#define ONFI_OPTIONAL_COMMANDS 0x390 #define ONFI_OPTIONAL_COMMANDS__VALUE 0x003f #define ONFI_TIMING_MODE 0x3a0 @@ -201,12 +201,12 @@ #define FEATURES 0x3f0 #define FEATURES__N_BANKS 0x0003 #define FEATURES__ECC_MAX_ERR 0x003c -#define FEATURES__DMA 0x0040 +#define FEATURES__DMA 0x0040 #define FEATURES__CMD_DMA 0x0080 #define FEATURES__PARTITION 0x0100 #define FEATURES__XDMA_SIDEBAND 0x0200 #define FEATURES__GPREG 0x0400 -#define FEATURES__INDEX_ADDR 0x0800 +#define FEATURES__INDEX_ADDR 0x0800 #define TRANSFER_MODE 0x400 #define TRANSFER_MODE__VALUE 0x0003 @@ -235,12 +235,12 @@ #define INTR_EN0__DMA_CMD_COMP 0x0004 #define INTR_EN0__TIME_OUT 0x0008 #define INTR_EN0__PROGRAM_FAIL 0x0010 -#define INTR_EN0__ERASE_FAIL 0x0020 +#define INTR_EN0__ERASE_FAIL 0x0020 #define INTR_EN0__LOAD_COMP 0x0040 #define INTR_EN0__PROGRAM_COMP 0x0080 -#define INTR_EN0__ERASE_COMP 0x0100 +#define INTR_EN0__ERASE_COMP 0x0100 #define INTR_EN0__PIPE_CPYBCK_CMD_COMP 0x0200 -#define INTR_EN0__LOCKED_BLK 0x0400 +#define INTR_EN0__LOCKED_BLK 0x0400 #define INTR_EN0__UNSUP_CMD 0x0800 #define INTR_EN0__INT_ACT 0x1000 #define INTR_EN0__RST_COMP 0x2000 @@ -253,7 +253,7 @@ #define ERR_PAGE_ADDR0 0x440 #define ERR_PAGE_ADDR0__VALUE 0xffff -#define ERR_BLOCK_ADDR0 0x450 +#define ERR_BLOCK_ADDR0 0x450 #define ERR_BLOCK_ADDR0__VALUE 0xffff #define INTR_STATUS1 0x460 @@ -280,12 +280,12 @@ #define INTR_EN1__DMA_CMD_COMP 0x0004 #define INTR_EN1__TIME_OUT 0x0008 #define INTR_EN1__PROGRAM_FAIL 0x0010 -#define INTR_EN1__ERASE_FAIL 0x0020 +#define INTR_EN1__ERASE_FAIL 0x0020 #define INTR_EN1__LOAD_COMP 0x0040 #define INTR_EN1__PROGRAM_COMP 0x0080 -#define INTR_EN1__ERASE_COMP 0x0100 +#define INTR_EN1__ERASE_COMP 0x0100 #define INTR_EN1__PIPE_CPYBCK_CMD_COMP 0x0200 -#define INTR_EN1__LOCKED_BLK 0x0400 +#define INTR_EN1__LOCKED_BLK 0x0400 #define INTR_EN1__UNSUP_CMD 0x0800 #define INTR_EN1__INT_ACT 0x1000 #define INTR_EN1__RST_COMP 0x2000 @@ -298,7 +298,7 @@ #define ERR_PAGE_ADDR1 0x490 #define ERR_PAGE_ADDR1__VALUE 0xffff -#define ERR_BLOCK_ADDR1 0x4a0 +#define ERR_BLOCK_ADDR1 0x4a0 #define ERR_BLOCK_ADDR1__VALUE 0xffff #define INTR_STATUS2 0x4b0 @@ -325,12 +325,12 @@ #define INTR_EN2__DMA_CMD_COMP 0x0004 #define INTR_EN2__TIME_OUT 0x0008 #define INTR_EN2__PROGRAM_FAIL 0x0010 -#define INTR_EN2__ERASE_FAIL 0x0020 +#define INTR_EN2__ERASE_FAIL 0x0020 #define INTR_EN2__LOAD_COMP 0x0040 #define INTR_EN2__PROGRAM_COMP 0x0080 -#define INTR_EN2__ERASE_COMP 0x0100 +#define INTR_EN2__ERASE_COMP 0x0100 #define INTR_EN2__PIPE_CPYBCK_CMD_COMP 0x0200 -#define INTR_EN2__LOCKED_BLK 0x0400 +#define INTR_EN2__LOCKED_BLK 0x0400 #define INTR_EN2__UNSUP_CMD 0x0800 #define INTR_EN2__INT_ACT 0x1000 #define INTR_EN2__RST_COMP 0x2000 @@ -343,7 +343,7 @@ #define ERR_PAGE_ADDR2 0x4e0 #define ERR_PAGE_ADDR2__VALUE 0xffff -#define ERR_BLOCK_ADDR2 0x4f0 +#define ERR_BLOCK_ADDR2 0x4f0 #define ERR_BLOCK_ADDR2__VALUE 0xffff #define INTR_STATUS3 0x500 @@ -370,12 +370,12 @@ #define INTR_EN3__DMA_CMD_COMP 0x0004 #define INTR_EN3__TIME_OUT 0x0008 #define INTR_EN3__PROGRAM_FAIL 0x0010 -#define INTR_EN3__ERASE_FAIL 0x0020 +#define INTR_EN3__ERASE_FAIL 0x0020 #define INTR_EN3__LOAD_COMP 0x0040 #define INTR_EN3__PROGRAM_COMP 0x0080 -#define INTR_EN3__ERASE_COMP 0x0100 +#define INTR_EN3__ERASE_COMP 0x0100 #define INTR_EN3__PIPE_CPYBCK_CMD_COMP 0x0200 -#define INTR_EN3__LOCKED_BLK 0x0400 +#define INTR_EN3__LOCKED_BLK 0x0400 #define INTR_EN3__UNSUP_CMD 0x0800 #define INTR_EN3__INT_ACT 0x1000 #define INTR_EN3__RST_COMP 0x2000 @@ -388,7 +388,7 @@ #define ERR_PAGE_ADDR3 0x530 #define ERR_PAGE_ADDR3__VALUE 0xffff -#define ERR_BLOCK_ADDR3 0x540 +#define ERR_BLOCK_ADDR3 0x540 #define ERR_BLOCK_ADDR3__VALUE 0xffff #define DATA_INTR 0x550 @@ -412,9 +412,9 @@ #define GPREG_3__VALUE 0xffff #define ECC_THRESHOLD 0x600 -#define ECC_THRESHOLD__VALUE 0x03ff +#define ECC_THRESHOLD__VALUE 0x03ff -#define ECC_ERROR_BLOCK_ADDRESS 0x610 +#define ECC_ERROR_BLOCK_ADDRESS 0x610 #define ECC_ERROR_BLOCK_ADDRESS__VALUE 0xffff #define ECC_ERROR_PAGE_ADDRESS 0x620 @@ -466,7 +466,7 @@ #define CHNL_ACTIVE__CHANNEL3 0x0008 #define ACTIVE_SRC_ID 0x800 -#define ACTIVE_SRC_ID__VALUE 0x00ff +#define ACTIVE_SRC_ID__VALUE 0x00ff #define PTN_INTR 0x810 #define PTN_INTR__CONFIG_ERROR 0x0001 @@ -485,7 +485,7 @@ #define PTN_INTR_EN__REG_ACCESS_ERROR 0x0020 #define PERM_SRC_ID_0 0x830 -#define PERM_SRC_ID_0__SRCID 0x00ff +#define PERM_SRC_ID_0__SRCID 0x00ff #define PERM_SRC_ID_0__DIRECT_ACCESS_ACTIVE 0x0800 #define PERM_SRC_ID_0__WRITE_ACTIVE 0x2000 #define PERM_SRC_ID_0__READ_ACTIVE 0x4000 @@ -502,7 +502,7 @@ #define MIN_MAX_BANK_0__MAX_VALUE 0x000c #define PERM_SRC_ID_1 0x870 -#define PERM_SRC_ID_1__SRCID 0x00ff +#define PERM_SRC_ID_1__SRCID 0x00ff #define PERM_SRC_ID_1__DIRECT_ACCESS_ACTIVE 0x0800 #define PERM_SRC_ID_1__WRITE_ACTIVE 0x2000 #define PERM_SRC_ID_1__READ_ACTIVE 0x4000 @@ -519,7 +519,7 @@ #define MIN_MAX_BANK_1__MAX_VALUE 0x000c #define PERM_SRC_ID_2 0x8b0 -#define PERM_SRC_ID_2__SRCID 0x00ff +#define PERM_SRC_ID_2__SRCID 0x00ff #define PERM_SRC_ID_2__DIRECT_ACCESS_ACTIVE 0x0800 #define PERM_SRC_ID_2__WRITE_ACTIVE 0x2000 #define PERM_SRC_ID_2__READ_ACTIVE 0x4000 @@ -536,7 +536,7 @@ #define MIN_MAX_BANK_2__MAX_VALUE 0x000c #define PERM_SRC_ID_3 0x8f0 -#define PERM_SRC_ID_3__SRCID 0x00ff +#define PERM_SRC_ID_3__SRCID 0x00ff #define PERM_SRC_ID_3__DIRECT_ACCESS_ACTIVE 0x0800 #define PERM_SRC_ID_3__WRITE_ACTIVE 0x2000 #define PERM_SRC_ID_3__READ_ACTIVE 0x4000 @@ -553,7 +553,7 @@ #define MIN_MAX_BANK_3__MAX_VALUE 0x000c #define PERM_SRC_ID_4 0x930 -#define PERM_SRC_ID_4__SRCID 0x00ff +#define PERM_SRC_ID_4__SRCID 0x00ff #define PERM_SRC_ID_4__DIRECT_ACCESS_ACTIVE 0x0800 #define PERM_SRC_ID_4__WRITE_ACTIVE 0x2000 #define PERM_SRC_ID_4__READ_ACTIVE 0x4000 @@ -570,7 +570,7 @@ #define MIN_MAX_BANK_4__MAX_VALUE 0x000c #define PERM_SRC_ID_5 0x970 -#define PERM_SRC_ID_5__SRCID 0x00ff +#define PERM_SRC_ID_5__SRCID 0x00ff #define PERM_SRC_ID_5__DIRECT_ACCESS_ACTIVE 0x0800 #define PERM_SRC_ID_5__WRITE_ACTIVE 0x2000 #define PERM_SRC_ID_5__READ_ACTIVE 0x4000 @@ -587,7 +587,7 @@ #define MIN_MAX_BANK_5__MAX_VALUE 0x000c #define PERM_SRC_ID_6 0x9b0 -#define PERM_SRC_ID_6__SRCID 0x00ff +#define PERM_SRC_ID_6__SRCID 0x00ff #define PERM_SRC_ID_6__DIRECT_ACCESS_ACTIVE 0x0800 #define PERM_SRC_ID_6__WRITE_ACTIVE 0x2000 #define PERM_SRC_ID_6__READ_ACTIVE 0x4000 @@ -604,7 +604,7 @@ #define MIN_MAX_BANK_6__MAX_VALUE 0x000c #define PERM_SRC_ID_7 0x9f0 -#define PERM_SRC_ID_7__SRCID 0x00ff +#define PERM_SRC_ID_7__SRCID 0x00ff #define PERM_SRC_ID_7__DIRECT_ACCESS_ACTIVE 0x0800 #define PERM_SRC_ID_7__WRITE_ACTIVE 0x2000 #define PERM_SRC_ID_7__READ_ACTIVE 0x4000 @@ -622,43 +622,40 @@ /* flash.h */ struct device_info_tag { - uint16_t wDeviceMaker; - uint16_t wDeviceID; + uint16_t wDeviceMaker; + uint16_t wDeviceID; uint8_t bDeviceParam0; uint8_t bDeviceParam1; uint8_t bDeviceParam2; - uint32_t wDeviceType; - uint32_t wSpectraStartBlock; - uint32_t wSpectraEndBlock; - uint32_t wTotalBlocks; - uint16_t wPagesPerBlock; - uint16_t wPageSize; - uint16_t wPageDataSize; - uint16_t wPageSpareSize; - uint16_t wNumPageSpareFlag; - uint16_t wECCBytesPerSector; - uint32_t wBlockSize; - uint32_t wBlockDataSize; - uint32_t wDataBlockNum; - uint8_t bPlaneNum; - uint16_t wDeviceMainAreaSize; - uint16_t wDeviceSpareAreaSize; - uint16_t wDevicesConnected; - uint16_t wDeviceWidth; - uint16_t wHWRevision; - uint16_t wHWFeatures; - - uint16_t wONFIDevFeatures; - uint16_t wONFIOptCommands; - uint16_t wONFITimingMode; - uint16_t wONFIPgmCacheTimingMode; - - uint16_t MLCDevice; - uint16_t wSpareSkipBytes; - - uint8_t nBitsInPageNumber; - uint8_t nBitsInPageDataSize; - uint8_t nBitsInBlockDataSize; + uint32_t wDeviceType; + uint32_t wSpectraStartBlock; + uint32_t wSpectraEndBlock; + uint32_t wTotalBlocks; + uint16_t wPagesPerBlock; + uint16_t wPageSize; + uint16_t wPageDataSize; + uint16_t wPageSpareSize; + uint16_t wNumPageSpareFlag; + uint16_t wECCBytesPerSector; + uint32_t wBlockSize; + uint32_t wBlockDataSize; + uint32_t wDataBlockNum; + uint8_t bPlaneNum; + uint16_t wDeviceMainAreaSize; + uint16_t wDeviceSpareAreaSize; + uint16_t wDevicesConnected; + uint16_t wDeviceWidth; + uint16_t wHWRevision; + uint16_t wHWFeatures; + uint16_t wONFIDevFeatures; + uint16_t wONFIOptCommands; + uint16_t wONFITimingMode; + uint16_t wONFIPgmCacheTimingMode; + uint16_t MLCDevice; + uint16_t wSpareSkipBytes; + uint8_t nBitsInPageNumber; + uint8_t nBitsInPageDataSize; + uint8_t nBitsInBlockDataSize; }; /* ffsdefs.h */ @@ -684,11 +681,11 @@ struct device_info_tag { #define NAND_DBG_TRACE 3 #ifdef VERBOSE -#define nand_dbg_print(level, args...) \ - do { \ - if (level <= nand_debug_level) \ - printk(KERN_ALERT args); \ - } while (0) +#define nand_dbg_print(level, args...) \ + do { \ + if (level <= nand_debug_level) \ + printk(KERN_ALERT args); \ + } while (0) #else #define nand_dbg_print(level, args...) #endif @@ -772,10 +769,9 @@ struct device_info_tag { #define ECC_SECTOR_SIZE 512 #define LLD_MAX_FLASH_BANKS 4 -#define DENALI_BUF_SIZE NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE +#define DENALI_BUF_SIZE (NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE) -struct nand_buf -{ +struct nand_buf { int head; int tail; uint8_t buf[DENALI_BUF_SIZE]; @@ -808,9 +804,9 @@ struct denali_nand_info { int idx; }; -static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali); -static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali); -static void NAND_LLD_Enable_Disable_Interrupts(struct denali_nand_info *denali, uint16_t INT_ENABLE); +static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali); +static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali); +static void NAND_LLD_Enable_Disable_Interrupts(struct denali_nand_info *denali, + uint16_t INT_ENABLE); #endif /*_LLD_NAND_*/ - -- cgit v1.2.3 From 02ed70bb7b2644936959aee617296022dedb109e Mon Sep 17 00:00:00 2001 From: Brian Norris Date: Wed, 21 Jul 2010 16:53:47 -0700 Subject: mtd: nand: update nand_default_block_markbad() This is an update that depends on the previous patches I sent. We can now write to all the appropriate BB marker locations (i.e. pages 1 AND 2, bytes 1 AND 6) with nand_default_block_markbad() if necessary, according to the flags marked in chip->options. Note that I removed the line: ofs += mtd->oobsize; Unless I am wrong, this line was completely unnecessary in the first place. Signed-off-by: Brian Norris Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/nand_base.c | 34 ++++++++++++++++++++++++---------- 1 file changed, 24 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index c2901bd126f9..ee6a6f866b50 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -397,7 +397,7 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) { struct nand_chip *chip = mtd->priv; uint8_t buf[2] = { 0, 0 }; - int block, ret; + int block, ret, i = 0; if (chip->options & NAND_BBT_SCANLASTPAGE) ofs += mtd->erasesize - mtd->writesize; @@ -411,17 +411,31 @@ static int nand_default_block_markbad(struct mtd_info *mtd, loff_t ofs) if (chip->options & NAND_USE_FLASH_BBT) ret = nand_update_bbt(mtd, ofs); else { - /* We write two bytes, so we dont have to mess with 16 bit - * access - */ nand_get_device(chip, mtd, FL_WRITING); - ofs += mtd->oobsize; - chip->ops.len = chip->ops.ooblen = 2; - chip->ops.datbuf = NULL; - chip->ops.oobbuf = buf; - chip->ops.ooboffs = chip->badblockpos & ~0x01; - ret = nand_do_write_oob(mtd, ofs, &chip->ops); + /* Write to first two pages and to byte 1 and 6 if necessary. + * If we write to more than one location, the first error + * encountered quits the procedure. We write two bytes per + * location, so we dont have to mess with 16 bit access. + */ + do { + chip->ops.len = chip->ops.ooblen = 2; + chip->ops.datbuf = NULL; + chip->ops.oobbuf = buf; + chip->ops.ooboffs = chip->badblockpos & ~0x01; + + ret = nand_do_write_oob(mtd, ofs, &chip->ops); + + if (!ret && (chip->options & NAND_BBT_SCANBYTE1AND6)) { + chip->ops.ooboffs = NAND_SMALL_BADBLOCK_POS + & ~0x01; + ret = nand_do_write_oob(mtd, ofs, &chip->ops); + } + i++; + ofs += mtd->writesize; + } while (!ret && (chip->options & NAND_BBT_SCAN2NDPAGE) && + i < 2); + nand_release_device(mtd); } if (!ret) -- cgit v1.2.3 From 42b0aab1cc30b2fa7e0a99b832bd1b5c9b59757d Mon Sep 17 00:00:00 2001 From: Rohit Hassan Sathyanarayan Date: Fri, 23 Jul 2010 12:29:25 +0530 Subject: mtd: onenand:fix for page addr calculation based on device type Sending the patch for page address calculation based on device type. This resolves the OneNAND DDP device read problem as pointed by Enric. http://lists.infradead.org/pipermail/linux-mtd/2010-July/030920.html Signed-off-by: Rohit HS Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/onenand/onenand_base.c | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index 26caf2590dae..f749935f3cb5 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -377,8 +377,11 @@ static int onenand_command(struct mtd_info *mtd, int cmd, loff_t addr, size_t le default: block = onenand_block(this, addr); - page = (int) (addr - onenand_addr(this, block)) >> this->page_shift; - + if (FLEXONENAND(this)) + page = (int) (addr - onenand_addr(this, block))>>\ + this->page_shift; + else + page = (int) (addr >> this->page_shift); if (ONENAND_IS_2PLANE(this)) { /* Make the even block number */ block &= ~1; -- cgit v1.2.3 From ad0d363b8fb7559a410483635349e22de6727988 Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Fri, 28 May 2010 11:03:11 +0900 Subject: mtd: OneNAND: Introduce chip_probe function Samsung SoCs use the own OneNAND controler and detect OneNAND chip at power on. To use this feature, introduce the chip_probe function. Also remove workaround for Samsung SoCs. Signed-off-by: Kyungmin Park Signed-off-by: David Woodhouse --- drivers/mtd/onenand/onenand_base.c | 42 +++++++++++++++++++++++++++----------- include/linux/mtd/onenand.h | 2 ++ 2 files changed, 32 insertions(+), 12 deletions(-) diff --git a/drivers/mtd/onenand/onenand_base.c b/drivers/mtd/onenand/onenand_base.c index f749935f3cb5..a2bb520286f8 100644 --- a/drivers/mtd/onenand/onenand_base.c +++ b/drivers/mtd/onenand/onenand_base.c @@ -3733,17 +3733,16 @@ out: } /** - * onenand_probe - [OneNAND Interface] Probe the OneNAND device + * onenand_chip_probe - [OneNAND Interface] The generic chip probe * @param mtd MTD device structure * * OneNAND detection method: * Compare the values from command with ones from register */ -static int onenand_probe(struct mtd_info *mtd) +static int onenand_chip_probe(struct mtd_info *mtd) { struct onenand_chip *this = mtd->priv; - int bram_maf_id, bram_dev_id, maf_id, dev_id, ver_id; - int density; + int bram_maf_id, bram_dev_id, maf_id, dev_id; int syscfg; /* Save system configuration 1 */ @@ -3766,12 +3765,6 @@ static int onenand_probe(struct mtd_info *mtd) /* Restore system configuration 1 */ this->write_word(syscfg, this->base + ONENAND_REG_SYS_CFG1); - /* Workaround */ - if (syscfg & ONENAND_SYS_CFG1_SYNC_WRITE) { - bram_maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); - bram_dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); - } - /* Check manufacturer ID */ if (onenand_check_maf(bram_maf_id)) return -ENXIO; @@ -3779,13 +3772,35 @@ static int onenand_probe(struct mtd_info *mtd) /* Read manufacturer and device IDs from Register */ maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); - ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); - this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); /* Check OneNAND device */ if (maf_id != bram_maf_id || dev_id != bram_dev_id) return -ENXIO; + return 0; +} + +/** + * onenand_probe - [OneNAND Interface] Probe the OneNAND device + * @param mtd MTD device structure + */ +static int onenand_probe(struct mtd_info *mtd) +{ + struct onenand_chip *this = mtd->priv; + int maf_id, dev_id, ver_id; + int density; + int ret; + + ret = this->chip_probe(mtd); + if (ret) + return ret; + + /* Read manufacturer and device IDs from Register */ + maf_id = this->read_word(this->base + ONENAND_REG_MANUFACTURER_ID); + dev_id = this->read_word(this->base + ONENAND_REG_DEVICE_ID); + ver_id = this->read_word(this->base + ONENAND_REG_VERSION_ID); + this->technology = this->read_word(this->base + ONENAND_REG_TECHNOLOGY); + /* Flash device information */ onenand_print_device_info(dev_id, ver_id); this->device_id = dev_id; @@ -3912,6 +3927,9 @@ int onenand_scan(struct mtd_info *mtd, int maxchips) if (!this->unlock_all) this->unlock_all = onenand_unlock_all; + if (!this->chip_probe) + this->chip_probe = onenand_chip_probe; + if (!this->read_bufferram) this->read_bufferram = onenand_read_bufferram; if (!this->write_bufferram) diff --git a/include/linux/mtd/onenand.h b/include/linux/mtd/onenand.h index c26ff86ad08a..0c8815bfae1c 100644 --- a/include/linux/mtd/onenand.h +++ b/include/linux/mtd/onenand.h @@ -68,6 +68,7 @@ struct onenand_bufferram { * @write_word: [REPLACEABLE] hardware specific function for write * register of OneNAND * @mmcontrol: sync burst read function + * @chip_probe: [REPLACEABLE] hardware specific function for chip probe * @block_markbad: function to mark a block as bad * @scan_bbt: [REPLACEALBE] hardware specific function for scanning * Bad block Table @@ -114,6 +115,7 @@ struct onenand_chip { unsigned short (*read_word)(void __iomem *addr); void (*write_word)(unsigned short value, void __iomem *addr); void (*mmcontrol)(struct mtd_info *mtd, int sync_read); + int (*chip_probe)(struct mtd_info *mtd); int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); int (*scan_bbt)(struct mtd_info *mtd); -- cgit v1.2.3 From 7b0507eb697ea157533b9a7e0a955f64a00b1b1d Mon Sep 17 00:00:00 2001 From: Kyungmin Park Date: Fri, 28 May 2010 11:15:35 +0900 Subject: mtd: OneNAND: Samsung SoCs use own chip_probe function Samsung SoCs use own chip_probe function. Don't touch the memory configuration at probe time. Signed-off-by: Kyungmin Park Signed-off-by: David Woodhouse --- drivers/mtd/onenand/samsung.c | 21 ++++++++------------- 1 file changed, 8 insertions(+), 13 deletions(-) diff --git a/drivers/mtd/onenand/samsung.c b/drivers/mtd/onenand/samsung.c index 2750317cb58f..cb443af3d45f 100644 --- a/drivers/mtd/onenand/samsung.c +++ b/drivers/mtd/onenand/samsung.c @@ -630,6 +630,12 @@ normal: return 0; } +static int s5pc110_chip_probe(struct mtd_info *mtd) +{ + /* Now just return 0 */ + return 0; +} + static int s3c_onenand_bbt_wait(struct mtd_info *mtd, int state) { unsigned int flags = INT_ACT | LOAD_CMP; @@ -757,6 +763,7 @@ static void s3c_onenand_setup(struct mtd_info *mtd) /* Use generic onenand functions */ onenand->cmd_map = s5pc1xx_cmd_map; this->read_bufferram = s5pc110_read_bufferram; + this->chip_probe = s5pc110_chip_probe; return; } else { BUG(); @@ -781,7 +788,6 @@ static int s3c_onenand_probe(struct platform_device *pdev) struct mtd_info *mtd; struct resource *r; int size, err; - unsigned long onenand_ctrl_cfg = 0; pdata = pdev->dev.platform_data; /* No need to check pdata. the platform data is optional */ @@ -900,14 +906,6 @@ static int s3c_onenand_probe(struct platform_device *pdev) } onenand->phys_base = onenand->base_res->start; - - onenand_ctrl_cfg = readl(onenand->dma_addr + 0x100); - if ((onenand_ctrl_cfg & ONENAND_SYS_CFG1_SYNC_WRITE) && - onenand->dma_addr) - writel(onenand_ctrl_cfg & ~ONENAND_SYS_CFG1_SYNC_WRITE, - onenand->dma_addr + 0x100); - else - onenand_ctrl_cfg = 0; } if (onenand_scan(mtd, 1)) { @@ -915,10 +913,7 @@ static int s3c_onenand_probe(struct platform_device *pdev) goto scan_failed; } - if (onenand->type == TYPE_S5PC110) { - if (onenand_ctrl_cfg && onenand->dma_addr) - writel(onenand_ctrl_cfg, onenand->dma_addr + 0x100); - } else { + if (onenand->type != TYPE_S5PC110) { /* S3C doesn't handle subpage write */ mtd->subpage_sft = 0; this->subpagesize = mtd->writesize; -- cgit v1.2.3 From c9fb67735b307a3cdf57e568b6c50c860248d1d3 Mon Sep 17 00:00:00 2001 From: Mark Ware Date: Thu, 27 May 2010 11:45:39 +1000 Subject: mtd: doc2000: fix uninitialized variable in doc_ecc_decode() The variable 'syn' was being used uninitialized. Also fixed incorrect use of syn[] vs s[]. Tested on powerpc board with 64MiB DOC2000. Signed-off-by: Mark Ware Signed-off-by: David Woodhouse --- drivers/mtd/nand/diskonchip.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c index 47067bc98248..51315f55f905 100644 --- a/drivers/mtd/nand/diskonchip.c +++ b/drivers/mtd/nand/diskonchip.c @@ -146,6 +146,7 @@ static int doc_ecc_decode(struct rs_control *rs, uint8_t *data, uint8_t *ecc) uint8_t parity; uint16_t ds[4], s[5], tmp, errval[8], syn[4]; + memset(syn, 0, sizeof(syn)); /* Convert the ecc bytes into words */ ds[0] = ((ecc[4] & 0xff) >> 0) | ((ecc[5] & 0x03) << 8); ds[1] = ((ecc[5] & 0xfc) >> 2) | ((ecc[2] & 0x0f) << 6); @@ -169,9 +170,9 @@ static int doc_ecc_decode(struct rs_control *rs, uint8_t *data, uint8_t *ecc) s[i] ^= rs->alpha_to[rs_modnn(rs, tmp + (FCR + i) * j)]; } - /* Calc s[i] = s[i] / alpha^(v + i) */ + /* Calc syn[i] = s[i] / alpha^(v + i) */ for (i = 0; i < NROOTS; i++) { - if (syn[i]) + if (s[i]) syn[i] = rs_modnn(rs, rs->index_of[s[i]] + (NN - FCR - i)); } /* Call the decoder library */ -- cgit v1.2.3 From 04dd0d3a9a33fdd8c3516db0fa85d9dba5610fc2 Mon Sep 17 00:00:00 2001 From: Eric Bénard Date: Thu, 17 Jun 2010 20:59:04 +0200 Subject: mtd: mxc_nand: dont call suspend and resume explicitly MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The mtd layer is responsible to call mtd->{suspend,resume}. Doing it again in the driver is wrong and results in a warning: nand_resume called for a chip which is not in suspended state at resume time. Removing the calls from the resume and suspend functions makes them empty allowing them to be deleted completely. Signed-off-by: Eric Bénard Acked-by: Uwe Kleine-König Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 43 +------------------------------------------ 1 file changed, 1 insertion(+), 42 deletions(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index b464f6b23d0d..e8dc6468f8bc 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -871,52 +871,11 @@ static int __devexit mxcnd_remove(struct platform_device *pdev) return 0; } -#ifdef CONFIG_PM -static int mxcnd_suspend(struct platform_device *pdev, pm_message_t state) -{ - struct mtd_info *mtd = platform_get_drvdata(pdev); - struct nand_chip *nand_chip = mtd->priv; - struct mxc_nand_host *host = nand_chip->priv; - int ret = 0; - - DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND : NAND suspend\n"); - - ret = mtd->suspend(mtd); - - /* - * nand_suspend locks the device for exclusive access, so - * the clock must already be off. - */ - BUG_ON(!ret && host->clk_act); - - return ret; -} - -static int mxcnd_resume(struct platform_device *pdev) -{ - struct mtd_info *mtd = platform_get_drvdata(pdev); - struct nand_chip *nand_chip = mtd->priv; - int ret = 0; - - DEBUG(MTD_DEBUG_LEVEL0, "MXC_ND : NAND resume\n"); - - mtd->resume(mtd); - - return ret; -} - -#else -# define mxcnd_suspend NULL -# define mxcnd_resume NULL -#endif /* CONFIG_PM */ - static struct platform_driver mxcnd_driver = { .driver = { .name = DRIVER_NAME, - }, + }, .remove = __devexit_p(mxcnd_remove), - .suspend = mxcnd_suspend, - .resume = mxcnd_resume, }; static int __init mxc_nd_init(void) -- cgit v1.2.3 From 68640c2a416849ba8e0a69577d4be51a458a045a Mon Sep 17 00:00:00 2001 From: Richard Cochran Date: Mon, 14 Jun 2010 18:15:19 +0200 Subject: mtd: ixp4xx: add support for static flash partitions This patch adds support for static flash partitioning from a platform device. Also, we clean up some weirdness where statements were separated by commas instead of semicolons. While we are at it, fix some minor bad white space, too. Signed-off-by: Richard Cochran Signed-off-by: David Woodhouse --- drivers/mtd/maps/ixp4xx.c | 35 +++++++++++++++++++++++++++-------- 1 file changed, 27 insertions(+), 8 deletions(-) diff --git a/drivers/mtd/maps/ixp4xx.c b/drivers/mtd/maps/ixp4xx.c index e0a5e0426ead..1f9fde0dad35 100644 --- a/drivers/mtd/maps/ixp4xx.c +++ b/drivers/mtd/maps/ixp4xx.c @@ -118,7 +118,7 @@ static void ixp4xx_copy_from(struct map_info *map, void *to, *dest++ = BYTE1(data); src += 2; len -= 2; - } + } if (len > 0) *dest++ = BYTE0(flash_read16(src)); @@ -185,6 +185,8 @@ static int ixp4xx_flash_probe(struct platform_device *dev) { struct flash_platform_data *plat = dev->dev.platform_data; struct ixp4xx_flash_info *info; + const char *part_type = NULL; + int nr_parts = 0; int err = -1; if (!plat) @@ -218,9 +220,9 @@ static int ixp4xx_flash_probe(struct platform_device *dev) */ info->map.bankwidth = 2; info->map.name = dev_name(&dev->dev); - info->map.read = ixp4xx_read16, - info->map.write = ixp4xx_probe_write16, - info->map.copy_from = ixp4xx_copy_from, + info->map.read = ixp4xx_read16; + info->map.write = ixp4xx_probe_write16; + info->map.copy_from = ixp4xx_copy_from; info->res = request_mem_region(dev->resource->start, resource_size(dev->resource), @@ -248,11 +250,28 @@ static int ixp4xx_flash_probe(struct platform_device *dev) info->mtd->owner = THIS_MODULE; /* Use the fast version */ - info->map.write = ixp4xx_write16, + info->map.write = ixp4xx_write16; + +#ifdef CONFIG_MTD_PARTITIONS + nr_parts = parse_mtd_partitions(info->mtd, probes, &info->partitions, + dev->resource->start); +#endif + if (nr_parts > 0) { + part_type = "dynamic"; + } else { + info->partitions = plat->parts; + nr_parts = plat->nr_parts; + part_type = "static"; + } + if (nr_parts == 0) { + printk(KERN_NOTICE "IXP4xx flash: no partition info " + "available, registering whole flash\n"); + err = add_mtd_device(info->mtd); + } else { + printk(KERN_NOTICE "IXP4xx flash: using %s partition " + "definition\n", part_type); + err = add_mtd_partitions(info->mtd, info->partitions, nr_parts); - err = parse_mtd_partitions(info->mtd, probes, &info->partitions, dev->resource->start); - if (err > 0) { - err = add_mtd_partitions(info->mtd, info->partitions, err); if(err) printk(KERN_ERR "Could not parse partitions\n"); } -- cgit v1.2.3 From dd02b67d5e9e7896891fa27eb5db65f55a290998 Mon Sep 17 00:00:00 2001 From: Anatolij Gustschin Date: Tue, 15 Jun 2010 09:30:15 +0200 Subject: mtd: mtdchar: fix mmap for MTD RAM/ROM char devices For no-mmu systems mmap() on RAM/ROM devices already works but for systems with mmu it probably was not tested and doesn't work. This patch allows using mmap() on MTD RAM/ROM devices on systems with MMU. It has been tested on mpc5121e based platform with MR0A16A MRAM device attached over LocalBus. Signed-off-by: Anatolij Gustschin Acked-by: Mike Frysinger Signed-off-by: David Woodhouse --- drivers/mtd/mtdchar.c | 28 +++++++++++++++++++++++++++- 1 file changed, 27 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index a8e69dd2b2e4..c27e65e3e291 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c @@ -18,6 +18,7 @@ #include #include +#include #include #include @@ -955,9 +956,34 @@ static int mtd_mmap(struct file *file, struct vm_area_struct *vma) #ifdef CONFIG_MMU struct mtd_file_info *mfi = file->private_data; struct mtd_info *mtd = mfi->mtd; + struct map_info *map = mtd->priv; + unsigned long start; + unsigned long off; + u32 len; + + if (mtd->type == MTD_RAM || mtd->type == MTD_ROM) { + off = vma->vm_pgoff << PAGE_SHIFT; + start = map->phys; + len = PAGE_ALIGN((start & ~PAGE_MASK) + map->size); + start &= PAGE_MASK; + if ((vma->vm_end - vma->vm_start + off) > len) + return -EINVAL; + + off += start; + vma->vm_pgoff = off >> PAGE_SHIFT; + vma->vm_flags |= VM_IO | VM_RESERVED; + +#ifdef pgprot_noncached + if (file->f_flags & O_DSYNC || off >= __pa(high_memory)) + vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); +#endif + if (io_remap_pfn_range(vma, vma->vm_start, off >> PAGE_SHIFT, + vma->vm_end - vma->vm_start, + vma->vm_page_prot)) + return -EAGAIN; - if (mtd->type == MTD_RAM || mtd->type == MTD_ROM) return 0; + } return -ENOSYS; #else return vma->vm_flags & VM_SHARED ? 0 : -ENOSYS; -- cgit v1.2.3 From f7b000904a848b64c36e3b4d0715744aaf345767 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Tue, 22 Jun 2010 20:57:34 +0400 Subject: mtd: m25p80: Fix false-positive probing Since commit 18c6182bae0acca220ed6611f741034d563cd19f ("Rework probing/JEDEC code"), m25p80 driver successfully registers chips even if JEDEC probing fails. This was needed to support non-JEDEC flashes. Though, it appears that some platforms (e.g. blackfin bf533 stamp[1]) used the old behavior to detect if there's any flash connected, so the driver have to fail on JEDEC probing errors. This patch restores the old behavior for JEDEC flashes, and adds "-nonjedec" SPI device IDs for M25Pxx flashes, so that the kernel still supports non-JEDEC flashes. [1] http://blackfin.uclinux.org/gf/project/uclinux-dist/tracker/?action=TrackerItemEdit&tracker_item_id=5975 Reported-by: Mingquan Pan Reported-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Anton Vorontsov Acked-by: Mike Frysinger Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/devices/m25p80.c | 13 +++++++++++-- 1 file changed, 11 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 372df59f79e2..ff7627a3d075 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -681,6 +681,16 @@ static const struct spi_device_id m25p_ids[] = { { "m25p64", INFO(0x202017, 0, 64 * 1024, 128, 0) }, { "m25p128", INFO(0x202018, 0, 256 * 1024, 64, 0) }, + { "m25p05-nonjedec", INFO(0, 0, 32 * 1024, 2, 0) }, + { "m25p10-nonjedec", INFO(0, 0, 32 * 1024, 4, 0) }, + { "m25p20-nonjedec", INFO(0, 0, 64 * 1024, 4, 0) }, + { "m25p40-nonjedec", INFO(0, 0, 64 * 1024, 8, 0) }, + { "m25p80-nonjedec", INFO(0, 0, 64 * 1024, 16, 0) }, + { "m25p16-nonjedec", INFO(0, 0, 64 * 1024, 32, 0) }, + { "m25p32-nonjedec", INFO(0, 0, 64 * 1024, 64, 0) }, + { "m25p64-nonjedec", INFO(0, 0, 64 * 1024, 128, 0) }, + { "m25p128-nonjedec", INFO(0, 0, 256 * 1024, 64, 0) }, + { "m45pe10", INFO(0x204011, 0, 64 * 1024, 2, 0) }, { "m45pe80", INFO(0x204014, 0, 64 * 1024, 16, 0) }, { "m45pe16", INFO(0x204015, 0, 64 * 1024, 32, 0) }, @@ -796,8 +806,7 @@ static int __devinit m25p_probe(struct spi_device *spi) jid = jedec_probe(spi); if (!jid) { - dev_info(&spi->dev, "non-JEDEC variant of %s\n", - id->name); + return -ENODEV; } else if (jid != id) { /* * JEDEC knows better, so overwrite platform ID. We -- cgit v1.2.3 From 9d2c4f3fe50a6d07275de91b392aaaf4773bc8b6 Mon Sep 17 00:00:00 2001 From: Anton Vorontsov Date: Tue, 22 Jun 2010 20:57:42 +0400 Subject: mtd: m25p80: Make jedec_probe() return proper errno values spi_write_then_read() may return its own return codes (e.g. -EIO), so let's propagate the value down to the probe(). Also, remove jedec == 0 check, it isn't needed as nowadays we use dedicated SPI device IDs for non-JEDEC flashes. Suggested-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Anton Vorontsov Acked-by: Mike Frysinger Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/devices/m25p80.c | 18 ++++++------------ 1 file changed, 6 insertions(+), 12 deletions(-) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index ff7627a3d075..48bf325e9e84 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -16,6 +16,8 @@ */ #include +#include +#include #include #include #include @@ -734,7 +736,7 @@ static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi) if (tmp < 0) { DEBUG(MTD_DEBUG_LEVEL0, "%s: error %d reading JEDEC ID\n", dev_name(&spi->dev), tmp); - return NULL; + return ERR_PTR(tmp); } jedec = id[0]; jedec = jedec << 8; @@ -742,14 +744,6 @@ static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi) jedec = jedec << 8; jedec |= id[2]; - /* - * Some chips (like Numonyx M25P80) have JEDEC and non-JEDEC variants, - * which depend on technology process. Officially RDID command doesn't - * exist for non-JEDEC chips, but for compatibility they return ID 0. - */ - if (jedec == 0) - return NULL; - ext_jedec = id[3] << 8 | id[4]; for (tmp = 0; tmp < ARRAY_SIZE(m25p_ids) - 1; tmp++) { @@ -760,7 +754,7 @@ static const struct spi_device_id *__devinit jedec_probe(struct spi_device *spi) return &m25p_ids[tmp]; } } - return NULL; + return ERR_PTR(-ENODEV); } @@ -805,8 +799,8 @@ static int __devinit m25p_probe(struct spi_device *spi) const struct spi_device_id *jid; jid = jedec_probe(spi); - if (!jid) { - return -ENODEV; + if (IS_ERR(jid)) { + return PTR_ERR(jid); } else if (jid != id) { /* * JEDEC knows better, so overwrite platform ID. We -- cgit v1.2.3 From e17f47a14b3418711d9fee5c0a77ef0b672f5eaa Mon Sep 17 00:00:00 2001 From: Guillaume LECERF Date: Fri, 2 Jul 2010 14:39:10 +0200 Subject: mtd: cfi_cmdset_0002: fix the check for valid primary extension versions Valid primary extension versions are: 1.0, 1.1, 1.2, 1.3 [1][2]. Fix the check in cfi_cmdset_0002 accordingly. [1] http://www.amd.com/us-en/assets/content_type/DownloadableAssets/cfi_r20.pdf, page 19 [2] http://www.amd.com/us-en/assets/content_type/DownloadableAssets/cfi_100_20011201.pdf Signed-off-by: Florian Fainelli Signed-off-by: Guillaume LECERF Signed-off-by: David Woodhouse --- drivers/mtd/chips/cfi_cmdset_0002.c | 15 ++++++++++++--- 1 file changed, 12 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index d81079ef91a5..749203f89b55 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -417,16 +417,25 @@ struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary) */ cfi_fixup_major_minor(cfi, extp); + /* + * Valid primary extension versions are: 1.0, 1.1, 1.2, 1.3 + * see: http://www.amd.com/us-en/assets/content_type/DownloadableAssets/cfi_r20.pdf, page 19 and on + * http://www.amd.com/us-en/assets/content_type/DownloadableAssets/cfi_100_20011201.pdf + */ if (extp->MajorVersion != '1' || - (extp->MinorVersion < '0' || extp->MinorVersion > '4')) { + (extp->MajorVersion == '1' && ( extp->MinorVersion < '0' || extp->MinorVersion > '3'))) { printk(KERN_ERR " Unknown Amd/Fujitsu Extended Query " - "version %c.%c.\n", extp->MajorVersion, - extp->MinorVersion); + "version %c.%c (%#02x/%#02x).\n", + extp->MajorVersion, extp->MinorVersion, + extp->MajorVersion, extp->MinorVersion); kfree(extp); kfree(mtd); return NULL; } + printk(KERN_INFO " Amd/Fujitsu Extended Query version %c.%c.\n", + extp->MajorVersion, extp->MinorVersion); + /* Install our own private info structure */ cfi->cmdset_priv = extp; -- cgit v1.2.3 From 7ee064c90b3a65aa0c8d8cd87681177645db494e Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 5 Aug 2010 11:07:39 -0400 Subject: mtd: Blackfin NFC: delete useless comment about jffs2 The low level NAND driver doesn't care about filesystems, so punt the local comment indicating otherwise. Signed-off-by: Barry Song Signed-off-by: Mike Frysinger Signed-off-by: David Woodhouse --- drivers/mtd/nand/bf5xx_nand.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index 2974995e194d..524cf5f41523 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c @@ -20,9 +20,6 @@ * - DMA supported in ECC_HW * - YAFFS tested as rootfs in both ECC_HW and ECC_SW * - * TODO: - * Enable JFFS2 over NAND as rootfs - * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by * the Free Software Foundation; either version 2 of the License, or -- cgit v1.2.3 From 085d45fb5216c25b69103e5d861fabdc4389e221 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 5 Aug 2010 11:07:44 -0400 Subject: mtd: Blackfin NFC: fix raw page write/read handling Our write_buf/read_buf funcs always do ECC in HW ECC mode. That is not needed for raw funcs. In fact, write_buf/read_buf should be a pure func for data input/output while chip->ecc.hwctl controls ECC. Unfortunately, we can't separate ECC from normal data input/output in our NFC, so our DMA write_buf/read_buf entries are coupled with ECC operations closely. Thus we need to provide dedicated read_page_raw/write_page_raw funcs where we do non-DMA transactions so as to avoid automatic ECC. Signed-off-by: Barry Song Signed-off-by: Mike Frysinger Signed-off-by: David Woodhouse --- drivers/mtd/nand/bf5xx_nand.c | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index 524cf5f41523..ca39819982bf 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c @@ -571,6 +571,22 @@ static void bf5xx_nand_dma_write_buf(struct mtd_info *mtd, bf5xx_nand_write_buf(mtd, buf, len); } +static int bf5xx_nand_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + uint8_t *buf, int page) +{ + bf5xx_nand_read_buf(mtd, buf, mtd->writesize); + bf5xx_nand_read_buf(mtd, chip->oob_poi, mtd->oobsize); + + return 0; +} + +static void bf5xx_nand_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, + const uint8_t *buf) +{ + bf5xx_nand_write_buf(mtd, buf, mtd->writesize); + bf5xx_nand_write_buf(mtd, chip->oob_poi, mtd->oobsize); +} + /* * System initialization functions */ @@ -795,6 +811,8 @@ static int __devinit bf5xx_nand_probe(struct platform_device *pdev) chip->ecc.correct = bf5xx_nand_correct_data; chip->ecc.mode = NAND_ECC_HW; chip->ecc.hwctl = bf5xx_nand_enable_hwecc; + chip->ecc.read_page_raw = bf5xx_nand_read_page_raw; + chip->ecc.write_page_raw = bf5xx_nand_write_page_raw; } else { chip->ecc.mode = NAND_ECC_SOFT; } -- cgit v1.2.3 From fd508da2208696db146cd1be2bb2e8b799f6e3a2 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 5 Aug 2010 11:07:42 -0400 Subject: mtd: Blackfin NFC: make sure to check NAND_ALE in cmd_ctrl The NAND base may send some controls which are neither CLE nor ALE, so we need to explicitly check both instead of assuming things are always one or the other. Otherwise, we sometimes send out illegal addresses to the NAND device. Signed-off-by: Barry Song Signed-off-by: Mike Frysinger Signed-off-by: David Woodhouse --- drivers/mtd/nand/bf5xx_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index ca39819982bf..5c999e01db6f 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c @@ -203,7 +203,7 @@ static void bf5xx_nand_hwcontrol(struct mtd_info *mtd, int cmd, if (ctrl & NAND_CLE) bfin_write_NFC_CMD(cmd); - else + else if (ctrl & NAND_ALE) bfin_write_NFC_ADDR(cmd); SSYNC(); } -- cgit v1.2.3 From 00355b0baadf949f02ab7d3e2bd222e3fbcc72ee Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 5 Aug 2010 11:07:40 -0400 Subject: mtd: Blackfin NFC: fix typo for read/write delay setup We used the platform rd_dly field when we meant to use the wr_dly field. Signed-off-by: Barry Song Signed-off-by: Mike Frysinger Signed-off-by: David Woodhouse --- drivers/mtd/nand/bf5xx_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index 5c999e01db6f..d48cc39afc21 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c @@ -648,7 +648,7 @@ static int bf5xx_nand_hw_init(struct bf5xx_nand_info *info) val = (plat->page_size << NFC_PG_SIZE_OFFSET) | (plat->data_width << NFC_NWIDTH_OFFSET) | (plat->rd_dly << NFC_RDDLY_OFFSET) | - (plat->rd_dly << NFC_WRDLY_OFFSET); + (plat->wr_dly << NFC_WRDLY_OFFSET); dev_dbg(info->device, "NFC_CTL is 0x%04x\n", val); bfin_write_NFC_CTL(val); -- cgit v1.2.3 From 752b957a37ee1cc09fccb39a8bc5843edf32119b Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 5 Aug 2010 11:07:41 -0400 Subject: mtd: Blackfin NFC: wait for the ECC reset to finish When resetting the ECC registers/counters, the bit will automatically clear itself once the reset has actually finished. So make sure we wait for that to occur before doing anything else rather than assuming everything is peachy and proceeding with stale ECC values. Signed-off-by: Barry Song Signed-off-by: Mike Frysinger Signed-off-by: David Woodhouse --- drivers/mtd/nand/bf5xx_nand.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index d48cc39afc21..8070ff359a41 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c @@ -507,6 +507,8 @@ static void bf5xx_nand_dma_rw(struct mtd_info *mtd, */ bfin_write_NFC_RST(ECC_RST); SSYNC(); + while (bfin_read_NFC_RST() & ECC_RST) + cpu_relax(); disable_dma(CH_NFC); clear_dma_irqstat(CH_NFC); -- cgit v1.2.3 From 44299179c0e87cc6d8b753c1ca8c97b1cf9340e1 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 5 Aug 2010 11:07:43 -0400 Subject: mtd: Blackfin NFC: fix handling of page sizes Rather than forcing the platform resources to declare the desired page size, simply use the existing information passed down to us by the higher layers. This way we work out of the box with all flash chips that the kernel knows about. Signed-off-by: Barry Song Signed-off-by: Mike Frysinger Signed-off-by: David Woodhouse --- arch/blackfin/include/asm/nand.h | 3 -- drivers/mtd/nand/bf5xx_nand.c | 86 ++++++++++++++++++++++------------------ 2 files changed, 48 insertions(+), 41 deletions(-) diff --git a/arch/blackfin/include/asm/nand.h b/arch/blackfin/include/asm/nand.h index 3a1e79dfc8d9..256c50d8d465 100644 --- a/arch/blackfin/include/asm/nand.h +++ b/arch/blackfin/include/asm/nand.h @@ -15,8 +15,6 @@ * partitions = mtd partition list */ -#define NFC_PG_SIZE_256 0 -#define NFC_PG_SIZE_512 1 #define NFC_PG_SIZE_OFFSET 9 #define NFC_NWIDTH_8 0 @@ -30,7 +28,6 @@ struct bf5xx_nand_platform { /* NAND chip information */ - unsigned short page_size; unsigned short data_width; /* RD/WR strobe delay timing information, all times in SCLK cycles */ diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index 8070ff359a41..3784f4137994 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c @@ -314,18 +314,16 @@ static int bf5xx_nand_correct_data_256(struct mtd_info *mtd, u_char *dat, static int bf5xx_nand_correct_data(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc) { - struct bf5xx_nand_info *info = mtd_to_nand_info(mtd); - struct bf5xx_nand_platform *plat = info->platform; - unsigned short page_size = (plat->page_size ? 512 : 256); + struct nand_chip *chip = mtd->priv; int ret; ret = bf5xx_nand_correct_data_256(mtd, dat, read_ecc, calc_ecc); - /* If page size is 512, correct second 256 bytes */ - if (page_size == 512) { + /* If ecc size is 512, correct second 256 bytes */ + if (chip->ecc.size == 512) { dat += 256; - read_ecc += 8; - calc_ecc += 8; + read_ecc += 3; + calc_ecc += 3; ret |= bf5xx_nand_correct_data_256(mtd, dat, read_ecc, calc_ecc); } @@ -341,13 +339,12 @@ static int bf5xx_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) { struct bf5xx_nand_info *info = mtd_to_nand_info(mtd); - struct bf5xx_nand_platform *plat = info->platform; - u16 page_size = (plat->page_size ? 512 : 256); + struct nand_chip *chip = mtd->priv; u16 ecc0, ecc1; u32 code[2]; u8 *p; - /* first 4 bytes ECC code for 256 page size */ + /* first 3 bytes ECC code for 256 page size */ ecc0 = bfin_read_NFC_ECC0(); ecc1 = bfin_read_NFC_ECC1(); @@ -355,12 +352,11 @@ static int bf5xx_nand_calculate_ecc(struct mtd_info *mtd, dev_dbg(info->device, "returning ecc 0x%08x\n", code[0]); - /* first 3 bytes in ecc_code for 256 page size */ p = (u8 *) code; memcpy(ecc_code, p, 3); - /* second 4 bytes ECC code for 512 page size */ - if (page_size == 512) { + /* second 3 bytes ECC code for 512 ecc size */ + if (chip->ecc.size == 512) { ecc0 = bfin_read_NFC_ECC2(); ecc1 = bfin_read_NFC_ECC3(); code[1] = (ecc0 & 0x7ff) | ((ecc1 & 0x7ff) << 11); @@ -480,8 +476,7 @@ static void bf5xx_nand_dma_rw(struct mtd_info *mtd, uint8_t *buf, int is_read) { struct bf5xx_nand_info *info = mtd_to_nand_info(mtd); - struct bf5xx_nand_platform *plat = info->platform; - unsigned short page_size = (plat->page_size ? 512 : 256); + struct nand_chip *chip = mtd->priv; unsigned short val; dev_dbg(info->device, " mtd->%p, buf->%p, is_read %d\n", @@ -495,10 +490,10 @@ static void bf5xx_nand_dma_rw(struct mtd_info *mtd, */ if (is_read) invalidate_dcache_range((unsigned int)buf, - (unsigned int)(buf + page_size)); + (unsigned int)(buf + chip->ecc.size)); else flush_dcache_range((unsigned int)buf, - (unsigned int)(buf + page_size)); + (unsigned int)(buf + chip->ecc.size)); /* * This register must be written before each page is @@ -519,13 +514,13 @@ static void bf5xx_nand_dma_rw(struct mtd_info *mtd, /* The DMAs have different size on BF52x and BF54x */ #ifdef CONFIG_BF52x - set_dma_x_count(CH_NFC, (page_size >> 1)); + set_dma_x_count(CH_NFC, (chip->ecc.size >> 1)); set_dma_x_modify(CH_NFC, 2); val = DI_EN | WDSIZE_16; #endif #ifdef CONFIG_BF54x - set_dma_x_count(CH_NFC, (page_size >> 2)); + set_dma_x_count(CH_NFC, (chip->ecc.size >> 2)); set_dma_x_modify(CH_NFC, 4); val = DI_EN | WDSIZE_32; #endif @@ -547,12 +542,11 @@ static void bf5xx_nand_dma_read_buf(struct mtd_info *mtd, uint8_t *buf, int len) { struct bf5xx_nand_info *info = mtd_to_nand_info(mtd); - struct bf5xx_nand_platform *plat = info->platform; - unsigned short page_size = (plat->page_size ? 512 : 256); + struct nand_chip *chip = mtd->priv; dev_dbg(info->device, "mtd->%p, buf->%p, int %d\n", mtd, buf, len); - if (len == page_size) + if (len == chip->ecc.size) bf5xx_nand_dma_rw(mtd, buf, 1); else bf5xx_nand_read_buf(mtd, buf, len); @@ -562,12 +556,11 @@ static void bf5xx_nand_dma_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len) { struct bf5xx_nand_info *info = mtd_to_nand_info(mtd); - struct bf5xx_nand_platform *plat = info->platform; - unsigned short page_size = (plat->page_size ? 512 : 256); + struct nand_chip *chip = mtd->priv; dev_dbg(info->device, "mtd->%p, buf->%p, len %d\n", mtd, buf, len); - if (len == page_size) + if (len == chip->ecc.size) bf5xx_nand_dma_rw(mtd, (uint8_t *)buf, 0); else bf5xx_nand_write_buf(mtd, buf, len); @@ -642,12 +635,11 @@ static int bf5xx_nand_hw_init(struct bf5xx_nand_info *info) /* setup NFC_CTL register */ dev_info(info->device, - "page_size=%d, data_width=%d, wr_dly=%d, rd_dly=%d\n", - (plat->page_size ? 512 : 256), + "data_width=%d, wr_dly=%d, rd_dly=%d\n", (plat->data_width ? 16 : 8), plat->wr_dly, plat->rd_dly); - val = (plat->page_size << NFC_PG_SIZE_OFFSET) | + val = (1 << NFC_PG_SIZE_OFFSET) | (plat->data_width << NFC_NWIDTH_OFFSET) | (plat->rd_dly << NFC_RDDLY_OFFSET) | (plat->wr_dly << NFC_WRDLY_OFFSET); @@ -713,6 +705,33 @@ static int __devexit bf5xx_nand_remove(struct platform_device *pdev) return 0; } +static int bf5xx_nand_scan(struct mtd_info *mtd) +{ + struct nand_chip *chip = mtd->priv; + int ret; + + ret = nand_scan_ident(mtd, 1); + if (ret) + return ret; + + if (hardware_ecc) { + /* + * for nand with page size > 512B, think it as several sections with 512B + */ + if (likely(mtd->writesize >= 512)) { + chip->ecc.size = 512; + chip->ecc.bytes = 6; + } else { + chip->ecc.size = 256; + chip->ecc.bytes = 3; + bfin_write_NFC_CTL(bfin_read_NFC_CTL() & ~(1 << NFC_PG_SIZE_OFFSET)); + SSYNC(); + } + } + + return nand_scan_tail(mtd); +} + /* * bf5xx_nand_probe * @@ -798,15 +817,6 @@ static int __devinit bf5xx_nand_probe(struct platform_device *pdev) chip->badblock_pattern = &bootrom_bbt; chip->ecc.layout = &bootrom_ecclayout; #endif - - if (plat->page_size == NFC_PG_SIZE_256) { - chip->ecc.bytes = 3; - chip->ecc.size = 256; - } else if (plat->page_size == NFC_PG_SIZE_512) { - chip->ecc.bytes = 6; - chip->ecc.size = 512; - } - chip->read_buf = bf5xx_nand_dma_read_buf; chip->write_buf = bf5xx_nand_dma_write_buf; chip->ecc.calculate = bf5xx_nand_calculate_ecc; @@ -820,7 +830,7 @@ static int __devinit bf5xx_nand_probe(struct platform_device *pdev) } /* scan hardware nand chip and setup mtd info data struct */ - if (nand_scan(mtd, 1)) { + if (bf5xx_nand_scan(mtd)) { err = -ENXIO; goto out_err_nand_scan; } -- cgit v1.2.3 From d2350c2ab51df7088d3db73a4c85ad73ded37a01 Mon Sep 17 00:00:00 2001 From: Barry Song Date: Thu, 5 Aug 2010 11:07:38 -0400 Subject: mtd: Blackfin NFC: fix nand busy detection The IRQSTAT register is a W1C register used by the interrupt handler and may have its BUSY bit changed. This makes it somewhat unreliable for the polling devready function. So switch it over to use the BUSY bit in the STAT register that always reflects the current state of the hardware. This fixes driver hangs seen when the NAND flash is under heavy system load (like I/O benchmarks). Signed-off-by: Barry Song Signed-off-by: Mike Frysinger Signed-off-by: David Woodhouse --- drivers/mtd/nand/bf5xx_nand.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/bf5xx_nand.c b/drivers/mtd/nand/bf5xx_nand.c index 3784f4137994..a382e3dd0a5d 100644 --- a/drivers/mtd/nand/bf5xx_nand.c +++ b/drivers/mtd/nand/bf5xx_nand.c @@ -215,9 +215,9 @@ static void bf5xx_nand_hwcontrol(struct mtd_info *mtd, int cmd, */ static int bf5xx_nand_devready(struct mtd_info *mtd) { - unsigned short val = bfin_read_NFC_IRQSTAT(); + unsigned short val = bfin_read_NFC_STAT(); - if ((val & NBUSYIRQ) == NBUSYIRQ) + if ((val & NBUSY) == NBUSY) return 1; else return 0; -- cgit v1.2.3 From 5bac3acfb82aa22c5e917063973db5482f7ff6ab Mon Sep 17 00:00:00 2001 From: Chuanxiao Date: Thu, 5 Aug 2010 23:06:04 +0800 Subject: nand/denali Clean up all white spaces in code indent Hi, I have changed the outlook mail cliet to be linux mutt client and use my personal gmail to submit patches. Here are 5 new patches to fix nand/denali check patch errors. The other 4 patches will be sent out after this mail. Thanks for your review. >From d125ad3f57bbf517131dccad6b5933edf8c2632a Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Tue, 3 Aug 2010 15:54:48 +0800 Subject: [PATCH 1/5] mtd: denali.c: clean up all whitespaces in code indent Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 337 +++++++++++++++++++++++----------------------- 1 file changed, 168 insertions(+), 169 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index ca03428b59cc..ca02838a420e 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -29,7 +29,7 @@ MODULE_LICENSE("GPL"); -/* We define a module parameter that allows the user to override +/* We define a module parameter that allows the user to override * the hardware and decide what timing mode should be used. */ #define NAND_DEFAULT_TIMINGS -1 @@ -54,13 +54,13 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting. -1 indicates INTR_STATUS0__RST_COMP | \ INTR_STATUS0__ERASE_COMP) -/* indicates whether or not the internal value for the flash bank is +/* indicates whether or not the internal value for the flash bank is valid or not */ -#define CHIP_SELECT_INVALID -1 +#define CHIP_SELECT_INVALID -1 #define SUPPORT_8BITECC 1 -/* This macro divides two integers and rounds fractional values up +/* This macro divides two integers and rounds fractional values up * to the nearest integer value. */ #define CEIL_DIV(X, Y) (((X)%(Y)) ? ((X)/(Y)+1) : ((X)/(Y))) @@ -83,7 +83,7 @@ MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting. -1 indicates #define ADDR_CYCLE 1 #define STATUS_CYCLE 2 -/* this is a helper macro that allows us to +/* this is a helper macro that allows us to * format the bank into the proper bits for the controller */ #define BANK(x) ((x) << 24) @@ -95,28 +95,28 @@ static const struct pci_device_id denali_pci_ids[] = { }; -/* these are static lookup tables that give us easy access to - registers in the NAND controller. +/* these are static lookup tables that give us easy access to + registers in the NAND controller. */ -static const uint32_t intr_status_addresses[4] = {INTR_STATUS0, - INTR_STATUS1, - INTR_STATUS2, +static const uint32_t intr_status_addresses[4] = {INTR_STATUS0, + INTR_STATUS1, + INTR_STATUS2, INTR_STATUS3}; static const uint32_t device_reset_banks[4] = {DEVICE_RESET__BANK0, - DEVICE_RESET__BANK1, - DEVICE_RESET__BANK2, - DEVICE_RESET__BANK3}; + DEVICE_RESET__BANK1, + DEVICE_RESET__BANK2, + DEVICE_RESET__BANK3}; static const uint32_t operation_timeout[4] = {INTR_STATUS0__TIME_OUT, - INTR_STATUS1__TIME_OUT, - INTR_STATUS2__TIME_OUT, - INTR_STATUS3__TIME_OUT}; + INTR_STATUS1__TIME_OUT, + INTR_STATUS2__TIME_OUT, + INTR_STATUS3__TIME_OUT}; static const uint32_t reset_complete[4] = {INTR_STATUS0__RST_COMP, - INTR_STATUS1__RST_COMP, - INTR_STATUS2__RST_COMP, - INTR_STATUS3__RST_COMP}; + INTR_STATUS1__RST_COMP, + INTR_STATUS2__RST_COMP, + INTR_STATUS3__RST_COMP}; /* specifies the debug level of the driver */ static int nand_debug_level = 0; @@ -131,21 +131,21 @@ static uint32_t read_interrupt_status(struct denali_nand_info *denali); /* This is a wrapper for writing to the denali registers. * this allows us to create debug information so we can - * observe how the driver is programming the device. + * observe how the driver is programming the device. * it uses standard linux convention for (val, addr) */ static void denali_write32(uint32_t value, void *addr) { - iowrite32(value, addr); + iowrite32(value, addr); #if DEBUG_DENALI printk(KERN_ERR "wrote: 0x%x -> 0x%x\n", value, (uint32_t)((uint32_t)addr & 0x1fff)); #endif -} +} -/* Certain operations for the denali NAND controller use an indexed mode to read/write - data. The operation is performed by writing the address value of the command to - the device memory followed by the data. This function abstracts this common - operation. +/* Certain operations for the denali NAND controller use an indexed mode to read/write + data. The operation is performed by writing the address value of the command to + the device memory followed by the data. This function abstracts this common + operation. */ static void index_addr(struct denali_nand_info *denali, uint32_t address, uint32_t data) { @@ -161,7 +161,7 @@ static void index_addr_read_data(struct denali_nand_info *denali, *pdata = ioread32(denali->flash_mem + 0x10); } -/* We need to buffer some data for some of the NAND core routines. +/* We need to buffer some data for some of the NAND core routines. * The operations manage buffering that data. */ static void reset_buf(struct denali_nand_info *denali) { @@ -183,7 +183,7 @@ static void read_status(struct denali_nand_info *denali) reset_buf(denali); /* initiate a device status read */ - cmd = MODE_11 | BANK(denali->flash_bank); + cmd = MODE_11 | BANK(denali->flash_bank); index_addr(denali, cmd | COMMAND_CYCLE, 0x70); denali_write32(cmd | STATUS_CYCLE, denali->flash_mem); @@ -199,7 +199,7 @@ static void read_status(struct denali_nand_info *denali) static void reset_bank(struct denali_nand_info *denali) { uint32_t irq_status = 0; - uint32_t irq_mask = reset_complete[denali->flash_bank] | + uint32_t irq_mask = reset_complete[denali->flash_bank] | operation_timeout[denali->flash_bank]; int bank = 0; @@ -209,7 +209,7 @@ static void reset_bank(struct denali_nand_info *denali) denali_write32(bank, denali->flash_reg + DEVICE_RESET); irq_status = wait_for_irq(denali, irq_mask); - + if (irq_status & operation_timeout[denali->flash_bank]) { printk(KERN_ERR "reset bank failed.\n"); @@ -610,7 +610,7 @@ static void get_hynix_nand_para(struct denali_nand_info *denali) } /* determines how many NAND chips are connected to the controller. Note for - Intel CE4100 devices we don't support more than one device. + Intel CE4100 devices we don't support more than one device. */ static void find_valid_banks(struct denali_nand_info *denali) { @@ -641,8 +641,8 @@ static void find_valid_banks(struct denali_nand_info *denali) { /* Platform limitations of the CE4100 device limit * users to a single chip solution for NAND. - * Multichip support is not enabled. - */ + * Multichip support is not enabled. + */ if (denali->total_used_banks != 1) { printk(KERN_ERR "Sorry, Intel CE4100 only supports " @@ -885,7 +885,7 @@ static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali) dump_device_info(denali); /* If the user specified to override the default timings - * with a specific ONFI mode, we apply those changes here. + * with a specific ONFI mode, we apply those changes here. */ if (onfi_timing_mode != NAND_DEFAULT_TIMINGS) { @@ -912,7 +912,7 @@ static void NAND_LLD_Enable_Disable_Interrupts(struct denali_nand_info *denali, */ static inline bool is_flash_bank_valid(int flash_bank) { - return (flash_bank >= 0 && flash_bank < 4); + return (flash_bank >= 0 && flash_bank < 4); } static void denali_irq_init(struct denali_nand_info *denali) @@ -948,7 +948,7 @@ static void denali_irq_enable(struct denali_nand_info *denali, uint32_t int_mask } /* This function only returns when an interrupt that this driver cares about - * occurs. This is to reduce the overhead of servicing interrupts + * occurs. This is to reduce the overhead of servicing interrupts */ static inline uint32_t denali_irq_detected(struct denali_nand_info *denali) { @@ -1003,9 +1003,9 @@ static void print_irq_log(struct denali_nand_info *denali) } #endif -/* This is the interrupt service routine. It handles all interrupts - * sent to this device. Note that on CE4100, this is a shared - * interrupt. +/* This is the interrupt service routine. It handles all interrupts + * sent to this device. Note that on CE4100, this is a shared + * interrupt. */ static irqreturn_t denali_isr(int irq, void *dev_id) { @@ -1015,12 +1015,12 @@ static irqreturn_t denali_isr(int irq, void *dev_id) spin_lock(&denali->irq_lock); - /* check to see if a valid NAND chip has - * been selected. + /* check to see if a valid NAND chip has + * been selected. */ if (is_flash_bank_valid(denali->flash_bank)) { - /* check to see if controller generated + /* check to see if controller generated * the interrupt, since this is a shared interrupt */ if ((irq_status = denali_irq_detected(denali)) != 0) { @@ -1078,10 +1078,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) /* our interrupt was detected */ break; } - else + else { - /* these are not the interrupts you are looking for - - need to wait again */ + /* these are not the interrupts you are looking for - + * need to wait again */ spin_unlock_irq(&denali->irq_lock); #if DEBUG_DENALI print_irq_log(denali); @@ -1095,20 +1095,20 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) if (comp_res == 0) { /* timeout */ - printk(KERN_ERR "timeout occurred, status = 0x%x, mask = 0x%x\n", - intr_status, irq_mask); + printk(KERN_ERR "timeout occurred, status = 0x%x, mask = 0x%x\n", + intr_status, irq_mask); intr_status = 0; } return intr_status; } -/* This helper function setups the registers for ECC and whether or not +/* This helper function setups the registers for ECC and whether or not the spare area will be transfered. */ -static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en, +static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en, bool transfer_spare) { - int ecc_en_flag = 0, transfer_spare_flag = 0; + int ecc_en_flag = 0, transfer_spare_flag = 0; /* set ECC, transfer spare bits if needed */ ecc_en_flag = ecc_en ? ECC_ENABLE__FLAG : 0; @@ -1119,15 +1119,15 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en, denali_write32(transfer_spare_flag, denali->flash_reg + TRANSFER_SPARE_REG); } -/* sends a pipeline command operation to the controller. See the Denali NAND - controller's user guide for more information (section 4.2.3.6). +/* sends a pipeline command operation to the controller. See the Denali NAND + controller's user guide for more information (section 4.2.3.6). */ -static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en, - bool transfer_spare, int access_type, +static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en, + bool transfer_spare, int access_type, int op) { int status = PASS; - uint32_t addr = 0x0, cmd = 0x0, page_count = 1, irq_status = 0, + uint32_t addr = 0x0, cmd = 0x0, page_count = 1, irq_status = 0, irq_mask = 0; if (op == DENALI_READ) irq_mask = INTR_STATUS0__LOAD_COMP; @@ -1145,32 +1145,32 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en /* clear interrupts */ - clear_interrupts(denali); + clear_interrupts(denali); addr = BANK(denali->flash_bank) | denali->page; if (op == DENALI_WRITE && access_type != SPARE_ACCESS) { - cmd = MODE_01 | addr; + cmd = MODE_01 | addr; denali_write32(cmd, denali->flash_mem); } else if (op == DENALI_WRITE && access_type == SPARE_ACCESS) { /* read spare area */ - cmd = MODE_10 | addr; + cmd = MODE_10 | addr; index_addr(denali, (uint32_t)cmd, access_type); - cmd = MODE_01 | addr; + cmd = MODE_01 | addr; denali_write32(cmd, denali->flash_mem); } else if (op == DENALI_READ) { /* setup page read request for access type */ - cmd = MODE_10 | addr; + cmd = MODE_10 | addr; index_addr(denali, (uint32_t)cmd, access_type); /* page 33 of the NAND controller spec indicates we should not - use the pipeline commands in Spare area only mode. So we + use the pipeline commands in Spare area only mode. So we don't. */ if (access_type == SPARE_ACCESS) @@ -1181,8 +1181,8 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en else { index_addr(denali, (uint32_t)cmd, 0x2000 | op | page_count); - - /* wait for command to be accepted + + /* wait for command to be accepted * can always use status0 bit as the mask is identical for each * bank. */ irq_status = wait_for_irq(denali, irq_mask); @@ -1204,13 +1204,13 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en } /* helper function that simply writes a buffer to the flash */ -static int write_data_to_flash_mem(struct denali_nand_info *denali, const uint8_t *buf, - int len) +static int write_data_to_flash_mem(struct denali_nand_info *denali, const uint8_t *buf, + int len) { uint32_t i = 0, *buf32; - /* verify that the len is a multiple of 4. see comment in - * read_data_from_flash_mem() */ + /* verify that the len is a multiple of 4. see comment in + * read_data_from_flash_mem() */ BUG_ON((len % 4) != 0); /* write the data to the flash memory */ @@ -1219,21 +1219,20 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali, const uint8_ { denali_write32(*buf32++, denali->flash_mem + 0x10); } - return i*4; /* intent is to return the number of bytes read */ + return i*4; /* intent is to return the number of bytes read */ } /* helper function that simply reads a buffer from the flash */ -static int read_data_from_flash_mem(struct denali_nand_info *denali, uint8_t *buf, +static int read_data_from_flash_mem(struct denali_nand_info *denali, uint8_t *buf, int len) { uint32_t i = 0, *buf32; /* we assume that len will be a multiple of 4, if not * it would be nice to know about it ASAP rather than - * have random failures... - * - * This assumption is based on the fact that this - * function is designed to be used to read flash pages, + * have random failures... + * This assumption is based on the fact that this + * function is designed to be used to read flash pages, * which are typically multiples of 4... */ @@ -1245,7 +1244,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali, uint8_t *bu { *buf32++ = ioread32(denali->flash_mem + 0x10); } - return i*4; /* intent is to return the number of bytes read */ + return i*4; /* intent is to return the number of bytes read */ } /* writes OOB data to the device */ @@ -1253,14 +1252,14 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) { struct denali_nand_info *denali = mtd_to_denali(mtd); uint32_t irq_status = 0; - uint32_t irq_mask = INTR_STATUS0__PROGRAM_COMP | + uint32_t irq_mask = INTR_STATUS0__PROGRAM_COMP | INTR_STATUS0__PROGRAM_FAIL; int status = 0; denali->page = page; - if (denali_send_pipeline_cmd(denali, false, false, SPARE_ACCESS, - DENALI_WRITE) == PASS) + if (denali_send_pipeline_cmd(denali, false, false, SPARE_ACCESS, + DENALI_WRITE) == PASS) { write_data_to_flash_mem(denali, buf, mtd->oobsize); @@ -1271,7 +1270,7 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) spin_unlock_irq(&denali->irq_lock); #endif - + /* wait for operation to complete */ irq_status = wait_for_irq(denali, irq_mask); @@ -1281,10 +1280,10 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) status = -EIO; } } - else - { + else + { printk(KERN_ERR "unable to send pipeline command\n"); - status = -EIO; + status = -EIO; } return status; } @@ -1300,12 +1299,12 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) #if DEBUG_DENALI printk("read_oob %d\n", page); #endif - if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS, - DENALI_READ) == PASS) + if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS, + DENALI_READ) == PASS) { - read_data_from_flash_mem(denali, buf, mtd->oobsize); + read_data_from_flash_mem(denali, buf, mtd->oobsize); - /* wait for command to be accepted + /* wait for command to be accepted * can always use status0 bit as the mask is identical for each * bank. */ irq_status = wait_for_irq(denali, irq_mask); @@ -1319,10 +1318,10 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) * instability with the controller if you do a block erase * and the last transaction was a SPARE_ACCESS. Block erase * is reliable (according to the MTD test infrastructure) - * if you are in MAIN_ACCESS. + * if you are in MAIN_ACCESS. */ addr = BANK(denali->flash_bank) | denali->page; - cmd = MODE_10 | addr; + cmd = MODE_10 | addr; index_addr(denali, (uint32_t)cmd, MAIN_ACCESS); #if DEBUG_DENALI @@ -1334,14 +1333,14 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) } } -/* this function examines buffers to see if they contain data that +/* this function examines buffers to see if they contain data that * indicate that the buffer is part of an erased region of flash. */ bool is_erased(uint8_t *buf, int len) { int i = 0; for (i = 0; i < len; i++) - { + { if (buf[i] != 0xFF) { return false; @@ -1358,7 +1357,7 @@ bool is_erased(uint8_t *buf, int len) #define ECC_ERR_DEVICE(x) ((x) & ERR_CORRECTION_INFO__DEVICE_NR >> 8) #define ECC_LAST_ERR(x) ((x) & ERR_CORRECTION_INFO__LAST_ERR_INFO) -static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, +static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, uint8_t *oobbuf, uint32_t irq_status) { bool check_erased_page = false; @@ -1370,27 +1369,27 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, uint32_t err_byte = 0, err_sector = 0, err_device = 0; uint32_t err_correction_value = 0; - do + do { - err_address = ioread32(denali->flash_reg + + err_address = ioread32(denali->flash_reg + ECC_ERROR_ADDRESS); err_sector = ECC_SECTOR(err_address); err_byte = ECC_BYTE(err_address); - err_correction_info = ioread32(denali->flash_reg + + err_correction_info = ioread32(denali->flash_reg + ERR_CORRECTION_INFO); - err_correction_value = + err_correction_value = ECC_CORRECTION_VALUE(err_correction_info); err_device = ECC_ERR_DEVICE(err_correction_info); if (ECC_ERROR_CORRECTABLE(err_correction_info)) { /* offset in our buffer is computed as: - sector number * sector size + offset in + sector number * sector size + offset in sector */ - int offset = err_sector * ECC_SECTOR_SIZE + + int offset = err_sector * ECC_SECTOR_SIZE + err_byte; if (offset < denali->mtd.writesize) { @@ -1407,15 +1406,15 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, } else { - /* if the error is not correctable, need to + /* if the error is not correctable, need to * look at the page to see if it is an erased page. - * if so, then it's not a real ECC error */ + * if so, then it's not a real ECC error */ check_erased_page = true; } -#if DEBUG_DENALI +#if DEBUG_DENALI printk("Detected ECC error in page %d: err_addr = 0x%08x," - " info to fix is 0x%08x\n", denali->page, err_address, + " info to fix is 0x%08x\n", denali->page, err_address, err_correction_info); #endif } while (!ECC_LAST_ERR(err_correction_info)); @@ -1458,9 +1457,9 @@ static void denali_setup_dma(struct denali_nand_info *denali, int op) index_addr(denali, mode | 0x14000, 0x2400); } -/* writes a page. user specifies type, and this function handles the +/* writes a page. user specifies type, and this function handles the configuration details. */ -static void write_page(struct mtd_info *mtd, struct nand_chip *chip, +static void write_page(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf, bool raw_xfer) { struct denali_nand_info *denali = mtd_to_denali(mtd); @@ -1470,7 +1469,7 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip, size_t size = denali->mtd.writesize + denali->mtd.oobsize; uint32_t irq_status = 0; - uint32_t irq_mask = INTR_STATUS0__DMA_CMD_COMP | + uint32_t irq_mask = INTR_STATUS0__DMA_CMD_COMP | INTR_STATUS0__PROGRAM_FAIL; /* if it is a raw xfer, we want to disable ecc, and send @@ -1486,15 +1485,15 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip, if (raw_xfer) { /* transfer the data to the spare area */ - memcpy(denali->buf.buf + mtd->writesize, - chip->oob_poi, - mtd->oobsize); + memcpy(denali->buf.buf + mtd->writesize, + chip->oob_poi, + mtd->oobsize); } pci_dma_sync_single_for_device(pci_dev, addr, size, PCI_DMA_TODEVICE); clear_interrupts(denali); - denali_enable_dma(denali, true); + denali_enable_dma(denali, true); denali_setup_dma(denali, DENALI_WRITE); @@ -1504,53 +1503,53 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip, if (irq_status == 0) { printk(KERN_ERR "timeout on write_page (type = %d)\n", raw_xfer); - denali->status = - (irq_status & INTR_STATUS0__PROGRAM_FAIL) ? NAND_STATUS_FAIL : - PASS; + denali->status = + (irq_status & INTR_STATUS0__PROGRAM_FAIL) ? NAND_STATUS_FAIL : + PASS; } - denali_enable_dma(denali, false); + denali_enable_dma(denali, false); pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_TODEVICE); } /* NAND core entry points */ -/* this is the callback that the NAND core calls to write a page. Since - writing a page with ECC or without is similar, all the work is done +/* this is the callback that the NAND core calls to write a page. Since + writing a page with ECC or without is similar, all the work is done by write_page above. */ -static void denali_write_page(struct mtd_info *mtd, struct nand_chip *chip, +static void denali_write_page(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf) { /* for regular page writes, we let HW handle all the ECC - * data written to the device. */ + * data written to the device. */ write_page(mtd, chip, buf, false); } -/* This is the callback that the NAND core calls to write a page without ECC. +/* This is the callback that the NAND core calls to write a page without ECC. raw access is similiar to ECC page writes, so all the work is done in the - write_page() function above. + write_page() function above. */ -static void denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, +static void denali_write_page_raw(struct mtd_info *mtd, struct nand_chip *chip, const uint8_t *buf) { - /* for raw page writes, we want to disable ECC and simply write + /* for raw page writes, we want to disable ECC and simply write whatever data is in the buffer. */ write_page(mtd, chip, buf, true); } -static int denali_write_oob(struct mtd_info *mtd, struct nand_chip *chip, +static int denali_write_oob(struct mtd_info *mtd, struct nand_chip *chip, int page) { - return write_oob_data(mtd, chip->oob_poi, page); + return write_oob_data(mtd, chip->oob_poi, page); } -static int denali_read_oob(struct mtd_info *mtd, struct nand_chip *chip, +static int denali_read_oob(struct mtd_info *mtd, struct nand_chip *chip, int page, int sndcmd) { read_oob_data(mtd, chip->oob_poi, page); - return 0; /* notify NAND core to send command to - * NAND device. */ + return 0; /* notify NAND core to send command to + NAND device. */ } static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, @@ -1563,7 +1562,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, size_t size = denali->mtd.writesize + denali->mtd.oobsize; uint32_t irq_status = 0; - uint32_t irq_mask = INTR_STATUS0__ECC_TRANSACTION_DONE | + uint32_t irq_mask = INTR_STATUS0__ECC_TRANSACTION_DONE | INTR_STATUS0__ECC_ERR; bool check_erased_page = false; @@ -1581,7 +1580,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, pci_dma_sync_single_for_cpu(pci_dev, addr, size, PCI_DMA_FROMDEVICE); memcpy(buf, denali->buf.buf, mtd->writesize); - + check_erased_page = handle_ecc(denali, buf, chip->oob_poi, irq_status); denali_enable_dma(denali, false); @@ -1600,7 +1599,7 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, { denali->mtd.ecc_stats.failed++; } - } + } } return 0; } @@ -1616,7 +1615,7 @@ static int denali_read_page_raw(struct mtd_info *mtd, struct nand_chip *chip, uint32_t irq_status = 0; uint32_t irq_mask = INTR_STATUS0__DMA_CMD_COMP; - + setup_ecc_for_xfer(denali, false, true); denali_enable_dma(denali, true); @@ -1687,21 +1686,21 @@ static void denali_erase(struct mtd_info *mtd, int page) printk("erase page: %d\n", page); #endif /* clear interrupts */ - clear_interrupts(denali); + clear_interrupts(denali); /* setup page read request for access type */ cmd = MODE_10 | BANK(denali->flash_bank) | page; index_addr(denali, (uint32_t)cmd, 0x1); /* wait for erase to complete or failure to occur */ - irq_status = wait_for_irq(denali, INTR_STATUS0__ERASE_COMP | + irq_status = wait_for_irq(denali, INTR_STATUS0__ERASE_COMP | INTR_STATUS0__ERASE_FAIL); - denali->status = (irq_status & INTR_STATUS0__ERASE_FAIL) ? NAND_STATUS_FAIL : + denali->status = (irq_status & INTR_STATUS0__ERASE_FAIL) ? NAND_STATUS_FAIL : PASS; } -static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, +static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, int page) { struct denali_nand_info *denali = mtd_to_denali(mtd); @@ -1710,7 +1709,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, printk("cmdfunc: 0x%x %d %d\n", cmd, col, page); #endif switch (cmd) - { + { case NAND_CMD_PAGEPROG: break; case NAND_CMD_STATUS: @@ -1720,19 +1719,19 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, reset_buf(denali); if (denali->flash_bank < denali->total_used_banks) { - /* write manufacturer information into nand + /* write manufacturer information into nand buffer for NAND subsystem to fetch. - */ - write_byte_to_buf(denali, denali->dev_info.wDeviceMaker); - write_byte_to_buf(denali, denali->dev_info.wDeviceID); - write_byte_to_buf(denali, denali->dev_info.bDeviceParam0); - write_byte_to_buf(denali, denali->dev_info.bDeviceParam1); - write_byte_to_buf(denali, denali->dev_info.bDeviceParam2); + */ + write_byte_to_buf(denali, denali->dev_info.wDeviceMaker); + write_byte_to_buf(denali, denali->dev_info.wDeviceID); + write_byte_to_buf(denali, denali->dev_info.bDeviceParam0); + write_byte_to_buf(denali, denali->dev_info.bDeviceParam1); + write_byte_to_buf(denali, denali->dev_info.bDeviceParam2); } - else + else { int i; - for (i = 0; i < 5; i++) + for (i = 0; i < 5; i++) write_byte_to_buf(denali, 0xff); } break; @@ -1753,7 +1752,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, } /* stubs for ECC functions not used by the NAND core */ -static int denali_ecc_calculate(struct mtd_info *mtd, const uint8_t *data, +static int denali_ecc_calculate(struct mtd_info *mtd, const uint8_t *data, uint8_t *ecc_code) { printk(KERN_ERR "denali_ecc_calculate called unexpectedly\n"); @@ -1761,7 +1760,7 @@ static int denali_ecc_calculate(struct mtd_info *mtd, const uint8_t *data, return -EIO; } -static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data, +static int denali_ecc_correct(struct mtd_info *mtd, uint8_t *data, uint8_t *read_ecc, uint8_t *calc_ecc) { printk(KERN_ERR "denali_ecc_correct called unexpectedly\n"); @@ -1797,9 +1796,9 @@ static void denali_hw_init(struct denali_nand_info *denali) static struct nand_ecclayout nand_oob_slc = { .eccbytes = 4, .eccpos = { 0, 1, 2, 3 }, /* not used */ - .oobfree = {{ - .offset = ECC_BYTES_SLC, - .length = 64 - ECC_BYTES_SLC + .oobfree = {{ + .offset = ECC_BYTES_SLC, + .length = 64 - ECC_BYTES_SLC }} }; @@ -1807,9 +1806,9 @@ static struct nand_ecclayout nand_oob_slc = { static struct nand_ecclayout nand_oob_mlc_14bit = { .eccbytes = 14, .eccpos = { 0, 1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13 }, /* not used */ - .oobfree = {{ - .offset = ECC_BYTES_MLC, - .length = 64 - ECC_BYTES_MLC + .oobfree = {{ + .offset = ECC_BYTES_MLC, + .length = 64 - ECC_BYTES_MLC }} }; @@ -1842,12 +1841,12 @@ void denali_drv_init(struct denali_nand_info *denali) denali->idx = 0; /* setup interrupt handler */ - /* the completion object will be used to notify + /* the completion object will be used to notify * the callee that the interrupt is done */ init_completion(&denali->complete); /* the spinlock will be used to synchronize the ISR - * with any element that might be access shared + * with any element that might be access shared * data (interrupt status) */ spin_lock_init(&denali->irq_lock); @@ -1880,9 +1879,9 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) } if (id->driver_data == INTEL_CE4100) { - /* Due to a silicon limitation, we can only support - * ONFI timing mode 1 and below. - */ + /* Due to a silicon limitation, we can only support + * ONFI timing mode 1 and below. + */ if (onfi_timing_mode < -1 || onfi_timing_mode > 1) { printk("Intel CE4100 only supports ONFI timing mode 1 " @@ -1918,7 +1917,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) printk(KERN_ERR "Spectra: no usable DMA configuration\n"); goto failed_enable; } - denali->buf.dma_buf = pci_map_single(dev, denali->buf.buf, DENALI_BUF_SIZE, + denali->buf.dma_buf = pci_map_single(dev, denali->buf.buf, DENALI_BUF_SIZE, PCI_DMA_BIDIRECTIONAL); if (pci_dma_mapping_error(dev, denali->buf.dma_buf)) @@ -1976,8 +1975,8 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) NAND_Read_Device_ID(denali); - /* MTD supported page sizes vary by kernel. We validate our - kernel supports the device here. + /* MTD supported page sizes vary by kernel. We validate our + * kernel supports the device here. */ if (denali->dev_info.wPageSize > NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE) { @@ -2009,18 +2008,18 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali->nand.read_byte = denali_read_byte; denali->nand.waitfunc = denali_waitfunc; - /* scan for NAND devices attached to the controller + /* scan for NAND devices attached to the controller * this is the first stage in a two step process to register - * with the nand subsystem */ + * with the nand subsystem */ if (nand_scan_ident(&denali->mtd, LLD_MAX_FLASH_BANKS, NULL)) { ret = -ENXIO; goto failed_nand; } - - /* second stage of the NAND scan - * this stage requires information regarding ECC and - * bad block management. */ + + /* second stage of the NAND scan + * this stage requires information regarding ECC and + * bad block management. */ /* Bad block management */ denali->nand.bbt_td = &bbt_main_descr; @@ -2041,9 +2040,9 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali->nand.ecc.bytes = ECC_BYTES_SLC; } - /* These functions are required by the NAND core framework, otherwise, - the NAND core will assert. However, we don't need them, so we'll stub - them out. */ + /* These functions are required by the NAND core framework, otherwise, + * the NAND core will assert. However, we don't need them, so we'll stub + * them out. */ denali->nand.ecc.calculate = denali_ecc_calculate; denali->nand.ecc.correct = denali_ecc_correct; denali->nand.ecc.hwctl = denali_ecc_hwctl; @@ -2079,7 +2078,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) failed_remap_csr: pci_release_regions(dev); failed_req_csr: - pci_unmap_single(dev, denali->buf.dma_buf, DENALI_BUF_SIZE, + pci_unmap_single(dev, denali->buf.dma_buf, DENALI_BUF_SIZE, PCI_DMA_BIDIRECTIONAL); failed_enable: kfree(denali); @@ -2103,7 +2102,7 @@ static void denali_pci_remove(struct pci_dev *dev) iounmap(denali->flash_mem); pci_release_regions(dev); pci_disable_device(dev); - pci_unmap_single(dev, denali->buf.dma_buf, DENALI_BUF_SIZE, + pci_unmap_single(dev, denali->buf.dma_buf, DENALI_BUF_SIZE, PCI_DMA_BIDIRECTIONAL); pci_set_drvdata(dev, NULL); kfree(denali); -- cgit v1.2.3 From 345b1d3b46fa1b7b2bf5d27bef6ea4c4dbf08731 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Tue, 27 Jul 2010 10:41:53 +0800 Subject: mtd: denali.c: fixed all open brace { check-patch errors Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 164 ++++++++++++++-------------------------------- 1 file changed, 48 insertions(+), 116 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index ca02838a420e..f850a6516bc9 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -211,9 +211,7 @@ static void reset_bank(struct denali_nand_info *denali) irq_status = wait_for_irq(denali, irq_mask); if (irq_status & operation_timeout[denali->flash_bank]) - { printk(KERN_ERR "reset bank failed.\n"); - } } /* Reset the flash controller */ @@ -637,14 +635,12 @@ static void find_valid_banks(struct denali_nand_info *denali) } } - if (denali->platform == INTEL_CE4100) - { + if (denali->platform == INTEL_CE4100) { /* Platform limitations of the CE4100 device limit * users to a single chip solution for NAND. * Multichip support is not enabled. */ - if (denali->total_used_banks != 1) - { + if (denali->total_used_banks != 1) { printk(KERN_ERR "Sorry, Intel CE4100 only supports " "a single NAND device.\n"); BUG(); @@ -888,9 +884,7 @@ static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali) * with a specific ONFI mode, we apply those changes here. */ if (onfi_timing_mode != NAND_DEFAULT_TIMINGS) - { NAND_ONFi_Timing_Mode(denali, onfi_timing_mode); - } return status; } @@ -997,9 +991,7 @@ static void print_irq_log(struct denali_nand_info *denali) printk("ISR debug log index = %X\n", denali->idx); for (i = 0; i < 32; i++) - { printk("%08X: %08X\n", i, denali->irq_debug_array[i]); - } } #endif @@ -1018,12 +1010,10 @@ static irqreturn_t denali_isr(int irq, void *dev_id) /* check to see if a valid NAND chip has * been selected. */ - if (is_flash_bank_valid(denali->flash_bank)) - { + if (is_flash_bank_valid(denali->flash_bank)) { /* check to see if controller generated * the interrupt, since this is a shared interrupt */ - if ((irq_status = denali_irq_detected(denali)) != 0) - { + if ((irq_status = denali_irq_detected(denali)) != 0) { #if DEBUG_DENALI denali->irq_debug_array[denali->idx++] = 0x10000000 | irq_status; denali->idx %= 32; @@ -1054,8 +1044,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) bool retry = false; unsigned long timeout = msecs_to_jiffies(1000); - do - { + do { #if DEBUG_DENALI printk("waiting for 0x%x\n", irq_mask); #endif @@ -1068,8 +1057,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) denali->idx %= 32; #endif - if (intr_status & irq_mask) - { + if (intr_status & irq_mask) { denali->irq_status &= ~irq_mask; spin_unlock_irq(&denali->irq_lock); #if DEBUG_DENALI @@ -1077,9 +1065,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) #endif /* our interrupt was detected */ break; - } - else - { + } else { /* these are not the interrupts you are looking for - * need to wait again */ spin_unlock_irq(&denali->irq_lock); @@ -1092,8 +1078,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) } } while (comp_res != 0); - if (comp_res == 0) - { + if (comp_res == 0) { /* timeout */ printk(KERN_ERR "timeout occurred, status = 0x%x, mask = 0x%x\n", intr_status, irq_mask); @@ -1149,22 +1134,17 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en addr = BANK(denali->flash_bank) | denali->page; - if (op == DENALI_WRITE && access_type != SPARE_ACCESS) - { + if (op == DENALI_WRITE && access_type != SPARE_ACCESS) { cmd = MODE_01 | addr; denali_write32(cmd, denali->flash_mem); - } - else if (op == DENALI_WRITE && access_type == SPARE_ACCESS) - { + } else if (op == DENALI_WRITE && access_type == SPARE_ACCESS) { /* read spare area */ cmd = MODE_10 | addr; index_addr(denali, (uint32_t)cmd, access_type); cmd = MODE_01 | addr; denali_write32(cmd, denali->flash_mem); - } - else if (op == DENALI_READ) - { + } else if (op == DENALI_READ) { /* setup page read request for access type */ cmd = MODE_10 | addr; index_addr(denali, (uint32_t)cmd, access_type); @@ -1173,13 +1153,10 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en use the pipeline commands in Spare area only mode. So we don't. */ - if (access_type == SPARE_ACCESS) - { + if (access_type == SPARE_ACCESS) { cmd = MODE_01 | addr; denali_write32(cmd, denali->flash_mem); - } - else - { + } else { index_addr(denali, (uint32_t)cmd, 0x2000 | op | page_count); /* wait for command to be accepted @@ -1187,14 +1164,11 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en * bank. */ irq_status = wait_for_irq(denali, irq_mask); - if (irq_status == 0) - { + if (irq_status == 0) { printk(KERN_ERR "cmd, page, addr on timeout " "(0x%x, 0x%x, 0x%x)\n", cmd, denali->page, addr); status = FAIL; - } - else - { + } else { cmd = MODE_01 | addr; denali_write32(cmd, denali->flash_mem); } @@ -1216,9 +1190,7 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali, const uint8_ /* write the data to the flash memory */ buf32 = (uint32_t *)buf; for (i = 0; i < len / 4; i++) - { denali_write32(*buf32++, denali->flash_mem + 0x10); - } return i*4; /* intent is to return the number of bytes read */ } @@ -1241,9 +1213,7 @@ static int read_data_from_flash_mem(struct denali_nand_info *denali, uint8_t *bu /* transfer the data from the flash */ buf32 = (uint32_t *)buf; for (i = 0; i < len / 4; i++) - { *buf32++ = ioread32(denali->flash_mem + 0x10); - } return i*4; /* intent is to return the number of bytes read */ } @@ -1259,8 +1229,7 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) denali->page = page; if (denali_send_pipeline_cmd(denali, false, false, SPARE_ACCESS, - DENALI_WRITE) == PASS) - { + DENALI_WRITE) == PASS) { write_data_to_flash_mem(denali, buf, mtd->oobsize); #if DEBUG_DENALI @@ -1274,14 +1243,11 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) /* wait for operation to complete */ irq_status = wait_for_irq(denali, irq_mask); - if (irq_status == 0) - { + if (irq_status == 0) { printk(KERN_ERR "OOB write failed\n"); status = -EIO; } - } - else - { + } else { printk(KERN_ERR "unable to send pipeline command\n"); status = -EIO; } @@ -1300,8 +1266,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) printk("read_oob %d\n", page); #endif if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS, - DENALI_READ) == PASS) - { + DENALI_READ) == PASS) { read_data_from_flash_mem(denali, buf, mtd->oobsize); /* wait for command to be accepted @@ -1310,9 +1275,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) irq_status = wait_for_irq(denali, irq_mask); if (irq_status == 0) - { printk(KERN_ERR "page on OOB timeout %d\n", denali->page); - } /* We set the device back to MAIN_ACCESS here as I observed * instability with the controller if you do a block erase @@ -1340,12 +1303,8 @@ bool is_erased(uint8_t *buf, int len) { int i = 0; for (i = 0; i < len; i++) - { if (buf[i] != 0xFF) - { return false; - } - } return true; } #define ECC_SECTOR_SIZE 512 @@ -1362,15 +1321,13 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, { bool check_erased_page = false; - if (irq_status & INTR_STATUS0__ECC_ERR) - { + if (irq_status & INTR_STATUS0__ECC_ERR) { /* read the ECC errors. we'll ignore them for now */ uint32_t err_address = 0, err_correction_info = 0; uint32_t err_byte = 0, err_sector = 0, err_device = 0; uint32_t err_correction_value = 0; - do - { + do { err_address = ioread32(denali->flash_reg + ECC_ERROR_ADDRESS); err_sector = ECC_SECTOR(err_address); @@ -1383,29 +1340,23 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, ECC_CORRECTION_VALUE(err_correction_info); err_device = ECC_ERR_DEVICE(err_correction_info); - if (ECC_ERROR_CORRECTABLE(err_correction_info)) - { + if (ECC_ERROR_CORRECTABLE(err_correction_info)) { /* offset in our buffer is computed as: sector number * sector size + offset in sector */ int offset = err_sector * ECC_SECTOR_SIZE + err_byte; - if (offset < denali->mtd.writesize) - { + if (offset < denali->mtd.writesize) { /* correct the ECC error */ buf[offset] ^= err_correction_value; denali->mtd.ecc_stats.corrected++; - } - else - { + } else { /* bummer, couldn't correct the error */ printk(KERN_ERR "ECC offset invalid\n"); denali->mtd.ecc_stats.failed++; } - } - else - { + } else { /* if the error is not correctable, need to * look at the page to see if it is an erased page. * if so, then it's not a real ECC error */ @@ -1482,8 +1433,7 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip, /* copy buffer into DMA buffer */ memcpy(denali->buf.buf, buf, mtd->writesize); - if (raw_xfer) - { + if (raw_xfer) { /* transfer the data to the spare area */ memcpy(denali->buf.buf + mtd->writesize, chip->oob_poi, @@ -1500,8 +1450,7 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip, /* wait for operation to complete */ irq_status = wait_for_irq(denali, irq_mask); - if (irq_status == 0) - { + if (irq_status == 0) { printk(KERN_ERR "timeout on write_page (type = %d)\n", raw_xfer); denali->status = (irq_status & INTR_STATUS0__PROGRAM_FAIL) ? NAND_STATUS_FAIL : @@ -1584,21 +1533,15 @@ static int denali_read_page(struct mtd_info *mtd, struct nand_chip *chip, check_erased_page = handle_ecc(denali, buf, chip->oob_poi, irq_status); denali_enable_dma(denali, false); - if (check_erased_page) - { + if (check_erased_page) { read_oob_data(&denali->mtd, chip->oob_poi, denali->page); /* check ECC failures that may have occurred on erased pages */ - if (check_erased_page) - { + if (check_erased_page) { if (!is_erased(buf, denali->mtd.writesize)) - { denali->mtd.ecc_stats.failed++; - } if (!is_erased(buf, denali->mtd.oobsize)) - { denali->mtd.ecc_stats.failed++; - } } } return 0; @@ -1643,9 +1586,7 @@ static uint8_t denali_read_byte(struct mtd_info *mtd) uint8_t result = 0xff; if (denali->buf.head < denali->buf.tail) - { result = denali->buf.buf[denali->buf.head++]; - } #if DEBUG_DENALI printk("read byte -> 0x%02x\n", result); @@ -1708,8 +1649,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, #if DEBUG_DENALI printk("cmdfunc: 0x%x %d %d\n", cmd, col, page); #endif - switch (cmd) - { + switch (cmd) { case NAND_CMD_PAGEPROG: break; case NAND_CMD_STATUS: @@ -1717,8 +1657,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, break; case NAND_CMD_READID: reset_buf(denali); - if (denali->flash_bank < denali->total_used_banks) - { + if (denali->flash_bank < denali->total_used_banks) { /* write manufacturer information into nand buffer for NAND subsystem to fetch. */ @@ -1727,9 +1666,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, write_byte_to_buf(denali, denali->dev_info.bDeviceParam0); write_byte_to_buf(denali, denali->dev_info.bDeviceParam1); write_byte_to_buf(denali, denali->dev_info.bDeviceParam2); - } - else - { + } else { int i; for (i = 0; i < 5; i++) write_byte_to_buf(denali, 0xff); @@ -1796,20 +1733,24 @@ static void denali_hw_init(struct denali_nand_info *denali) static struct nand_ecclayout nand_oob_slc = { .eccbytes = 4, .eccpos = { 0, 1, 2, 3 }, /* not used */ - .oobfree = {{ + .oobfree = { + { .offset = ECC_BYTES_SLC, .length = 64 - ECC_BYTES_SLC - }} + } + } }; #define ECC_BYTES_MLC 14 * (2048 / ECC_SECTOR_SIZE) static struct nand_ecclayout nand_oob_mlc_14bit = { .eccbytes = 14, .eccpos = { 0, 1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13 }, /* not used */ - .oobfree = {{ + .oobfree = { + { .offset = ECC_BYTES_MLC, .length = 64 - ECC_BYTES_MLC - }} + } + } }; static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' }; @@ -1882,8 +1823,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) /* Due to a silicon limitation, we can only support * ONFI timing mode 1 and below. */ - if (onfi_timing_mode < -1 || onfi_timing_mode > 1) - { + if (onfi_timing_mode < -1 || onfi_timing_mode > 1) { printk("Intel CE4100 only supports ONFI timing mode 1 " "or below\n"); ret = -EINVAL; @@ -1912,16 +1852,14 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) /* Is 32-bit DMA supported? */ ret = pci_set_dma_mask(dev, DMA_BIT_MASK(32)); - if (ret) - { + if (ret) { printk(KERN_ERR "Spectra: no usable DMA configuration\n"); goto failed_enable; } denali->buf.dma_buf = pci_map_single(dev, denali->buf.buf, DENALI_BUF_SIZE, PCI_DMA_BIDIRECTIONAL); - if (pci_dma_mapping_error(dev, denali->buf.dma_buf)) - { + if (pci_dma_mapping_error(dev, denali->buf.dma_buf)) { printk(KERN_ERR "Spectra: failed to map DMA buffer\n"); goto failed_enable; } @@ -1978,8 +1916,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) /* MTD supported page sizes vary by kernel. We validate our * kernel supports the device here. */ - if (denali->dev_info.wPageSize > NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE) - { + if (denali->dev_info.wPageSize > NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE) { ret = -ENODEV; printk(KERN_ERR "Spectra: device size not supported by this " "version of MTD."); @@ -2011,8 +1948,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) /* scan for NAND devices attached to the controller * this is the first stage in a two step process to register * with the nand subsystem */ - if (nand_scan_ident(&denali->mtd, LLD_MAX_FLASH_BANKS, NULL)) - { + if (nand_scan_ident(&denali->mtd, LLD_MAX_FLASH_BANKS, NULL)) { ret = -ENXIO; goto failed_nand; } @@ -2029,13 +1965,10 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali->nand.options |= NAND_USE_FLASH_BBT | NAND_SKIP_BBTSCAN; denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME; - if (denali->dev_info.MLCDevice) - { + if (denali->dev_info.MLCDevice) { denali->nand.ecc.layout = &nand_oob_mlc_14bit; denali->nand.ecc.bytes = ECC_BYTES_MLC; - } - else /* SLC */ - { + } else {/* SLC */ denali->nand.ecc.layout = &nand_oob_slc; denali->nand.ecc.bytes = ECC_BYTES_SLC; } @@ -2057,8 +1990,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali->nand.ecc.write_oob = denali_write_oob; denali->nand.erase_cmd = denali_erase; - if (nand_scan_tail(&denali->mtd)) - { + if (nand_scan_tail(&denali->mtd)) { ret = -ENXIO; goto failed_nand; } -- cgit v1.2.3 From bf1806ddee9a872a70dfe403fa591328edd3ea5d Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Tue, 27 Jul 2010 10:48:34 +0800 Subject: mtd: denali.c: add and update KERN_ facility level in printk() Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index f850a6516bc9..55a7a3940113 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -138,7 +138,7 @@ static void denali_write32(uint32_t value, void *addr) iowrite32(value, addr); #if DEBUG_DENALI - printk(KERN_ERR "wrote: 0x%x -> 0x%x\n", value, (uint32_t)((uint32_t)addr & 0x1fff)); + printk(KERN_INFO "wrote: 0x%x -> 0x%x\n", value, (uint32_t)((uint32_t)addr & 0x1fff)); #endif } @@ -191,7 +191,7 @@ static void read_status(struct denali_nand_info *denali) write_byte_to_buf(denali, ioread32(denali->flash_mem + 0x10)); #if DEBUG_DENALI - printk("device reporting status value of 0x%2x\n", denali->buf.buf[0]); + printk(KERN_INFO "device reporting status value of 0x%2x\n", denali->buf.buf[0]); #endif } @@ -989,9 +989,9 @@ static void print_irq_log(struct denali_nand_info *denali) { int i = 0; - printk("ISR debug log index = %X\n", denali->idx); + printk(KERN_INFO "ISR debug log index = %X\n", denali->idx); for (i = 0; i < 32; i++) - printk("%08X: %08X\n", i, denali->irq_debug_array[i]); + printk(KERN_INFO "%08X: %08X\n", i, denali->irq_debug_array[i]); } #endif @@ -1018,7 +1018,7 @@ static irqreturn_t denali_isr(int irq, void *dev_id) denali->irq_debug_array[denali->idx++] = 0x10000000 | irq_status; denali->idx %= 32; - printk("IRQ status = 0x%04x\n", irq_status); + printk(KERN_INFO "IRQ status = 0x%04x\n", irq_status); #endif /* handle interrupt */ /* first acknowledge it */ @@ -1046,7 +1046,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) do { #if DEBUG_DENALI - printk("waiting for 0x%x\n", irq_mask); + printk(KERN_INFO "waiting for 0x%x\n", irq_mask); #endif comp_res = wait_for_completion_timeout(&denali->complete, timeout); spin_lock_irq(&denali->irq_lock); @@ -1061,7 +1061,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) denali->irq_status &= ~irq_mask; spin_unlock_irq(&denali->irq_lock); #if DEBUG_DENALI - if (retry) printk("status on retry = 0x%x\n", intr_status); + if (retry) printk(KERN_INFO "status on retry = 0x%x\n", intr_status); #endif /* our interrupt was detected */ break; @@ -1071,7 +1071,7 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) spin_unlock_irq(&denali->irq_lock); #if DEBUG_DENALI print_irq_log(denali); - printk("received irq nobody cared: irq_status = 0x%x," + printk(KERN_INFO "received irq nobody cared: irq_status = 0x%x," " irq_mask = 0x%x, timeout = %ld\n", intr_status, irq_mask, comp_res); #endif retry = true; @@ -1263,7 +1263,7 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) denali->page = page; #if DEBUG_DENALI - printk("read_oob %d\n", page); + printk(KERN_INFO "read_oob %d\n", page); #endif if (denali_send_pipeline_cmd(denali, false, true, SPARE_ACCESS, DENALI_READ) == PASS) { @@ -1364,7 +1364,7 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, } #if DEBUG_DENALI - printk("Detected ECC error in page %d: err_addr = 0x%08x," + printk(KERN_INFO "Detected ECC error in page %d: err_addr = 0x%08x," " info to fix is 0x%08x\n", denali->page, err_address, err_correction_info); #endif @@ -1589,7 +1589,7 @@ static uint8_t denali_read_byte(struct mtd_info *mtd) result = denali->buf.buf[denali->buf.head++]; #if DEBUG_DENALI - printk("read byte -> 0x%02x\n", result); + printk(KERN_INFO "read byte -> 0x%02x\n", result); #endif return result; } @@ -1598,7 +1598,7 @@ static void denali_select_chip(struct mtd_info *mtd, int chip) { struct denali_nand_info *denali = mtd_to_denali(mtd); #if DEBUG_DENALI - printk("denali select chip %d\n", chip); + printk(KERN_INFO "denali select chip %d\n", chip); #endif spin_lock_irq(&denali->irq_lock); denali->flash_bank = chip; @@ -1612,7 +1612,7 @@ static int denali_waitfunc(struct mtd_info *mtd, struct nand_chip *chip) denali->status = 0; #if DEBUG_DENALI - printk("waitfunc %d\n", status); + printk(KERN_INFO "waitfunc %d\n", status); #endif return status; } @@ -1624,7 +1624,7 @@ static void denali_erase(struct mtd_info *mtd, int page) uint32_t cmd = 0x0, irq_status = 0; #if DEBUG_DENALI - printk("erase page: %d\n", page); + printk(KERN_INFO "erase page: %d\n", page); #endif /* clear interrupts */ clear_interrupts(denali); @@ -1647,7 +1647,7 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, struct denali_nand_info *denali = mtd_to_denali(mtd); #if DEBUG_DENALI - printk("cmdfunc: 0x%x %d %d\n", cmd, col, page); + printk(KERN_INFO "cmdfunc: 0x%x %d %d\n", cmd, col, page); #endif switch (cmd) { case NAND_CMD_PAGEPROG: @@ -1824,7 +1824,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) * ONFI timing mode 1 and below. */ if (onfi_timing_mode < -1 || onfi_timing_mode > 1) { - printk("Intel CE4100 only supports ONFI timing mode 1 " + printk(KERN_ERR "Intel CE4100 only supports ONFI timing mode 1 " "or below\n"); ret = -EINVAL; goto failed_enable; -- cgit v1.2.3 From bdca6daee20daf9c14f272fe1ab07990e881e518 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Tue, 27 Jul 2010 11:28:09 +0800 Subject: mtd: denali.c: fix all "line over 80 characters" warnings Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 300 +++++++++++++++++++++++++++++----------------- 1 file changed, 192 insertions(+), 108 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 55a7a3940113..3ce11cc69721 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -36,8 +36,8 @@ MODULE_LICENSE("GPL"); static int onfi_timing_mode = NAND_DEFAULT_TIMINGS; module_param(onfi_timing_mode, int, S_IRUGO); -MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting. -1 indicates" - " use default timings"); +MODULE_PARM_DESC(onfi_timing_mode, "Overrides default ONFI setting." + " -1 indicates use default timings"); #define DENALI_NAND_NAME "denali-nand" @@ -123,8 +123,10 @@ static int nand_debug_level = 0; /* forward declarations */ static void clear_interrupts(struct denali_nand_info *denali); -static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask); -static void denali_irq_enable(struct denali_nand_info *denali, uint32_t int_mask); +static uint32_t wait_for_irq(struct denali_nand_info *denali, + uint32_t irq_mask); +static void denali_irq_enable(struct denali_nand_info *denali, + uint32_t int_mask); static uint32_t read_interrupt_status(struct denali_nand_info *denali); #define DEBUG_DENALI 0 @@ -138,16 +140,19 @@ static void denali_write32(uint32_t value, void *addr) iowrite32(value, addr); #if DEBUG_DENALI - printk(KERN_INFO "wrote: 0x%x -> 0x%x\n", value, (uint32_t)((uint32_t)addr & 0x1fff)); + printk(KERN_INFO "wrote: 0x%x -> 0x%x\n", value, + (uint32_t)((uint32_t)addr & 0x1fff)); #endif } -/* Certain operations for the denali NAND controller use an indexed mode to read/write - data. The operation is performed by writing the address value of the command to - the device memory followed by the data. This function abstracts this common - operation. +/* Certain operations for the denali NAND controller use + * an indexed mode to read/write data. The operation is + * performed by writing the address value of the command + * to the device memory followed by the data. This function + * abstracts this common operation. */ -static void index_addr(struct denali_nand_info *denali, uint32_t address, uint32_t data) +static void index_addr(struct denali_nand_info *denali, + uint32_t address, uint32_t data) { denali_write32(address, denali->flash_mem); denali_write32(data, denali->flash_mem + 0x10); @@ -191,7 +196,8 @@ static void read_status(struct denali_nand_info *denali) write_byte_to_buf(denali, ioread32(denali->flash_mem + 0x10)); #if DEBUG_DENALI - printk(KERN_INFO "device reporting status value of 0x%2x\n", denali->buf.buf[0]); + printk(KERN_INFO "device reporting status value of 0x%2x\n", + denali->buf.buf[0]); #endif } @@ -227,8 +233,10 @@ static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali) denali->flash_reg + intr_status_addresses[i]); for (i = 0 ; i < LLD_MAX_FLASH_BANKS; i++) { - denali_write32(device_reset_banks[i], denali->flash_reg + DEVICE_RESET); - while (!(ioread32(denali->flash_reg + intr_status_addresses[i]) & + denali_write32(device_reset_banks[i], + denali->flash_reg + DEVICE_RESET); + while (!(ioread32(denali->flash_reg + + intr_status_addresses[i]) & (reset_complete[i] | operation_timeout[i]))) ; if (ioread32(denali->flash_reg + intr_status_addresses[i]) & @@ -244,11 +252,12 @@ static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali) return PASS; } -/* this routine calculates the ONFI timing values for a given mode and programs - * the clocking register accordingly. The mode is determined by the get_onfi_nand_para - routine. +/* this routine calculates the ONFI timing values for a given mode and + * programs the clocking register accordingly. The mode is determined by + * the get_onfi_nand_para routine. */ -static void NAND_ONFi_Timing_Mode(struct denali_nand_info *denali, uint16_t mode) +static void NAND_ONFi_Timing_Mode(struct denali_nand_info *denali, + uint16_t mode) { uint16_t Trea[6] = {40, 30, 25, 20, 20, 16}; uint16_t Trp[6] = {50, 25, 17, 15, 12, 10}; @@ -354,10 +363,11 @@ static void set_ecc_config(struct denali_nand_info *denali) denali_write32(8, denali->flash_reg + ECC_CORRECTION); #endif - if ((ioread32(denali->flash_reg + ECC_CORRECTION) & ECC_CORRECTION__VALUE) - == 1) { + if ((ioread32(denali->flash_reg + ECC_CORRECTION) & + ECC_CORRECTION__VALUE) == 1) { denali->dev_info.wECCBytesPerSector = 4; - denali->dev_info.wECCBytesPerSector *= denali->dev_info.wDevicesConnected; + denali->dev_info.wECCBytesPerSector *= + denali->dev_info.wDevicesConnected; denali->dev_info.wNumPageSpareFlag = denali->dev_info.wPageSpareSize - denali->dev_info.wPageDataSize / @@ -373,8 +383,10 @@ static void set_ecc_config(struct denali_nand_info *denali) else denali->dev_info.wECCBytesPerSector += 1; - denali->dev_info.wECCBytesPerSector *= denali->dev_info.wDevicesConnected; - denali->dev_info.wNumPageSpareFlag = denali->dev_info.wPageSpareSize - + denali->dev_info.wECCBytesPerSector *= + denali->dev_info.wDevicesConnected; + denali->dev_info.wNumPageSpareFlag = + denali->dev_info.wPageSpareSize - denali->dev_info.wPageDataSize / (ECC_SECTOR_SIZE * denali->dev_info.wDevicesConnected) * denali->dev_info.wECCBytesPerSector @@ -392,13 +404,15 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) denali_write32(DEVICE_RESET__BANK0, denali->flash_reg + DEVICE_RESET); while (!((ioread32(denali->flash_reg + INTR_STATUS0) & - INTR_STATUS0__RST_COMP) | - (ioread32(denali->flash_reg + INTR_STATUS0) & - INTR_STATUS0__TIME_OUT))) + INTR_STATUS0__RST_COMP) | + (ioread32(denali->flash_reg + INTR_STATUS0) & + INTR_STATUS0__TIME_OUT))) ; - if (ioread32(denali->flash_reg + INTR_STATUS0) & INTR_STATUS0__RST_COMP) { - denali_write32(DEVICE_RESET__BANK1, denali->flash_reg + DEVICE_RESET); + if (ioread32(denali->flash_reg + INTR_STATUS0) & + INTR_STATUS0__RST_COMP) { + denali_write32(DEVICE_RESET__BANK1, + denali->flash_reg + DEVICE_RESET); while (!((ioread32(denali->flash_reg + INTR_STATUS1) & INTR_STATUS1__RST_COMP) | (ioread32(denali->flash_reg + INTR_STATUS1) & @@ -419,10 +433,12 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) INTR_STATUS2__RST_COMP) { denali_write32(DEVICE_RESET__BANK3, denali->flash_reg + DEVICE_RESET); - while (!((ioread32(denali->flash_reg + INTR_STATUS3) & - INTR_STATUS3__RST_COMP) | - (ioread32(denali->flash_reg + INTR_STATUS3) & - INTR_STATUS3__TIME_OUT))) + while (!((ioread32(denali->flash_reg + + INTR_STATUS3) & + INTR_STATUS3__RST_COMP) | + (ioread32(denali->flash_reg + + INTR_STATUS3) & + INTR_STATUS3__TIME_OUT))) ; } else { printk(KERN_ERR "Getting a time out for bank 2!\n"); @@ -432,10 +448,14 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) } } - denali_write32(INTR_STATUS0__TIME_OUT, denali->flash_reg + INTR_STATUS0); - denali_write32(INTR_STATUS1__TIME_OUT, denali->flash_reg + INTR_STATUS1); - denali_write32(INTR_STATUS2__TIME_OUT, denali->flash_reg + INTR_STATUS2); - denali_write32(INTR_STATUS3__TIME_OUT, denali->flash_reg + INTR_STATUS3); + denali_write32(INTR_STATUS0__TIME_OUT, + denali->flash_reg + INTR_STATUS0); + denali_write32(INTR_STATUS1__TIME_OUT, + denali->flash_reg + INTR_STATUS1); + denali_write32(INTR_STATUS2__TIME_OUT, + denali->flash_reg + INTR_STATUS2); + denali_write32(INTR_STATUS3__TIME_OUT, + denali->flash_reg + INTR_STATUS3); denali->dev_info.wONFIDevFeatures = ioread32(denali->flash_reg + ONFI_DEVICE_FEATURES); @@ -448,8 +468,10 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) n_of_luns = ioread32(denali->flash_reg + ONFI_DEVICE_NO_OF_LUNS) & ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS; - blks_lun_l = ioread32(denali->flash_reg + ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L); - blks_lun_h = ioread32(denali->flash_reg + ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U); + blks_lun_l = ioread32(denali->flash_reg + + ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L); + blks_lun_h = ioread32(denali->flash_reg + + ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U); blockperlun = (blks_lun_h << 16) | blks_lun_l; @@ -460,7 +482,8 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) return FAIL; for (i = 5; i > 0; i--) { - if (ioread32(denali->flash_reg + ONFI_TIMING_MODE) & (0x01 << i)) + if (ioread32(denali->flash_reg + ONFI_TIMING_MODE) & + (0x01 << i)) break; } @@ -495,7 +518,8 @@ static void get_samsung_nand_para(struct denali_nand_info *denali) index_addr(denali, (uint32_t)(MODE_11 | 0), 0x90); index_addr(denali, (uint32_t)(MODE_11 | 1), 0); for (i = 0; i < 5; i++) - index_addr_read_data(denali, (uint32_t)(MODE_11 | 2), &id_bytes[i]); + index_addr_read_data(denali, (uint32_t)(MODE_11 | 2), + &id_bytes[i]); nand_dbg_print(NAND_DBG_DEBUG, "ID bytes: 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", @@ -515,7 +539,8 @@ static void get_samsung_nand_para(struct denali_nand_info *denali) no_of_planes = 1 << ((id_bytes[4] & 0x0c) >> 2); plane_size = (uint64_t)64 << ((id_bytes[4] & 0x70) >> 4); - blk_size = 64 << ((ioread32(denali->flash_reg + DEVICE_PARAM_1) & 0x30) >> 4); + blk_size = 64 << ((ioread32(denali->flash_reg + DEVICE_PARAM_1) & + 0x30) >> 4); capacity = (uint64_t)128 * plane_size * no_of_planes; do_div(capacity, blk_size); @@ -534,7 +559,8 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali) denali_write32(216, denali->flash_reg + DEVICE_SPARE_AREA_SIZE); tmp = ioread32(denali->flash_reg + DEVICES_CONNECTED) * ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE); - denali_write32(tmp, denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE); + denali_write32(tmp, + denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE); #if SUPPORT_15BITECC denali_write32(15, denali->flash_reg + ECC_CORRECTION); #elif SUPPORT_8BITECC @@ -573,10 +599,14 @@ static void get_hynix_nand_para(struct denali_nand_info *denali) denali_write32(128, denali->flash_reg + PAGES_PER_BLOCK); denali_write32(4096, denali->flash_reg + DEVICE_MAIN_AREA_SIZE); denali_write32(224, denali->flash_reg + DEVICE_SPARE_AREA_SIZE); - main_size = 4096 * ioread32(denali->flash_reg + DEVICES_CONNECTED); - spare_size = 224 * ioread32(denali->flash_reg + DEVICES_CONNECTED); - denali_write32(main_size, denali->flash_reg + LOGICAL_PAGE_DATA_SIZE); - denali_write32(spare_size, denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE); + main_size = 4096 * + ioread32(denali->flash_reg + DEVICES_CONNECTED); + spare_size = 224 * + ioread32(denali->flash_reg + DEVICES_CONNECTED); + denali_write32(main_size, + denali->flash_reg + LOGICAL_PAGE_DATA_SIZE); + denali_write32(spare_size, + denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE); denali_write32(0, denali->flash_reg + DEVICE_WIDTH); #if SUPPORT_15BITECC denali_write32(15, denali->flash_reg + ECC_CORRECTION); @@ -619,7 +649,8 @@ static void find_valid_banks(struct denali_nand_info *denali) for (i = 0; i < LLD_MAX_FLASH_BANKS; i++) { index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 0), 0x90); index_addr(denali, (uint32_t)(MODE_11 | (i << 24) | 1), 0); - index_addr_read_data(denali, (uint32_t)(MODE_11 | (i << 24) | 2), &id[i]); + index_addr_read_data(denali, + (uint32_t)(MODE_11 | (i << 24) | 2), &id[i]); nand_dbg_print(NAND_DBG_DEBUG, "Return 1st ID for bank[%d]: %x\n", i, id[i]); @@ -671,7 +702,8 @@ static void detect_partition_feature(struct denali_nand_info *denali) (ioread32(denali->flash_reg + MAX_BLK_ADDR_1) & MAX_BLK_ADDR_1__VALUE); - denali->dev_info.wTotalBlocks *= denali->total_used_banks; + denali->dev_info.wTotalBlocks *= + denali->total_used_banks; if (denali->dev_info.wSpectraEndBlock >= denali->dev_info.wTotalBlocks) { @@ -683,8 +715,10 @@ static void detect_partition_feature(struct denali_nand_info *denali) denali->dev_info.wSpectraEndBlock - denali->dev_info.wSpectraStartBlock + 1; } else { - denali->dev_info.wTotalBlocks *= denali->total_used_banks; - denali->dev_info.wSpectraStartBlock = SPECTRA_START_BLOCK; + denali->dev_info.wTotalBlocks *= + denali->total_used_banks; + denali->dev_info.wSpectraStartBlock = + SPECTRA_START_BLOCK; denali->dev_info.wSpectraEndBlock = denali->dev_info.wTotalBlocks - 1; denali->dev_info.wDataBlockNum = @@ -694,7 +728,8 @@ static void detect_partition_feature(struct denali_nand_info *denali) } else { denali->dev_info.wTotalBlocks *= denali->total_used_banks; denali->dev_info.wSpectraStartBlock = SPECTRA_START_BLOCK; - denali->dev_info.wSpectraEndBlock = denali->dev_info.wTotalBlocks - 1; + denali->dev_info.wSpectraEndBlock = + denali->dev_info.wTotalBlocks - 1; denali->dev_info.wDataBlockNum = denali->dev_info.wSpectraEndBlock - denali->dev_info.wSpectraStartBlock + 1; @@ -776,13 +811,19 @@ static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali) nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n", __FILE__, __LINE__, __func__); - denali->dev_info.wDeviceMaker = ioread32(denali->flash_reg + MANUFACTURER_ID); - denali->dev_info.wDeviceID = ioread32(denali->flash_reg + DEVICE_ID); - denali->dev_info.bDeviceParam0 = ioread32(denali->flash_reg + DEVICE_PARAM_0); - denali->dev_info.bDeviceParam1 = ioread32(denali->flash_reg + DEVICE_PARAM_1); - denali->dev_info.bDeviceParam2 = ioread32(denali->flash_reg + DEVICE_PARAM_2); + denali->dev_info.wDeviceMaker = + ioread32(denali->flash_reg + MANUFACTURER_ID); + denali->dev_info.wDeviceID = + ioread32(denali->flash_reg + DEVICE_ID); + denali->dev_info.bDeviceParam0 = + ioread32(denali->flash_reg + DEVICE_PARAM_0); + denali->dev_info.bDeviceParam1 = + ioread32(denali->flash_reg + DEVICE_PARAM_1); + denali->dev_info.bDeviceParam2 = + ioread32(denali->flash_reg + DEVICE_PARAM_2); - denali->dev_info.MLCDevice = ioread32(denali->flash_reg + DEVICE_PARAM_0) & 0x0c; + denali->dev_info.MLCDevice = + ioread32(denali->flash_reg + DEVICE_PARAM_0) & 0x0c; if (ioread32(denali->flash_reg + ONFI_DEVICE_NO_OF_LUNS) & ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE) { /* ONFI 1.0 NAND */ @@ -831,7 +872,8 @@ static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali) denali->dev_info.wPageSpareSize = ioread32(denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE); - denali->dev_info.wPagesPerBlock = ioread32(denali->flash_reg + PAGES_PER_BLOCK); + denali->dev_info.wPagesPerBlock = + ioread32(denali->flash_reg + PAGES_PER_BLOCK); denali->dev_info.wPageSize = denali->dev_info.wPageDataSize + denali->dev_info.wPageSpareSize; @@ -840,11 +882,13 @@ static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali) denali->dev_info.wBlockDataSize = denali->dev_info.wPagesPerBlock * denali->dev_info.wPageDataSize; - denali->dev_info.wDeviceWidth = ioread32(denali->flash_reg + DEVICE_WIDTH); + denali->dev_info.wDeviceWidth = + ioread32(denali->flash_reg + DEVICE_WIDTH); denali->dev_info.wDeviceType = ((ioread32(denali->flash_reg + DEVICE_WIDTH) > 0) ? 16 : 8); - denali->dev_info.wDevicesConnected = ioread32(denali->flash_reg + DEVICES_CONNECTED); + denali->dev_info.wDevicesConnected = + ioread32(denali->flash_reg + DEVICES_CONNECTED); denali->dev_info.wSpareSkipBytes = ioread32(denali->flash_reg + SPARE_AREA_SKIP_BYTES) * @@ -933,7 +977,8 @@ static void denali_irq_cleanup(int irqnum, struct denali_nand_info *denali) free_irq(irqnum, denali); } -static void denali_irq_enable(struct denali_nand_info *denali, uint32_t int_mask) +static void denali_irq_enable(struct denali_nand_info *denali, + uint32_t int_mask) { denali_write32(int_mask, denali->flash_reg + INTR_EN0); denali_write32(int_mask, denali->flash_reg + INTR_EN1); @@ -950,7 +995,8 @@ static inline uint32_t denali_irq_detected(struct denali_nand_info *denali) } /* Interrupts are cleared by writing a 1 to the appropriate status bit */ -static inline void clear_interrupt(struct denali_nand_info *denali, uint32_t irq_mask) +static inline void clear_interrupt(struct denali_nand_info *denali, + uint32_t irq_mask) { uint32_t intr_status_reg = 0; @@ -1013,9 +1059,11 @@ static irqreturn_t denali_isr(int irq, void *dev_id) if (is_flash_bank_valid(denali->flash_bank)) { /* check to see if controller generated * the interrupt, since this is a shared interrupt */ - if ((irq_status = denali_irq_detected(denali)) != 0) { + irq_status = denali_irq_detected(denali); + if (irq_status != 0) { #if DEBUG_DENALI - denali->irq_debug_array[denali->idx++] = 0x10000000 | irq_status; + denali->irq_debug_array[denali->idx++] = + 0x10000000 | irq_status; denali->idx %= 32; printk(KERN_INFO "IRQ status = 0x%04x\n", irq_status); @@ -1048,12 +1096,14 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) #if DEBUG_DENALI printk(KERN_INFO "waiting for 0x%x\n", irq_mask); #endif - comp_res = wait_for_completion_timeout(&denali->complete, timeout); + comp_res = + wait_for_completion_timeout(&denali->complete, timeout); spin_lock_irq(&denali->irq_lock); intr_status = denali->irq_status; #if DEBUG_DENALI - denali->irq_debug_array[denali->idx++] = 0x20000000 | (irq_mask << 16) | intr_status; + denali->irq_debug_array[denali->idx++] = + 0x20000000 | (irq_mask << 16) | intr_status; denali->idx %= 32; #endif @@ -1061,7 +1111,9 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) denali->irq_status &= ~irq_mask; spin_unlock_irq(&denali->irq_lock); #if DEBUG_DENALI - if (retry) printk(KERN_INFO "status on retry = 0x%x\n", intr_status); + if (retry) + printk(KERN_INFO "status on retry = 0x%x\n", + intr_status); #endif /* our interrupt was detected */ break; @@ -1071,8 +1123,10 @@ static uint32_t wait_for_irq(struct denali_nand_info *denali, uint32_t irq_mask) spin_unlock_irq(&denali->irq_lock); #if DEBUG_DENALI print_irq_log(denali); - printk(KERN_INFO "received irq nobody cared: irq_status = 0x%x," - " irq_mask = 0x%x, timeout = %ld\n", intr_status, irq_mask, comp_res); + printk(KERN_INFO "received irq nobody cared:" + " irq_status = 0x%x, irq_mask = 0x%x," + " timeout = %ld\n", intr_status, + irq_mask, comp_res); #endif retry = true; } @@ -1101,15 +1155,18 @@ static void setup_ecc_for_xfer(struct denali_nand_info *denali, bool ecc_en, /* Enable spare area/ECC per user's request. */ denali_write32(ecc_en_flag, denali->flash_reg + ECC_ENABLE); - denali_write32(transfer_spare_flag, denali->flash_reg + TRANSFER_SPARE_REG); + denali_write32(transfer_spare_flag, + denali->flash_reg + TRANSFER_SPARE_REG); } /* sends a pipeline command operation to the controller. See the Denali NAND controller's user guide for more information (section 4.2.3.6). */ -static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en, - bool transfer_spare, int access_type, - int op) +static int denali_send_pipeline_cmd(struct denali_nand_info *denali, + bool ecc_en, + bool transfer_spare, + int access_type, + int op) { int status = PASS; uint32_t addr = 0x0, cmd = 0x0, page_count = 1, irq_status = 0, @@ -1123,7 +1180,9 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en #if DEBUG_DENALI spin_lock_irq(&denali->irq_lock); - denali->irq_debug_array[denali->idx++] = 0x40000000 | ioread32(denali->flash_reg + ECC_ENABLE) | (access_type << 4); + denali->irq_debug_array[denali->idx++] = + 0x40000000 | ioread32(denali->flash_reg + ECC_ENABLE) | + (access_type << 4); denali->idx %= 32; spin_unlock_irq(&denali->irq_lock); #endif @@ -1157,16 +1216,19 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en cmd = MODE_01 | addr; denali_write32(cmd, denali->flash_mem); } else { - index_addr(denali, (uint32_t)cmd, 0x2000 | op | page_count); + index_addr(denali, (uint32_t)cmd, + 0x2000 | op | page_count); /* wait for command to be accepted - * can always use status0 bit as the mask is identical for each + * can always use status0 bit as the + * mask is identical for each * bank. */ irq_status = wait_for_irq(denali, irq_mask); if (irq_status == 0) { printk(KERN_ERR "cmd, page, addr on timeout " - "(0x%x, 0x%x, 0x%x)\n", cmd, denali->page, addr); + "(0x%x, 0x%x, 0x%x)\n", cmd, + denali->page, addr); status = FAIL; } else { cmd = MODE_01 | addr; @@ -1178,8 +1240,9 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, bool ecc_en } /* helper function that simply writes a buffer to the flash */ -static int write_data_to_flash_mem(struct denali_nand_info *denali, const uint8_t *buf, - int len) +static int write_data_to_flash_mem(struct denali_nand_info *denali, + const uint8_t *buf, + int len) { uint32_t i = 0, *buf32; @@ -1195,8 +1258,9 @@ static int write_data_to_flash_mem(struct denali_nand_info *denali, const uint8_ } /* helper function that simply reads a buffer from the flash */ -static int read_data_from_flash_mem(struct denali_nand_info *denali, uint8_t *buf, - int len) +static int read_data_from_flash_mem(struct denali_nand_info *denali, + uint8_t *buf, + int len) { uint32_t i = 0, *buf32; @@ -1234,7 +1298,8 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) #if DEBUG_DENALI spin_lock_irq(&denali->irq_lock); - denali->irq_debug_array[denali->idx++] = 0x80000000 | mtd->oobsize; + denali->irq_debug_array[denali->idx++] = + 0x80000000 | mtd->oobsize; denali->idx %= 32; spin_unlock_irq(&denali->irq_lock); #endif @@ -1258,7 +1323,8 @@ static int write_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) { struct denali_nand_info *denali = mtd_to_denali(mtd); - uint32_t irq_mask = INTR_STATUS0__LOAD_COMP, irq_status = 0, addr = 0x0, cmd = 0x0; + uint32_t irq_mask = INTR_STATUS0__LOAD_COMP, + irq_status = 0, addr = 0x0, cmd = 0x0; denali->page = page; @@ -1275,7 +1341,8 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) irq_status = wait_for_irq(denali, irq_mask); if (irq_status == 0) - printk(KERN_ERR "page on OOB timeout %d\n", denali->page); + printk(KERN_ERR "page on OOB timeout %d\n", + denali->page); /* We set the device back to MAIN_ACCESS here as I observed * instability with the controller if you do a block erase @@ -1289,7 +1356,8 @@ static void read_oob_data(struct mtd_info *mtd, uint8_t *buf, int page) #if DEBUG_DENALI spin_lock_irq(&denali->irq_lock); - denali->irq_debug_array[denali->idx++] = 0x60000000 | mtd->oobsize; + denali->irq_debug_array[denali->idx++] = + 0x60000000 | mtd->oobsize; denali->idx %= 32; spin_unlock_irq(&denali->irq_lock); #endif @@ -1358,15 +1426,17 @@ static bool handle_ecc(struct denali_nand_info *denali, uint8_t *buf, } } else { /* if the error is not correctable, need to - * look at the page to see if it is an erased page. - * if so, then it's not a real ECC error */ + * look at the page to see if it is an erased + * page. if so, then it's not a real ECC error + * */ check_erased_page = true; } #if DEBUG_DENALI - printk(KERN_INFO "Detected ECC error in page %d: err_addr = 0x%08x," - " info to fix is 0x%08x\n", denali->page, err_address, - err_correction_info); + printk(KERN_INFO "Detected ECC error in page %d:" + " err_addr = 0x%08x, info to fix is" + " 0x%08x\n", denali->page, err_address, + err_correction_info); #endif } while (!ECC_LAST_ERR(err_correction_info)); } @@ -1451,10 +1521,11 @@ static void write_page(struct mtd_info *mtd, struct nand_chip *chip, irq_status = wait_for_irq(denali, irq_mask); if (irq_status == 0) { - printk(KERN_ERR "timeout on write_page (type = %d)\n", raw_xfer); + printk(KERN_ERR "timeout on write_page" + " (type = %d)\n", raw_xfer); denali->status = - (irq_status & INTR_STATUS0__PROGRAM_FAIL) ? NAND_STATUS_FAIL : - PASS; + (irq_status & INTR_STATUS0__PROGRAM_FAIL) ? + NAND_STATUS_FAIL : PASS; } denali_enable_dma(denali, false); @@ -1637,8 +1708,8 @@ static void denali_erase(struct mtd_info *mtd, int page) irq_status = wait_for_irq(denali, INTR_STATUS0__ERASE_COMP | INTR_STATUS0__ERASE_FAIL); - denali->status = (irq_status & INTR_STATUS0__ERASE_FAIL) ? NAND_STATUS_FAIL : - PASS; + denali->status = (irq_status & INTR_STATUS0__ERASE_FAIL) ? + NAND_STATUS_FAIL : PASS; } static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, @@ -1661,11 +1732,16 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, /* write manufacturer information into nand buffer for NAND subsystem to fetch. */ - write_byte_to_buf(denali, denali->dev_info.wDeviceMaker); - write_byte_to_buf(denali, denali->dev_info.wDeviceID); - write_byte_to_buf(denali, denali->dev_info.bDeviceParam0); - write_byte_to_buf(denali, denali->dev_info.bDeviceParam1); - write_byte_to_buf(denali, denali->dev_info.bDeviceParam2); + write_byte_to_buf(denali, + denali->dev_info.wDeviceMaker); + write_byte_to_buf(denali, + denali->dev_info.wDeviceID); + write_byte_to_buf(denali, + denali->dev_info.bDeviceParam0); + write_byte_to_buf(denali, + denali->dev_info.bDeviceParam1); + write_byte_to_buf(denali, + denali->dev_info.bDeviceParam2); } else { int i; for (i = 0; i < 5; i++) @@ -1683,7 +1759,8 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, /* TODO: Read OOB data */ break; default: - printk(KERN_ERR ": unsupported command received 0x%x\n", cmd); + printk(KERN_ERR ": unsupported command" + " received 0x%x\n", cmd); break; } } @@ -1718,7 +1795,8 @@ static void denali_hw_init(struct denali_nand_info *denali) denali_irq_init(denali); NAND_Flash_Reset(denali); denali_write32(0x0F, denali->flash_reg + RB_PIN_ENABLED); - denali_write32(CHIP_EN_DONT_CARE__FLAG, denali->flash_reg + CHIP_ENABLE_DONT_CARE); + denali_write32(CHIP_EN_DONT_CARE__FLAG, + denali->flash_reg + CHIP_ENABLE_DONT_CARE); denali_write32(0x0, denali->flash_reg + SPARE_AREA_SKIP_BYTES); denali_write32(0xffff, denali->flash_reg + SPARE_AREA_MARKER); @@ -1824,8 +1902,8 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) * ONFI timing mode 1 and below. */ if (onfi_timing_mode < -1 || onfi_timing_mode > 1) { - printk(KERN_ERR "Intel CE4100 only supports ONFI timing mode 1 " - "or below\n"); + printk(KERN_ERR "Intel CE4100 only supports" + " ONFI timing mode 1 or below\n"); ret = -EINVAL; goto failed_enable; } @@ -1844,7 +1922,9 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) mem_base = csr_base + csr_len; mem_len = csr_len; nand_dbg_print(NAND_DBG_WARN, - "Spectra: No second BAR for PCI device; assuming %08Lx\n", + "Spectra: No second" + " BAR for PCI device;" + " assuming %08Lx\n", (uint64_t)csr_base); } } @@ -1856,8 +1936,10 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) printk(KERN_ERR "Spectra: no usable DMA configuration\n"); goto failed_enable; } - denali->buf.dma_buf = pci_map_single(dev, denali->buf.buf, DENALI_BUF_SIZE, - PCI_DMA_BIDIRECTIONAL); + denali->buf.dma_buf = + pci_map_single(dev, denali->buf.buf, + DENALI_BUF_SIZE, + PCI_DMA_BIDIRECTIONAL); if (pci_dma_mapping_error(dev, denali->buf.dma_buf)) { printk(KERN_ERR "Spectra: failed to map DMA buffer\n"); @@ -1997,7 +2079,8 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) ret = add_mtd_device(&denali->mtd); if (ret) { - printk(KERN_ERR "Spectra: Failed to register MTD device: %d\n", ret); + printk(KERN_ERR "Spectra: Failed to register" + " MTD device: %d\n", ret); goto failed_nand; } return 0; @@ -2051,7 +2134,8 @@ static struct pci_driver denali_pci_driver = { static int __devinit denali_init(void) { - printk(KERN_INFO "Spectra MTD driver built on %s @ %s\n", __DATE__, __TIME__); + printk(KERN_INFO "Spectra MTD driver built on %s @ %s\n", + __DATE__, __TIME__); return pci_register_driver(&denali_pci_driver); } -- cgit v1.2.3 From a99d17966cfa65cd1767cbddb209166c18fedc74 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Tue, 27 Jul 2010 11:32:21 +0800 Subject: mtd: denali.c: fix reserved all check-patch errors Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 102 ++++++++++++++++++++++++---------------------- 1 file changed, 53 insertions(+), 49 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 3ce11cc69721..52278d839d08 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -119,7 +119,7 @@ static const uint32_t reset_complete[4] = {INTR_STATUS0__RST_COMP, INTR_STATUS3__RST_COMP}; /* specifies the debug level of the driver */ -static int nand_debug_level = 0; +static int nand_debug_level; /* forward declarations */ static void clear_interrupts(struct denali_nand_info *denali); @@ -991,7 +991,7 @@ static void denali_irq_enable(struct denali_nand_info *denali, */ static inline uint32_t denali_irq_detected(struct denali_nand_info *denali) { - return (read_interrupt_status(denali) & DENALI_IRQ_ALL); + return read_interrupt_status(denali) & DENALI_IRQ_ALL; } /* Interrupts are cleared by writing a 1 to the appropriate status bit */ @@ -1172,9 +1172,12 @@ static int denali_send_pipeline_cmd(struct denali_nand_info *denali, uint32_t addr = 0x0, cmd = 0x0, page_count = 1, irq_status = 0, irq_mask = 0; - if (op == DENALI_READ) irq_mask = INTR_STATUS0__LOAD_COMP; - else if (op == DENALI_WRITE) irq_mask = 0; - else BUG(); + if (op == DENALI_READ) + irq_mask = INTR_STATUS0__LOAD_COMP; + else if (op == DENALI_WRITE) + irq_mask = 0; + else + BUG(); setup_ecc_for_xfer(denali, ecc_en, transfer_spare); @@ -1448,7 +1451,8 @@ static void denali_enable_dma(struct denali_nand_info *denali, bool en) { uint32_t reg_val = 0x0; - if (en) reg_val = DMA_ENABLE__FLAG; + if (en) + reg_val = DMA_ENABLE__FLAG; denali_write32(reg_val, denali->flash_reg + DMA_ENABLE); ioread32(denali->flash_reg + DMA_ENABLE); @@ -1721,47 +1725,47 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, printk(KERN_INFO "cmdfunc: 0x%x %d %d\n", cmd, col, page); #endif switch (cmd) { - case NAND_CMD_PAGEPROG: - break; - case NAND_CMD_STATUS: - read_status(denali); - break; - case NAND_CMD_READID: - reset_buf(denali); - if (denali->flash_bank < denali->total_used_banks) { - /* write manufacturer information into nand - buffer for NAND subsystem to fetch. - */ - write_byte_to_buf(denali, - denali->dev_info.wDeviceMaker); - write_byte_to_buf(denali, - denali->dev_info.wDeviceID); - write_byte_to_buf(denali, - denali->dev_info.bDeviceParam0); - write_byte_to_buf(denali, - denali->dev_info.bDeviceParam1); - write_byte_to_buf(denali, - denali->dev_info.bDeviceParam2); - } else { - int i; - for (i = 0; i < 5; i++) - write_byte_to_buf(denali, 0xff); - } - break; - case NAND_CMD_READ0: - case NAND_CMD_SEQIN: - denali->page = page; - break; - case NAND_CMD_RESET: - reset_bank(denali); - break; - case NAND_CMD_READOOB: - /* TODO: Read OOB data */ - break; - default: - printk(KERN_ERR ": unsupported command" - " received 0x%x\n", cmd); - break; + case NAND_CMD_PAGEPROG: + break; + case NAND_CMD_STATUS: + read_status(denali); + break; + case NAND_CMD_READID: + reset_buf(denali); + if (denali->flash_bank < denali->total_used_banks) { + /* write manufacturer information into nand + buffer for NAND subsystem to fetch. + */ + write_byte_to_buf(denali, + denali->dev_info.wDeviceMaker); + write_byte_to_buf(denali, + denali->dev_info.wDeviceID); + write_byte_to_buf(denali, + denali->dev_info.bDeviceParam0); + write_byte_to_buf(denali, + denali->dev_info.bDeviceParam1); + write_byte_to_buf(denali, + denali->dev_info.bDeviceParam2); + } else { + int i; + for (i = 0; i < 5; i++) + write_byte_to_buf(denali, 0xff); + } + break; + case NAND_CMD_READ0: + case NAND_CMD_SEQIN: + denali->page = page; + break; + case NAND_CMD_RESET: + reset_bank(denali); + break; + case NAND_CMD_READOOB: + /* TODO: Read OOB data */ + break; + default: + printk(KERN_ERR ": unsupported command" + " received 0x%x\n", cmd); + break; } } @@ -1807,7 +1811,7 @@ static void denali_hw_init(struct denali_nand_info *denali) } /* ECC layout for SLC devices. Denali spec indicates SLC fixed at 4 bytes */ -#define ECC_BYTES_SLC 4 * (2048 / ECC_SECTOR_SIZE) +#define ECC_BYTES_SLC (4 * (2048 / ECC_SECTOR_SIZE)) static struct nand_ecclayout nand_oob_slc = { .eccbytes = 4, .eccpos = { 0, 1, 2, 3 }, /* not used */ @@ -1819,7 +1823,7 @@ static struct nand_ecclayout nand_oob_slc = { } }; -#define ECC_BYTES_MLC 14 * (2048 / ECC_SECTOR_SIZE) +#define ECC_BYTES_MLC (14 * (2048 / ECC_SECTOR_SIZE)) static struct nand_ecclayout nand_oob_mlc_14bit = { .eccbytes = 14, .eccpos = { 0, 1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13 }, /* not used */ -- cgit v1.2.3 From eda936ef17b921e56239ab4db2027d76abf8bebc Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Tue, 27 Jul 2010 14:17:37 +0800 Subject: mtd: denali: rename functions which is named by using capitals rename these functions' name and remove additional declarations in header file Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 22 +++++++++++----------- drivers/mtd/nand/denali.h | 5 ----- 2 files changed, 11 insertions(+), 16 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 52278d839d08..0c76a16774c9 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -221,7 +221,7 @@ static void reset_bank(struct denali_nand_info *denali) } /* Reset the flash controller */ -static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali) +static uint16_t denali_nand_reset(struct denali_nand_info *denali) { uint32_t i; @@ -256,7 +256,7 @@ static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali) * programs the clocking register accordingly. The mode is determined by * the get_onfi_nand_para routine. */ -static void NAND_ONFi_Timing_Mode(struct denali_nand_info *denali, +static void nand_onfi_timing_set(struct denali_nand_info *denali, uint16_t mode) { uint16_t Trea[6] = {40, 30, 25, 20, 20, 16}; @@ -487,7 +487,7 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) break; } - NAND_ONFi_Timing_Mode(denali, i); + nand_onfi_timing_set(denali, i); index_addr(denali, MODE_11 | 0, 0x90); index_addr(denali, MODE_11 | 1, 0); @@ -803,7 +803,7 @@ static void dump_device_info(struct denali_nand_info *denali) denali->dev_info.nBitsInBlockDataSize); } -static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali) +static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) { uint16_t status = PASS; uint8_t no_of_planes; @@ -928,12 +928,12 @@ static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali) * with a specific ONFI mode, we apply those changes here. */ if (onfi_timing_mode != NAND_DEFAULT_TIMINGS) - NAND_ONFi_Timing_Mode(denali, onfi_timing_mode); + nand_onfi_timing_set(denali, onfi_timing_mode); return status; } -static void NAND_LLD_Enable_Disable_Interrupts(struct denali_nand_info *denali, +static void denali_set_intr_modes(struct denali_nand_info *denali, uint16_t INT_ENABLE) { nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n", @@ -958,7 +958,7 @@ static void denali_irq_init(struct denali_nand_info *denali) uint32_t int_mask = 0; /* Disable global interrupts */ - NAND_LLD_Enable_Disable_Interrupts(denali, false); + denali_set_intr_modes(denali, false); int_mask = DENALI_IRQ_ALL; @@ -973,7 +973,7 @@ static void denali_irq_init(struct denali_nand_info *denali) static void denali_irq_cleanup(int irqnum, struct denali_nand_info *denali) { - NAND_LLD_Enable_Disable_Interrupts(denali, false); + denali_set_intr_modes(denali, false); free_irq(irqnum, denali); } @@ -1797,7 +1797,7 @@ static void denali_ecc_hwctl(struct mtd_info *mtd, int mode) static void denali_hw_init(struct denali_nand_info *denali) { denali_irq_init(denali); - NAND_Flash_Reset(denali); + denali_nand_reset(denali); denali_write32(0x0F, denali->flash_reg + RB_PIN_ENABLED); denali_write32(CHIP_EN_DONT_CARE__FLAG, denali->flash_reg + CHIP_ENABLE_DONT_CARE); @@ -1993,11 +1993,11 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) } /* now that our ISR is registered, we can enable interrupts */ - NAND_LLD_Enable_Disable_Interrupts(denali, true); + denali_set_intr_modes(denali, true); pci_set_drvdata(dev, denali); - NAND_Read_Device_ID(denali); + denali_nand_timing_set(denali); /* MTD supported page sizes vary by kernel. We validate our * kernel supports the device here. diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index b56fa3c7c166..626c915294da 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -804,9 +804,4 @@ struct denali_nand_info { int idx; }; -static uint16_t NAND_Flash_Reset(struct denali_nand_info *denali); -static uint16_t NAND_Read_Device_ID(struct denali_nand_info *denali); -static void NAND_LLD_Enable_Disable_Interrupts(struct denali_nand_info *denali, - uint16_t INT_ENABLE); - #endif /*_LLD_NAND_*/ -- cgit v1.2.3 From ef41e1bb11fc21acad35c8c3b673fe9f2f29d819 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Fri, 6 Aug 2010 00:48:49 +0800 Subject: mtd: denali: update get nand para functions In denali driver, wTotalBlocks variable is useless, so just remove them in get_toshiba_nand_para and get_hynix_nand_para first. Other wTotalBlocks in denali.c and other variables in dev_info struct are also useless, will remove them later. Also add a parameter in get_hynix_nand_para to prepare to remove dev_info struct. This parameter comes by reading NAND ID directly. Reading register will report wrong value for some NAND chips, e.g. some Micron MT29F32G08QAA chips. So update NAND_CMD_READID method as well. Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 107 +++++++++++++++------------------------------- 1 file changed, 35 insertions(+), 72 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 0c76a16774c9..0f9fc5e7a520 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -549,7 +549,6 @@ static void get_samsung_nand_para(struct denali_nand_info *denali) static void get_toshiba_nand_para(struct denali_nand_info *denali) { - void __iomem *scratch_reg; uint32_t tmp; /* Workaround to fix a controller bug which reports a wrong */ @@ -567,33 +566,14 @@ static void get_toshiba_nand_para(struct denali_nand_info *denali) denali_write32(8, denali->flash_reg + ECC_CORRECTION); #endif } - - /* As Toshiba NAND can not provide it's block number, */ - /* so here we need user to provide the correct block */ - /* number in a scratch register before the Linux NAND */ - /* driver is loaded. If no valid value found in the scratch */ - /* register, then we use default block number value */ - scratch_reg = ioremap_nocache(SCRATCH_REG_ADDR, SCRATCH_REG_SIZE); - if (!scratch_reg) { - printk(KERN_ERR "Spectra: ioremap failed in %s, Line %d", - __FILE__, __LINE__); - denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS; - } else { - nand_dbg_print(NAND_DBG_WARN, - "Spectra: ioremap reg address: 0x%p\n", scratch_reg); - denali->dev_info.wTotalBlocks = 1 << ioread8(scratch_reg); - if (denali->dev_info.wTotalBlocks < 512) - denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS; - iounmap(scratch_reg); - } } -static void get_hynix_nand_para(struct denali_nand_info *denali) +static void get_hynix_nand_para(struct denali_nand_info *denali, + uint8_t device_id) { - void __iomem *scratch_reg; uint32_t main_size, spare_size; - switch (denali->dev_info.wDeviceID) { + switch (device_id) { case 0xD5: /* Hynix H27UAG8T2A, H27UBG8U5A or H27UCG8VFA */ case 0xD7: /* Hynix H27UDG8VEM, H27UCG8UDM or H27UCG8V5A */ denali_write32(128, denali->flash_reg + PAGES_PER_BLOCK); @@ -621,20 +601,6 @@ static void get_hynix_nand_para(struct denali_nand_info *denali) "Will use default parameter values instead.\n", denali->dev_info.wDeviceID); } - - scratch_reg = ioremap_nocache(SCRATCH_REG_ADDR, SCRATCH_REG_SIZE); - if (!scratch_reg) { - printk(KERN_ERR "Spectra: ioremap failed in %s, Line %d", - __FILE__, __LINE__); - denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS; - } else { - nand_dbg_print(NAND_DBG_WARN, - "Spectra: ioremap reg address: 0x%p\n", scratch_reg); - denali->dev_info.wTotalBlocks = 1 << ioread8(scratch_reg); - if (denali->dev_info.wTotalBlocks < 512) - denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS; - iounmap(scratch_reg); - } } /* determines how many NAND chips are connected to the controller. Note for @@ -807,34 +773,35 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) { uint16_t status = PASS; uint8_t no_of_planes; + uint32_t id_bytes[5], addr; + uint8_t i, maf_id, device_id; nand_dbg_print(NAND_DBG_TRACE, "%s, Line %d, Function: %s\n", __FILE__, __LINE__, __func__); - denali->dev_info.wDeviceMaker = - ioread32(denali->flash_reg + MANUFACTURER_ID); - denali->dev_info.wDeviceID = - ioread32(denali->flash_reg + DEVICE_ID); - denali->dev_info.bDeviceParam0 = - ioread32(denali->flash_reg + DEVICE_PARAM_0); - denali->dev_info.bDeviceParam1 = - ioread32(denali->flash_reg + DEVICE_PARAM_1); - denali->dev_info.bDeviceParam2 = - ioread32(denali->flash_reg + DEVICE_PARAM_2); - - denali->dev_info.MLCDevice = - ioread32(denali->flash_reg + DEVICE_PARAM_0) & 0x0c; + /* Use read id method to get device ID and other + * params. For some NAND chips, controller can't + * report the correct device ID by reading from + * DEVICE_ID register + * */ + addr = (uint32_t)MODE_11 | BANK(denali->flash_bank); + index_addr(denali, (uint32_t)addr | 0, 0x90); + index_addr(denali, (uint32_t)addr | 1, 0); + for (i = 0; i < 5; i++) + index_addr_read_data(denali, addr | 2, &id_bytes[i]); + maf_id = id_bytes[0]; + device_id = id_bytes[1]; if (ioread32(denali->flash_reg + ONFI_DEVICE_NO_OF_LUNS) & ONFI_DEVICE_NO_OF_LUNS__ONFI_DEVICE) { /* ONFI 1.0 NAND */ if (FAIL == get_onfi_nand_para(denali)) return FAIL; - } else if (denali->dev_info.wDeviceMaker == 0xEC) { /* Samsung NAND */ + } else if (maf_id == 0xEC) { /* Samsung NAND */ get_samsung_nand_para(denali); - } else if (denali->dev_info.wDeviceMaker == 0x98) { /* Toshiba NAND */ + } else if (maf_id == 0x98) { /* Toshiba NAND */ get_toshiba_nand_para(denali); - } else if (denali->dev_info.wDeviceMaker == 0xAD) { /* Hynix NAND */ - get_hynix_nand_para(denali); + } else if (maf_id == 0xAD) { /* Hynix NAND */ + get_hynix_nand_para(denali, device_id); } else { denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS; } @@ -1720,6 +1687,8 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, int page) { struct denali_nand_info *denali = mtd_to_denali(mtd); + uint32_t addr, id; + int i; #if DEBUG_DENALI printk(KERN_INFO "cmdfunc: 0x%x %d %d\n", cmd, col, page); @@ -1732,24 +1701,18 @@ static void denali_cmdfunc(struct mtd_info *mtd, unsigned int cmd, int col, break; case NAND_CMD_READID: reset_buf(denali); - if (denali->flash_bank < denali->total_used_banks) { - /* write manufacturer information into nand - buffer for NAND subsystem to fetch. - */ - write_byte_to_buf(denali, - denali->dev_info.wDeviceMaker); - write_byte_to_buf(denali, - denali->dev_info.wDeviceID); - write_byte_to_buf(denali, - denali->dev_info.bDeviceParam0); - write_byte_to_buf(denali, - denali->dev_info.bDeviceParam1); - write_byte_to_buf(denali, - denali->dev_info.bDeviceParam2); - } else { - int i; - for (i = 0; i < 5; i++) - write_byte_to_buf(denali, 0xff); + /*sometimes ManufactureId read from register is not right + * e.g. some of Micron MT29F32G08QAA MLC NAND chips + * So here we send READID cmd to NAND insteand + * */ + addr = (uint32_t)MODE_11 | BANK(denali->flash_bank); + index_addr(denali, (uint32_t)addr | 0, 0x90); + index_addr(denali, (uint32_t)addr | 1, 0); + for (i = 0; i < 5; i++) { + index_addr_read_data(denali, + (uint32_t)addr | 2, + &id); + write_byte_to_buf(denali, id); } break; case NAND_CMD_READ0: -- cgit v1.2.3 From dba76c033f1b88b6eb0fa697b824f954b11f8a97 Mon Sep 17 00:00:00 2001 From: Maxim Levitsky Date: Wed, 28 Jul 2010 18:53:16 +0300 Subject: mtd: blkdevs: fix crash related to sysfs attributes. Remove the attributes group before disk to avoid use after free Signed-off-by: Maxim Levitsky Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/mtd_blkdevs.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c index a6bb5863e8f3..89e07e5af577 100644 --- a/drivers/mtd/mtd_blkdevs.c +++ b/drivers/mtd/mtd_blkdevs.c @@ -410,13 +410,14 @@ int del_mtd_blktrans_dev(struct mtd_blktrans_dev *old) BUG(); } - /* Stop new requests to arrive */ - del_gendisk(old->disk); - if (old->disk_attributes) sysfs_remove_group(&disk_to_dev(old->disk)->kobj, old->disk_attributes); + /* Stop new requests to arrive */ + del_gendisk(old->disk); + + /* Stop the thread */ kthread_stop(old->thread); -- cgit v1.2.3 From 6f92355c6e7a680c8f61f3ae30e870d05843b98f Mon Sep 17 00:00:00 2001 From: Maxim Levitsky Date: Wed, 28 Jul 2010 18:53:17 +0300 Subject: mtd: update description on sm_ftl I think that scary description can go now... Signed-off-by: Maxim Levitsky Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/Kconfig | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/Kconfig b/drivers/mtd/Kconfig index 71eda03b925f..1e2cbf5d9aa1 100644 --- a/drivers/mtd/Kconfig +++ b/drivers/mtd/Kconfig @@ -311,11 +311,14 @@ config SM_FTL select MTD_BLKDEVS select MTD_NAND_ECC help - This enables new and very EXPERMENTAL support for SmartMedia/xD + This enables EXPERIMENTAL R/W support for SmartMedia/xD FTL (Flash translation layer). - Write support isn't yet well tested, therefore this code IS likely to - eat your card, so please don't use it together with valuable data. - Use readonly driver (CONFIG_SSFDC) instead. + Write support is only lightly tested, therefore this driver + isn't recommended to use with valuable data (anyway if you have + valuable data, do backups regardless of software/hardware you + use, because you never know what will eat your data...) + If you only need R/O access, you can use older R/O driver + (CONFIG_SSFDC) config MTD_OOPS tristate "Log panic/oops to an MTD buffer" -- cgit v1.2.3 From 81cbb0b17796d81cbd92defe113cf2a7c7a21fbb Mon Sep 17 00:00:00 2001 From: Marek Vasut Date: Wed, 28 Jul 2010 07:36:54 +0200 Subject: mtd: gen_nand: fix support for multiple chips This patch corrects a problem where gen_nand driver assumed there can be only one chip and ignored the pdata->chip.nr_chips value. Signed-off-by: Marek Vasut Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/plat_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/plat_nand.c b/drivers/mtd/nand/plat_nand.c index 8d467315f02b..90e143e5ad3e 100644 --- a/drivers/mtd/nand/plat_nand.c +++ b/drivers/mtd/nand/plat_nand.c @@ -91,7 +91,7 @@ static int __devinit plat_nand_probe(struct platform_device *pdev) } /* Scan to find existance of the device */ - if (nand_scan(&data->mtd, 1)) { + if (nand_scan(&data->mtd, pdata->chip.nr_chips)) { err = -ENXIO; goto out; } -- cgit v1.2.3 From b8664b3762dc81e7a19ad4ffaae4055d6d5a7196 Mon Sep 17 00:00:00 2001 From: David Miller Date: Wed, 4 Aug 2010 22:57:51 -0700 Subject: mtd: Missing slab.h include Signed-off-by: David S. Miller Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 0f9fc5e7a520..c41d2780eaee 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -21,6 +21,7 @@ #include #include #include +#include #include #include #include -- cgit v1.2.3 From 8ae664184c45def51ff0b61d4bd6c6671db6cb4f Mon Sep 17 00:00:00 2001 From: Stefani Seibold Date: Thu, 5 Aug 2010 09:19:26 +0200 Subject: mtd: change struct flchip_shared spinlock locking into mutex This patch prevent to schedule while atomic by changing the flchip_shared spinlock into a mutex. This should be save since no atomic path will use this lock. It was suggested by Arnd Bergmann and Vasiliy Kulikov. Signed-off-by: Stefani Seibold Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/chips/cfi_cmdset_0001.c | 20 ++++++++++---------- drivers/mtd/lpddr/lpddr_cmds.c | 20 ++++++++++---------- include/linux/mtd/flashchip.h | 2 +- 3 files changed, 21 insertions(+), 21 deletions(-) diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index 2fadb0239ba3..97d5546f9ea4 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -720,7 +720,7 @@ static int cfi_intelext_partition_fixup(struct mtd_info *mtd, chip = &newcfi->chips[0]; for (i = 0; i < cfi->numchips; i++) { shared[i].writing = shared[i].erasing = NULL; - spin_lock_init(&shared[i].lock); + mutex_init(&shared[i].lock); for (j = 0; j < numparts; j++) { *chip = cfi->chips[i]; chip->start += j << partshift; @@ -889,7 +889,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr */ struct flchip_shared *shared = chip->priv; struct flchip *contender; - spin_lock(&shared->lock); + mutex_lock(&shared->lock); contender = shared->writing; if (contender && contender != chip) { /* @@ -902,7 +902,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr * get_chip returns success we're clear to go ahead. */ ret = mutex_trylock(&contender->mutex); - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); if (!ret) goto retry; mutex_unlock(&chip->mutex); @@ -917,7 +917,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr mutex_unlock(&contender->mutex); return ret; } - spin_lock(&shared->lock); + mutex_lock(&shared->lock); /* We should not own chip if it is already * in FL_SYNCING state. Put contender and retry. */ @@ -933,7 +933,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr * on this chip. Sleep. */ if (mode == FL_ERASING && shared->erasing && shared->erasing->oldstate == FL_ERASING) { - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); set_current_state(TASK_UNINTERRUPTIBLE); add_wait_queue(&chip->wq, &wait); mutex_unlock(&chip->mutex); @@ -947,7 +947,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, unsigned long adr shared->writing = chip; if (mode == FL_ERASING) shared->erasing = chip; - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); } ret = chip_ready(map, chip, adr, mode); if (ret == -EAGAIN) @@ -962,7 +962,7 @@ static void put_chip(struct map_info *map, struct flchip *chip, unsigned long ad if (chip->priv) { struct flchip_shared *shared = chip->priv; - spin_lock(&shared->lock); + mutex_lock(&shared->lock); if (shared->writing == chip && chip->oldstate == FL_READY) { /* We own the ability to write, but we're done */ shared->writing = shared->erasing; @@ -970,7 +970,7 @@ static void put_chip(struct map_info *map, struct flchip *chip, unsigned long ad /* give back ownership to who we loaned it from */ struct flchip *loaner = shared->writing; mutex_lock(&loaner->mutex); - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); mutex_unlock(&chip->mutex); put_chip(map, loaner, loaner->start); mutex_lock(&chip->mutex); @@ -988,11 +988,11 @@ static void put_chip(struct map_info *map, struct flchip *chip, unsigned long ad * Don't let the switch below mess things up since * we don't have ownership to resume anything. */ - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); wake_up(&chip->wq); return; } - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); } switch(chip->oldstate) { diff --git a/drivers/mtd/lpddr/lpddr_cmds.c b/drivers/mtd/lpddr/lpddr_cmds.c index fece5be58715..04fdfcca93f7 100644 --- a/drivers/mtd/lpddr/lpddr_cmds.c +++ b/drivers/mtd/lpddr/lpddr_cmds.c @@ -98,7 +98,7 @@ struct mtd_info *lpddr_cmdset(struct map_info *map) numchips = lpddr->numchips / lpddr->qinfo->HWPartsNum; for (i = 0; i < numchips; i++) { shared[i].writing = shared[i].erasing = NULL; - spin_lock_init(&shared[i].lock); + mutex_init(&shared[i].lock); for (j = 0; j < lpddr->qinfo->HWPartsNum; j++) { *chip = lpddr->chips[i]; chip->start += j << lpddr->chipshift; @@ -217,7 +217,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, int mode) */ struct flchip_shared *shared = chip->priv; struct flchip *contender; - spin_lock(&shared->lock); + mutex_lock(&shared->lock); contender = shared->writing; if (contender && contender != chip) { /* @@ -230,7 +230,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, int mode) * get_chip returns success we're clear to go ahead. */ ret = mutex_trylock(&contender->mutex); - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); if (!ret) goto retry; mutex_unlock(&chip->mutex); @@ -245,7 +245,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, int mode) mutex_unlock(&contender->mutex); return ret; } - spin_lock(&shared->lock); + mutex_lock(&shared->lock); /* We should not own chip if it is already in FL_SYNCING * state. Put contender and retry. */ @@ -261,7 +261,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, int mode) Must sleep in such a case. */ if (mode == FL_ERASING && shared->erasing && shared->erasing->oldstate == FL_ERASING) { - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); set_current_state(TASK_UNINTERRUPTIBLE); add_wait_queue(&chip->wq, &wait); mutex_unlock(&chip->mutex); @@ -275,7 +275,7 @@ static int get_chip(struct map_info *map, struct flchip *chip, int mode) shared->writing = chip; if (mode == FL_ERASING) shared->erasing = chip; - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); } ret = chip_ready(map, chip, mode); @@ -348,7 +348,7 @@ static void put_chip(struct map_info *map, struct flchip *chip) { if (chip->priv) { struct flchip_shared *shared = chip->priv; - spin_lock(&shared->lock); + mutex_lock(&shared->lock); if (shared->writing == chip && chip->oldstate == FL_READY) { /* We own the ability to write, but we're done */ shared->writing = shared->erasing; @@ -356,7 +356,7 @@ static void put_chip(struct map_info *map, struct flchip *chip) /* give back the ownership */ struct flchip *loaner = shared->writing; mutex_lock(&loaner->mutex); - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); mutex_unlock(&chip->mutex); put_chip(map, loaner); mutex_lock(&chip->mutex); @@ -374,11 +374,11 @@ static void put_chip(struct map_info *map, struct flchip *chip) * Don't let the switch below mess things up since * we don't have ownership to resume anything. */ - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); wake_up(&chip->wq); return; } - spin_unlock(&shared->lock); + mutex_unlock(&shared->lock); } switch (chip->oldstate) { diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h index f43e9b49b751..23cc10f8e343 100644 --- a/include/linux/mtd/flashchip.h +++ b/include/linux/mtd/flashchip.h @@ -92,7 +92,7 @@ struct flchip { /* This is used to handle contention on write/erase operations between partitions of the same physical chip. */ struct flchip_shared { - spinlock_t lock; + struct mutex lock; struct flchip *writing; struct flchip *erasing; }; -- cgit v1.2.3 From 9a9745c363277cc4e3a1d3e77b4814fbc2685a73 Mon Sep 17 00:00:00 2001 From: Andreas Bießmann Date: Thu, 5 Aug 2010 12:38:41 +0200 Subject: mtd: atmel_nand: fix warning: 'part_probes' defined but not used MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This patch fixes drivers/mtd/nand/atmel_nand.c:372: warning: 'part_probes' defined but not used which is issued when CONFIG_MTD_PARTITIONS is defined but CONFIG_MTD_CMDLINE_PARTS not. Signed-off-by: Andreas Bießmann Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/nand/atmel_nand.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/mtd/nand/atmel_nand.c b/drivers/mtd/nand/atmel_nand.c index 04d30887ca7f..ccce0f03b5dc 100644 --- a/drivers/mtd/nand/atmel_nand.c +++ b/drivers/mtd/nand/atmel_nand.c @@ -364,7 +364,7 @@ static void atmel_nand_hwctl(struct mtd_info *mtd, int mode) } } -#ifdef CONFIG_MTD_PARTITIONS +#ifdef CONFIG_MTD_CMDLINE_PARTS static const char *part_probes[] = { "cmdlinepart", NULL }; #endif -- cgit v1.2.3 From 5da195326b7e220b8cf993ec830ab7251d4cc1d0 Mon Sep 17 00:00:00 2001 From: Guillaume LECERF Date: Thu, 5 Aug 2010 13:55:24 +0200 Subject: mtd: cfi_cmdset_0002: consider version 1.4 as a valid primary extension version The Spansion S29WS-P device family uses CFI version 1.4 [1]. Consider it as a valid version. [1] http://www.spansion.com/Support/Datasheets/s29ws-p_00_a12_e.pdf Signed-off-by: Guillaume LECERF Signed-off-by: David Woodhouse --- drivers/mtd/chips/cfi_cmdset_0002.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index 749203f89b55..bd20d1ff1b0d 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -418,12 +418,13 @@ struct mtd_info *cfi_cmdset_0002(struct map_info *map, int primary) cfi_fixup_major_minor(cfi, extp); /* - * Valid primary extension versions are: 1.0, 1.1, 1.2, 1.3 - * see: http://www.amd.com/us-en/assets/content_type/DownloadableAssets/cfi_r20.pdf, page 19 and on + * Valid primary extension versions are: 1.0, 1.1, 1.2, 1.3, 1.4 + * see: http://www.amd.com/us-en/assets/content_type/DownloadableAssets/cfi_r20.pdf, page 19 * http://www.amd.com/us-en/assets/content_type/DownloadableAssets/cfi_100_20011201.pdf + * http://www.spansion.com/Support/Datasheets/s29ws-p_00_a12_e.pdf */ if (extp->MajorVersion != '1' || - (extp->MajorVersion == '1' && ( extp->MinorVersion < '0' || extp->MinorVersion > '3'))) { + (extp->MajorVersion == '1' && (extp->MinorVersion < '0' || extp->MinorVersion > '4'))) { printk(KERN_ERR " Unknown Amd/Fujitsu Extended Query " "version %c.%c (%#02x/%#02x).\n", extp->MajorVersion, extp->MinorVersion, -- cgit v1.2.3 From 60845e7272632cfc5babc22eb8b72462a303dffa Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Wed, 4 Aug 2010 21:14:25 +0200 Subject: mtd: m25p80: add support for the EON EN25P{32, 64} SPI flash chips Signed-off-by: Gabor Juhos Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/devices/m25p80.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 48bf325e9e84..21d866c31bb9 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -641,6 +641,10 @@ static const struct spi_device_id m25p_ids[] = { { "at26df161a", INFO(0x1f4601, 0, 64 * 1024, 32, SECT_4K) }, { "at26df321", INFO(0x1f4701, 0, 64 * 1024, 64, SECT_4K) }, + /* EON -- en25pxx */ + { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, 0) }, + { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) }, + /* Macronix */ { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) }, { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) }, -- cgit v1.2.3 From f80e521c916cb06ddd95bd90f2cf50b523be52f2 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Thu, 5 Aug 2010 16:58:36 +0200 Subject: mtd: m25p80: add support for the Intel/Numonyx {16,32,64}0S33B SPI flash chips Signed-off-by: Gabor Juhos Signed-off-by: Artem Bityutskiy Signed-off-by: David Woodhouse --- drivers/mtd/devices/m25p80.c | 8 +++++++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 21d866c31bb9..8120cf31ef65 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -645,6 +645,11 @@ static const struct spi_device_id m25p_ids[] = { { "en25p32", INFO(0x1c2016, 0, 64 * 1024, 64, 0) }, { "en25p64", INFO(0x1c2017, 0, 64 * 1024, 128, 0) }, + /* Intel/Numonyx -- xxxs33b */ + { "160s33b", INFO(0x898911, 0, 64 * 1024, 32, 0) }, + { "320s33b", INFO(0x898912, 0, 64 * 1024, 64, 0) }, + { "640s33b", INFO(0x898913, 0, 64 * 1024, 128, 0) }, + /* Macronix */ { "mx25l4005a", INFO(0xc22013, 0, 64 * 1024, 8, SECT_4K) }, { "mx25l8005", INFO(0xc22014, 0, 64 * 1024, 16, 0) }, @@ -834,11 +839,12 @@ static int __devinit m25p_probe(struct spi_device *spi) dev_set_drvdata(&spi->dev, flash); /* - * Atmel and SST serial flash tend to power + * Atmel, SST and Intel/Numonyx serial flash tend to power * up with the software protection bits set */ if (info->jedec_id >> 16 == 0x1f || + info->jedec_id >> 16 == 0x89 || info->jedec_id >> 16 == 0xbf) { write_enable(flash); write_sr(flash, 0); -- cgit v1.2.3 From 0af18d27c36f28a8807297f21fa22979acd977f3 Mon Sep 17 00:00:00 2001 From: Gabor Juhos Date: Wed, 4 Aug 2010 21:14:27 +0200 Subject: mtd: m25p80: add support for the Winbond W25Q32 SPI flash chip Signed-off-by: Gabor Juhos Signed-off-by: Artem Bityutskiy --- drivers/mtd/devices/m25p80.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c index 8120cf31ef65..f90941a785e4 100644 --- a/drivers/mtd/devices/m25p80.c +++ b/drivers/mtd/devices/m25p80.c @@ -716,6 +716,7 @@ static const struct spi_device_id m25p_ids[] = { { "w25x80", INFO(0xef3014, 0, 64 * 1024, 16, SECT_4K) }, { "w25x16", INFO(0xef3015, 0, 64 * 1024, 32, SECT_4K) }, { "w25x32", INFO(0xef3016, 0, 64 * 1024, 64, SECT_4K) }, + { "w25q32", INFO(0xef4016, 0, 64 * 1024, 64, SECT_4K) }, { "w25x64", INFO(0xef3017, 0, 64 * 1024, 128, SECT_4K) }, /* Catalyst / On Semiconductor -- non-JEDEC */ -- cgit v1.2.3 From 66406524e50e32fde0dc01859ad3608ddefe107f Mon Sep 17 00:00:00 2001 From: "Chuanxiao.Dong" Date: Fri, 6 Aug 2010 18:48:21 +0800 Subject: mtd: denali: Remove device_info_tag structure Hi David, I sent 4 patches using my intel email account. If there is any problem about the format of these patches, I will resend them after I arrived at home by using my gmail account, and I will keep on using gmail account to send patches. Thanks. >From 242e3bf5e17f54b1df8cf285154a7c7a61ff62e9 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Fri, 6 Aug 2010 15:29:41 +0800 Subject: [PATCH 1/4] mtd: denali: Remove device_info_tag structure. Most of the variables in this structure are useless, so just remove this structure and relevant codes. Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 299 +++++----------------------------------------- drivers/mtd/nand/denali.h | 43 +------ 2 files changed, 37 insertions(+), 305 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index c41d2780eaee..14b227c8c29e 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -364,43 +364,12 @@ static void set_ecc_config(struct denali_nand_info *denali) denali_write32(8, denali->flash_reg + ECC_CORRECTION); #endif - if ((ioread32(denali->flash_reg + ECC_CORRECTION) & - ECC_CORRECTION__VALUE) == 1) { - denali->dev_info.wECCBytesPerSector = 4; - denali->dev_info.wECCBytesPerSector *= - denali->dev_info.wDevicesConnected; - denali->dev_info.wNumPageSpareFlag = - denali->dev_info.wPageSpareSize - - denali->dev_info.wPageDataSize / - (ECC_SECTOR_SIZE * denali->dev_info.wDevicesConnected) * - denali->dev_info.wECCBytesPerSector - - denali->dev_info.wSpareSkipBytes; - } else { - denali->dev_info.wECCBytesPerSector = - (ioread32(denali->flash_reg + ECC_CORRECTION) & - ECC_CORRECTION__VALUE) * 13 / 8; - if ((denali->dev_info.wECCBytesPerSector) % 2 == 0) - denali->dev_info.wECCBytesPerSector += 2; - else - denali->dev_info.wECCBytesPerSector += 1; - - denali->dev_info.wECCBytesPerSector *= - denali->dev_info.wDevicesConnected; - denali->dev_info.wNumPageSpareFlag = - denali->dev_info.wPageSpareSize - - denali->dev_info.wPageDataSize / - (ECC_SECTOR_SIZE * denali->dev_info.wDevicesConnected) * - denali->dev_info.wECCBytesPerSector - - denali->dev_info.wSpareSkipBytes; - } } /* queries the NAND device to see what ONFI modes it supports. */ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) { int i; - uint16_t blks_lun_l, blks_lun_h, n_of_luns; - uint32_t blockperlun, id; denali_write32(DEVICE_RESET__BANK0, denali->flash_reg + DEVICE_RESET); @@ -458,26 +427,6 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) denali_write32(INTR_STATUS3__TIME_OUT, denali->flash_reg + INTR_STATUS3); - denali->dev_info.wONFIDevFeatures = - ioread32(denali->flash_reg + ONFI_DEVICE_FEATURES); - denali->dev_info.wONFIOptCommands = - ioread32(denali->flash_reg + ONFI_OPTIONAL_COMMANDS); - denali->dev_info.wONFITimingMode = - ioread32(denali->flash_reg + ONFI_TIMING_MODE); - denali->dev_info.wONFIPgmCacheTimingMode = - ioread32(denali->flash_reg + ONFI_PGM_CACHE_TIMING_MODE); - - n_of_luns = ioread32(denali->flash_reg + ONFI_DEVICE_NO_OF_LUNS) & - ONFI_DEVICE_NO_OF_LUNS__NO_OF_LUNS; - blks_lun_l = ioread32(denali->flash_reg + - ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_L); - blks_lun_h = ioread32(denali->flash_reg + - ONFI_DEVICE_NO_OF_BLOCKS_PER_LUN_U); - - blockperlun = (blks_lun_h << 16) | blks_lun_l; - - denali->dev_info.wTotalBlocks = n_of_luns * blockperlun; - if (!(ioread32(denali->flash_reg + ONFI_TIMING_MODE) & ONFI_TIMING_MODE__VALUE)) return FAIL; @@ -490,16 +439,6 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) nand_onfi_timing_set(denali, i); - index_addr(denali, MODE_11 | 0, 0x90); - index_addr(denali, MODE_11 | 1, 0); - - for (i = 0; i < 3; i++) - index_addr_read_data(denali, MODE_11 | 2, &id); - - nand_dbg_print(NAND_DBG_DEBUG, "3rd ID: 0x%x\n", id); - - denali->dev_info.MLCDevice = id & 0x0C; - /* By now, all the ONFI devices we know support the page cache */ /* rw feature. So here we enable the pipeline_rw_ahead feature */ /* iowrite32(1, denali->flash_reg + CACHE_WRITE_ENABLE); */ @@ -510,9 +449,6 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) static void get_samsung_nand_para(struct denali_nand_info *denali) { - uint8_t no_of_planes; - uint32_t blk_size; - uint64_t plane_size, capacity; uint32_t id_bytes[5]; int i; @@ -537,15 +473,6 @@ static void get_samsung_nand_para(struct denali_nand_info *denali) denali_write32(2, denali->flash_reg + RDWR_EN_HI_CNT); denali_write32(2, denali->flash_reg + CS_SETUP_CNT); } - - no_of_planes = 1 << ((id_bytes[4] & 0x0c) >> 2); - plane_size = (uint64_t)64 << ((id_bytes[4] & 0x70) >> 4); - blk_size = 64 << ((ioread32(denali->flash_reg + DEVICE_PARAM_1) & - 0x30) >> 4); - capacity = (uint64_t)128 * plane_size * no_of_planes; - - do_div(capacity, blk_size); - denali->dev_info.wTotalBlocks = capacity; } static void get_toshiba_nand_para(struct denali_nand_info *denali) @@ -594,13 +521,12 @@ static void get_hynix_nand_para(struct denali_nand_info *denali, #elif SUPPORT_8BITECC denali_write32(8, denali->flash_reg + ECC_CORRECTION); #endif - denali->dev_info.MLCDevice = 1; break; default: nand_dbg_print(NAND_DBG_WARN, "Spectra: Unknown Hynix NAND (Device ID: 0x%x)." "Will use default parameter values instead.\n", - denali->dev_info.wDeviceID); + device_id); } } @@ -650,130 +576,31 @@ static void find_valid_banks(struct denali_nand_info *denali) static void detect_partition_feature(struct denali_nand_info *denali) { + /* For MRST platform, denali->fwblks represent the + * number of blocks firmware is taken, + * FW is in protect partition and MTD driver has no + * permission to access it. So let driver know how many + * blocks it can't touch. + * */ if (ioread32(denali->flash_reg + FEATURES) & FEATURES__PARTITION) { if ((ioread32(denali->flash_reg + PERM_SRC_ID_1) & PERM_SRC_ID_1__SRCID) == SPECTRA_PARTITION_ID) { - denali->dev_info.wSpectraStartBlock = + denali->fwblks = ((ioread32(denali->flash_reg + MIN_MAX_BANK_1) & MIN_MAX_BANK_1__MIN_VALUE) * - denali->dev_info.wTotalBlocks) + denali->blksperchip) + (ioread32(denali->flash_reg + MIN_BLK_ADDR_1) & MIN_BLK_ADDR_1__VALUE); - - denali->dev_info.wSpectraEndBlock = - (((ioread32(denali->flash_reg + MIN_MAX_BANK_1) & - MIN_MAX_BANK_1__MAX_VALUE) >> 2) * - denali->dev_info.wTotalBlocks) - + - (ioread32(denali->flash_reg + MAX_BLK_ADDR_1) & - MAX_BLK_ADDR_1__VALUE); - - denali->dev_info.wTotalBlocks *= - denali->total_used_banks; - - if (denali->dev_info.wSpectraEndBlock >= - denali->dev_info.wTotalBlocks) { - denali->dev_info.wSpectraEndBlock = - denali->dev_info.wTotalBlocks - 1; - } - - denali->dev_info.wDataBlockNum = - denali->dev_info.wSpectraEndBlock - - denali->dev_info.wSpectraStartBlock + 1; - } else { - denali->dev_info.wTotalBlocks *= - denali->total_used_banks; - denali->dev_info.wSpectraStartBlock = - SPECTRA_START_BLOCK; - denali->dev_info.wSpectraEndBlock = - denali->dev_info.wTotalBlocks - 1; - denali->dev_info.wDataBlockNum = - denali->dev_info.wSpectraEndBlock - - denali->dev_info.wSpectraStartBlock + 1; - } - } else { - denali->dev_info.wTotalBlocks *= denali->total_used_banks; - denali->dev_info.wSpectraStartBlock = SPECTRA_START_BLOCK; - denali->dev_info.wSpectraEndBlock = - denali->dev_info.wTotalBlocks - 1; - denali->dev_info.wDataBlockNum = - denali->dev_info.wSpectraEndBlock - - denali->dev_info.wSpectraStartBlock + 1; - } -} - -static void dump_device_info(struct denali_nand_info *denali) -{ - nand_dbg_print(NAND_DBG_DEBUG, "denali->dev_info:\n"); - nand_dbg_print(NAND_DBG_DEBUG, "DeviceMaker: 0x%x\n", - denali->dev_info.wDeviceMaker); - nand_dbg_print(NAND_DBG_DEBUG, "DeviceID: 0x%x\n", - denali->dev_info.wDeviceID); - nand_dbg_print(NAND_DBG_DEBUG, "DeviceType: 0x%x\n", - denali->dev_info.wDeviceType); - nand_dbg_print(NAND_DBG_DEBUG, "SpectraStartBlock: %d\n", - denali->dev_info.wSpectraStartBlock); - nand_dbg_print(NAND_DBG_DEBUG, "SpectraEndBlock: %d\n", - denali->dev_info.wSpectraEndBlock); - nand_dbg_print(NAND_DBG_DEBUG, "TotalBlocks: %d\n", - denali->dev_info.wTotalBlocks); - nand_dbg_print(NAND_DBG_DEBUG, "PagesPerBlock: %d\n", - denali->dev_info.wPagesPerBlock); - nand_dbg_print(NAND_DBG_DEBUG, "PageSize: %d\n", - denali->dev_info.wPageSize); - nand_dbg_print(NAND_DBG_DEBUG, "PageDataSize: %d\n", - denali->dev_info.wPageDataSize); - nand_dbg_print(NAND_DBG_DEBUG, "PageSpareSize: %d\n", - denali->dev_info.wPageSpareSize); - nand_dbg_print(NAND_DBG_DEBUG, "NumPageSpareFlag: %d\n", - denali->dev_info.wNumPageSpareFlag); - nand_dbg_print(NAND_DBG_DEBUG, "ECCBytesPerSector: %d\n", - denali->dev_info.wECCBytesPerSector); - nand_dbg_print(NAND_DBG_DEBUG, "BlockSize: %d\n", - denali->dev_info.wBlockSize); - nand_dbg_print(NAND_DBG_DEBUG, "BlockDataSize: %d\n", - denali->dev_info.wBlockDataSize); - nand_dbg_print(NAND_DBG_DEBUG, "DataBlockNum: %d\n", - denali->dev_info.wDataBlockNum); - nand_dbg_print(NAND_DBG_DEBUG, "PlaneNum: %d\n", - denali->dev_info.bPlaneNum); - nand_dbg_print(NAND_DBG_DEBUG, "DeviceMainAreaSize: %d\n", - denali->dev_info.wDeviceMainAreaSize); - nand_dbg_print(NAND_DBG_DEBUG, "DeviceSpareAreaSize: %d\n", - denali->dev_info.wDeviceSpareAreaSize); - nand_dbg_print(NAND_DBG_DEBUG, "DevicesConnected: %d\n", - denali->dev_info.wDevicesConnected); - nand_dbg_print(NAND_DBG_DEBUG, "DeviceWidth: %d\n", - denali->dev_info.wDeviceWidth); - nand_dbg_print(NAND_DBG_DEBUG, "HWRevision: 0x%x\n", - denali->dev_info.wHWRevision); - nand_dbg_print(NAND_DBG_DEBUG, "HWFeatures: 0x%x\n", - denali->dev_info.wHWFeatures); - nand_dbg_print(NAND_DBG_DEBUG, "ONFIDevFeatures: 0x%x\n", - denali->dev_info.wONFIDevFeatures); - nand_dbg_print(NAND_DBG_DEBUG, "ONFIOptCommands: 0x%x\n", - denali->dev_info.wONFIOptCommands); - nand_dbg_print(NAND_DBG_DEBUG, "ONFITimingMode: 0x%x\n", - denali->dev_info.wONFITimingMode); - nand_dbg_print(NAND_DBG_DEBUG, "ONFIPgmCacheTimingMode: 0x%x\n", - denali->dev_info.wONFIPgmCacheTimingMode); - nand_dbg_print(NAND_DBG_DEBUG, "MLCDevice: %s\n", - denali->dev_info.MLCDevice ? "Yes" : "No"); - nand_dbg_print(NAND_DBG_DEBUG, "SpareSkipBytes: %d\n", - denali->dev_info.wSpareSkipBytes); - nand_dbg_print(NAND_DBG_DEBUG, "BitsInPageNumber: %d\n", - denali->dev_info.nBitsInPageNumber); - nand_dbg_print(NAND_DBG_DEBUG, "BitsInPageDataSize: %d\n", - denali->dev_info.nBitsInPageDataSize); - nand_dbg_print(NAND_DBG_DEBUG, "BitsInBlockDataSize: %d\n", - denali->dev_info.nBitsInBlockDataSize); + } else + denali->fwblks = SPECTRA_START_BLOCK; + } else + denali->fwblks = SPECTRA_START_BLOCK; } static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) { uint16_t status = PASS; - uint8_t no_of_planes; uint32_t id_bytes[5], addr; uint8_t i, maf_id, device_id; @@ -803,8 +630,6 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) get_toshiba_nand_para(denali); } else if (maf_id == 0xAD) { /* Hynix NAND */ get_hynix_nand_para(denali, device_id); - } else { - denali->dev_info.wTotalBlocks = GLOB_HWCTL_DEFAULT_BLKS; } nand_dbg_print(NAND_DBG_DEBUG, "Dump timing register values:" @@ -819,79 +644,12 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) ioread32(denali->flash_reg + RDWR_EN_HI_CNT), ioread32(denali->flash_reg + CS_SETUP_CNT)); - denali->dev_info.wHWRevision = ioread32(denali->flash_reg + REVISION); - denali->dev_info.wHWFeatures = ioread32(denali->flash_reg + FEATURES); - - denali->dev_info.wDeviceMainAreaSize = - ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE); - denali->dev_info.wDeviceSpareAreaSize = - ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE); - - denali->dev_info.wPageDataSize = - ioread32(denali->flash_reg + LOGICAL_PAGE_DATA_SIZE); - - /* Note: When using the Micon 4K NAND device, the controller will report - * Page Spare Size as 216 bytes. But Micron's Spec say it's 218 bytes. - * And if force set it to 218 bytes, the controller can not work - * correctly. So just let it be. But keep in mind that this bug may - * cause - * other problems in future. - Yunpeng 2008-10-10 - */ - denali->dev_info.wPageSpareSize = - ioread32(denali->flash_reg + LOGICAL_PAGE_SPARE_SIZE); - - denali->dev_info.wPagesPerBlock = - ioread32(denali->flash_reg + PAGES_PER_BLOCK); - - denali->dev_info.wPageSize = - denali->dev_info.wPageDataSize + denali->dev_info.wPageSpareSize; - denali->dev_info.wBlockSize = - denali->dev_info.wPageSize * denali->dev_info.wPagesPerBlock; - denali->dev_info.wBlockDataSize = - denali->dev_info.wPagesPerBlock * denali->dev_info.wPageDataSize; - - denali->dev_info.wDeviceWidth = - ioread32(denali->flash_reg + DEVICE_WIDTH); - denali->dev_info.wDeviceType = - ((ioread32(denali->flash_reg + DEVICE_WIDTH) > 0) ? 16 : 8); - - denali->dev_info.wDevicesConnected = - ioread32(denali->flash_reg + DEVICES_CONNECTED); - - denali->dev_info.wSpareSkipBytes = - ioread32(denali->flash_reg + SPARE_AREA_SKIP_BYTES) * - denali->dev_info.wDevicesConnected; - - denali->dev_info.nBitsInPageNumber = - ilog2(denali->dev_info.wPagesPerBlock); - denali->dev_info.nBitsInPageDataSize = - ilog2(denali->dev_info.wPageDataSize); - denali->dev_info.nBitsInBlockDataSize = - ilog2(denali->dev_info.wBlockDataSize); - set_ecc_config(denali); - no_of_planes = ioread32(denali->flash_reg + NUMBER_OF_PLANES) & - NUMBER_OF_PLANES__VALUE; - - switch (no_of_planes) { - case 0: - case 1: - case 3: - case 7: - denali->dev_info.bPlaneNum = no_of_planes + 1; - break; - default: - status = FAIL; - break; - } - find_valid_banks(denali); detect_partition_feature(denali); - dump_device_info(denali); - /* If the user specified to override the default timings * with a specific ONFI mode, we apply those changes here. */ @@ -1963,16 +1721,6 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali_nand_timing_set(denali); - /* MTD supported page sizes vary by kernel. We validate our - * kernel supports the device here. - */ - if (denali->dev_info.wPageSize > NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE) { - ret = -ENODEV; - printk(KERN_ERR "Spectra: device size not supported by this " - "version of MTD."); - goto failed_nand; - } - nand_dbg_print(NAND_DBG_DEBUG, "Dump timing register values:" "acc_clks: %d, re_2_we: %d, we_2_re: %d," "addr_2_data: %d, rdwr_en_lo_cnt: %d, " @@ -2003,6 +1751,16 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) goto failed_nand; } + /* MTD supported page sizes vary by kernel. We validate our + * kernel supports the device here. + */ + if (denali->mtd.writesize > NAND_MAX_PAGESIZE + NAND_MAX_OOBSIZE) { + ret = -ENODEV; + printk(KERN_ERR "Spectra: device size not supported by this " + "version of MTD."); + goto failed_nand; + } + /* second stage of the NAND scan * this stage requires information regarding ECC and * bad block management. */ @@ -2015,7 +1773,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali->nand.options |= NAND_USE_FLASH_BBT | NAND_SKIP_BBTSCAN; denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME; - if (denali->dev_info.MLCDevice) { + if (denali->nand.cellinfo & 0xc) { denali->nand.ecc.layout = &nand_oob_mlc_14bit; denali->nand.ecc.bytes = ECC_BYTES_MLC; } else {/* SLC */ @@ -2023,6 +1781,15 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali->nand.ecc.bytes = ECC_BYTES_SLC; } + /* Let driver know the total blocks number and + * how many blocks contained by each nand chip. + * blksperchip will help driver to know how many + * blocks is taken by FW. + * */ + denali->totalblks = denali->mtd.size >> + denali->nand.phys_erase_shift; + denali->blksperchip = denali->totalblks / denali->nand.numchips; + /* These functions are required by the NAND core framework, otherwise, * the NAND core will assert. However, we don't need them, so we'll stub * them out. */ diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index 626c915294da..fcac24199d12 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -620,44 +620,6 @@ #define MIN_MAX_BANK_7__MIN_VALUE 0x0003 #define MIN_MAX_BANK_7__MAX_VALUE 0x000c -/* flash.h */ -struct device_info_tag { - uint16_t wDeviceMaker; - uint16_t wDeviceID; - uint8_t bDeviceParam0; - uint8_t bDeviceParam1; - uint8_t bDeviceParam2; - uint32_t wDeviceType; - uint32_t wSpectraStartBlock; - uint32_t wSpectraEndBlock; - uint32_t wTotalBlocks; - uint16_t wPagesPerBlock; - uint16_t wPageSize; - uint16_t wPageDataSize; - uint16_t wPageSpareSize; - uint16_t wNumPageSpareFlag; - uint16_t wECCBytesPerSector; - uint32_t wBlockSize; - uint32_t wBlockDataSize; - uint32_t wDataBlockNum; - uint8_t bPlaneNum; - uint16_t wDeviceMainAreaSize; - uint16_t wDeviceSpareAreaSize; - uint16_t wDevicesConnected; - uint16_t wDeviceWidth; - uint16_t wHWRevision; - uint16_t wHWFeatures; - uint16_t wONFIDevFeatures; - uint16_t wONFIOptCommands; - uint16_t wONFITimingMode; - uint16_t wONFIPgmCacheTimingMode; - uint16_t MLCDevice; - uint16_t wSpareSkipBytes; - uint8_t nBitsInPageNumber; - uint8_t nBitsInPageDataSize; - uint8_t nBitsInBlockDataSize; -}; - /* ffsdefs.h */ #define CLEAR 0 /*use this to clear a field instead of "fail"*/ #define SET 1 /*use this to set a field instead of "pass"*/ @@ -784,7 +746,6 @@ struct nand_buf { struct denali_nand_info { struct mtd_info mtd; struct nand_chip nand; - struct device_info_tag dev_info; int flash_bank; /* currently selected chip */ int status; int platform; @@ -802,6 +763,10 @@ struct denali_nand_info { uint32_t irq_status; int irq_debug_array[32]; int idx; + + uint32_t fwblks; /* represent how many blocks FW used */ + uint32_t totalblks; + uint32_t blksperchip; }; #endif /*_LLD_NAND_*/ -- cgit v1.2.3 From 4c03bbdfed5497c3fed502226af1ef3fe8d23d08 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Fri, 6 Aug 2010 15:45:19 +0800 Subject: mtd: denali: Remove unuseful code in get_xx_nand_para functions Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 81 ++++------------------------------------------- 1 file changed, 7 insertions(+), 74 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index 14b227c8c29e..a60f3f0186bb 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -370,63 +370,9 @@ static void set_ecc_config(struct denali_nand_info *denali) static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) { int i; - - denali_write32(DEVICE_RESET__BANK0, denali->flash_reg + DEVICE_RESET); - - while (!((ioread32(denali->flash_reg + INTR_STATUS0) & - INTR_STATUS0__RST_COMP) | - (ioread32(denali->flash_reg + INTR_STATUS0) & - INTR_STATUS0__TIME_OUT))) - ; - - if (ioread32(denali->flash_reg + INTR_STATUS0) & - INTR_STATUS0__RST_COMP) { - denali_write32(DEVICE_RESET__BANK1, - denali->flash_reg + DEVICE_RESET); - while (!((ioread32(denali->flash_reg + INTR_STATUS1) & - INTR_STATUS1__RST_COMP) | - (ioread32(denali->flash_reg + INTR_STATUS1) & - INTR_STATUS1__TIME_OUT))) - ; - - if (ioread32(denali->flash_reg + INTR_STATUS1) & - INTR_STATUS1__RST_COMP) { - denali_write32(DEVICE_RESET__BANK2, - denali->flash_reg + DEVICE_RESET); - while (!((ioread32(denali->flash_reg + INTR_STATUS2) & - INTR_STATUS2__RST_COMP) | - (ioread32(denali->flash_reg + INTR_STATUS2) & - INTR_STATUS2__TIME_OUT))) - ; - - if (ioread32(denali->flash_reg + INTR_STATUS2) & - INTR_STATUS2__RST_COMP) { - denali_write32(DEVICE_RESET__BANK3, - denali->flash_reg + DEVICE_RESET); - while (!((ioread32(denali->flash_reg + - INTR_STATUS3) & - INTR_STATUS3__RST_COMP) | - (ioread32(denali->flash_reg + - INTR_STATUS3) & - INTR_STATUS3__TIME_OUT))) - ; - } else { - printk(KERN_ERR "Getting a time out for bank 2!\n"); - } - } else { - printk(KERN_ERR "Getting a time out for bank 1!\n"); - } - } - - denali_write32(INTR_STATUS0__TIME_OUT, - denali->flash_reg + INTR_STATUS0); - denali_write32(INTR_STATUS1__TIME_OUT, - denali->flash_reg + INTR_STATUS1); - denali_write32(INTR_STATUS2__TIME_OUT, - denali->flash_reg + INTR_STATUS2); - denali_write32(INTR_STATUS3__TIME_OUT, - denali->flash_reg + INTR_STATUS3); - + /* we needn't to do a reset here because driver has already + * reset all the banks before + * */ if (!(ioread32(denali->flash_reg + ONFI_TIMING_MODE) & ONFI_TIMING_MODE__VALUE)) return FAIL; @@ -447,23 +393,10 @@ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) return PASS; } -static void get_samsung_nand_para(struct denali_nand_info *denali) +static void get_samsung_nand_para(struct denali_nand_info *denali, + uint8_t device_id) { - uint32_t id_bytes[5]; - int i; - - index_addr(denali, (uint32_t)(MODE_11 | 0), 0x90); - index_addr(denali, (uint32_t)(MODE_11 | 1), 0); - for (i = 0; i < 5; i++) - index_addr_read_data(denali, (uint32_t)(MODE_11 | 2), - &id_bytes[i]); - - nand_dbg_print(NAND_DBG_DEBUG, - "ID bytes: 0x%x, 0x%x, 0x%x, 0x%x, 0x%x\n", - id_bytes[0], id_bytes[1], id_bytes[2], - id_bytes[3], id_bytes[4]); - - if ((id_bytes[1] & 0xff) == 0xd3) { /* Samsung K9WAG08U1A */ + if (device_id == 0xd3) { /* Samsung K9WAG08U1A */ /* Set timing register values according to datasheet */ denali_write32(5, denali->flash_reg + ACC_CLKS); denali_write32(20, denali->flash_reg + RE_2_WE); @@ -625,7 +558,7 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) if (FAIL == get_onfi_nand_para(denali)) return FAIL; } else if (maf_id == 0xEC) { /* Samsung NAND */ - get_samsung_nand_para(denali); + get_samsung_nand_para(denali, device_id); } else if (maf_id == 0x98) { /* Toshiba NAND */ get_toshiba_nand_para(denali); } else if (maf_id == 0xAD) { /* Hynix NAND */ -- cgit v1.2.3 From db9a321049ead6424848b1040a714290d5df39d7 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Fri, 6 Aug 2010 18:02:03 +0800 Subject: mtd: denali: Remove set_ecc_config function set_ecc_config function only set ECC_CORRECTION register, so move register setting to probe function. Since controller only support 15bit and 8bit ecc correction, updated nand ecc layout information. Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 87 +++++++++++++++++++++++++---------------------- drivers/mtd/nand/denali.h | 1 + 2 files changed, 48 insertions(+), 40 deletions(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index a60f3f0186bb..f20d1b14ea1d 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -355,17 +355,6 @@ static void nand_onfi_timing_set(struct denali_nand_info *denali, denali_write32(cs_cnt, denali->flash_reg + CS_SETUP_CNT); } -/* configures the initial ECC settings for the controller */ -static void set_ecc_config(struct denali_nand_info *denali) -{ -#if SUPPORT_8BITECC - if ((ioread32(denali->flash_reg + DEVICE_MAIN_AREA_SIZE) < 4096) || - (ioread32(denali->flash_reg + DEVICE_SPARE_AREA_SIZE) <= 128)) - denali_write32(8, denali->flash_reg + ECC_CORRECTION); -#endif - -} - /* queries the NAND device to see what ONFI modes it supports. */ static uint16_t get_onfi_nand_para(struct denali_nand_info *denali) { @@ -577,8 +566,6 @@ static uint16_t denali_nand_timing_set(struct denali_nand_info *denali) ioread32(denali->flash_reg + RDWR_EN_HI_CNT), ioread32(denali->flash_reg + CS_SETUP_CNT)); - set_ecc_config(denali); - find_valid_banks(denali); detect_partition_feature(denali); @@ -1451,6 +1438,13 @@ static void denali_ecc_hwctl(struct mtd_info *mtd, int mode) /* Initialization code to bring the device up to a known good state */ static void denali_hw_init(struct denali_nand_info *denali) { + /* tell driver how many bit controller will skip before + * writing ECC code in OOB, this register may be already + * set by firmware. So we read this value out. + * if this value is 0, just let it be. + * */ + denali->bbtskipbytes = ioread32(denali->flash_reg + + SPARE_AREA_SKIP_BYTES); denali_irq_init(denali); denali_nand_reset(denali); denali_write32(0x0F, denali->flash_reg + RB_PIN_ENABLED); @@ -1465,29 +1459,18 @@ static void denali_hw_init(struct denali_nand_info *denali) denali_write32(1, denali->flash_reg + ECC_ENABLE); } -/* ECC layout for SLC devices. Denali spec indicates SLC fixed at 4 bytes */ -#define ECC_BYTES_SLC (4 * (2048 / ECC_SECTOR_SIZE)) -static struct nand_ecclayout nand_oob_slc = { - .eccbytes = 4, - .eccpos = { 0, 1, 2, 3 }, /* not used */ - .oobfree = { - { - .offset = ECC_BYTES_SLC, - .length = 64 - ECC_BYTES_SLC - } - } +/* Althogh controller spec said SLC ECC is forceb to be 4bit, + * but denali controller in MRST only support 15bit and 8bit ECC + * correction + * */ +#define ECC_8BITS 14 +static struct nand_ecclayout nand_8bit_oob = { + .eccbytes = 14, }; -#define ECC_BYTES_MLC (14 * (2048 / ECC_SECTOR_SIZE)) -static struct nand_ecclayout nand_oob_mlc_14bit = { - .eccbytes = 14, - .eccpos = { 0, 1, 2, 3, 5, 6, 7, 8, 9, 10, 11, 12, 13 }, /* not used */ - .oobfree = { - { - .offset = ECC_BYTES_MLC, - .length = 64 - ECC_BYTES_MLC - } - } +#define ECC_15BITS 26 +static struct nand_ecclayout nand_15bit_oob = { + .eccbytes = 26, }; static uint8_t bbt_pattern[] = {'B', 'b', 't', '0' }; @@ -1706,14 +1689,38 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali->nand.options |= NAND_USE_FLASH_BBT | NAND_SKIP_BBTSCAN; denali->nand.ecc.mode = NAND_ECC_HW_SYNDROME; - if (denali->nand.cellinfo & 0xc) { - denali->nand.ecc.layout = &nand_oob_mlc_14bit; - denali->nand.ecc.bytes = ECC_BYTES_MLC; - } else {/* SLC */ - denali->nand.ecc.layout = &nand_oob_slc; - denali->nand.ecc.bytes = ECC_BYTES_SLC; + /* Denali Controller only support 15bit and 8bit ECC in MRST, + * so just let controller do 15bit ECC for MLC and 8bit ECC for + * SLC if possible. + * */ + if (denali->nand.cellinfo & 0xc && + (denali->mtd.oobsize > (denali->bbtskipbytes + + ECC_15BITS * (denali->mtd.writesize / + ECC_SECTOR_SIZE)))) { + /* if MLC OOB size is large enough, use 15bit ECC*/ + denali->nand.ecc.layout = &nand_15bit_oob; + denali->nand.ecc.bytes = ECC_15BITS; + denali_write32(15, denali->flash_reg + ECC_CORRECTION); + } else if (denali->mtd.oobsize < (denali->bbtskipbytes + + ECC_8BITS * (denali->mtd.writesize / + ECC_SECTOR_SIZE))) { + printk(KERN_ERR "Your NAND chip OOB is not large enough to" + " contain 8bit ECC correction codes"); + goto failed_nand; + } else { + denali->nand.ecc.layout = &nand_8bit_oob; + denali->nand.ecc.bytes = ECC_8BITS; + denali_write32(8, denali->flash_reg + ECC_CORRECTION); } + denali->nand.ecc.layout->eccbytes *= + denali->mtd.writesize / ECC_SECTOR_SIZE; + denali->nand.ecc.layout->oobfree[0].offset = + denali->bbtskipbytes + denali->nand.ecc.layout->eccbytes; + denali->nand.ecc.layout->oobfree[0].length = + denali->mtd.oobsize - denali->nand.ecc.layout->eccbytes - + denali->bbtskipbytes; + /* Let driver know the total blocks number and * how many blocks contained by each nand chip. * blksperchip will help driver to know how many diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index fcac24199d12..bdf5c2af5000 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -767,6 +767,7 @@ struct denali_nand_info { uint32_t fwblks; /* represent how many blocks FW used */ uint32_t totalblks; uint32_t blksperchip; + uint32_t bbtskipbytes; }; #endif /*_LLD_NAND_*/ -- cgit v1.2.3 From 08b9ab9996c7e582f86da319f43d2dcb8ff55993 Mon Sep 17 00:00:00 2001 From: Chuanxiao Dong Date: Fri, 6 Aug 2010 18:19:09 +0800 Subject: mtd: denali: Add multi connected NAND support Signed-off-by: Chuanxiao Dong Signed-off-by: David Woodhouse --- drivers/mtd/nand/denali.c | 22 +++++++++++++++++++++- drivers/mtd/nand/denali.h | 1 + 2 files changed, 22 insertions(+), 1 deletion(-) diff --git a/drivers/mtd/nand/denali.c b/drivers/mtd/nand/denali.c index f20d1b14ea1d..1422edda3e71 100644 --- a/drivers/mtd/nand/denali.c +++ b/drivers/mtd/nand/denali.c @@ -1677,6 +1677,25 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) goto failed_nand; } + /* support for multi nand + * MTD known nothing about multi nand, + * so we should tell it the real pagesize + * and anything necessery + */ + denali->devnum = ioread32(denali->flash_reg + DEVICES_CONNECTED); + denali->nand.chipsize <<= (denali->devnum - 1); + denali->nand.page_shift += (denali->devnum - 1); + denali->nand.pagemask = (denali->nand.chipsize >> + denali->nand.page_shift) - 1; + denali->nand.bbt_erase_shift += (denali->devnum - 1); + denali->nand.phys_erase_shift = denali->nand.bbt_erase_shift; + denali->nand.chip_shift += (denali->devnum - 1); + denali->mtd.writesize <<= (denali->devnum - 1); + denali->mtd.oobsize <<= (denali->devnum - 1); + denali->mtd.erasesize <<= (denali->devnum - 1); + denali->mtd.size = denali->nand.numchips * denali->nand.chipsize; + denali->bbtskipbytes *= denali->devnum; + /* second stage of the NAND scan * this stage requires information regarding ECC and * bad block management. */ @@ -1713,6 +1732,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali_write32(8, denali->flash_reg + ECC_CORRECTION); } + denali->nand.ecc.bytes *= denali->devnum; denali->nand.ecc.layout->eccbytes *= denali->mtd.writesize / ECC_SECTOR_SIZE; denali->nand.ecc.layout->oobfree[0].offset = @@ -1738,7 +1758,7 @@ static int denali_pci_probe(struct pci_dev *dev, const struct pci_device_id *id) denali->nand.ecc.hwctl = denali_ecc_hwctl; /* override the default read operations */ - denali->nand.ecc.size = denali->mtd.writesize; + denali->nand.ecc.size = ECC_SECTOR_SIZE * denali->devnum; denali->nand.ecc.read_page = denali_read_page; denali->nand.ecc.read_page_raw = denali_read_page_raw; denali->nand.ecc.write_page = denali_write_page; diff --git a/drivers/mtd/nand/denali.h b/drivers/mtd/nand/denali.h index bdf5c2af5000..b680474e6333 100644 --- a/drivers/mtd/nand/denali.h +++ b/drivers/mtd/nand/denali.h @@ -764,6 +764,7 @@ struct denali_nand_info { int irq_debug_array[32]; int idx; + uint32_t devnum; /* represent how many nands connected */ uint32_t fwblks; /* represent how many blocks FW used */ uint32_t totalblks; uint32_t blksperchip; -- cgit v1.2.3 From 938cf997f998f3172e7cb9beafceccdec259b10d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 6 Aug 2010 15:53:04 +0200 Subject: mxc_nand: remove 0xe00 offset from registers Add the offset to the register base instead. This is done in preparation for v3 controller support. Signed-off-by: Sascha Hauer Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 36 ++++++++++++++++++------------------ 1 file changed, 18 insertions(+), 18 deletions(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index e8dc6468f8bc..f14f93392491 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -41,22 +41,22 @@ #define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21()) /* Addresses for NFC registers */ -#define NFC_BUF_SIZE 0xE00 -#define NFC_BUF_ADDR 0xE04 -#define NFC_FLASH_ADDR 0xE06 -#define NFC_FLASH_CMD 0xE08 -#define NFC_CONFIG 0xE0A -#define NFC_ECC_STATUS_RESULT 0xE0C -#define NFC_RSLTMAIN_AREA 0xE0E -#define NFC_RSLTSPARE_AREA 0xE10 -#define NFC_WRPROT 0xE12 -#define NFC_V1_UNLOCKSTART_BLKADDR 0xe14 -#define NFC_V1_UNLOCKEND_BLKADDR 0xe16 -#define NFC_V21_UNLOCKSTART_BLKADDR 0xe20 -#define NFC_V21_UNLOCKEND_BLKADDR 0xe22 -#define NFC_NF_WRPRST 0xE18 -#define NFC_CONFIG1 0xE1A -#define NFC_CONFIG2 0xE1C +#define NFC_BUF_SIZE 0x00 +#define NFC_BUF_ADDR 0x04 +#define NFC_FLASH_ADDR 0x06 +#define NFC_FLASH_CMD 0x08 +#define NFC_CONFIG 0x0a +#define NFC_ECC_STATUS_RESULT 0x0c +#define NFC_RSLTMAIN_AREA 0x0e +#define NFC_RSLTSPARE_AREA 0x10 +#define NFC_WRPROT 0x12 +#define NFC_V1_UNLOCKSTART_BLKADDR 0x14 +#define NFC_V1_UNLOCKEND_BLKADDR 0x16 +#define NFC_V21_UNLOCKSTART_BLKADDR 0x20 +#define NFC_V21_UNLOCKEND_BLKADDR 0x22 +#define NFC_NF_WRPRST 0x18 +#define NFC_CONFIG1 0x1a +#define NFC_CONFIG2 0x1c /* Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register * for Command operation */ @@ -764,14 +764,14 @@ static int __init mxcnd_probe(struct platform_device *pdev) host->main_area1 = host->base + 0x200; if (nfc_is_v21()) { - host->regs = host->base + 0x1000; + host->regs = host->base + 0x1e00; host->spare0 = host->base + 0x1000; host->spare_len = 64; oob_smallpage = &nandv2_hw_eccoob_smallpage; oob_largepage = &nandv2_hw_eccoob_largepage; this->ecc.bytes = 9; } else if (nfc_is_v1()) { - host->regs = host->base; + host->regs = host->base + 0xe00; host->spare0 = host->base + 0x800; host->spare_len = 16; oob_smallpage = &nandv1_hw_eccoob_smallpage; -- cgit v1.2.3 From c29c607afa2e94a43f249f19a2d3097e56aaedd7 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 6 Aug 2010 15:53:05 +0200 Subject: mxc_nand: rework get_dev_status We save/restore the value in the buffer anyway, so it makes no difference whether we use main_area0 or main_area1. So, we can use main_area0 and remove main_area1 from the driver which is otherwise unused. Also, clean up the comments in get_dev_status. Signed-off-by: Sascha Hauer Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index f14f93392491..b6aa7e3a967a 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -102,7 +102,6 @@ struct mxc_nand_host { void *spare0; void *main_area0; - void *main_area1; void __iomem *base; void __iomem *regs; @@ -305,25 +304,24 @@ static void send_read_id(struct mxc_nand_host *host) * NAND device status and returns the current status. */ static uint16_t get_dev_status(struct mxc_nand_host *host) { - void __iomem *main_buf = host->main_area1; + void __iomem *main_buf = host->main_area0; uint32_t store; uint16_t ret; - /* Issue status request to NAND device */ - /* store the main area1 first word, later do recovery */ + writew(0x0, NFC_V1_V2_BUF_ADDR); + + /* + * The device status is stored in main_area0. To + * prevent corruption of the buffer save the value + * and restore it afterwards. + */ store = readl(main_buf); - /* NANDFC buffer 1 is used for device status to prevent - * corruption of read/write buffer on status requests. */ - writew(1, host->regs + NFC_BUF_ADDR); writew(NFC_STATUS, host->regs + NFC_CONFIG2); - - /* Wait for operation to complete */ wait_op_done(host, true); - /* Status is placed in first word of main buffer */ - /* get status, then recovery area 1 data */ ret = readw(main_buf); + writel(store, main_buf); return ret; @@ -761,7 +759,6 @@ static int __init mxcnd_probe(struct platform_device *pdev) } host->main_area0 = host->base; - host->main_area1 = host->base + 0x200; if (nfc_is_v21()) { host->regs = host->base + 0x1e00; -- cgit v1.2.3 From 5f97304ef12b79f1a466971eefdf93ea3b2d341f Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 6 Aug 2010 15:53:06 +0200 Subject: mxc_nand: make some internally used functions overwriteable This patch prepares the driver to add v3 controller support later. The v3 controller is basically the same controller as v1 and v2, but with a completely different register layout. Signed-off-by: Sascha Hauer Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 72 +++++++++++++++++++++++++++------------------ 1 file changed, 44 insertions(+), 28 deletions(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index b6aa7e3a967a..5130a8531024 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -115,6 +115,13 @@ struct mxc_nand_host { uint8_t *data_buf; unsigned int buf_start; int spare_len; + + void (*preset)(struct mtd_info *); + void (*send_cmd)(struct mxc_nand_host *, uint16_t, int); + void (*send_addr)(struct mxc_nand_host *, uint16_t, int); + void (*send_page)(struct mtd_info *, unsigned int); + void (*send_read_id)(struct mxc_nand_host *); + uint16_t (*get_dev_status)(struct mxc_nand_host *); }; /* OOB placement block for use with hardware ecc generation */ @@ -212,7 +219,7 @@ static void wait_op_done(struct mxc_nand_host *host, int useirq) /* This function issues the specified command to the NAND device and * waits for completion. */ -static void send_cmd(struct mxc_nand_host *host, uint16_t cmd, int useirq) +static void send_cmd_v1_v2(struct mxc_nand_host *host, uint16_t cmd, int useirq) { DEBUG(MTD_DEBUG_LEVEL3, "send_cmd(host, 0x%x, %d)\n", cmd, useirq); @@ -241,7 +248,7 @@ static void send_cmd(struct mxc_nand_host *host, uint16_t cmd, int useirq) /* This function sends an address (or partial address) to the * NAND device. The address is used to select the source/destination for * a NAND command. */ -static void send_addr(struct mxc_nand_host *host, uint16_t addr, int islast) +static void send_addr_v1_v2(struct mxc_nand_host *host, uint16_t addr, int islast) { DEBUG(MTD_DEBUG_LEVEL3, "send_addr(host, 0x%x %d)\n", addr, islast); @@ -252,7 +259,7 @@ static void send_addr(struct mxc_nand_host *host, uint16_t addr, int islast) wait_op_done(host, islast); } -static void send_page(struct mtd_info *mtd, unsigned int ops) +static void send_page_v1_v2(struct mtd_info *mtd, unsigned int ops) { struct nand_chip *nand_chip = mtd->priv; struct mxc_nand_host *host = nand_chip->priv; @@ -276,7 +283,7 @@ static void send_page(struct mtd_info *mtd, unsigned int ops) } /* Request the NANDFC to perform a read of the NAND device ID. */ -static void send_read_id(struct mxc_nand_host *host) +static void send_read_id_v1_v2(struct mxc_nand_host *host) { struct nand_chip *this = &host->nand; @@ -302,7 +309,7 @@ static void send_read_id(struct mxc_nand_host *host) /* This function requests the NANDFC to perform a read of the * NAND device status and returns the current status. */ -static uint16_t get_dev_status(struct mxc_nand_host *host) +static uint16_t get_dev_status_v1_v2(struct mxc_nand_host *host) { void __iomem *main_buf = host->main_area0; uint32_t store; @@ -381,7 +388,7 @@ static u_char mxc_nand_read_byte(struct mtd_info *mtd) /* Check for status request */ if (host->status_request) - return get_dev_status(host) & 0xFF; + return host->get_dev_status(host) & 0xFF; ret = *(uint8_t *)(host->data_buf + host->buf_start); host->buf_start++; @@ -517,39 +524,39 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr) * we will used the saved column address to index into * the full page. */ - send_addr(host, 0, page_addr == -1); + host->send_addr(host, 0, page_addr == -1); if (mtd->writesize > 512) /* another col addr cycle for 2k page */ - send_addr(host, 0, false); + host->send_addr(host, 0, false); } /* Write out page address, if necessary */ if (page_addr != -1) { /* paddr_0 - p_addr_7 */ - send_addr(host, (page_addr & 0xff), false); + host->send_addr(host, (page_addr & 0xff), false); if (mtd->writesize > 512) { if (mtd->size >= 0x10000000) { /* paddr_8 - paddr_15 */ - send_addr(host, (page_addr >> 8) & 0xff, false); - send_addr(host, (page_addr >> 16) & 0xff, true); + host->send_addr(host, (page_addr >> 8) & 0xff, false); + host->send_addr(host, (page_addr >> 16) & 0xff, true); } else /* paddr_8 - paddr_15 */ - send_addr(host, (page_addr >> 8) & 0xff, true); + host->send_addr(host, (page_addr >> 8) & 0xff, true); } else { /* One more address cycle for higher density devices */ if (mtd->size >= 0x4000000) { /* paddr_8 - paddr_15 */ - send_addr(host, (page_addr >> 8) & 0xff, false); - send_addr(host, (page_addr >> 16) & 0xff, true); + host->send_addr(host, (page_addr >> 8) & 0xff, false); + host->send_addr(host, (page_addr >> 16) & 0xff, true); } else /* paddr_8 - paddr_15 */ - send_addr(host, (page_addr >> 8) & 0xff, true); + host->send_addr(host, (page_addr >> 8) & 0xff, true); } } } -static void preset(struct mtd_info *mtd) +static void preset_v1_v2(struct mtd_info *mtd) { struct nand_chip *nand_chip = mtd->priv; struct mxc_nand_host *host = nand_chip->priv; @@ -602,15 +609,15 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, /* Command pre-processing step */ switch (command) { case NAND_CMD_RESET: - preset(mtd); - send_cmd(host, command, false); + host->preset(mtd); + host->send_cmd(host, command, false); break; case NAND_CMD_STATUS: host->buf_start = 0; host->status_request = true; - send_cmd(host, command, true); + host->send_cmd(host, command, true); mxc_do_addr_cycle(mtd, column, page_addr); break; @@ -623,13 +630,13 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, command = NAND_CMD_READ0; /* only READ0 is valid */ - send_cmd(host, command, false); + host->send_cmd(host, command, false); mxc_do_addr_cycle(mtd, column, page_addr); if (mtd->writesize > 512) - send_cmd(host, NAND_CMD_READSTART, true); + host->send_cmd(host, NAND_CMD_READSTART, true); - send_page(mtd, NFC_OUTPUT); + host->send_page(mtd, NFC_OUTPUT); memcpy(host->data_buf, host->main_area0, mtd->writesize); copy_spare(mtd, true); @@ -642,28 +649,28 @@ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, host->buf_start = column; - send_cmd(host, command, false); + host->send_cmd(host, command, false); mxc_do_addr_cycle(mtd, column, page_addr); break; case NAND_CMD_PAGEPROG: memcpy(host->main_area0, host->data_buf, mtd->writesize); copy_spare(mtd, false); - send_page(mtd, NFC_INPUT); - send_cmd(host, command, true); + host->send_page(mtd, NFC_INPUT); + host->send_cmd(host, command, true); mxc_do_addr_cycle(mtd, column, page_addr); break; case NAND_CMD_READID: - send_cmd(host, command, true); + host->send_cmd(host, command, true); mxc_do_addr_cycle(mtd, column, page_addr); - send_read_id(host); + host->send_read_id(host); host->buf_start = column; break; case NAND_CMD_ERASE1: case NAND_CMD_ERASE2: - send_cmd(host, command, false); + host->send_cmd(host, command, false); mxc_do_addr_cycle(mtd, column, page_addr); break; @@ -760,6 +767,15 @@ static int __init mxcnd_probe(struct platform_device *pdev) host->main_area0 = host->base; + if (nfc_is_v1() || nfc_is_v21()) { + host->preset = preset_v1_v2; + host->send_cmd = send_cmd_v1_v2; + host->send_addr = send_addr_v1_v2; + host->send_page = send_page_v1_v2; + host->send_read_id = send_read_id_v1_v2; + host->get_dev_status = get_dev_status_v1_v2; + } + if (nfc_is_v21()) { host->regs = host->base + 0x1e00; host->spare0 = host->base + 0x1000; -- cgit v1.2.3 From 7aaf28ac02ff01f4202fc2e8a71ea33775da0f6f Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 6 Aug 2010 15:53:07 +0200 Subject: mxc_nand: factor out a check_int function Signed-off-by: Sascha Hauer Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 32 +++++++++++++++++++------------- 1 file changed, 19 insertions(+), 13 deletions(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 5130a8531024..ea491140e552 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -122,6 +122,7 @@ struct mxc_nand_host { void (*send_page)(struct mtd_info *, unsigned int); void (*send_read_id)(struct mxc_nand_host *); uint16_t (*get_dev_status)(struct mxc_nand_host *); + int (*check_int)(struct mxc_nand_host *); }; /* OOB placement block for use with hardware ecc generation */ @@ -181,34 +182,38 @@ static irqreturn_t mxc_nfc_irq(int irq, void *dev_id) return IRQ_HANDLED; } +static int check_int_v1_v2(struct mxc_nand_host *host) +{ + uint32_t tmp; + + tmp = readw(host->regs + NFC_CONFIG2); + if (!(tmp & NFC_INT)) + return 0; + + writew(tmp & ~NFC_INT, NFC_CONFIG2); + + return 1; +} + /* This function polls the NANDFC to wait for the basic operation to * complete by checking the INT bit of config2 register. */ static void wait_op_done(struct mxc_nand_host *host, int useirq) { - uint16_t tmp; int max_retries = 8000; if (useirq) { - if ((readw(host->regs + NFC_CONFIG2) & NFC_INT) == 0) { + if (!host->check_int(host)) { enable_irq(host->irq); - wait_event(host->irq_waitq, - readw(host->regs + NFC_CONFIG2) & NFC_INT); - - tmp = readw(host->regs + NFC_CONFIG2); - tmp &= ~NFC_INT; - writew(tmp, host->regs + NFC_CONFIG2); + wait_event(host->irq_waitq, host->check_int(host)); } } else { while (max_retries-- > 0) { - if (readw(host->regs + NFC_CONFIG2) & NFC_INT) { - tmp = readw(host->regs + NFC_CONFIG2); - tmp &= ~NFC_INT; - writew(tmp, host->regs + NFC_CONFIG2); + if (host->check_int(host)) break; - } + udelay(1); } if (max_retries < 0) @@ -774,6 +779,7 @@ static int __init mxcnd_probe(struct platform_device *pdev) host->send_page = send_page_v1_v2; host->send_read_id = send_read_id_v1_v2; host->get_dev_status = get_dev_status_v1_v2; + host->check_int = check_int_v1_v2; } if (nfc_is_v21()) { -- cgit v1.2.3 From 1bc991808da890313c7a23ebc07e68ad8e79f42e Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 6 Aug 2010 15:53:08 +0200 Subject: mxc_nand: add V1_V2 namespace to registers This prepares the driver for v3 support. The v3 controller has a completely different register layout, so add a V1_V2_ namespace to the register defines to avoid confusion with the v3 regs. Signed-off-by: Sascha Hauer Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 141 ++++++++++++++++++++------------------------ 1 file changed, 63 insertions(+), 78 deletions(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index ea491140e552..6d0fa4cd1ddf 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -41,58 +41,43 @@ #define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21()) /* Addresses for NFC registers */ -#define NFC_BUF_SIZE 0x00 -#define NFC_BUF_ADDR 0x04 -#define NFC_FLASH_ADDR 0x06 -#define NFC_FLASH_CMD 0x08 -#define NFC_CONFIG 0x0a -#define NFC_ECC_STATUS_RESULT 0x0c -#define NFC_RSLTMAIN_AREA 0x0e -#define NFC_RSLTSPARE_AREA 0x10 -#define NFC_WRPROT 0x12 -#define NFC_V1_UNLOCKSTART_BLKADDR 0x14 -#define NFC_V1_UNLOCKEND_BLKADDR 0x16 -#define NFC_V21_UNLOCKSTART_BLKADDR 0x20 -#define NFC_V21_UNLOCKEND_BLKADDR 0x22 -#define NFC_NF_WRPRST 0x18 -#define NFC_CONFIG1 0x1a -#define NFC_CONFIG2 0x1c - -/* Set INT to 0, FCMD to 1, rest to 0 in NFC_CONFIG2 Register - * for Command operation */ -#define NFC_CMD 0x1 - -/* Set INT to 0, FADD to 1, rest to 0 in NFC_CONFIG2 Register - * for Address operation */ -#define NFC_ADDR 0x2 - -/* Set INT to 0, FDI to 1, rest to 0 in NFC_CONFIG2 Register - * for Input operation */ -#define NFC_INPUT 0x4 - -/* Set INT to 0, FDO to 001, rest to 0 in NFC_CONFIG2 Register - * for Data Output operation */ -#define NFC_OUTPUT 0x8 - -/* Set INT to 0, FD0 to 010, rest to 0 in NFC_CONFIG2 Register - * for Read ID operation */ -#define NFC_ID 0x10 - -/* Set INT to 0, FDO to 100, rest to 0 in NFC_CONFIG2 Register - * for Read Status operation */ -#define NFC_STATUS 0x20 - -/* Set INT to 1, rest to 0 in NFC_CONFIG2 Register for Read - * Status operation */ -#define NFC_INT 0x8000 - -#define NFC_SP_EN (1 << 2) -#define NFC_ECC_EN (1 << 3) -#define NFC_INT_MSK (1 << 4) -#define NFC_BIG (1 << 5) -#define NFC_RST (1 << 6) -#define NFC_CE (1 << 7) -#define NFC_ONE_CYCLE (1 << 8) +#define NFC_V1_V2_BUF_SIZE (host->regs + 0x00) +#define NFC_V1_V2_BUF_ADDR (host->regs + 0x04) +#define NFC_V1_V2_FLASH_ADDR (host->regs + 0x06) +#define NFC_V1_V2_FLASH_CMD (host->regs + 0x08) +#define NFC_V1_V2_CONFIG (host->regs + 0x0a) +#define NFC_V1_V2_ECC_STATUS_RESULT (host->regs + 0x0c) +#define NFC_V1_V2_RSLTMAIN_AREA (host->regs + 0x0e) +#define NFC_V1_V2_RSLTSPARE_AREA (host->regs + 0x10) +#define NFC_V1_V2_WRPROT (host->regs + 0x12) +#define NFC_V1_UNLOCKSTART_BLKADDR (host->regs + 0x14) +#define NFC_V1_UNLOCKEND_BLKADDR (host->regs + 0x16) +#define NFC_V21_UNLOCKSTART_BLKADDR (host->regs + 0x20) +#define NFC_V21_UNLOCKEND_BLKADDR (host->regs + 0x22) +#define NFC_V1_V2_NF_WRPRST (host->regs + 0x18) +#define NFC_V1_V2_CONFIG1 (host->regs + 0x1a) +#define NFC_V1_V2_CONFIG2 (host->regs + 0x1c) + +#define NFC_V1_V2_CONFIG1_SP_EN (1 << 2) +#define NFC_V1_V2_CONFIG1_ECC_EN (1 << 3) +#define NFC_V1_V2_CONFIG1_INT_MSK (1 << 4) +#define NFC_V1_V2_CONFIG1_BIG (1 << 5) +#define NFC_V1_V2_CONFIG1_RST (1 << 6) +#define NFC_V1_V2_CONFIG1_CE (1 << 7) +#define NFC_V1_V2_CONFIG1_ONE_CYCLE (1 << 8) + +#define NFC_V1_V2_CONFIG2_INT (1 << 15) + +/* + * Operation modes for the NFC. Valid for v1, v2 and v3 + * type controllers. + */ +#define NFC_CMD (1 << 0) +#define NFC_ADDR (1 << 1) +#define NFC_INPUT (1 << 2) +#define NFC_OUTPUT (1 << 3) +#define NFC_ID (1 << 4) +#define NFC_STATUS (1 << 5) struct mxc_nand_host { struct mtd_info mtd; @@ -186,11 +171,11 @@ static int check_int_v1_v2(struct mxc_nand_host *host) { uint32_t tmp; - tmp = readw(host->regs + NFC_CONFIG2); - if (!(tmp & NFC_INT)) + tmp = readw(NFC_V1_V2_CONFIG2); + if (!(tmp & NFC_V1_V2_CONFIG2_INT)) return 0; - writew(tmp & ~NFC_INT, NFC_CONFIG2); + writew(tmp & ~NFC_V1_V2_CONFIG2_INT, NFC_V1_V2_CONFIG2); return 1; } @@ -228,15 +213,15 @@ static void send_cmd_v1_v2(struct mxc_nand_host *host, uint16_t cmd, int useirq) { DEBUG(MTD_DEBUG_LEVEL3, "send_cmd(host, 0x%x, %d)\n", cmd, useirq); - writew(cmd, host->regs + NFC_FLASH_CMD); - writew(NFC_CMD, host->regs + NFC_CONFIG2); + writew(cmd, NFC_V1_V2_FLASH_CMD); + writew(NFC_CMD, NFC_V1_V2_CONFIG2); if (cpu_is_mx21() && (cmd == NAND_CMD_RESET)) { int max_retries = 100; /* Reset completion is indicated by NFC_CONFIG2 */ /* being set to 0 */ while (max_retries-- > 0) { - if (readw(host->regs + NFC_CONFIG2) == 0) { + if (readw(NFC_V1_V2_CONFIG2) == 0) { break; } udelay(1); @@ -257,8 +242,8 @@ static void send_addr_v1_v2(struct mxc_nand_host *host, uint16_t addr, int islas { DEBUG(MTD_DEBUG_LEVEL3, "send_addr(host, 0x%x %d)\n", addr, islast); - writew(addr, host->regs + NFC_FLASH_ADDR); - writew(NFC_ADDR, host->regs + NFC_CONFIG2); + writew(addr, NFC_V1_V2_FLASH_ADDR); + writew(NFC_ADDR, NFC_V1_V2_CONFIG2); /* Wait for operation to complete */ wait_op_done(host, islast); @@ -278,9 +263,9 @@ static void send_page_v1_v2(struct mtd_info *mtd, unsigned int ops) for (i = 0; i < bufs; i++) { /* NANDFC buffer 0 is used for page read/write */ - writew(i, host->regs + NFC_BUF_ADDR); + writew(i, NFC_V1_V2_BUF_ADDR); - writew(ops, host->regs + NFC_CONFIG2); + writew(ops, NFC_V1_V2_CONFIG2); /* Wait for operation to complete */ wait_op_done(host, true); @@ -293,9 +278,9 @@ static void send_read_id_v1_v2(struct mxc_nand_host *host) struct nand_chip *this = &host->nand; /* NANDFC buffer 0 is used for device ID output */ - writew(0x0, host->regs + NFC_BUF_ADDR); + writew(0x0, NFC_V1_V2_BUF_ADDR); - writew(NFC_ID, host->regs + NFC_CONFIG2); + writew(NFC_ID, NFC_V1_V2_CONFIG2); /* Wait for operation to complete */ wait_op_done(host, true); @@ -329,7 +314,7 @@ static uint16_t get_dev_status_v1_v2(struct mxc_nand_host *host) */ store = readl(main_buf); - writew(NFC_STATUS, host->regs + NFC_CONFIG2); + writew(NFC_STATUS, NFC_V1_V2_CONFIG2); wait_op_done(host, true); ret = readw(main_buf); @@ -368,7 +353,7 @@ static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat, * additional correction. 2-Bit errors cannot be corrected by * HW ECC, so we need to return failure */ - uint16_t ecc_status = readw(host->regs + NFC_ECC_STATUS_RESULT); + uint16_t ecc_status = readw(NFC_V1_V2_ECC_STATUS_RESULT); if (((ecc_status & 0x3) == 2) || ((ecc_status >> 2) == 2)) { DEBUG(MTD_DEBUG_LEVEL0, @@ -568,32 +553,32 @@ static void preset_v1_v2(struct mtd_info *mtd) uint16_t tmp; /* enable interrupt, disable spare enable */ - tmp = readw(host->regs + NFC_CONFIG1); - tmp &= ~NFC_INT_MSK; - tmp &= ~NFC_SP_EN; + tmp = readw(NFC_V1_V2_CONFIG1); + tmp &= ~NFC_V1_V2_CONFIG1_INT_MSK; + tmp &= ~NFC_V1_V2_CONFIG1_SP_EN; if (nand_chip->ecc.mode == NAND_ECC_HW) { - tmp |= NFC_ECC_EN; + tmp |= NFC_V1_V2_CONFIG1_ECC_EN; } else { - tmp &= ~NFC_ECC_EN; + tmp &= ~NFC_V1_V2_CONFIG1_ECC_EN; } - writew(tmp, host->regs + NFC_CONFIG1); + writew(tmp, NFC_V1_V2_CONFIG1); /* preset operation */ /* Unlock the internal RAM Buffer */ - writew(0x2, host->regs + NFC_CONFIG); + writew(0x2, NFC_V1_V2_CONFIG); /* Blocks to be unlocked */ if (nfc_is_v21()) { - writew(0x0, host->regs + NFC_V21_UNLOCKSTART_BLKADDR); - writew(0xffff, host->regs + NFC_V21_UNLOCKEND_BLKADDR); + writew(0x0, NFC_V21_UNLOCKSTART_BLKADDR); + writew(0xffff, NFC_V21_UNLOCKEND_BLKADDR); } else if (nfc_is_v1()) { - writew(0x0, host->regs + NFC_V1_UNLOCKSTART_BLKADDR); - writew(0x4000, host->regs + NFC_V1_UNLOCKEND_BLKADDR); + writew(0x0, NFC_V1_UNLOCKSTART_BLKADDR); + writew(0x4000, NFC_V1_UNLOCKEND_BLKADDR); } else BUG(); /* Unlock Block Command for given address range */ - writew(0x4, host->regs + NFC_WRPROT); + writew(0x4, NFC_V1_V2_WRPROT); } /* Used by the upper layer to write command to NAND Flash for -- cgit v1.2.3 From 94f77e50d658be1d3ff23fb65e4d075a6f4ebee3 Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 6 Aug 2010 15:53:09 +0200 Subject: mxc_nand: fix correct_data function The v2 controller has a totally different mechanism to check whether the data we read had ecc errors or not. Implement this. The mechanism in the v2 controller happens to be identical to the v3 controller. Signed-off-by: Sascha Hauer Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 42 ++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 40 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 6d0fa4cd1ddf..f5fd25461a09 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -94,6 +94,7 @@ struct mxc_nand_host { struct clk *clk; int clk_act; int irq; + int eccsize; wait_queue_head_t irq_waitq; @@ -342,7 +343,7 @@ static void mxc_nand_enable_hwecc(struct mtd_info *mtd, int mode) */ } -static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat, +static int mxc_nand_correct_data_v1(struct mtd_info *mtd, u_char *dat, u_char *read_ecc, u_char *calc_ecc) { struct nand_chip *nand_chip = mtd->priv; @@ -364,6 +365,40 @@ static int mxc_nand_correct_data(struct mtd_info *mtd, u_char *dat, return 0; } +static int mxc_nand_correct_data_v2_v3(struct mtd_info *mtd, u_char *dat, + u_char *read_ecc, u_char *calc_ecc) +{ + struct nand_chip *nand_chip = mtd->priv; + struct mxc_nand_host *host = nand_chip->priv; + u32 ecc_stat, err; + int no_subpages = 1; + int ret = 0; + u8 ecc_bit_mask, err_limit; + + ecc_bit_mask = (host->eccsize == 4) ? 0x7 : 0xf; + err_limit = (host->eccsize == 4) ? 0x4 : 0x8; + + no_subpages = mtd->writesize >> 9; + + ecc_stat = readl(NFC_V1_V2_ECC_STATUS_RESULT); + + do { + err = ecc_stat & ecc_bit_mask; + if (err > err_limit) { + printk(KERN_WARNING "UnCorrectable RS-ECC Error\n"); + return -1; + } else { + ret += err; + } + ecc_stat >>= 4; + } while (--no_subpages); + + mtd->ecc_stats.corrected += ret; + pr_debug("%d Symbol Correctable RS-ECC Error\n", ret); + + return ret; +} + static int mxc_nand_calculate_ecc(struct mtd_info *mtd, const u_char *dat, u_char *ecc_code) { @@ -790,7 +825,10 @@ static int __init mxcnd_probe(struct platform_device *pdev) if (pdata->hw_ecc) { this->ecc.calculate = mxc_nand_calculate_ecc; this->ecc.hwctl = mxc_nand_enable_hwecc; - this->ecc.correct = mxc_nand_correct_data; + if (nfc_is_v1()) + this->ecc.correct = mxc_nand_correct_data_v1; + else + this->ecc.correct = mxc_nand_correct_data_v2_v3; this->ecc.mode = NAND_ECC_HW; } else { this->ecc.mode = NAND_ECC_SOFT; -- cgit v1.2.3 From 6e85dfdc19ef526edec285aed47c83934882e9bd Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 6 Aug 2010 15:53:10 +0200 Subject: mxc_nand: support 8bit ecc Nand devices with at least 26 bytes of oob data per 512 byte block can have 8bit ecc on v2 type controllers. This is currently not tested, but at least this patch puts the ECC_MODE bit into a well defined state. Signed-off-by: Sascha Hauer Signed-off-by: David Woodhouse --- drivers/mtd/nand/mxc_nand.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index f5fd25461a09..1433a8389109 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -58,6 +58,7 @@ #define NFC_V1_V2_CONFIG1 (host->regs + 0x1a) #define NFC_V1_V2_CONFIG2 (host->regs + 0x1c) +#define NFC_V2_CONFIG1_ECC_MODE_4 (1 << 0) #define NFC_V1_V2_CONFIG1_SP_EN (1 << 2) #define NFC_V1_V2_CONFIG1_ECC_EN (1 << 3) #define NFC_V1_V2_CONFIG1_INT_MSK (1 << 4) @@ -581,6 +582,23 @@ static void mxc_do_addr_cycle(struct mtd_info *mtd, int column, int page_addr) } } +/* + * v2 and v3 type controllers can do 4bit or 8bit ecc depending + * on how much oob the nand chip has. For 8bit ecc we need at least + * 26 bytes of oob data per 512 byte block. + */ +static int get_eccsize(struct mtd_info *mtd) +{ + int oobbytes_per_512 = 0; + + oobbytes_per_512 = mtd->oobsize * 512 / mtd->writesize; + + if (oobbytes_per_512 < 26) + return 4; + else + return 8; +} + static void preset_v1_v2(struct mtd_info *mtd) { struct nand_chip *nand_chip = mtd->priv; @@ -596,6 +614,15 @@ static void preset_v1_v2(struct mtd_info *mtd) } else { tmp &= ~NFC_V1_V2_CONFIG1_ECC_EN; } + + if (nfc_is_v21() && mtd->writesize) { + host->eccsize = get_eccsize(mtd); + if (host->eccsize == 4) + tmp |= NFC_V2_CONFIG1_ECC_MODE_4; + } else { + host->eccsize = 1; + } + writew(tmp, NFC_V1_V2_CONFIG1); /* preset operation */ @@ -859,6 +886,9 @@ static int __init mxcnd_probe(struct platform_device *pdev) goto escan; } + /* Call preset again, with correct writesize this time */ + host->preset(mtd); + if (mtd->writesize == 2048) this->ecc.layout = oob_largepage; -- cgit v1.2.3 From 71ec51554a2c22ff03c7aac6866cdf395099994d Mon Sep 17 00:00:00 2001 From: Sascha Hauer Date: Fri, 6 Aug 2010 15:53:11 +0200 Subject: mxc_nand: Add v3 (i.MX51) Support Signed-off-by: Sascha Hauer Signed-off-by: David Woodhouse --- drivers/mtd/nand/Kconfig | 2 +- drivers/mtd/nand/mxc_nand.c | 222 +++++++++++++++++++++++++++++++++++++++++++- 2 files changed, 222 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 1d69920a2c93..79afdc1b3377 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig @@ -481,7 +481,7 @@ config MTD_NAND_MPC5121_NFC config MTD_NAND_MXC tristate "MXC NAND support" - depends on ARCH_MX2 || ARCH_MX25 || ARCH_MX3 + depends on ARCH_MX2 || ARCH_MX25 || ARCH_MX3 || ARCH_MX51 help This enables the driver for the NAND flash controller on the MXC processors. diff --git a/drivers/mtd/nand/mxc_nand.c b/drivers/mtd/nand/mxc_nand.c index 1433a8389109..3657a6eb026f 100644 --- a/drivers/mtd/nand/mxc_nand.c +++ b/drivers/mtd/nand/mxc_nand.c @@ -39,6 +39,8 @@ #define nfc_is_v21() (cpu_is_mx25() || cpu_is_mx35()) #define nfc_is_v1() (cpu_is_mx31() || cpu_is_mx27() || cpu_is_mx21()) +#define nfc_is_v3_2() cpu_is_mx51() +#define nfc_is_v3() nfc_is_v3_2() /* Addresses for NFC registers */ #define NFC_V1_V2_BUF_SIZE (host->regs + 0x00) @@ -80,6 +82,54 @@ #define NFC_ID (1 << 4) #define NFC_STATUS (1 << 5) +#define NFC_V3_FLASH_CMD (host->regs_axi + 0x00) +#define NFC_V3_FLASH_ADDR0 (host->regs_axi + 0x04) + +#define NFC_V3_CONFIG1 (host->regs_axi + 0x34) +#define NFC_V3_CONFIG1_SP_EN (1 << 0) +#define NFC_V3_CONFIG1_RBA(x) (((x) & 0x7 ) << 4) + +#define NFC_V3_ECC_STATUS_RESULT (host->regs_axi + 0x38) + +#define NFC_V3_LAUNCH (host->regs_axi + 0x40) + +#define NFC_V3_WRPROT (host->regs_ip + 0x0) +#define NFC_V3_WRPROT_LOCK_TIGHT (1 << 0) +#define NFC_V3_WRPROT_LOCK (1 << 1) +#define NFC_V3_WRPROT_UNLOCK (1 << 2) +#define NFC_V3_WRPROT_BLS_UNLOCK (2 << 6) + +#define NFC_V3_WRPROT_UNLOCK_BLK_ADD0 (host->regs_ip + 0x04) + +#define NFC_V3_CONFIG2 (host->regs_ip + 0x24) +#define NFC_V3_CONFIG2_PS_512 (0 << 0) +#define NFC_V3_CONFIG2_PS_2048 (1 << 0) +#define NFC_V3_CONFIG2_PS_4096 (2 << 0) +#define NFC_V3_CONFIG2_ONE_CYCLE (1 << 2) +#define NFC_V3_CONFIG2_ECC_EN (1 << 3) +#define NFC_V3_CONFIG2_2CMD_PHASES (1 << 4) +#define NFC_V3_CONFIG2_NUM_ADDR_PHASE0 (1 << 5) +#define NFC_V3_CONFIG2_ECC_MODE_8 (1 << 6) +#define NFC_V3_CONFIG2_PPB(x) (((x) & 0x3) << 7) +#define NFC_V3_CONFIG2_NUM_ADDR_PHASE1(x) (((x) & 0x3) << 12) +#define NFC_V3_CONFIG2_INT_MSK (1 << 15) +#define NFC_V3_CONFIG2_ST_CMD(x) (((x) & 0xff) << 24) +#define NFC_V3_CONFIG2_SPAS(x) (((x) & 0xff) << 16) + +#define NFC_V3_CONFIG3 (host->regs_ip + 0x28) +#define NFC_V3_CONFIG3_ADD_OP(x) (((x) & 0x3) << 0) +#define NFC_V3_CONFIG3_FW8 (1 << 3) +#define NFC_V3_CONFIG3_SBB(x) (((x) & 0x7) << 8) +#define NFC_V3_CONFIG3_NUM_OF_DEVICES(x) (((x) & 0x7) << 12) +#define NFC_V3_CONFIG3_RBB_MODE (1 << 15) +#define NFC_V3_CONFIG3_NO_SDMA (1 << 20) + +#define NFC_V3_IPC (host->regs_ip + 0x2C) +#define NFC_V3_IPC_CREQ (1 << 0) +#define NFC_V3_IPC_INT (1 << 31) + +#define NFC_V3_DELAY_LINE (host->regs_ip + 0x34) + struct mxc_nand_host { struct mtd_info mtd; struct nand_chip nand; @@ -91,6 +141,8 @@ struct mxc_nand_host { void __iomem *base; void __iomem *regs; + void __iomem *regs_axi; + void __iomem *regs_ip; int status_request; struct clk *clk; int clk_act; @@ -169,6 +221,20 @@ static irqreturn_t mxc_nfc_irq(int irq, void *dev_id) return IRQ_HANDLED; } +static int check_int_v3(struct mxc_nand_host *host) +{ + uint32_t tmp; + + tmp = readl(NFC_V3_IPC); + if (!(tmp & NFC_V3_IPC_INT)) + return 0; + + tmp &= ~NFC_V3_IPC_INT; + writel(tmp, NFC_V3_IPC); + + return 1; +} + static int check_int_v1_v2(struct mxc_nand_host *host) { uint32_t tmp; @@ -209,6 +275,18 @@ static void wait_op_done(struct mxc_nand_host *host, int useirq) } } +static void send_cmd_v3(struct mxc_nand_host *host, uint16_t cmd, int useirq) +{ + /* fill command */ + writel(cmd, NFC_V3_FLASH_CMD); + + /* send out command */ + writel(NFC_CMD, NFC_V3_LAUNCH); + + /* Wait for operation to complete */ + wait_op_done(host, useirq); +} + /* This function issues the specified command to the NAND device and * waits for completion. */ static void send_cmd_v1_v2(struct mxc_nand_host *host, uint16_t cmd, int useirq) @@ -237,6 +315,17 @@ static void send_cmd_v1_v2(struct mxc_nand_host *host, uint16_t cmd, int useirq) } } +static void send_addr_v3(struct mxc_nand_host *host, uint16_t addr, int islast) +{ + /* fill address */ + writel(addr, NFC_V3_FLASH_ADDR0); + + /* send out address */ + writel(NFC_ADDR, NFC_V3_LAUNCH); + + wait_op_done(host, 0); +} + /* This function sends an address (or partial address) to the * NAND device. The address is used to select the source/destination for * a NAND command. */ @@ -251,6 +340,22 @@ static void send_addr_v1_v2(struct mxc_nand_host *host, uint16_t addr, int islas wait_op_done(host, islast); } +static void send_page_v3(struct mtd_info *mtd, unsigned int ops) +{ + struct nand_chip *nand_chip = mtd->priv; + struct mxc_nand_host *host = nand_chip->priv; + uint32_t tmp; + + tmp = readl(NFC_V3_CONFIG1); + tmp &= ~(7 << 4); + writel(tmp, NFC_V3_CONFIG1); + + /* transfer data from NFC ram to nand */ + writel(ops, NFC_V3_LAUNCH); + + wait_op_done(host, false); +} + static void send_page_v1_v2(struct mtd_info *mtd, unsigned int ops) { struct nand_chip *nand_chip = mtd->priv; @@ -274,6 +379,16 @@ static void send_page_v1_v2(struct mtd_info *mtd, unsigned int ops) } } +static void send_read_id_v3(struct mxc_nand_host *host) +{ + /* Read ID into main buffer */ + writel(NFC_ID, NFC_V3_LAUNCH); + + wait_op_done(host, true); + + memcpy(host->data_buf, host->main_area0, 16); +} + /* Request the NANDFC to perform a read of the NAND device ID. */ static void send_read_id_v1_v2(struct mxc_nand_host *host) { @@ -299,6 +414,14 @@ static void send_read_id_v1_v2(struct mxc_nand_host *host) memcpy(host->data_buf, host->main_area0, 16); } +static uint16_t get_dev_status_v3(struct mxc_nand_host *host) +{ + writew(NFC_STATUS, NFC_V3_LAUNCH); + wait_op_done(host, true); + + return readl(NFC_V3_CONFIG1) >> 16; +} + /* This function requests the NANDFC to perform a read of the * NAND device status and returns the current status. */ static uint16_t get_dev_status_v1_v2(struct mxc_nand_host *host) @@ -381,7 +504,10 @@ static int mxc_nand_correct_data_v2_v3(struct mtd_info *mtd, u_char *dat, no_subpages = mtd->writesize >> 9; - ecc_stat = readl(NFC_V1_V2_ECC_STATUS_RESULT); + if (nfc_is_v21()) + ecc_stat = readl(NFC_V1_V2_ECC_STATUS_RESULT); + else + ecc_stat = readl(NFC_V3_ECC_STATUS_RESULT); do { err = ecc_stat & ecc_bit_mask; @@ -643,6 +769,72 @@ static void preset_v1_v2(struct mtd_info *mtd) writew(0x4, NFC_V1_V2_WRPROT); } +static void preset_v3(struct mtd_info *mtd) +{ + struct nand_chip *chip = mtd->priv; + struct mxc_nand_host *host = chip->priv; + uint32_t config2, config3; + int i, addr_phases; + + writel(NFC_V3_CONFIG1_RBA(0), NFC_V3_CONFIG1); + writel(NFC_V3_IPC_CREQ, NFC_V3_IPC); + + /* Unlock the internal RAM Buffer */ + writel(NFC_V3_WRPROT_BLS_UNLOCK | NFC_V3_WRPROT_UNLOCK, + NFC_V3_WRPROT); + + /* Blocks to be unlocked */ + for (i = 0; i < NAND_MAX_CHIPS; i++) + writel(0x0 | (0xffff << 16), + NFC_V3_WRPROT_UNLOCK_BLK_ADD0 + (i << 2)); + + writel(0, NFC_V3_IPC); + + config2 = NFC_V3_CONFIG2_ONE_CYCLE | + NFC_V3_CONFIG2_2CMD_PHASES | + NFC_V3_CONFIG2_SPAS(mtd->oobsize >> 1) | + NFC_V3_CONFIG2_ST_CMD(0x70) | + NFC_V3_CONFIG2_NUM_ADDR_PHASE0; + + if (chip->ecc.mode == NAND_ECC_HW) + config2 |= NFC_V3_CONFIG2_ECC_EN; + + addr_phases = fls(chip->pagemask) >> 3; + + if (mtd->writesize == 2048) { + config2 |= NFC_V3_CONFIG2_PS_2048; + config2 |= NFC_V3_CONFIG2_NUM_ADDR_PHASE1(addr_phases); + } else if (mtd->writesize == 4096) { + config2 |= NFC_V3_CONFIG2_PS_4096; + config2 |= NFC_V3_CONFIG2_NUM_ADDR_PHASE1(addr_phases); + } else { + config2 |= NFC_V3_CONFIG2_PS_512; + config2 |= NFC_V3_CONFIG2_NUM_ADDR_PHASE1(addr_phases - 1); + } + + if (mtd->writesize) { + config2 |= NFC_V3_CONFIG2_PPB(ffs(mtd->erasesize / mtd->writesize) - 6); + host->eccsize = get_eccsize(mtd); + if (host->eccsize == 8) + config2 |= NFC_V3_CONFIG2_ECC_MODE_8; + } + + writel(config2, NFC_V3_CONFIG2); + + config3 = NFC_V3_CONFIG3_NUM_OF_DEVICES(0) | + NFC_V3_CONFIG3_NO_SDMA | + NFC_V3_CONFIG3_RBB_MODE | + NFC_V3_CONFIG3_SBB(6) | /* Reset default */ + NFC_V3_CONFIG3_ADD_OP(0); + + if (!(chip->options & NAND_BUSWIDTH_16)) + config3 |= NFC_V3_CONFIG3_FW8; + + writel(config3, NFC_V3_CONFIG3); + + writel(0, NFC_V3_DELAY_LINE); +} + /* Used by the upper layer to write command to NAND Flash for * different operations to be carried out on NAND Flash */ static void mxc_nand_command(struct mtd_info *mtd, unsigned command, @@ -843,6 +1035,30 @@ static int __init mxcnd_probe(struct platform_device *pdev) oob_smallpage = &nandv1_hw_eccoob_smallpage; oob_largepage = &nandv1_hw_eccoob_largepage; this->ecc.bytes = 3; + host->eccsize = 1; + } else if (nfc_is_v3_2()) { + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) { + err = -ENODEV; + goto eirq; + } + host->regs_ip = ioremap(res->start, resource_size(res)); + if (!host->regs_ip) { + err = -ENOMEM; + goto eirq; + } + host->regs_axi = host->base + 0x1e00; + host->spare0 = host->base + 0x1000; + host->spare_len = 64; + host->preset = preset_v3; + host->send_cmd = send_cmd_v3; + host->send_addr = send_addr_v3; + host->send_page = send_page_v3; + host->send_read_id = send_read_id_v3; + host->check_int = check_int_v3; + host->get_dev_status = get_dev_status_v3; + oob_smallpage = &nandv2_hw_eccoob_smallpage; + oob_largepage = &nandv2_hw_eccoob_largepage; } else BUG(); @@ -918,6 +1134,8 @@ static int __init mxcnd_probe(struct platform_device *pdev) escan: free_irq(host->irq, host); eirq: + if (host->regs_ip) + iounmap(host->regs_ip); iounmap(host->base); eres: clk_put(host->clk); @@ -937,6 +1155,8 @@ static int __devexit mxcnd_remove(struct platform_device *pdev) nand_release(&host->mtd); free_irq(host->irq, host); + if (host->regs_ip) + iounmap(host->regs_ip); iounmap(host->base); kfree(host); -- cgit v1.2.3 From 73ee5760253dc8893502e19a9cb118d25dab21ec Mon Sep 17 00:00:00 2001 From: Christian Dietrich Date: Fri, 16 Jul 2010 14:29:08 +0200 Subject: mtd: remove redwood map driver Removing the redwood mtd mapping driver, because all REDWOOD_[456] configuration options were removed from the kernel, because they weren't referenced anywhere. Signed-off-by: Christian Dietrich Signed-off-by: David Woodhouse --- drivers/mtd/maps/Kconfig | 8 --- drivers/mtd/maps/Makefile | 1 - drivers/mtd/maps/redwood.c | 174 --------------------------------------------- 3 files changed, 183 deletions(-) delete mode 100644 drivers/mtd/maps/redwood.c diff --git a/drivers/mtd/maps/Kconfig b/drivers/mtd/maps/Kconfig index f22bc9f05ddb..701d942c6795 100644 --- a/drivers/mtd/maps/Kconfig +++ b/drivers/mtd/maps/Kconfig @@ -319,14 +319,6 @@ config MTD_CFI_FLAGADM Mapping for the Flaga digital module. If you don't have one, ignore this setting. -config MTD_REDWOOD - tristate "CFI Flash devices mapped on IBM Redwood" - depends on MTD_CFI && ( REDWOOD_4 || REDWOOD_5 || REDWOOD_6 ) - help - This enables access routines for the flash chips on the IBM - Redwood board. If you have one of these boards and would like to - use the flash chips on it, say 'Y'. - config MTD_SOLUTIONENGINE tristate "CFI Flash device mapped on Hitachi SolutionEngine" depends on SUPERH && SOLUTION_ENGINE && MTD_CFI && MTD_REDBOOT_PARTS diff --git a/drivers/mtd/maps/Makefile b/drivers/mtd/maps/Makefile index bb035cd54c72..f216bb573713 100644 --- a/drivers/mtd/maps/Makefile +++ b/drivers/mtd/maps/Makefile @@ -44,7 +44,6 @@ obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o obj-$(CONFIG_MTD_EDB7312) += edb7312.o obj-$(CONFIG_MTD_IMPA7) += impa7.o obj-$(CONFIG_MTD_FORTUNET) += fortunet.o -obj-$(CONFIG_MTD_REDWOOD) += redwood.o obj-$(CONFIG_MTD_UCLINUX) += uclinux.o obj-$(CONFIG_MTD_NETtel) += nettel.o obj-$(CONFIG_MTD_SCB2_FLASH) += scb2_flash.o diff --git a/drivers/mtd/maps/redwood.c b/drivers/mtd/maps/redwood.c deleted file mode 100644 index 933c0b63b016..000000000000 --- a/drivers/mtd/maps/redwood.c +++ /dev/null @@ -1,174 +0,0 @@ -/* - * drivers/mtd/maps/redwood.c - * - * FLASH map for the IBM Redwood 4/5/6 boards. - * - * Author: MontaVista Software, Inc. - * - * 2001-2003 (c) MontaVista, Software, Inc. This file is licensed under - * the terms of the GNU General Public License version 2. This program - * is licensed "as is" without any warranty of any kind, whether express - * or implied. - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include - -#if !defined (CONFIG_REDWOOD_6) - -#define WINDOW_ADDR 0xffc00000 -#define WINDOW_SIZE 0x00400000 - -#define RW_PART0_OF 0 -#define RW_PART0_SZ 0x10000 -#define RW_PART1_OF RW_PART0_SZ -#define RW_PART1_SZ 0x200000 - 0x10000 -#define RW_PART2_OF 0x200000 -#define RW_PART2_SZ 0x10000 -#define RW_PART3_OF 0x210000 -#define RW_PART3_SZ 0x200000 - (0x10000 + 0x20000) -#define RW_PART4_OF 0x3e0000 -#define RW_PART4_SZ 0x20000 - -static struct mtd_partition redwood_flash_partitions[] = { - { - .name = "Redwood OpenBIOS Vital Product Data", - .offset = RW_PART0_OF, - .size = RW_PART0_SZ, - .mask_flags = MTD_WRITEABLE /* force read-only */ - }, - { - .name = "Redwood kernel", - .offset = RW_PART1_OF, - .size = RW_PART1_SZ - }, - { - .name = "Redwood OpenBIOS non-volatile storage", - .offset = RW_PART2_OF, - .size = RW_PART2_SZ, - .mask_flags = MTD_WRITEABLE /* force read-only */ - }, - { - .name = "Redwood filesystem", - .offset = RW_PART3_OF, - .size = RW_PART3_SZ - }, - { - .name = "Redwood OpenBIOS", - .offset = RW_PART4_OF, - .size = RW_PART4_SZ, - .mask_flags = MTD_WRITEABLE /* force read-only */ - } -}; - -#else /* CONFIG_REDWOOD_6 */ -/* FIXME: the window is bigger - armin */ -#define WINDOW_ADDR 0xff800000 -#define WINDOW_SIZE 0x00800000 - -#define RW_PART0_OF 0 -#define RW_PART0_SZ 0x400000 /* 4 MiB data */ -#define RW_PART1_OF RW_PART0_OF + RW_PART0_SZ -#define RW_PART1_SZ 0x10000 /* 64K VPD */ -#define RW_PART2_OF RW_PART1_OF + RW_PART1_SZ -#define RW_PART2_SZ 0x400000 - (0x10000 + 0x20000) -#define RW_PART3_OF RW_PART2_OF + RW_PART2_SZ -#define RW_PART3_SZ 0x20000 - -static struct mtd_partition redwood_flash_partitions[] = { - { - .name = "Redwood filesystem", - .offset = RW_PART0_OF, - .size = RW_PART0_SZ - }, - { - .name = "Redwood OpenBIOS Vital Product Data", - .offset = RW_PART1_OF, - .size = RW_PART1_SZ, - .mask_flags = MTD_WRITEABLE /* force read-only */ - }, - { - .name = "Redwood kernel", - .offset = RW_PART2_OF, - .size = RW_PART2_SZ - }, - { - .name = "Redwood OpenBIOS", - .offset = RW_PART3_OF, - .size = RW_PART3_SZ, - .mask_flags = MTD_WRITEABLE /* force read-only */ - } -}; - -#endif /* CONFIG_REDWOOD_6 */ - -struct map_info redwood_flash_map = { - .name = "IBM Redwood", - .size = WINDOW_SIZE, - .bankwidth = 2, - .phys = WINDOW_ADDR, -}; - - -#define NUM_REDWOOD_FLASH_PARTITIONS ARRAY_SIZE(redwood_flash_partitions) - -static struct mtd_info *redwood_mtd; - -static int __init init_redwood_flash(void) -{ - int err; - - printk(KERN_NOTICE "redwood: flash mapping: %x at %x\n", - WINDOW_SIZE, WINDOW_ADDR); - - redwood_flash_map.virt = ioremap(WINDOW_ADDR, WINDOW_SIZE); - - if (!redwood_flash_map.virt) { - printk("init_redwood_flash: failed to ioremap\n"); - return -EIO; - } - simple_map_init(&redwood_flash_map); - - redwood_mtd = do_map_probe("cfi_probe",&redwood_flash_map); - - if (redwood_mtd) { - redwood_mtd->owner = THIS_MODULE; - err = add_mtd_partitions(redwood_mtd, - redwood_flash_partitions, - NUM_REDWOOD_FLASH_PARTITIONS); - if (err) { - printk("init_redwood_flash: add_mtd_partitions failed\n"); - iounmap(redwood_flash_map.virt); - } - return err; - - } - - iounmap(redwood_flash_map.virt); - return -ENXIO; -} - -static void __exit cleanup_redwood_flash(void) -{ - if (redwood_mtd) { - del_mtd_partitions(redwood_mtd); - /* moved iounmap after map_destroy - armin */ - map_destroy(redwood_mtd); - iounmap((void *)redwood_flash_map.virt); - } -} - -module_init(init_redwood_flash); -module_exit(cleanup_redwood_flash); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("MontaVista Software "); -MODULE_DESCRIPTION("MTD map driver for the IBM Redwood reference boards"); -- cgit v1.2.3 From 78ef7fab0eb0a5b159842bac89aed74bb0aa7bfe Mon Sep 17 00:00:00 2001 From: Barry Song <21cnbao@gmail.com> Date: Fri, 15 Jan 2010 15:50:14 +0800 Subject: mtd-physmap: add support users can assign the probe type in board files There are three reasons to add this support: 1. users probably know the interface type of their flashs, then probe can be faster if they give the right type in platform data since wrong types will not be detected. 2. sometimes, detecting can cause destory to system. For example, for kernel XIP, detecting can cause NOR enter a mode instructions can not be fetched right, which will make kernel crash. 3. For a new probe which is not listed in the rom_probe_types, if users assign it in board files, physmap can still probe it. Signed-off-by: Barry Song <21cnbao@gmail.com> Signed-off-by: Mike Frysinger Signed-off-by: David Woodhouse --- drivers/mtd/maps/physmap.c | 8 ++++++-- include/linux/mtd/physmap.h | 1 + 2 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/maps/physmap.c b/drivers/mtd/maps/physmap.c index 829aa4bee54f..4c18b98a3110 100644 --- a/drivers/mtd/maps/physmap.c +++ b/drivers/mtd/maps/physmap.c @@ -136,8 +136,12 @@ static int physmap_flash_probe(struct platform_device *dev) simple_map_init(&info->map[i]); probe_type = rom_probe_types; - for (; info->mtd[i] == NULL && *probe_type != NULL; probe_type++) - info->mtd[i] = do_map_probe(*probe_type, &info->map[i]); + if (physmap_data->probe_type == NULL) { + for (; info->mtd[i] == NULL && *probe_type != NULL; probe_type++) + info->mtd[i] = do_map_probe(*probe_type, &info->map[i]); + } else + info->mtd[i] = do_map_probe(physmap_data->probe_type, &info->map[i]); + if (info->mtd[i] == NULL) { dev_err(&dev->dev, "map_probe failed\n"); err = -ENXIO; diff --git a/include/linux/mtd/physmap.h b/include/linux/mtd/physmap.h index 76f7cabf07d3..bcfd9f777454 100644 --- a/include/linux/mtd/physmap.h +++ b/include/linux/mtd/physmap.h @@ -25,6 +25,7 @@ struct physmap_flash_data { void (*set_vpp)(struct map_info *, int); unsigned int nr_parts; unsigned int pfow_base; + char *probe_type; struct mtd_partition *parts; }; -- cgit v1.2.3 From 6088c0587706b2cf21ce50c11576718bff5fae0c Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Sun, 8 Aug 2010 14:15:22 +0100 Subject: jffs2: Update copyright notices Signed-off-by: David Woodhouse --- fs/jffs2/background.c | 1 + fs/jffs2/build.c | 1 + fs/jffs2/compr.c | 5 +++-- fs/jffs2/compr.h | 1 + fs/jffs2/compr_lzo.c | 1 + fs/jffs2/compr_rtime.c | 1 + fs/jffs2/compr_rubin.c | 1 + fs/jffs2/compr_zlib.c | 1 + fs/jffs2/debug.c | 1 + fs/jffs2/debug.h | 1 + fs/jffs2/dir.c | 1 + fs/jffs2/erase.c | 1 + fs/jffs2/file.c | 1 + fs/jffs2/fs.c | 1 + fs/jffs2/gc.c | 1 + fs/jffs2/ioctl.c | 1 + fs/jffs2/jffs2_fs_i.h | 1 + fs/jffs2/jffs2_fs_sb.h | 1 + include/linux/jffs2.h | 3 ++- 19 files changed, 22 insertions(+), 3 deletions(-) diff --git a/fs/jffs2/background.c b/fs/jffs2/background.c index 55f1dde2fa8b..404111b016c9 100644 --- a/fs/jffs2/background.c +++ b/fs/jffs2/background.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/build.c b/fs/jffs2/build.c index c5e1450d79f9..a906f538d11c 100644 --- a/fs/jffs2/build.c +++ b/fs/jffs2/build.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/compr.c b/fs/jffs2/compr.c index f0294410868d..617a1e5694c1 100644 --- a/fs/jffs2/compr.c +++ b/fs/jffs2/compr.c @@ -2,11 +2,12 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. - * Created by Arjan van de Ven - * + * Copyright © 2004-2010 David Woodhouse * Copyright © 2004 Ferenc Havasi , * University of Szeged, Hungary * + * Created by Arjan van de Ven + * * For licensing information, see the file 'LICENCE' in this directory. * */ diff --git a/fs/jffs2/compr.h b/fs/jffs2/compr.h index 7d1d72faa774..e471a9106fd9 100644 --- a/fs/jffs2/compr.h +++ b/fs/jffs2/compr.h @@ -3,6 +3,7 @@ * * Copyright © 2004 Ferenc Havasi , * University of Szeged, Hungary + * Copyright © 2004-2010 David Woodhouse * * For licensing information, see the file 'LICENCE' in this directory. * diff --git a/fs/jffs2/compr_lzo.c b/fs/jffs2/compr_lzo.c index cd02acafde8a..ed25ae7c98eb 100644 --- a/fs/jffs2/compr_lzo.c +++ b/fs/jffs2/compr_lzo.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2007 Nokia Corporation. All rights reserved. + * Copyright © 2004-2010 David Woodhouse * * Created by Richard Purdie * diff --git a/fs/jffs2/compr_rtime.c b/fs/jffs2/compr_rtime.c index 546d1538d076..9696ad9ef5f7 100644 --- a/fs/jffs2/compr_rtime.c +++ b/fs/jffs2/compr_rtime.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by Arjan van de Ven * diff --git a/fs/jffs2/compr_rubin.c b/fs/jffs2/compr_rubin.c index 170d289ac785..a12b4f763373 100644 --- a/fs/jffs2/compr_rubin.c +++ b/fs/jffs2/compr_rubin.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by Arjan van de Ven * diff --git a/fs/jffs2/compr_zlib.c b/fs/jffs2/compr_zlib.c index b46661a42758..97fc45de6f81 100644 --- a/fs/jffs2/compr_zlib.c +++ b/fs/jffs2/compr_zlib.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/debug.c b/fs/jffs2/debug.c index ec3538413926..e0b76c87a91a 100644 --- a/fs/jffs2/debug.c +++ b/fs/jffs2/debug.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/debug.h b/fs/jffs2/debug.h index a113ecc3bafe..c4f8eef5ca68 100644 --- a/fs/jffs2/debug.h +++ b/fs/jffs2/debug.h @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/dir.c b/fs/jffs2/dir.c index 166062a68230..1aaf98df49d0 100644 --- a/fs/jffs2/dir.c +++ b/fs/jffs2/dir.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/erase.c b/fs/jffs2/erase.c index 6286ad9b00f7..abac961f617b 100644 --- a/fs/jffs2/erase.c +++ b/fs/jffs2/erase.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/file.c b/fs/jffs2/file.c index e7291c161a19..52749127aa6c 100644 --- a/fs/jffs2/file.c +++ b/fs/jffs2/file.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/fs.c b/fs/jffs2/fs.c index 26037e2d6154..29d0970f9da3 100644 --- a/fs/jffs2/fs.c +++ b/fs/jffs2/fs.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/gc.c b/fs/jffs2/gc.c index f5e96bd656e8..846a79452497 100644 --- a/fs/jffs2/gc.c +++ b/fs/jffs2/gc.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/ioctl.c b/fs/jffs2/ioctl.c index 9d41f43e47bb..859a598af020 100644 --- a/fs/jffs2/ioctl.c +++ b/fs/jffs2/ioctl.c @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/jffs2_fs_i.h b/fs/jffs2/jffs2_fs_i.h index c6923da98263..2e4a86763c07 100644 --- a/fs/jffs2/jffs2_fs_i.h +++ b/fs/jffs2/jffs2_fs_i.h @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/fs/jffs2/jffs2_fs_sb.h b/fs/jffs2/jffs2_fs_sb.h index 85ef6dbb1be7..6784bc89add1 100644 --- a/fs/jffs2/jffs2_fs_sb.h +++ b/fs/jffs2/jffs2_fs_sb.h @@ -2,6 +2,7 @@ * JFFS2 -- Journalling Flash File System, Version 2. * * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * diff --git a/include/linux/jffs2.h b/include/linux/jffs2.h index 0874ab59ffef..b9898894ec8d 100644 --- a/include/linux/jffs2.h +++ b/include/linux/jffs2.h @@ -1,7 +1,8 @@ /* * JFFS2 -- Journalling Flash File System, Version 2. * - * Copyright (C) 2001-2003 Red Hat, Inc. + * Copyright © 2001-2007 Red Hat, Inc. + * Copyright © 2004-2010 David Woodhouse * * Created by David Woodhouse * -- cgit v1.2.3 From a1452a3771c4eb85bd779790b040efdc36f4274e Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Sun, 8 Aug 2010 20:58:20 +0100 Subject: mtd: Update copyright notices Signed-off-by: David Woodhouse --- drivers/mtd/afs.c | 2 +- drivers/mtd/cmdlinepart.c | 17 ++++++++++++++++- drivers/mtd/ftl.c | 2 +- drivers/mtd/inftlcore.c | 6 +++--- drivers/mtd/inftlmount.c | 4 ++-- drivers/mtd/mtd_blkdevs.c | 18 ++++++++++++++++-- drivers/mtd/mtdblock.c | 19 +++++++++++++++++-- drivers/mtd/mtdblock_ro.c | 19 +++++++++++++++++-- drivers/mtd/mtdchar.c | 16 +++++++++++++++- drivers/mtd/mtdconcat.c | 18 ++++++++++++++++-- drivers/mtd/mtdcore.c | 20 +++++++++++++++++--- drivers/mtd/mtdoops.c | 2 +- drivers/mtd/mtdpart.c | 20 ++++++++++++++++---- drivers/mtd/mtdsuper.c | 2 ++ drivers/mtd/nftlcore.c | 25 ++++++++++++++++++------- drivers/mtd/nftlmount.c | 3 ++- drivers/mtd/ofpart.c | 4 ++-- drivers/mtd/redboot.c | 18 ++++++++++++++++++ drivers/mtd/rfd_ftl.c | 2 +- drivers/mtd/ssfdc.c | 2 +- include/linux/mtd/bbm.h | 18 ++++++++++++++++-- include/linux/mtd/blktrans.h | 16 ++++++++++++++-- include/linux/mtd/cfi.h | 20 +++++++++++++++++--- include/linux/mtd/cfi_endian.h | 19 +++++++++++++++++++ include/linux/mtd/concat.h | 17 +++++++++++++++-- include/linux/mtd/doc2000.h | 23 ++++++++++++++++++----- include/linux/mtd/flashchip.h | 19 +++++++++++++++---- include/linux/mtd/gen_probe.h | 19 +++++++++++++++++-- include/linux/mtd/map.h | 18 ++++++++++++++++++ include/linux/mtd/mtd.h | 17 +++++++++++++++-- include/linux/mtd/nand.h | 6 +++--- include/linux/mtd/nand_ecc.h | 4 +++- include/linux/mtd/nftl.h | 17 ++++++++++++++++- include/mtd/mtd-abi.h | 17 ++++++++++++++++- include/mtd/mtd-user.h | 17 ++++++++++++++++- include/mtd/nftl-user.h | 16 +++++++++++++++- include/mtd/ubi-user.h | 2 +- 37 files changed, 416 insertions(+), 68 deletions(-) diff --git a/drivers/mtd/afs.c b/drivers/mtd/afs.c index cec7ab98b2a9..302372c08b56 100644 --- a/drivers/mtd/afs.c +++ b/drivers/mtd/afs.c @@ -2,7 +2,7 @@ drivers/mtd/afs.c: ARM Flash Layout/Partitioning - Copyright (C) 2000 ARM Limited + Copyright © 2000 ARM Limited This program is free software; you can redistribute it and/or modify it under the terms of the GNU General Public License as published by diff --git a/drivers/mtd/cmdlinepart.c b/drivers/mtd/cmdlinepart.c index 1479da6d3aa6..e790f38893b0 100644 --- a/drivers/mtd/cmdlinepart.c +++ b/drivers/mtd/cmdlinepart.c @@ -1,7 +1,22 @@ /* * Read flash partition table from command line * - * Copyright 2002 SYSGO Real-Time Solutions GmbH + * Copyright © 2002 SYSGO Real-Time Solutions GmbH + * Copyright © 2002-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * * The format for the command line is as follows: * diff --git a/drivers/mtd/ftl.c b/drivers/mtd/ftl.c index 62da9eb7032b..4d6a64c387ec 100644 --- a/drivers/mtd/ftl.c +++ b/drivers/mtd/ftl.c @@ -26,7 +26,7 @@ The initial developer of the original code is David A. Hinds . Portions created by David A. Hinds - are Copyright (C) 1999 David A. Hinds. All Rights Reserved. + are Copyright © 1999 David A. Hinds. All Rights Reserved. Alternatively, the contents of this file may be used under the terms of the GNU General Public License version 2 (the "GPL"), in diff --git a/drivers/mtd/inftlcore.c b/drivers/mtd/inftlcore.c index 015a7fe1b6ee..d7592e67d048 100644 --- a/drivers/mtd/inftlcore.c +++ b/drivers/mtd/inftlcore.c @@ -1,11 +1,11 @@ /* * inftlcore.c -- Linux driver for Inverse Flash Translation Layer (INFTL) * - * (C) Copyright 2002, Greg Ungerer (gerg@snapgear.com) + * Copyright © 2002, Greg Ungerer (gerg@snapgear.com) * * Based heavily on the nftlcore.c code which is: - * (c) 1999 Machine Vision Holdings, Inc. - * Author: David Woodhouse + * Copyright © 1999 Machine Vision Holdings, Inc. + * Copyright © 1999 David Woodhouse * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/mtd/inftlmount.c b/drivers/mtd/inftlmount.c index 8f988d7d3c5c..7772d2618d9f 100644 --- a/drivers/mtd/inftlmount.c +++ b/drivers/mtd/inftlmount.c @@ -2,11 +2,11 @@ * inftlmount.c -- INFTL mount code with extensive checks. * * Author: Greg Ungerer (gerg@snapgear.com) - * (C) Copyright 2002-2003, Greg Ungerer (gerg@snapgear.com) + * Copyright © 2002-2003, Greg Ungerer (gerg@snapgear.com) * * Based heavily on the nftlmount.c code which is: * Author: Fabrice Bellard (fabrice.bellard@netgem.com) - * Copyright (C) 2000 Netgem S.A. + * Copyright © 2000 Netgem S.A. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/mtd/mtd_blkdevs.c b/drivers/mtd/mtd_blkdevs.c index 89e07e5af577..1d2144d77470 100644 --- a/drivers/mtd/mtd_blkdevs.c +++ b/drivers/mtd/mtd_blkdevs.c @@ -1,7 +1,21 @@ /* - * (C) 2003 David Woodhouse + * Interface to Linux block layer for MTD 'translation layers'. * - * Interface to Linux 2.5 block layer for MTD 'translation layers'. + * Copyright © 2003-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * */ diff --git a/drivers/mtd/mtdblock.c b/drivers/mtd/mtdblock.c index e6edbec609fd..1e74ad961040 100644 --- a/drivers/mtd/mtdblock.c +++ b/drivers/mtd/mtdblock.c @@ -1,8 +1,23 @@ /* * Direct MTD block device access * - * (C) 2000-2003 Nicolas Pitre - * (C) 1999-2003 David Woodhouse + * Copyright © 1999-2010 David Woodhouse + * Copyright © 2000-2003 Nicolas Pitre + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #include diff --git a/drivers/mtd/mtdblock_ro.c b/drivers/mtd/mtdblock_ro.c index d0d3f79f9d03..795a8c0a05b8 100644 --- a/drivers/mtd/mtdblock_ro.c +++ b/drivers/mtd/mtdblock_ro.c @@ -1,7 +1,22 @@ /* - * (C) 2003 David Woodhouse - * * Simple read-only (writable only for RAM) mtdblock driver + * + * Copyright © 2001-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #include diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index c27e65e3e291..f6d76f1adca0 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c @@ -1,5 +1,19 @@ /* - * Character-device access to raw MTD devices. + * Copyright © 1999-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * */ diff --git a/drivers/mtd/mtdconcat.c b/drivers/mtd/mtdconcat.c index 4567bc373780..bf8de0943103 100644 --- a/drivers/mtd/mtdconcat.c +++ b/drivers/mtd/mtdconcat.c @@ -1,11 +1,25 @@ /* * MTD device concatenation layer * - * (C) 2002 Robert Kaiser + * Copyright © 2002 Robert Kaiser + * Copyright © 2002-2010 David Woodhouse * * NAND support by Christian Gan * - * This code is GPL + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #include diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index a1b8b70d2d0a..93a11f3def44 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -2,9 +2,23 @@ * Core registration and callback routines for MTD * drivers and users. * - * bdi bits are: - * Copyright © 2006 Red Hat, Inc. All Rights Reserved. - * Written by David Howells (dhowells@redhat.com) + * Copyright © 1999-2010 David Woodhouse + * Copyright © 2006 Red Hat UK Limited + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #include diff --git a/drivers/mtd/mtdoops.c b/drivers/mtd/mtdoops.c index 328313c3dccb..1ee72f3f0512 100644 --- a/drivers/mtd/mtdoops.c +++ b/drivers/mtd/mtdoops.c @@ -1,7 +1,7 @@ /* * MTD Oops/Panic logger * - * Copyright (C) 2007 Nokia Corporation. All rights reserved. + * Copyright © 2007 Nokia Corporation. All rights reserved. * * Author: Richard Purdie * diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index 4c539ded0b70..fc5507410278 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -1,12 +1,24 @@ /* * Simple MTD partitioning layer * - * (C) 2000 Nicolas Pitre + * Copyright © 2000 Nicolas Pitre + * Copyright © 2002 Thomas Gleixner + * Copyright © 2000-2010 David Woodhouse * - * This code is GPL + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * - * 02-21-2002 Thomas Gleixner - * added support for read_oob, write_oob */ #include diff --git a/drivers/mtd/mtdsuper.c b/drivers/mtd/mtdsuper.c index bd9a443ccf69..38e2ab07e7a3 100644 --- a/drivers/mtd/mtdsuper.c +++ b/drivers/mtd/mtdsuper.c @@ -1,6 +1,8 @@ /* MTD-based superblock management * * Copyright © 2001-2007 Red Hat, Inc. All Rights Reserved. + * Copyright © 2001-2010 David Woodhouse + * * Written by: David Howells * David Woodhouse * diff --git a/drivers/mtd/nftlcore.c b/drivers/mtd/nftlcore.c index a4578bf903aa..b155666acfbe 100644 --- a/drivers/mtd/nftlcore.c +++ b/drivers/mtd/nftlcore.c @@ -1,11 +1,22 @@ -/* Linux driver for NAND Flash Translation Layer */ -/* (c) 1999 Machine Vision Holdings, Inc. */ -/* Author: David Woodhouse */ - /* - The contents of this file are distributed under the GNU General - Public License version 2. The author places no additional - restrictions of any kind on it. + * Linux driver for NAND Flash Translation Layer + * + * Copyright © 1999 Machine Vision Holdings, Inc. + * Copyright © 1999-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA */ #define PRERELEASE diff --git a/drivers/mtd/nftlmount.c b/drivers/mtd/nftlmount.c index 8b22b1836e9f..e3cd1ffad2f6 100644 --- a/drivers/mtd/nftlmount.c +++ b/drivers/mtd/nftlmount.c @@ -2,7 +2,8 @@ * NFTL mount code with extensive checks * * Author: Fabrice Bellard (fabrice.bellard@netgem.com) - * Copyright (C) 2000 Netgem S.A. + * Copyright © 2000 Netgem S.A. + * Copyright © 1999-2010 David Woodhouse * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by diff --git a/drivers/mtd/ofpart.c b/drivers/mtd/ofpart.c index 4f0d635674f3..8bf7dc6d1ce6 100644 --- a/drivers/mtd/ofpart.c +++ b/drivers/mtd/ofpart.c @@ -1,11 +1,11 @@ /* * Flash partitions described by the OF (or flattened) device tree * - * Copyright (C) 2006 MontaVista Software Inc. + * Copyright © 2006 MontaVista Software Inc. * Author: Vitaly Wool * * Revised to handle newer style flash binding by: - * Copyright (C) 2007 David Gibson, IBM Corporation. + * Copyright © 2007 David Gibson, IBM Corporation. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the diff --git a/drivers/mtd/redboot.c b/drivers/mtd/redboot.c index 2d600a1bf2aa..7a87d07cd79f 100644 --- a/drivers/mtd/redboot.c +++ b/drivers/mtd/redboot.c @@ -1,6 +1,24 @@ /* * Parse RedBoot-style Flash Image System (FIS) tables and * produce a Linux partition array to match. + * + * Copyright © 2001 Red Hat UK Limited + * Copyright © 2001-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #include diff --git a/drivers/mtd/rfd_ftl.c b/drivers/mtd/rfd_ftl.c index 63b83c0d9a13..cc4d1805b864 100644 --- a/drivers/mtd/rfd_ftl.c +++ b/drivers/mtd/rfd_ftl.c @@ -1,7 +1,7 @@ /* * rfd_ftl.c -- resident flash disk (flash translation layer) * - * Copyright (C) 2005 Sean Young + * Copyright © 2005 Sean Young * * This type of flash translation layer (FTL) is used by the Embedded BIOS * by General Software. It is known as the Resident Flash Disk (RFD), see: diff --git a/drivers/mtd/ssfdc.c b/drivers/mtd/ssfdc.c index 81c4ecdc11f5..5cd189793332 100644 --- a/drivers/mtd/ssfdc.c +++ b/drivers/mtd/ssfdc.c @@ -1,6 +1,6 @@ /* * Linux driver for SSFDC Flash Translation Layer (Read only) - * (c) 2005 Eptar srl + * © 2005 Eptar srl * Author: Claudio Lanconelli * * Based on NTFL and MTDBLOCK_RO drivers diff --git a/include/linux/mtd/bbm.h b/include/linux/mtd/bbm.h index a04b962492a8..7fa20beb2ab9 100644 --- a/include/linux/mtd/bbm.h +++ b/include/linux/mtd/bbm.h @@ -4,12 +4,26 @@ * NAND family Bad Block Management (BBM) header file * - Bad Block Table (BBT) implementation * - * Copyright (c) 2005 Samsung Electronics + * Copyright © 2005 Samsung Electronics * Kyungmin Park * - * Copyright (c) 2000-2005 + * Copyright © 2000-2005 * Thomas Gleixner * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #ifndef __LINUX_MTD_BBM_H #define __LINUX_MTD_BBM_H diff --git a/include/linux/mtd/blktrans.h b/include/linux/mtd/blktrans.h index b481ccd7ff3c..26529ebd59cc 100644 --- a/include/linux/mtd/blktrans.h +++ b/include/linux/mtd/blktrans.h @@ -1,7 +1,19 @@ /* - * (C) 2003 David Woodhouse + * Copyright © 2003-2010 David Woodhouse * - * Interface to Linux block layer for MTD 'translation layers'. + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * */ diff --git a/include/linux/mtd/cfi.h b/include/linux/mtd/cfi.h index 574d9ee066f1..d2118b0eac9a 100644 --- a/include/linux/mtd/cfi.h +++ b/include/linux/mtd/cfi.h @@ -1,6 +1,20 @@ - -/* Common Flash Interface structures - * See http://support.intel.com/design/flash/technote/index.htm +/* + * Copyright © 2000-2010 David Woodhouse et al. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #ifndef __MTD_CFI_H__ diff --git a/include/linux/mtd/cfi_endian.h b/include/linux/mtd/cfi_endian.h index d802f7736be3..51cc3f5917a8 100644 --- a/include/linux/mtd/cfi_endian.h +++ b/include/linux/mtd/cfi_endian.h @@ -1,3 +1,22 @@ +/* + * Copyright © 2001-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ + #include #ifndef CONFIG_MTD_CFI_ADV_OPTIONS diff --git a/include/linux/mtd/concat.h b/include/linux/mtd/concat.h index e80c674daeb3..ccdbe93a909c 100644 --- a/include/linux/mtd/concat.h +++ b/include/linux/mtd/concat.h @@ -1,9 +1,22 @@ /* * MTD device concatenation layer definitions * - * (C) 2002 Robert Kaiser + * Copyright © 2002 Robert Kaiser + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * - * This code is GPL */ #ifndef MTD_CONCAT_H diff --git a/include/linux/mtd/doc2000.h b/include/linux/mtd/doc2000.h index 0a6d516ab71d..0f6fea73a1f6 100644 --- a/include/linux/mtd/doc2000.h +++ b/include/linux/mtd/doc2000.h @@ -1,12 +1,25 @@ /* * Linux driver for Disk-On-Chip devices * - * Copyright (C) 1999 Machine Vision Holdings, Inc. - * Copyright (C) 2001-2003 David Woodhouse - * Copyright (C) 2002-2003 Greg Ungerer - * Copyright (C) 2002-2003 SnapGear Inc + * Copyright © 1999 Machine Vision Holdings, Inc. + * Copyright © 1999-2010 David Woodhouse + * Copyright © 2002-2003 Greg Ungerer + * Copyright © 2002-2003 SnapGear Inc + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * - * Released under GPL */ #ifndef __MTD_DOC2000_H__ diff --git a/include/linux/mtd/flashchip.h b/include/linux/mtd/flashchip.h index 23cc10f8e343..b63fa457febd 100644 --- a/include/linux/mtd/flashchip.h +++ b/include/linux/mtd/flashchip.h @@ -1,10 +1,21 @@ - /* - * struct flchip definition + * Copyright © 2000 Red Hat UK Limited + * Copyright © 2000-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. * - * Contains information about the location and state of a given flash device + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * - * (C) 2000 Red Hat. GPLd. */ #ifndef __MTD_FLASHCHIP_H__ diff --git a/include/linux/mtd/gen_probe.h b/include/linux/mtd/gen_probe.h index df362ddf2949..2c456054fded 100644 --- a/include/linux/mtd/gen_probe.h +++ b/include/linux/mtd/gen_probe.h @@ -1,6 +1,21 @@ /* - * (C) 2001, 2001 Red Hat, Inc. - * GPL'd + * Copyright © 2001 Red Hat UK Limited + * Copyright © 2001-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #ifndef __LINUX_MTD_GEN_PROBE_H__ diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h index de89eca864ce..eea3a4fb7405 100644 --- a/include/linux/mtd/map.h +++ b/include/linux/mtd/map.h @@ -1,3 +1,21 @@ +/* + * Copyright © 2000-2010 David Woodhouse et al. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * + */ /* Overhauled routines for dealing with different mmap regions of flash */ diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index 43b7d72c6116..eae914e97f33 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -1,7 +1,20 @@ /* - * Copyright (C) 1999-2003 David Woodhouse et al. + * Copyright © 1999-2010 David Woodhouse et al. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * - * Released under GPL */ #ifndef __MTD_MTD_H__ diff --git a/include/linux/mtd/nand.h b/include/linux/mtd/nand.h index 50f3aa00a452..102e12c58cb3 100644 --- a/include/linux/mtd/nand.h +++ b/include/linux/mtd/nand.h @@ -1,9 +1,9 @@ /* * linux/include/linux/mtd/nand.h * - * Copyright (c) 2000 David Woodhouse - * Steven J. Hill - * Thomas Gleixner + * Copyright © 2000-2010 David Woodhouse + * Steven J. Hill + * Thomas Gleixner * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/include/linux/mtd/nand_ecc.h b/include/linux/mtd/nand_ecc.h index 41bc013571d0..4d8406c81652 100644 --- a/include/linux/mtd/nand_ecc.h +++ b/include/linux/mtd/nand_ecc.h @@ -1,7 +1,9 @@ /* * drivers/mtd/nand_ecc.h * - * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com) + * Copyright (C) 2000-2010 Steven J. Hill + * David Woodhouse + * Thomas Gleixner * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as diff --git a/include/linux/mtd/nftl.h b/include/linux/mtd/nftl.h index dcaf611ed748..b059629e22bc 100644 --- a/include/linux/mtd/nftl.h +++ b/include/linux/mtd/nftl.h @@ -1,5 +1,20 @@ /* - * (C) 1999-2003 David Woodhouse + * Copyright © 1999-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #ifndef __MTD_NFTL_H__ diff --git a/include/mtd/mtd-abi.h b/include/mtd/mtd-abi.h index e12872e3c694..4debb4514634 100644 --- a/include/mtd/mtd-abi.h +++ b/include/mtd/mtd-abi.h @@ -1,5 +1,20 @@ /* - * Portions of MTD ABI definition which are shared by kernel and user space + * Copyright © 1999-2010 David Woodhouse et al. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #ifndef __MTD_ABI_H__ diff --git a/include/mtd/mtd-user.h b/include/mtd/mtd-user.h index 170ceca3b2d0..aa3c2f86a913 100644 --- a/include/mtd/mtd-user.h +++ b/include/mtd/mtd-user.h @@ -1,5 +1,20 @@ /* - * MTD ABI header for use by user space only. + * Copyright © 1999-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA + * */ #ifndef __MTD_USER_H__ diff --git a/include/mtd/nftl-user.h b/include/mtd/nftl-user.h index 98e9e57f22de..bdeabd86ad99 100644 --- a/include/mtd/nftl-user.h +++ b/include/mtd/nftl-user.h @@ -1,5 +1,19 @@ /* - * Parts of NFTL headers shared with userspace + * Copyright © 1999-2010 David Woodhouse + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA * */ diff --git a/include/mtd/ubi-user.h b/include/mtd/ubi-user.h index 466a8320f1e6..c0d47ad4b103 100644 --- a/include/mtd/ubi-user.h +++ b/include/mtd/ubi-user.h @@ -1,5 +1,5 @@ /* - * Copyright (c) International Business Machines Corp., 2006 + * Copyright © International Business Machines Corp., 2006 * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by -- cgit v1.2.3 From 6ae0185fe201eae0548dace2a84acb5050fc8606 Mon Sep 17 00:00:00 2001 From: David Woodhouse Date: Sun, 8 Aug 2010 21:19:42 +0100 Subject: mtd: Remove obsolete include Signed-off-by: David Woodhouse --- drivers/mtd/chips/cfi_cmdset_0001.c | 1 - drivers/mtd/chips/cfi_cmdset_0002.c | 1 - drivers/mtd/chips/cfi_cmdset_0020.c | 1 - drivers/mtd/chips/cfi_util.c | 1 - drivers/mtd/chips/chipreg.c | 1 - drivers/mtd/chips/map_absent.c | 1 - drivers/mtd/chips/map_ram.c | 1 - drivers/mtd/chips/map_rom.c | 1 - drivers/mtd/devices/docecc.c | 1 - drivers/mtd/devices/docprobe.c | 1 - drivers/mtd/devices/mtdram.c | 1 - drivers/mtd/devices/pmc551.c | 1 - drivers/mtd/inftlmount.c | 1 - drivers/mtd/mtdchar.c | 1 - drivers/mtd/mtdcore.c | 1 - drivers/mtd/mtdpart.c | 1 - drivers/mtd/nand/diskonchip.c | 1 - drivers/mtd/nand/nand_base.c | 1 - drivers/mtd/nand/nand_bbt.c | 1 - drivers/mtd/nand/rtc_from4.c | 1 - drivers/mtd/onenand/onenand_bbt.c | 1 - fs/jffs2/nodelist.h | 1 - include/linux/mtd/compatmac.h | 10 ---------- include/linux/mtd/map.h | 1 - include/linux/mtd/mtd.h | 1 - 25 files changed, 34 deletions(-) delete mode 100644 include/linux/mtd/compatmac.h diff --git a/drivers/mtd/chips/cfi_cmdset_0001.c b/drivers/mtd/chips/cfi_cmdset_0001.c index 97d5546f9ea4..9e2b7e9e0ad9 100644 --- a/drivers/mtd/chips/cfi_cmdset_0001.c +++ b/drivers/mtd/chips/cfi_cmdset_0001.c @@ -34,7 +34,6 @@ #include #include #include -#include #include /* #define CMDSET0001_DISABLE_ERASE_SUSPEND_ON_WRITE */ diff --git a/drivers/mtd/chips/cfi_cmdset_0002.c b/drivers/mtd/chips/cfi_cmdset_0002.c index bd20d1ff1b0d..3e6c47bdce53 100644 --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c @@ -33,7 +33,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mtd/chips/cfi_cmdset_0020.c b/drivers/mtd/chips/cfi_cmdset_0020.c index e54e8c169d76..314af1f5a370 100644 --- a/drivers/mtd/chips/cfi_cmdset_0020.c +++ b/drivers/mtd/chips/cfi_cmdset_0020.c @@ -33,7 +33,6 @@ #include #include #include -#include static int cfi_staa_read(struct mtd_info *, loff_t, size_t, size_t *, u_char *); diff --git a/drivers/mtd/chips/cfi_util.c b/drivers/mtd/chips/cfi_util.c index d7c2c672757e..e503b2ca894d 100644 --- a/drivers/mtd/chips/cfi_util.c +++ b/drivers/mtd/chips/cfi_util.c @@ -22,7 +22,6 @@ #include #include #include -#include int __xipram cfi_qry_present(struct map_info *map, __u32 base, struct cfi_private *cfi) diff --git a/drivers/mtd/chips/chipreg.c b/drivers/mtd/chips/chipreg.c index c85760968227..da1f96f385c7 100644 --- a/drivers/mtd/chips/chipreg.c +++ b/drivers/mtd/chips/chipreg.c @@ -10,7 +10,6 @@ #include #include #include -#include static DEFINE_SPINLOCK(chip_drvs_lock); static LIST_HEAD(chip_drvs_list); diff --git a/drivers/mtd/chips/map_absent.c b/drivers/mtd/chips/map_absent.c index 494d30d0631a..f2b872946871 100644 --- a/drivers/mtd/chips/map_absent.c +++ b/drivers/mtd/chips/map_absent.c @@ -25,7 +25,6 @@ #include #include #include -#include static int map_absent_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); static int map_absent_write (struct mtd_info *, loff_t, size_t, size_t *, const u_char *); diff --git a/drivers/mtd/chips/map_ram.c b/drivers/mtd/chips/map_ram.c index 6bdc50c727e7..67640ccb2d41 100644 --- a/drivers/mtd/chips/map_ram.c +++ b/drivers/mtd/chips/map_ram.c @@ -13,7 +13,6 @@ #include #include #include -#include static int mapram_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); diff --git a/drivers/mtd/chips/map_rom.c b/drivers/mtd/chips/map_rom.c index 076090a67b90..593f73d480d2 100644 --- a/drivers/mtd/chips/map_rom.c +++ b/drivers/mtd/chips/map_rom.c @@ -13,7 +13,6 @@ #include #include #include -#include static int maprom_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); static int maprom_write (struct mtd_info *, loff_t, size_t, size_t *, const u_char *); diff --git a/drivers/mtd/devices/docecc.c b/drivers/mtd/devices/docecc.c index a19cda52da5c..a99838bb2dc0 100644 --- a/drivers/mtd/devices/docecc.c +++ b/drivers/mtd/devices/docecc.c @@ -31,7 +31,6 @@ #include #include -#include /* for min() in older kernels */ #include #include diff --git a/drivers/mtd/devices/docprobe.c b/drivers/mtd/devices/docprobe.c index 6e62922942b1..d374603493a7 100644 --- a/drivers/mtd/devices/docprobe.c +++ b/drivers/mtd/devices/docprobe.c @@ -49,7 +49,6 @@ #include #include #include -#include /* Where to look for the devices? */ #ifndef CONFIG_MTD_DOCPROBE_ADDRESS diff --git a/drivers/mtd/devices/mtdram.c b/drivers/mtd/devices/mtdram.c index fce5ff7589aa..26a6e809013d 100644 --- a/drivers/mtd/devices/mtdram.c +++ b/drivers/mtd/devices/mtdram.c @@ -14,7 +14,6 @@ #include #include #include -#include #include #include diff --git a/drivers/mtd/devices/pmc551.c b/drivers/mtd/devices/pmc551.c index fc8ea0a57ac2..ef0aba0ce58f 100644 --- a/drivers/mtd/devices/pmc551.c +++ b/drivers/mtd/devices/pmc551.c @@ -98,7 +98,6 @@ #include #include -#include static struct mtd_info *pmc551list; diff --git a/drivers/mtd/inftlmount.c b/drivers/mtd/inftlmount.c index 7772d2618d9f..104052e774b0 100644 --- a/drivers/mtd/inftlmount.c +++ b/drivers/mtd/inftlmount.c @@ -34,7 +34,6 @@ #include #include #include -#include /* * find_boot_record: Find the INFTL Media Header and its Spare copy which diff --git a/drivers/mtd/mtdchar.c b/drivers/mtd/mtdchar.c index f6d76f1adca0..638827a25b77 100644 --- a/drivers/mtd/mtdchar.c +++ b/drivers/mtd/mtdchar.c @@ -33,7 +33,6 @@ #include #include -#include #include diff --git a/drivers/mtd/mtdcore.c b/drivers/mtd/mtdcore.c index 93a11f3def44..527cebf58da4 100644 --- a/drivers/mtd/mtdcore.c +++ b/drivers/mtd/mtdcore.c @@ -31,7 +31,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mtd/mtdpart.c b/drivers/mtd/mtdpart.c index fc5507410278..dc6558568876 100644 --- a/drivers/mtd/mtdpart.c +++ b/drivers/mtd/mtdpart.c @@ -29,7 +29,6 @@ #include #include #include -#include /* Our partition linked list */ static LIST_HEAD(mtd_partitions); diff --git a/drivers/mtd/nand/diskonchip.c b/drivers/mtd/nand/diskonchip.c index 51315f55f905..b7f8de7b2780 100644 --- a/drivers/mtd/nand/diskonchip.c +++ b/drivers/mtd/nand/diskonchip.c @@ -29,7 +29,6 @@ #include #include #include -#include #include #include diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c index ee6a6f866b50..16a1714df008 100644 --- a/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c @@ -42,7 +42,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mtd/nand/nand_bbt.c b/drivers/mtd/nand/nand_bbt.c index 469de17107e5..5fedf4a74f16 100644 --- a/drivers/mtd/nand/nand_bbt.c +++ b/drivers/mtd/nand/nand_bbt.c @@ -55,7 +55,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mtd/nand/rtc_from4.c b/drivers/mtd/nand/rtc_from4.c index a033c4cd8e16..67440b5beef8 100644 --- a/drivers/mtd/nand/rtc_from4.c +++ b/drivers/mtd/nand/rtc_from4.c @@ -24,7 +24,6 @@ #include #include #include -#include #include #include #include diff --git a/drivers/mtd/onenand/onenand_bbt.c b/drivers/mtd/onenand/onenand_bbt.c index a91fcac1af01..01ab5b3c453b 100644 --- a/drivers/mtd/onenand/onenand_bbt.c +++ b/drivers/mtd/onenand/onenand_bbt.c @@ -15,7 +15,6 @@ #include #include #include -#include /** * check_short_pattern - [GENERIC] check if a pattern is in the buffer diff --git a/fs/jffs2/nodelist.h b/fs/jffs2/nodelist.h index a881a42f19e3..523a91691052 100644 --- a/fs/jffs2/nodelist.h +++ b/fs/jffs2/nodelist.h @@ -24,7 +24,6 @@ #ifdef __ECOS #include "os-ecos.h" #else -#include /* For compatibility with older kernels */ #include "os-linux.h" #endif diff --git a/include/linux/mtd/compatmac.h b/include/linux/mtd/compatmac.h deleted file mode 100644 index 7d1300d9bd51..000000000000 --- a/include/linux/mtd/compatmac.h +++ /dev/null @@ -1,10 +0,0 @@ - -#ifndef __LINUX_MTD_COMPATMAC_H__ -#define __LINUX_MTD_COMPATMAC_H__ - -/* Nothing to see here. We write 2.5-compatible code and this - file makes it all OK in older kernels, but it's empty in _current_ - kernels. Include guard just to make GCC ignore it in future inclusions - anyway... */ - -#endif /* __LINUX_MTD_COMPATMAC_H__ */ diff --git a/include/linux/mtd/map.h b/include/linux/mtd/map.h index eea3a4fb7405..a9e6ba46865e 100644 --- a/include/linux/mtd/map.h +++ b/include/linux/mtd/map.h @@ -27,7 +27,6 @@ #include #include -#include #include #include diff --git a/include/linux/mtd/mtd.h b/include/linux/mtd/mtd.h index eae914e97f33..8485e42a9b09 100644 --- a/include/linux/mtd/mtd.h +++ b/include/linux/mtd/mtd.h @@ -26,7 +26,6 @@ #include #include -#include #include #include -- cgit v1.2.3