From 5bf2845ece35513971d22b2117f9c3b0f35b6ac7 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 11 Jul 2019 11:38:35 +0200 Subject: dt-bindings: input: Convert Allwinner LRADC to a schema The Allwinner SoCs have an LRADC used to report keys and supported in Linux, with a matching Device Tree binding. Now that we have the DT validation in place, let's convert the device tree bindings for that controller over to a YAML schemas. Signed-off-by: Maxime Ripard Signed-off-by: Rob Herring --- .../input/allwinner,sun4i-a10-lradc-keys.yaml | 95 ++++++++++++++++++++++ .../devicetree/bindings/input/sun4i-lradc-keys.txt | 65 --------------- 2 files changed, 95 insertions(+), 65 deletions(-) create mode 100644 Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml delete mode 100644 Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt diff --git a/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml new file mode 100644 index 000000000000..b3bd8ef7fbd6 --- /dev/null +++ b/Documentation/devicetree/bindings/input/allwinner,sun4i-a10-lradc-keys.yaml @@ -0,0 +1,95 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/input/allwinner,sun4i-a10-lradc-keys.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 LRADC Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +properties: + compatible: + oneOf: + - const: allwinner,sun4i-a10-lradc-keys + - const: allwinner,sun8i-a83t-r-lradc + - items: + - const: allwinner,sun50i-a64-lradc + - const: allwinner,sun8i-a83t-r-lradc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vref-supply: + description: + Regulator for the LRADC reference voltage + +patternProperties: + "^button-[0-9]+$": + type: object + properties: + label: + $ref: /schemas/types.yaml#/definitions/string + description: Descriptive name of the key + + linux,code: + $ref: /schemas/types.yaml#/definitions/uint32 + description: Keycode to emit + + channel: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - enum: [0, 1] + description: ADC Channel this key is attached to + + voltage: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Voltage in microvolts at LRADC input when this key is + pressed + + required: + - label + - linux,code + - channel + - voltage + + additionalProperties: false + +required: + - compatible + - reg + - interrupts + - vref-supply + +additionalProperties: false + +examples: + - | + lradc: lradc@1c22800 { + compatible = "allwinner,sun4i-a10-lradc-keys"; + reg = <0x01c22800 0x100>; + interrupts = <31>; + vref-supply = <®_vcc3v0>; + + button-191 { + label = "Volume Up"; + linux,code = <115>; + channel = <0>; + voltage = <191274>; + }; + + button-392 { + label = "Volume Down"; + linux,code = <114>; + channel = <0>; + voltage = <392644>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt b/Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt deleted file mode 100644 index 507b737612ea..000000000000 --- a/Documentation/devicetree/bindings/input/sun4i-lradc-keys.txt +++ /dev/null @@ -1,65 +0,0 @@ -Allwinner sun4i low res adc attached tablet keys ------------------------------------------------- - -Required properties: - - compatible: should be one of the following string: - "allwinner,sun4i-a10-lradc-keys" - "allwinner,sun8i-a83t-r-lradc" - "allwinner,sun50i-a64-lradc", "allwinner,sun8i-a83t-r-lradc" - - reg: mmio address range of the chip - - interrupts: interrupt to which the chip is connected - - vref-supply: powersupply for the lradc reference voltage - -Each key is represented as a sub-node of the compatible mentioned above: - -Required subnode-properties: - - label: Descriptive name of the key. - - linux,code: Keycode to emit. - - channel: Channel this key is attached to, must be 0 or 1. - - voltage: Voltage in µV at lradc input when this key is pressed. - -Example: - -#include - - lradc: lradc@1c22800 { - compatible = "allwinner,sun4i-a10-lradc-keys"; - reg = <0x01c22800 0x100>; - interrupts = <31>; - vref-supply = <®_vcc3v0>; - - button@191 { - label = "Volume Up"; - linux,code = ; - channel = <0>; - voltage = <191274>; - }; - - button@392 { - label = "Volume Down"; - linux,code = ; - channel = <0>; - voltage = <392644>; - }; - - button@601 { - label = "Menu"; - linux,code = ; - channel = <0>; - voltage = <601151>; - }; - - button@795 { - label = "Enter"; - linux,code = ; - channel = <0>; - voltage = <795090>; - }; - - button@987 { - label = "Home"; - linux,code = ; - channel = <0>; - voltage = <987387>; - }; - }; -- cgit v1.2.3 From 31ca694e864592b90e4bee2fdce14b24645953b1 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 11 Jul 2019 11:40:36 +0200 Subject: dt-bindings: bus: Convert Allwinner DE2 bus to a schema The Allwinner SoCs using the second generation of the display engine have a bus for that display engine. The bus is supported in Linux, with a matching Device Tree binding. Now that we have the DT validation in place, let's convert the device tree bindings for that controller over to a YAML schemas. Signed-off-by: Maxime Ripard [robh: add 'type: object' for child nodes] Signed-off-by: Rob Herring --- .../bindings/bus/allwinner,sun50i-a64-de2.yaml | 85 ++++++++++++++++++++++ .../devicetree/bindings/bus/sun50i-de2-bus.txt | 40 ---------- 2 files changed, 85 insertions(+), 40 deletions(-) create mode 100644 Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml delete mode 100644 Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt diff --git a/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml new file mode 100644 index 000000000000..d2a872286437 --- /dev/null +++ b/Documentation/devicetree/bindings/bus/allwinner,sun50i-a64-de2.yaml @@ -0,0 +1,85 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/allwinner,sun50i-a64-de2.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A64 Display Engine Bus Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +properties: + $nodename: + pattern: "^bus(@[0-9a-f]+)?$" + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + compatible: + oneOf: + - const: allwinner,sun50i-a64-de2 + - items: + - const: allwinner,sun50i-h6-de3 + - const: allwinner,sun50i-a64-de2 + + reg: + maxItems: 1 + + allwinner,sram: + allOf: + - $ref: /schemas/types.yaml#definitions/phandle-array + - maxItems: 1 + description: + The SRAM that needs to be claimed to access the display engine + bus. + + ranges: true + +patternProperties: + # All other properties should be child nodes with unit-address and 'reg' + "^[a-zA-Z][a-zA-Z0-9,+\\-._]{0,63}@[0-9a-fA-F]+$": + type: object + properties: + reg: + maxItems: 1 + + required: + - reg + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + - ranges + - allwinner,sram + +additionalProperties: false + +examples: + - | + bus@1000000 { + compatible = "allwinner,sun50i-a64-de2"; + reg = <0x1000000 0x400000>; + allwinner,sram = <&de2_sram 1>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x1000000 0x400000>; + + display_clocks: clock@0 { + compatible = "allwinner,sun50i-a64-de2-clk"; + reg = <0x0 0x100000>; + clocks = <&ccu 52>, <&ccu 99>; + clock-names = "bus", "mod"; + resets = <&ccu 30>; + #clock-cells = <1>; + #reset-cells = <1>; + }; + }; + +... diff --git a/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt b/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt deleted file mode 100644 index b9d533717dff..000000000000 --- a/Documentation/devicetree/bindings/bus/sun50i-de2-bus.txt +++ /dev/null @@ -1,40 +0,0 @@ -Device tree bindings for Allwinner DE2/3 bus - -The Allwinner A64 DE2 is on a special bus, which needs a SRAM region (SRAM C) -to be claimed for enabling the access. The DE3 on Allwinner H6 is at the same -situation, and the binding also applies. - -Required properties: - - - compatible: Should be one of: - - "allwinner,sun50i-a64-de2" - - "allwinner,sun50i-h6-de3", "allwinner,sun50i-a64-de2" - - reg: A resource specifier for the register space - - #address-cells: Must be set to 1 - - #size-cells: Must be set to 1 - - ranges: Must be set up to map the address space inside the - DE2, for the sub-blocks of DE2. - - allwinner,sram: the SRAM that needs to be claimed - -Example: - - de2@1000000 { - compatible = "allwinner,sun50i-a64-de2"; - reg = <0x1000000 0x400000>; - allwinner,sram = <&de2_sram 1>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x1000000 0x400000>; - - display_clocks: clock@0 { - compatible = "allwinner,sun50i-a64-de2-clk"; - reg = <0x0 0x100000>; - clocks = <&ccu CLK_DE>, - <&ccu CLK_BUS_DE>; - clock-names = "mod", - "bus"; - resets = <&ccu RST_BUS_DE>; - #clock-cells = <1>; - #reset-cells = <1>; - }; - }; -- cgit v1.2.3 From 5f9040fd3dff38b9679f11c5ac7f718a829d4233 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Thu, 11 Jul 2019 14:23:01 +0200 Subject: dt-bindings: crypto: Convert Allwinner A10 Security Engine to a schema The older Allwinner SoCs have a crypto engine that is supported in Linux, with a matching Device Tree binding. Now that we have the DT validation in place, let's convert the device tree bindings for that controller over to a YAML schemas. Signed-off-by: Maxime Ripard Signed-off-by: Rob Herring --- .../crypto/allwinner,sun4i-a10-crypto.yaml | 79 ++++++++++++++++++++++ .../devicetree/bindings/crypto/sun4i-ss.txt | 23 ------- 2 files changed, 79 insertions(+), 23 deletions(-) create mode 100644 Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml delete mode 100644 Documentation/devicetree/bindings/crypto/sun4i-ss.txt diff --git a/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml new file mode 100644 index 000000000000..80b3e7350a73 --- /dev/null +++ b/Documentation/devicetree/bindings/crypto/allwinner,sun4i-a10-crypto.yaml @@ -0,0 +1,79 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/crypto/allwinner,sun4i-a10-crypto.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 Security System Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +properties: + compatible: + oneOf: + - const: allwinner,sun4i-a10-crypto + - items: + - const: allwinner,sun5i-a13-crypto + - const: allwinner,sun4i-a10-crypto + - items: + - const: allwinner,sun6i-a31-crypto + - const: allwinner,sun4i-a10-crypto + - items: + - const: allwinner,sun7i-a20-crypto + - const: allwinner,sun4i-a10-crypto + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Bus Clock + - description: Module Clock + + clock-names: + items: + - const: ahb + - const: mod + + resets: + maxItems: 1 + + reset-names: + const: ahb + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +if: + properties: + compatible: + contains: + const: allwinner,sun6i-a31-crypto + +then: + required: + - resets + - reset-names + +additionalProperties: false + +examples: + - | + crypto: crypto-engine@1c15000 { + compatible = "allwinner,sun4i-a10-crypto"; + reg = <0x01c15000 0x1000>; + interrupts = <86>; + clocks = <&ahb_gates 5>, <&ss_clk>; + clock-names = "ahb", "mod"; + }; + +... diff --git a/Documentation/devicetree/bindings/crypto/sun4i-ss.txt b/Documentation/devicetree/bindings/crypto/sun4i-ss.txt deleted file mode 100644 index f2dc3d9bca92..000000000000 --- a/Documentation/devicetree/bindings/crypto/sun4i-ss.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Allwinner Security System found on A20 SoC - -Required properties: -- compatible : Should be "allwinner,sun4i-a10-crypto". -- reg: Should contain the Security System register location and length. -- interrupts: Should contain the IRQ line for the Security System. -- clocks : List of clock specifiers, corresponding to ahb and ss. -- clock-names : Name of the functional clock, should be - * "ahb" : AHB gating clock - * "mod" : SS controller clock - -Optional properties: - - resets : phandle + reset specifier pair - - reset-names : must contain "ahb" - -Example: - crypto: crypto-engine@1c15000 { - compatible = "allwinner,sun4i-a10-crypto"; - reg = <0x01c15000 0x1000>; - interrupts = ; - clocks = <&ahb_gates 5>, <&ss_clk>; - clock-names = "ahb", "mod"; - }; -- cgit v1.2.3 From cdea0121ae803237ce9b09779194f82ca1467994 Mon Sep 17 00:00:00 2001 From: Mauro Carvalho Chehab Date: Wed, 31 Jul 2019 17:08:49 -0300 Subject: docs: writing-schema.md: convert from markdown to ReST The documentation standard is ReST and not markdown. Signed-off-by: Mauro Carvalho Chehab Acked-by: Rob Herring Signed-off-by: Rob Herring --- Documentation/devicetree/writing-schema.md | 130 ----------------------- Documentation/devicetree/writing-schema.rst | 153 ++++++++++++++++++++++++++++ 2 files changed, 153 insertions(+), 130 deletions(-) delete mode 100644 Documentation/devicetree/writing-schema.md create mode 100644 Documentation/devicetree/writing-schema.rst diff --git a/Documentation/devicetree/writing-schema.md b/Documentation/devicetree/writing-schema.md deleted file mode 100644 index dc032db36262..000000000000 --- a/Documentation/devicetree/writing-schema.md +++ /dev/null @@ -1,130 +0,0 @@ -# Writing DeviceTree Bindings in json-schema - -Devicetree bindings are written using json-schema vocabulary. Schema files are -written in a JSON compatible subset of YAML. YAML is used instead of JSON as it -considered more human readable and has some advantages such as allowing -comments (Prefixed with '#'). - -## Schema Contents - -Each schema doc is a structured json-schema which is defined by a set of -top-level properties. Generally, there is one binding defined per file. The -top-level json-schema properties used are: - -- __$id__ - A json-schema unique identifier string. The string must be a valid -URI typically containing the binding's filename and path. For DT schema, it must -begin with "http://devicetree.org/schemas/". The URL is used in constructing -references to other files specified in schema "$ref" properties. A $ref values -with a leading '/' will have the hostname prepended. A $ref value a relative -path or filename only will be prepended with the hostname and path components -of the current schema file's '$id' value. A URL is used even for local files, -but there may not actually be files present at those locations. - -- __$schema__ - Indicates the meta-schema the schema file adheres to. - -- __title__ - A one line description on the contents of the binding schema. - -- __maintainers__ - A DT specific property. Contains a list of email address(es) -for maintainers of this binding. - -- __description__ - Optional. A multi-line text block containing any detailed -information about this binding. It should contain things such as what the block -or device does, standards the device conforms to, and links to datasheets for -more information. - -- __select__ - Optional. A json-schema used to match nodes for applying the -schema. By default without 'select', nodes are matched against their possible -compatible string values or node name. Most bindings should not need select. - -- __allOf__ - Optional. A list of other schemas to include. This is used to -include other schemas the binding conforms to. This may be schemas for a -particular class of devices such as I2C or SPI controllers. - -- __properties__ - A set of sub-schema defining all the DT properties for the -binding. The exact schema syntax depends on whether properties are known, -common properties (e.g. 'interrupts') or are binding/vendor specific properties. - - A property can also define a child DT node with child properties defined -under it. - - For more details on properties sections, see 'Property Schema' section. - -- __patternProperties__ - Optional. Similar to 'properties', but names are regex. - -- __required__ - A list of DT properties from the 'properties' section that -must always be present. - -- __examples__ - Optional. A list of one or more DTS hunks implementing the -binding. Note: YAML doesn't allow leading tabs, so spaces must be used instead. - -Unless noted otherwise, all properties are required. - -## Property Schema - -The 'properties' section of the schema contains all the DT properties for a -binding. Each property contains a set of constraints using json-schema -vocabulary for that property. The properties schemas are what is used for -validation of DT files. - -For common properties, only additional constraints not covered by the common -binding schema need to be defined such as how many values are valid or what -possible values are valid. - -Vendor specific properties will typically need more detailed schema. With the -exception of boolean properties, they should have a reference to a type in -schemas/types.yaml. A "description" property is always required. - -The Devicetree schemas don't exactly match the YAML encoded DT data produced by -dtc. They are simplified to make them more compact and avoid a bunch of -boilerplate. The tools process the schema files to produce the final schema for -validation. There are currently 2 transformations the tools perform. - -The default for arrays in json-schema is they are variable sized and allow more -entries than explicitly defined. This can be restricted by defining 'minItems', -'maxItems', and 'additionalItems'. However, for DeviceTree Schemas, a fixed -size is desired in most cases, so these properties are added based on the -number of entries in an 'items' list. - -The YAML Devicetree format also makes all string values an array and scalar -values a matrix (in order to define groupings) even when only a single value -is present. Single entries in schemas are fixed up to match this encoding. - -## Testing - -### Dependencies - -The DT schema project must be installed in order to validate the DT schema -binding documents and validate DTS files using the DT schema. The DT schema -project can be installed with pip: - -`pip3 install git+https://github.com/devicetree-org/dt-schema.git@master` - -dtc must also be built with YAML output support enabled. This requires that -libyaml and its headers be installed on the host system. - -### Running checks - -The DT schema binding documents must be validated using the meta-schema (the -schema for the schema) to ensure they are both valid json-schema and valid -binding schema. All of the DT binding documents can be validated using the -`dt_binding_check` target: - -`make dt_binding_check` - -In order to perform validation of DT source files, use the `dtbs_check` target: - -`make dtbs_check` - -This will first run the `dt_binding_check` which generates the processed schema. - -It is also possible to run checks with a single schema file by setting the -'DT_SCHEMA_FILES' variable to a specific schema file. - -`make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/trivial-devices.yaml` - - -## json-schema Resources - -[JSON-Schema Specifications](http://json-schema.org/) - -[Using JSON Schema Book](http://usingjsonschema.com/) diff --git a/Documentation/devicetree/writing-schema.rst b/Documentation/devicetree/writing-schema.rst new file mode 100644 index 000000000000..8f71d1e2ac52 --- /dev/null +++ b/Documentation/devicetree/writing-schema.rst @@ -0,0 +1,153 @@ +:orphan: + +Writing DeviceTree Bindings in json-schema +========================================== + +Devicetree bindings are written using json-schema vocabulary. Schema files are +written in a JSON compatible subset of YAML. YAML is used instead of JSON as it +considered more human readable and has some advantages such as allowing +comments (Prefixed with '#'). + +Schema Contents +--------------- + +Each schema doc is a structured json-schema which is defined by a set of +top-level properties. Generally, there is one binding defined per file. The +top-level json-schema properties used are: + +$id + A json-schema unique identifier string. The string must be a valid + URI typically containing the binding's filename and path. For DT schema, it must + begin with "http://devicetree.org/schemas/". The URL is used in constructing + references to other files specified in schema "$ref" properties. A $ref values + with a leading '/' will have the hostname prepended. A $ref value a relative + path or filename only will be prepended with the hostname and path components + of the current schema file's '$id' value. A URL is used even for local files, + but there may not actually be files present at those locations. + +$schema + Indicates the meta-schema the schema file adheres to. + +title + A one line description on the contents of the binding schema. + +maintainers + A DT specific property. Contains a list of email address(es) + for maintainers of this binding. + +description + Optional. A multi-line text block containing any detailed + information about this binding. It should contain things such as what the block + or device does, standards the device conforms to, and links to datasheets for + more information. + +select + Optional. A json-schema used to match nodes for applying the + schema. By default without 'select', nodes are matched against their possible + compatible string values or node name. Most bindings should not need select. + + allOf + Optional. A list of other schemas to include. This is used to + include other schemas the binding conforms to. This may be schemas for a + particular class of devices such as I2C or SPI controllers. + + properties + A set of sub-schema defining all the DT properties for the + binding. The exact schema syntax depends on whether properties are known, + common properties (e.g. 'interrupts') or are binding/vendor specific properties. + +A property can also define a child DT node with child properties defined +under it. + +For more details on properties sections, see 'Property Schema' section. + +patternProperties + Optional. Similar to 'properties', but names are regex. + +required + A list of DT properties from the 'properties' section that + must always be present. + +examples + Optional. A list of one or more DTS hunks implementing the + binding. Note: YAML doesn't allow leading tabs, so spaces must be used instead. + +Unless noted otherwise, all properties are required. + +Property Schema +--------------- + +The 'properties' section of the schema contains all the DT properties for a +binding. Each property contains a set of constraints using json-schema +vocabulary for that property. The properties schemas are what is used for +validation of DT files. + +For common properties, only additional constraints not covered by the common +binding schema need to be defined such as how many values are valid or what +possible values are valid. + +Vendor specific properties will typically need more detailed schema. With the +exception of boolean properties, they should have a reference to a type in +schemas/types.yaml. A "description" property is always required. + +The Devicetree schemas don't exactly match the YAML encoded DT data produced by +dtc. They are simplified to make them more compact and avoid a bunch of +boilerplate. The tools process the schema files to produce the final schema for +validation. There are currently 2 transformations the tools perform. + +The default for arrays in json-schema is they are variable sized and allow more +entries than explicitly defined. This can be restricted by defining 'minItems', +'maxItems', and 'additionalItems'. However, for DeviceTree Schemas, a fixed +size is desired in most cases, so these properties are added based on the +number of entries in an 'items' list. + +The YAML Devicetree format also makes all string values an array and scalar +values a matrix (in order to define groupings) even when only a single value +is present. Single entries in schemas are fixed up to match this encoding. + +Testing +------- + +Dependencies +~~~~~~~~~~~~ + +The DT schema project must be installed in order to validate the DT schema +binding documents and validate DTS files using the DT schema. The DT schema +project can be installed with pip:: + + pip3 install git+https://github.com/devicetree-org/dt-schema.git@master + +dtc must also be built with YAML output support enabled. This requires that +libyaml and its headers be installed on the host system. + +Running checks +~~~~~~~~~~~~~~ + +The DT schema binding documents must be validated using the meta-schema (the +schema for the schema) to ensure they are both valid json-schema and valid +binding schema. All of the DT binding documents can be validated using the +``dt_binding_check`` target:: + + make dt_binding_check + +In order to perform validation of DT source files, use the `dtbs_check` target:: + + make dtbs_check + +This will first run the `dt_binding_check` which generates the processed schema. + +It is also possible to run checks with a single schema file by setting the +``DT_SCHEMA_FILES`` variable to a specific schema file. + +:: + + make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/trivial-devices.yaml + + +json-schema Resources +--------------------- + + +`JSON-Schema Specifications `_ + +`Using JSON Schema Book `_ -- cgit v1.2.3 From 8d63f97113a7e474b4fbbdc6ccde1091da167211 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 8 Aug 2019 10:51:31 +0200 Subject: dt-bindings: mailbox: meson-mhu: convert to yaml Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic MHU controller over to a YAML schemas. Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Signed-off-by: Rob Herring --- .../bindings/mailbox/amlogic,meson-gxbb-mhu.yaml | 52 ++++++++++++++++++++++ .../devicetree/bindings/mailbox/meson-mhu.txt | 34 -------------- 2 files changed, 52 insertions(+), 34 deletions(-) create mode 100644 Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml delete mode 100644 Documentation/devicetree/bindings/mailbox/meson-mhu.txt diff --git a/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml b/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml new file mode 100644 index 000000000000..319280563648 --- /dev/null +++ b/Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/mailbox/amlogic,meson-gxbb-mhu.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson Message-Handling-Unit Controller + +maintainers: + - Neil Armstrong + +description: | + The Amlogic's Meson SoCs Message-Handling-Unit (MHU) is a mailbox controller + that has 3 independent channels/links to communicate with remote processor(s). + MHU links are hardwired on a platform. A link raises interrupt for any + received data. However, there is no specified way of knowing if the sent + data has been read by the remote. This driver assumes the sender polls + STAT register and the remote clears it after having read the data. + +properties: + compatible: + enum: + - amlogic,meson-gxbb-mhu + + reg: + maxItems: 1 + + interrupts: + minItems: 3 + description: + Contains the interrupt information corresponding to each of the 3 links + of MHU. + + "#mbox-cells": + const: 1 + +required: + - compatible + - reg + - interrupts + - "#mbox-cells" + +examples: + - | + mailbox@c883c404 { + compatible = "amlogic,meson-gxbb-mhu"; + reg = <0xc883c404 0x4c>; + interrupts = <208>, <209>, <210>; + #mbox-cells = <1>; + }; + diff --git a/Documentation/devicetree/bindings/mailbox/meson-mhu.txt b/Documentation/devicetree/bindings/mailbox/meson-mhu.txt deleted file mode 100644 index a530310772b9..000000000000 --- a/Documentation/devicetree/bindings/mailbox/meson-mhu.txt +++ /dev/null @@ -1,34 +0,0 @@ -Amlogic Meson MHU Mailbox Driver -================================ - -The Amlogic's Meson SoCs Message-Handling-Unit (MHU) is a mailbox controller -that has 3 independent channels/links to communicate with remote processor(s). -MHU links are hardwired on a platform. A link raises interrupt for any -received data. However, there is no specified way of knowing if the sent -data has been read by the remote. This driver assumes the sender polls -STAT register and the remote clears it after having read the data. - -Mailbox Device Node: -==================== - -Required properties: --------------------- -- compatible: Shall be "amlogic,meson-gxbb-mhu" -- reg: Contains the mailbox register address range (base - address and length) -- #mbox-cells Shall be 1 - the index of the channel needed. -- interrupts: Contains the interrupt information corresponding to - each of the 2 links of MHU. - -Example: --------- - - mailbox: mailbox@c883c404 { - #mbox-cells = <1>; - compatible = "amlogic,meson-gxbb-mhu"; - reg = <0 0xc883c404 0 0x4c>; - interrupts = <0 208 IRQ_TYPE_EDGE_RISING>, - <0 209 IRQ_TYPE_EDGE_RISING>, - <0 210 IRQ_TYPE_EDGE_RISING>; - #mbox-cells = <1>; - }; -- cgit v1.2.3 From 78db5580af782b4d84279559c75f2fbdc46b3d4b Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 8 Aug 2019 10:51:32 +0200 Subject: dt-bindings: rng: amlogic,meson-rng: convert to yaml Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic Random Number generator over to a YAML schemas. Reviewed-by: Rob Herring Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Rob Herring --- .../devicetree/bindings/rng/amlogic,meson-rng.txt | 21 ------------ .../devicetree/bindings/rng/amlogic,meson-rng.yaml | 37 ++++++++++++++++++++++ 2 files changed, 37 insertions(+), 21 deletions(-) delete mode 100644 Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt create mode 100644 Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml diff --git a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt deleted file mode 100644 index 4d403645ac9b..000000000000 --- a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.txt +++ /dev/null @@ -1,21 +0,0 @@ -Amlogic Meson Random number generator -===================================== - -Required properties: - -- compatible : should be "amlogic,meson-rng" -- reg : Specifies base physical address and size of the registers. - -Optional properties: - -- clocks : phandle to the following named clocks -- clock-names: Name of core clock, must be "core" - -Example: - -rng { - compatible = "amlogic,meson-rng"; - reg = <0x0 0xc8834000 0x0 0x4>; - clocks = <&clkc CLKID_RNG0>; - clock-names = "core"; -}; diff --git a/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml new file mode 100644 index 000000000000..a9ff3cb35c5e --- /dev/null +++ b/Documentation/devicetree/bindings/rng/amlogic,meson-rng.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/rng/amlogic,meson-rng.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson Random number generator + +maintainers: + - Neil Armstrong + +properties: + compatible: + enum: + - amlogic,meson-rng + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: core + +required: + - compatible + - reg + +examples: + - | + rng@c8834000 { + compatible = "amlogic,meson-rng"; + reg = <0xc8834000 0x4>; + }; -- cgit v1.2.3 From 66de150a88896ffa8a954ab09fce91ba116898ef Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 8 Aug 2019 10:51:33 +0200 Subject: dt-bindings: spi: meson: convert to yaml Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic SPI controllers over to two separate YAML schemas. Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Signed-off-by: Rob Herring --- .../bindings/spi/amlogic,meson-gx-spicc.yaml | 67 ++++++++++++++++++++++ .../bindings/spi/amlogic,meson6-spifc.yaml | 53 +++++++++++++++++ .../devicetree/bindings/spi/spi-meson.txt | 55 ------------------ 3 files changed, 120 insertions(+), 55 deletions(-) create mode 100644 Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml create mode 100644 Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml delete mode 100644 Documentation/devicetree/bindings/spi/spi-meson.txt diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml new file mode 100644 index 000000000000..49b617c98ae7 --- /dev/null +++ b/Documentation/devicetree/bindings/spi/amlogic,meson-gx-spicc.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/spi/amlogic,meson-gx-spicc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson SPI Communication Controller + +maintainers: + - Neil Armstrong + +allOf: + - $ref: "spi-controller.yaml#" + +description: | + The Meson SPICC is a generic SPI controller for general purpose Full-Duplex + communications with dedicated 16 words RX/TX PIO FIFOs. + +properties: + compatible: + enum: + - amlogic,meson-gx-spicc # SPICC controller on Amlogic GX and compatible SoCs + - amlogic,meson-axg-spicc # SPICC controller on Amlogic AXG and compatible SoCs + + interrupts: + maxItems: 1 + + reg: + maxItems: 1 + + resets: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + description: input clock for the baud rate generator + items: + - const: core + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +examples: + - | + spi@c1108d80 { + compatible = "amlogic,meson-gx-spicc"; + reg = <0xc1108d80 0x80>; + interrupts = <112>; + clocks = <&clk81>; + clock-names = "core"; + #address-cells = <1>; + #size-cells = <0>; + + ethernet-switch@0 { + compatible = "micrel,ks8995m"; + spi-max-frequency = <1000000>; + reg = <0>; + }; + }; + diff --git a/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml b/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml new file mode 100644 index 000000000000..5f33c39d820b --- /dev/null +++ b/Documentation/devicetree/bindings/spi/amlogic,meson6-spifc.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/spi/amlogic,meson6-spifc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson SPI Flash Controller + +maintainers: + - Neil Armstrong + +allOf: + - $ref: "spi-controller.yaml#" + +description: | + The Meson SPIFC is a controller optimized for communication with SPI + NOR memories, without DMA support and a 64-byte unified transmit / + receive buffer. + +properties: + compatible: + enum: + - amlogic,meson6-spifc # SPI Flash Controller on Meson6 and compatible SoCs + - amlogic,meson-gxbb-spifc # SPI Flash Controller on GXBB and compatible SoCs + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - clocks + +examples: + - | + spi@c1108c80 { + compatible = "amlogic,meson6-spifc"; + reg = <0xc1108c80 0x80>; + clocks = <&clk81>; + #address-cells = <1>; + #size-cells = <0>; + + flash: flash@0 { + compatible = "spansion,m25p80", "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <40000000>; + }; + }; + diff --git a/Documentation/devicetree/bindings/spi/spi-meson.txt b/Documentation/devicetree/bindings/spi/spi-meson.txt deleted file mode 100644 index b7f5e86fed22..000000000000 --- a/Documentation/devicetree/bindings/spi/spi-meson.txt +++ /dev/null @@ -1,55 +0,0 @@ -Amlogic Meson SPI controllers - -* SPIFC (SPI Flash Controller) - -The Meson SPIFC is a controller optimized for communication with SPI -NOR memories, without DMA support and a 64-byte unified transmit / -receive buffer. - -Required properties: - - compatible: should be "amlogic,meson6-spifc" or "amlogic,meson-gxbb-spifc" - - reg: physical base address and length of the controller registers - - clocks: phandle of the input clock for the baud rate generator - - #address-cells: should be 1 - - #size-cells: should be 0 - - spi@c1108c80 { - compatible = "amlogic,meson6-spifc"; - reg = <0xc1108c80 0x80>; - clocks = <&clk81>; - #address-cells = <1>; - #size-cells = <0>; - }; - -* SPICC (SPI Communication Controller) - -The Meson SPICC is generic SPI controller for general purpose Full-Duplex -communications with dedicated 16 words RX/TX PIO FIFOs. - -Required properties: - - compatible: should be: - "amlogic,meson-gx-spicc" on Amlogic GX and compatible SoCs. - "amlogic,meson-axg-spicc" on Amlogic AXG and compatible SoCs - - reg: physical base address and length of the controller registers - - interrupts: The interrupt specifier - - clock-names: Must contain "core" - - clocks: phandle of the input clock for the baud rate generator - - #address-cells: should be 1 - - #size-cells: should be 0 - -Optional properties: - - resets: phandle of the internal reset line - -See ../spi/spi-bus.txt for more details on SPI bus master and slave devices -required and optional properties. - -Example : - spi@c1108d80 { - compatible = "amlogic,meson-gx-spicc"; - reg = <0xc1108d80 0x80>; - interrupts = ; - clock-names = "core"; - clocks = <&clk81>; - #address-cells = <1>; - #size-cells = <0>; - }; -- cgit v1.2.3 From 018562f36f8c6c473354e85c2323d72bd77977f2 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 8 Aug 2019 10:51:34 +0200 Subject: dt-bindings: reset: amlogic,meson-reset: convert to yaml Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic Reset controller over to a YAML schemas. Reviewed-by: Rob Herring Acked-by: Philipp Zabel Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Rob Herring --- .../bindings/reset/amlogic,meson-reset.txt | 19 ----------- .../bindings/reset/amlogic,meson-reset.yaml | 37 ++++++++++++++++++++++ 2 files changed, 37 insertions(+), 19 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/amlogic,meson-reset.txt create mode 100644 Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.txt b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.txt deleted file mode 100644 index 28ef6c295c76..000000000000 --- a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.txt +++ /dev/null @@ -1,19 +0,0 @@ -Amlogic Meson SoC Reset Controller -======================================= - -Please also refer to reset.txt in this directory for common reset -controller binding usage. - -Required properties: -- compatible: Should be "amlogic,meson8b-reset", "amlogic,meson-gxbb-reset" or - "amlogic,meson-axg-reset". -- reg: should contain the register address base -- #reset-cells: 1, see below - -example: - -reset: reset-controller { - compatible = "amlogic,meson-gxbb-reset"; - reg = <0x0 0x04404 0x0 0x20>; - #reset-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml new file mode 100644 index 000000000000..00917d868d58 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/amlogic,meson-reset.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/amlogic,meson-reset.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson SoC Reset Controller + +maintainers: + - Neil Armstrong + +properties: + compatible: + enum: + - amlogic,meson8b-reset # Reset Controller on Meson8b and compatible SoCs + - amlogic,meson-gxbb-reset # Reset Controller on GXBB and compatible SoCs + - amlogic,meson-axg-reset # Reset Controller on AXG and compatible SoCs + + reg: + maxItems: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#reset-cells" + +examples: + - | + reset-controller@c884404 { + compatible = "amlogic,meson-gxbb-reset"; + reg = <0xc884404 0x20>; + #reset-cells = <1>; + }; -- cgit v1.2.3 From f50ffbc5e9eb463d84073e023ffe07280b30ac50 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 8 Aug 2019 10:51:35 +0200 Subject: dt-bindings: arm: amlogic: amlogic,meson-gx-ao-secure: convert to yaml Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic Always-On Secure Registers over to a YAML schemas. Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Signed-off-by: Rob Herring --- .../arm/amlogic/amlogic,meson-gx-ao-secure.txt | 28 ------------ .../arm/amlogic/amlogic,meson-gx-ao-secure.yaml | 52 ++++++++++++++++++++++ 2 files changed, 52 insertions(+), 28 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt create mode 100644 Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt deleted file mode 100644 index c67d9f48fb91..000000000000 --- a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.txt +++ /dev/null @@ -1,28 +0,0 @@ -Amlogic Meson Firmware registers Interface ------------------------------------------- - -The Meson SoCs have a register bank with status and data shared with the -secure firmware. - -Required properties: - - compatible: For Meson GX SoCs, must be "amlogic,meson-gx-ao-secure", "syscon" - -Properties should indentify components of this register interface : - -Meson GX SoC Information ------------------------- -A firmware register encodes the SoC type, package and revision information on -the Meson GX SoCs. -If present, the following property should be added : - -Optional properties: - - amlogic,has-chip-id: If present, the interface gives the current SoC version. - -Example -------- - -ao-secure@140 { - compatible = "amlogic,meson-gx-ao-secure", "syscon"; - reg = <0x0 0x140 0x0 0x140>; - amlogic,has-chip-id; -}; diff --git a/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml new file mode 100644 index 000000000000..853d7d2b56f5 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/amlogic/amlogic,meson-gx-ao-secure.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/arm/amlogic/amlogic,meson-gx-ao-secure.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson Firmware registers Interface + +maintainers: + - Neil Armstrong + +description: | + The Meson SoCs have a register bank with status and data shared with the + secure firmware. + +# We need a select here so we don't match all nodes with 'syscon' +select: + properties: + compatible: + contains: + const: amlogic,meson-gx-ao-secure + required: + - compatible + +properties: + compatible: + items: + - const: amlogic,meson-gx-ao-secure + - const: syscon + + reg: + maxItems: 1 + + amlogic,has-chip-id: + description: | + A firmware register encodes the SoC type, package and revision + information on the Meson GX SoCs. If present, the interface gives + the current SoC version. + type: boolean + +required: + - compatible + - reg + +examples: + - | + ao-secure@140 { + compatible = "amlogic,meson-gx-ao-secure", "syscon"; + reg = <0x140 0x140>; + amlogic,has-chip-id; + }; -- cgit v1.2.3 From da86d286cce83d775066b15f650807c6a285afc2 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 8 Aug 2019 10:51:36 +0200 Subject: dt-bindings: phy: meson-g12a-usb2-phy: convert to yaml Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic G12A USB2 PHY over to a YAML schemas. While the original phy bindings specifies phy-supply as required, the examples and implementations makes it optional, thus phy-supply is not in the required list of attributes. Reviewed-by: Rob Herring Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Rob Herring --- .../bindings/phy/amlogic,meson-g12a-usb2-phy.yaml | 63 ++++++++++++++++++++++ .../bindings/phy/meson-g12a-usb2-phy.txt | 22 -------- 2 files changed, 63 insertions(+), 22 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml delete mode 100644 Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml new file mode 100644 index 000000000000..51254b4e65dd --- /dev/null +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb2-phy.yaml @@ -0,0 +1,63 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/amlogic,meson-g12a-usb2-phy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic G12A USB2 PHY + +maintainers: + - Neil Armstrong + +properties: + compatible: + enum: + - amlogic,meson-g12a-usb2-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: xtal + + resets: + maxItems: 1 + + reset-names: + items: + - const: phy + + "#phy-cells": + const: 0 + + phy-supply: + maxItems: 1 + description: + Phandle to a regulator that provides power to the PHY. This + regulator will be managed during the PHY power on/off sequence. + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - "#phy-cells" + +examples: + - | + phy@36000 { + compatible = "amlogic,meson-g12a-usb2-phy"; + reg = <0x36000 0x2000>; + clocks = <&xtal>; + clock-names = "xtal"; + resets = <&phy_reset>; + reset-names = "phy"; + #phy-cells = <0>; + }; diff --git a/Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt b/Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt deleted file mode 100644 index a6ebc3dea159..000000000000 --- a/Documentation/devicetree/bindings/phy/meson-g12a-usb2-phy.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Amlogic G12A USB2 PHY binding - -Required properties: -- compatible: Should be "amlogic,meson-g12a-usb2-phy" -- reg: The base address and length of the registers -- #phys-cells: must be 0 (see phy-bindings.txt in this directory) -- clocks: a phandle to the clock of this PHY -- clock-names: must be "xtal" -- resets: a phandle to the reset line of this PHY -- reset-names: must be "phy" -- phy-supply: see phy-bindings.txt in this directory - -Example: - usb2_phy0: phy@36000 { - compatible = "amlogic,g12a-usb2-phy"; - reg = <0x0 0x36000 0x0 0x2000>; - clocks = <&xtal>; - clock-names = "xtal"; - resets = <&reset RESET_USB_PHY21>; - reset-names = "phy"; - #phy-cells = <0>; - }; -- cgit v1.2.3 From 87a55485f2fc3819ad20f6e7f33fd5a252f8e869 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 8 Aug 2019 10:51:37 +0200 Subject: dt-bindings: phy: meson-g12a-usb3-pcie-phy: convert to yaml Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic G12A USB3 + PCIE Combo PHY over to a YAML schemas. While the original phy bindings specifies phy-supply as required, the examples and implementations makes it optional, thus phy-supply is not present in the properties and required lists. Reviewed-by: Rob Herring Signed-off-by: Neil Armstrong Reviewed-by: Martin Blumenstingl Signed-off-by: Rob Herring --- .../phy/amlogic,meson-g12a-usb3-pcie-phy.yaml | 57 ++++++++++++++++++++++ .../bindings/phy/meson-g12a-usb3-pcie-phy.txt | 22 --------- 2 files changed, 57 insertions(+), 22 deletions(-) create mode 100644 Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml delete mode 100644 Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt diff --git a/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml new file mode 100644 index 000000000000..346f9c35427c --- /dev/null +++ b/Documentation/devicetree/bindings/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/phy/amlogic,meson-g12a-usb3-pcie-phy.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic G12A USB3 + PCIE Combo PHY + +maintainers: + - Neil Armstrong + +properties: + compatible: + enum: + - amlogic,meson-g12a-usb3-pcie-phy + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: ref_clk + + resets: + maxItems: 1 + + reset-names: + items: + - const: phy + + "#phy-cells": + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - resets + - reset-names + - "#phy-cells" + +examples: + - | + phy@46000 { + compatible = "amlogic,meson-g12a-usb3-pcie-phy"; + reg = <0x46000 0x2000>; + clocks = <&ref_clk>; + clock-names = "ref_clk"; + resets = <&phy_reset>; + reset-names = "phy"; + #phy-cells = <1>; + }; diff --git a/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt b/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt deleted file mode 100644 index 7cfc17e2df31..000000000000 --- a/Documentation/devicetree/bindings/phy/meson-g12a-usb3-pcie-phy.txt +++ /dev/null @@ -1,22 +0,0 @@ -* Amlogic G12A USB3 + PCIE Combo PHY binding - -Required properties: -- compatible: Should be "amlogic,meson-g12a-usb3-pcie-phy" -- #phys-cells: must be 1. The cell number is used to select the phy mode - as defined in between PHY_TYPE_USB3 and PHY_TYPE_PCIE -- reg: The base address and length of the registers -- clocks: a phandle to the 100MHz reference clock of this PHY -- clock-names: must be "ref_clk" -- resets: phandle to the reset lines for the PHY control -- reset-names: must be "phy" - -Example: - usb3_pcie_phy: phy@46000 { - compatible = "amlogic,g12a-usb3-pcie-phy"; - reg = <0x0 0x46000 0x0 0x2000>; - clocks = <&clkc CLKID_PCIE_PLL>; - clock-names = "ref_clk"; - resets = <&reset RESET_PCIE_PHY>; - reset-names = "phy"; - #phy-cells = <1>; - }; -- cgit v1.2.3 From 4df7e9a13953f95c3970d7a1fa97f8bc16f83a37 Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 8 Aug 2019 10:51:38 +0200 Subject: dt-bindings: serial: meson-uart: convert to yaml Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic UART Serial controller over to a YAML schemas. Reviewed-by: Rob Herring Reviewed-by: Martin Blumenstingl Signed-off-by: Neil Armstrong Signed-off-by: Rob Herring --- .../bindings/serial/amlogic,meson-uart.txt | 38 ----------- .../bindings/serial/amlogic,meson-uart.yaml | 73 ++++++++++++++++++++++ 2 files changed, 73 insertions(+), 38 deletions(-) delete mode 100644 Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt create mode 100644 Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt deleted file mode 100644 index c06c045126fc..000000000000 --- a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.txt +++ /dev/null @@ -1,38 +0,0 @@ -Amlogic Meson SoC UART Serial Interface -======================================= - -The Amlogic Meson SoC UART Serial Interface is present on a large range -of SoCs, and can be present either in the "Always-On" power domain or the -"Everything-Else" power domain. - -The particularity of the "Always-On" Serial Interface is that the hardware -is active since power-on and does not need any clock gating and is usable -as very early serial console. - -Required properties: -- compatible : compatible: value should be different for each SoC family as : - - Meson6 : "amlogic,meson6-uart" - - Meson8 : "amlogic,meson8-uart" - - Meson8b : "amlogic,meson8b-uart" - - GX (GXBB, GXL, GXM) : "amlogic,meson-gx-uart" - eventually followed by : "amlogic,meson-ao-uart" if this UART interface - is in the "Always-On" power domain. -- reg : offset and length of the register set for the device. -- interrupts : identifier to the device interrupt -- clocks : a list of phandle + clock-specifier pairs, one for each - entry in clock names. -- clock-names : - * "xtal" for external xtal clock identifier - * "pclk" for the bus core clock, either the clk81 clock or the gate clock - * "baud" for the source of the baudrate generator, can be either the xtal - or the pclk. - -e.g. -uart_A: serial@84c0 { - compatible = "amlogic,meson-gx-uart"; - reg = <0x0 0x84c0 0x0 0x14>; - interrupts = ; - /* Use xtal as baud rate clock source */ - clocks = <&xtal>, <&clkc CLKID_UART0>, <&xtal>; - clock-names = "xtal", "pclk", "baud"; -}; diff --git a/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml new file mode 100644 index 000000000000..214fe8beddc3 --- /dev/null +++ b/Documentation/devicetree/bindings/serial/amlogic,meson-uart.yaml @@ -0,0 +1,73 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/serial/amlogic,meson-uart.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson SoC UART Serial Interface + +maintainers: + - Neil Armstrong + +description: | + The Amlogic Meson SoC UART Serial Interface is present on a large range + of SoCs, and can be present either in the "Always-On" power domain or the + "Everything-Else" power domain. + + The particularity of the "Always-On" Serial Interface is that the hardware + is active since power-on and does not need any clock gating and is usable + as very early serial console. + +properties: + compatible: + oneOf: + - description: Always-on power domain UART controller + items: + - enum: + - amlogic,meson6-uart + - amlogic,meson8-uart + - amlogic,meson8b-uart + - amlogic,meson-gx-uart + - const: amlogic,meson-ao-uart + - description: Everything-Else power domain UART controller + enum: + - amlogic,meson6-uart + - amlogic,meson8-uart + - amlogic,meson8b-uart + - amlogic,meson-gx-uart + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: external xtal clock identifier + - description: the bus core clock, either the clk81 clock or the gate clock + - description: the source of the baudrate generator, can be either the xtal or the pclk + + clock-names: + items: + - const: xtal + - const: pclk + - const: baud + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +examples: + - | + serial@84c0 { + compatible = "amlogic,meson-gx-uart"; + reg = <0x84c0 0x14>; + interrupts = <26>; + clocks = <&xtal>, <&pclk>, <&xtal>; + clock-names = "xtal", "pclk", "baud"; + }; -- cgit v1.2.3 From 0d530aa6894c149a0a6cd36d63b03738817b745e Mon Sep 17 00:00:00 2001 From: Neil Armstrong Date: Thu, 8 Aug 2019 10:51:39 +0200 Subject: dt-bindings: watchdog: meson-gxbb-wdt: convert to yaml Now that we have the DT validation in place, let's convert the device tree bindings for the Amlogic GXBB Watchdog timer over to a YAML schemas. Reviewed-by: Rob Herring Reviewed-by: Guenter Roeck Signed-off-by: Neil Armstrong Signed-off-by: Rob Herring --- .../bindings/watchdog/amlogic,meson-gxbb-wdt.yaml | 37 ++++++++++++++++++++++ .../bindings/watchdog/meson-gxbb-wdt.txt | 16 ---------- 2 files changed, 37 insertions(+), 16 deletions(-) create mode 100644 Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml delete mode 100644 Documentation/devicetree/bindings/watchdog/meson-gxbb-wdt.txt diff --git a/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml b/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml new file mode 100644 index 000000000000..d7352f709b37 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/amlogic,meson-gxbb-wdt.yaml @@ -0,0 +1,37 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2019 BayLibre, SAS +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/watchdog/amlogic,meson-gxbb-wdt.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Meson GXBB SoCs Watchdog timer + +maintainers: + - Neil Armstrong + +properties: + compatible: + enum: + - amlogic,meson-gxbb-wdt + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + description: + A phandle to the clock of this PHY + +required: + - compatible + - reg + - clocks + +examples: + - | + watchdog@98d0 { + compatible = "amlogic,meson-gxbb-wdt"; + reg = <0x98d0 0x10>; + clocks = <&xtal>; + }; diff --git a/Documentation/devicetree/bindings/watchdog/meson-gxbb-wdt.txt b/Documentation/devicetree/bindings/watchdog/meson-gxbb-wdt.txt deleted file mode 100644 index c7fe36fa739c..000000000000 --- a/Documentation/devicetree/bindings/watchdog/meson-gxbb-wdt.txt +++ /dev/null @@ -1,16 +0,0 @@ -Meson GXBB SoCs Watchdog timer - -Required properties: - -- compatible : should be "amlogic,meson-gxbb-wdt" -- reg : Specifies base physical address and size of the registers. -- clocks : Should be a phandle to the Watchdog clock source, for GXBB the xtal - is the default clock source. - -Example: - -wdt: watchdog@98d0 { - compatible = "amlogic,meson-gxbb-wdt"; - reg = <0 0x98d0 0x0 0x10>; - clocks = <&xtal>; -}; -- cgit v1.2.3 From 7aa8dd91da63af535b3b9153257e089254982b7e Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Tue, 13 Aug 2019 11:38:25 -0700 Subject: devicetree: Expose dtbs_check and dt_binding_check some more It wasn't obvious that this was a command to run based on 'make help', so add it to the top-level help for devicetree builds. Also, add an example to the documentation to show that db_binding_check can be run with DT_SCHEMA_FILES= to only check one schema file instead of all of them. Cc: Masahiro Yamada Cc: Cc: Cc: Signed-off-by: Stephen Boyd [robh: fix-up due to .md to .rst conversion] Signed-off-by: Rob Herring --- Documentation/devicetree/writing-schema.rst | 1 + Makefile | 6 ++++-- 2 files changed, 5 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/writing-schema.rst b/Documentation/devicetree/writing-schema.rst index 8f71d1e2ac52..f4a638072262 100644 --- a/Documentation/devicetree/writing-schema.rst +++ b/Documentation/devicetree/writing-schema.rst @@ -141,6 +141,7 @@ It is also possible to run checks with a single schema file by setting the :: + make dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/trivial-devices.yaml make dtbs_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/trivial-devices.yaml diff --git a/Makefile b/Makefile index fa0fbe7851ea..e99bd31e5139 100644 --- a/Makefile +++ b/Makefile @@ -1506,8 +1506,10 @@ help: @echo '' @$(if $(dtstree), \ echo 'Devicetree:'; \ - echo '* dtbs - Build device tree blobs for enabled boards'; \ - echo ' dtbs_install - Install dtbs to $(INSTALL_DTBS_PATH)'; \ + echo '* dtbs - Build device tree blobs for enabled boards'; \ + echo ' dtbs_install - Install dtbs to $(INSTALL_DTBS_PATH)'; \ + echo ' dt_binding_check - Validate device tree binding documents'; \ + echo ' dtbs_check - Validate device tree source files';\ echo '') @echo 'Userspace tools targets:' -- cgit v1.2.3 From 523c620254b1dd406924c6270790be0e05b2b997 Mon Sep 17 00:00:00 2001 From: Bin Meng Date: Sun, 28 Jul 2019 02:30:19 -0700 Subject: dt-bindings: pci: pci-msi: Correct the unit-address of the pci node name The unit-address must match the first address specified in the reg property of the node. Signed-off-by: Bin Meng Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/pci/pci-msi.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pci/pci-msi.txt b/Documentation/devicetree/bindings/pci/pci-msi.txt index 9b3cc817d181..b73d839657b6 100644 --- a/Documentation/devicetree/bindings/pci/pci-msi.txt +++ b/Documentation/devicetree/bindings/pci/pci-msi.txt @@ -201,7 +201,7 @@ Example (5) #msi-cells = <1>; }; - pci: pci@c { + pci: pci@f { reg = <0xf 0x1>; compatible = "vendor,pcie-root-complex"; device_type = "pci"; -- cgit v1.2.3 From f84470749bb9d849678cc852f26b0968bc361b83 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Mon, 19 Aug 2019 23:48:38 +0000 Subject: dt-bindings: gpu: mali-utgard: add hisilicon,hi6220-mali compatible The Hisilicon hi6220 uses a Mali-450MP4 with 4 PPs, so add a compatible for it. Cc: David Airlie Cc: Daniel Vetter Cc: Rob Herring Cc: Mark Rutland Cc: Philipp Zabel Cc: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring Signed-off-by: Peter Griffin Signed-off-by: John Stultz Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt index b352a6851a06..ba895efe3039 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt @@ -24,6 +24,7 @@ Required properties: + rockchip,rk3228-mali + rockchip,rk3328-mali + stericsson,db8500-mali + + hisilicon,hi6220-mali - reg: Physical base address and length of the GPU registers @@ -98,6 +99,10 @@ to specify one more vendor-specific compatible, among: * interrupt-names and interrupts: + combined: combined interrupt of all of the above lines + - hisilicon,hi6220-mali + Required properties: + * resets: phandles to the reset lines for the GPU + Example: mali: gpu@1c40000 { -- cgit v1.2.3 From 33a1c553d026f18e5dd6bde5c50ad16b57553f55 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Mon, 19 Aug 2019 23:48:39 +0000 Subject: dt-bindings: reset: hisilicon: Update compatible documentation The reset driver now supports the ao reset controller, so update the documentation to match. Cc: David Airlie Cc: Daniel Vetter Cc: Rob Herring Cc: Mark Rutland Cc: Philipp Zabel Cc: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring Signed-off-by: Peter Griffin Signed-off-by: John Stultz Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt index c25da39df707..ea0a6a9734c1 100644 --- a/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt +++ b/Documentation/devicetree/bindings/reset/hisilicon,hi6220-reset.txt @@ -11,6 +11,7 @@ Required properties: - compatible: should be one of the following: - "hisilicon,hi6220-sysctrl", "syscon" : For peripheral reset controller. - "hisilicon,hi6220-mediactrl", "syscon" : For media reset controller. + - "hisilicon,hi6220-aoctrl", "syscon" : For ao reset controller. - reg: should be register base and length as documented in the datasheet - #reset-cells: 1, see below -- cgit v1.2.3 From 5f912f7ced427db56729e6419b1fdff9226e0728 Mon Sep 17 00:00:00 2001 From: Peter Griffin Date: Mon, 19 Aug 2019 23:48:40 +0000 Subject: dt-bindings: reset: hisilicon: Add ao reset controller This is required to bring Mali450 gpu out of reset. Cc: David Airlie Cc: Daniel Vetter Cc: Rob Herring Cc: Mark Rutland Cc: Philipp Zabel Cc: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org Reviewed-by: Rob Herring Signed-off-by: Peter Griffin Signed-off-by: John Stultz Signed-off-by: Rob Herring --- include/dt-bindings/reset/hisi,hi6220-resets.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/dt-bindings/reset/hisi,hi6220-resets.h b/include/dt-bindings/reset/hisi,hi6220-resets.h index e7c362a81a97..63aff7d8aa45 100644 --- a/include/dt-bindings/reset/hisi,hi6220-resets.h +++ b/include/dt-bindings/reset/hisi,hi6220-resets.h @@ -73,4 +73,11 @@ #define MEDIA_MMU 6 #define MEDIA_XG2RAM1 7 +#define AO_G3D 1 +#define AO_CODECISP 2 +#define AO_MCPU 4 +#define AO_BBPHARQMEM 5 +#define AO_HIFI 8 +#define AO_ACPUSCUL2C 12 + #endif /*_DT_BINDINGS_RESET_CONTROLLER_HI6220*/ -- cgit v1.2.3 From ece644858c253528c1917c9f2751ef4be32408cc Mon Sep 17 00:00:00 2001 From: Vinod Koul Date: Tue, 20 Aug 2019 22:40:20 +0530 Subject: dt-bindings: arm: Add kryo485 compatible Kryo485 is found in SM8150, so add it it list of cpu compatibles Signed-off-by: Vinod Koul Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index aa40b074b864..032f759612af 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -155,6 +155,7 @@ properties: - qcom,krait - qcom,kryo - qcom,kryo385 + - qcom,kryo485 - qcom,scorpion enable-method: -- cgit v1.2.3 From 956aa03b52e9c07e6ba769afd4e6f8c43436d02c Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Wed, 31 Jul 2019 13:42:01 +0200 Subject: dt-bindings: arm-boards: Update pointer to ARM CPU bindings The ARM CPU DT bindings were converted from plain text to YAML, but not all referrers were updated. Fixes: 672951cbd1b70a9e ("dt-bindings: arm: Convert cpu binding to json-schema") Signed-off-by: Geert Uytterhoeven Acked-by: Linus Walleij Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/arm-boards | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/arm-boards b/Documentation/devicetree/bindings/arm/arm-boards index 6758ece324b1..b2a9f9f8430b 100644 --- a/Documentation/devicetree/bindings/arm/arm-boards +++ b/Documentation/devicetree/bindings/arm/arm-boards @@ -199,7 +199,7 @@ The description for the board must include: A detailed description of the bindings used for "psci" nodes is present in the psci.yaml file. - a "cpus" node describing the available cores and their associated - "enable-method"s. For more details see cpus.txt file. + "enable-method"s. For more details see cpus.yaml file. Example: -- cgit v1.2.3 From 3ffce7b6100cbfc1dcbec8be2b824b2d75866455 Mon Sep 17 00:00:00 2001 From: Miquel Raynal Date: Wed, 31 Jul 2019 14:25:35 +0200 Subject: dt-bindings: ata: fix typo in Allwinner R40 reset specific paragraph "Property" is misspelled, correct it. Fixes: caf8975b97c1 ("dt-bindings: ata: update ahci_sunxi bindings") Signed-off-by: Miquel Raynal Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/ata/ahci-platform.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/ata/ahci-platform.txt b/Documentation/devicetree/bindings/ata/ahci-platform.txt index e30fd106df4f..55c6fab1b373 100644 --- a/Documentation/devicetree/bindings/ata/ahci-platform.txt +++ b/Documentation/devicetree/bindings/ata/ahci-platform.txt @@ -45,7 +45,7 @@ Required properties when using sub-nodes: - #address-cells : number of cells to encode an address - #size-cells : number of cells representing the size of an address -For allwinner,sun8i-r40-ahci, the reset propertie must be present. +For allwinner,sun8i-r40-ahci, the reset property must be present. Sub-nodes required properties: - reg : the port number -- cgit v1.2.3 From f981322804ca39bb836cf3fbfdebbc47d6584731 Mon Sep 17 00:00:00 2001 From: Fabien Parent Date: Mon, 5 Aug 2019 15:02:15 +0200 Subject: dt-bindings: rng: mtk-rng: Add documentation for MT8516 This commit adds the device-tree documentation for the RNG IP on the MediaTek MT8516 SoC. Signed-off-by: Fabien Parent Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/rng/mtk-rng.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/rng/mtk-rng.txt b/Documentation/devicetree/bindings/rng/mtk-rng.txt index 2bc89f133701..dfdcb5cd2ea8 100644 --- a/Documentation/devicetree/bindings/rng/mtk-rng.txt +++ b/Documentation/devicetree/bindings/rng/mtk-rng.txt @@ -6,6 +6,7 @@ Required properties: "mediatek,mt7622-rng", "mediatek,mt7623-rng" : for MT7622 "mediatek,mt7629-rng", "mediatek,mt7623-rng" : for MT7629 "mediatek,mt7623-rng" : for MT7623 + "mediatek,mt8516-rng", "mediatek,mt7623-rng" : for MT8516 - clocks : list of clock specifiers, corresponding to entries in clock-names property; - clock-names : Should contain "rng" entries; -- cgit v1.2.3 From 3e627fe6d56a4bbed9177ee20229c6aae61e11c5 Mon Sep 17 00:00:00 2001 From: John Wang Date: Sat, 10 Aug 2019 17:58:36 +0800 Subject: dt-bindings: Add vendor prefix for Inspur Corporation Signed-off-by: John Wang Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 6992bbbbffab..cb98f7d70c73 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -437,6 +437,8 @@ patternProperties: description: Innolux Corporation "^inside-secure,.*": description: INSIDE Secure + "^inspur,.*": + description: Inspur Corporation "^intel,.*": description: Intel Corporation "^intercontrol,.*": -- cgit v1.2.3 From 476646e09668cc85138adec726a94f76ca83740d Mon Sep 17 00:00:00 2001 From: Sakari Ailus Date: Tue, 13 Aug 2019 16:45:18 +0300 Subject: dt-bindings: smiapp: Align documentation with current practices - The clock-lanes property is not needed for the sensors do not support lane reordering. (The information possibly present in existing clock-lane properties is simply not used.) - There's no need to refer to the sensor device in the DT example, thus remove the label. - Rename the "camera" device node as "camera-sensor". - Rename the endpoint label as "smiapp_ep" (was: "smiapp_1_1"). There is in practice only one anyway. - Remove the remote-endpoint documentation (it is covered by graph.txt to which video-interfaces.txt refers to). - Add a note on the port and endpoint nodes. These changes make the smiapp bindings a better example. Signed-off-by: Sakari Ailus Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/media/i2c/nokia,smia.txt | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/media/i2c/nokia,smia.txt b/Documentation/devicetree/bindings/media/i2c/nokia,smia.txt index 8ee7c7972ac7..c3c3479233c4 100644 --- a/Documentation/devicetree/bindings/media/i2c/nokia,smia.txt +++ b/Documentation/devicetree/bindings/media/i2c/nokia,smia.txt @@ -7,6 +7,9 @@ of that. These definitions are valid for both types of sensors. More detailed documentation can be found in Documentation/devicetree/bindings/media/video-interfaces.txt . +The device node should contain a "port" node which may contain one or more +endpoint nodes, in accordance with video interface bindings defined in +Documentation/devicetree/bindings/media/video-interfaces.txt . Mandatory properties -------------------- @@ -37,9 +40,7 @@ Optional properties Endpoint node mandatory properties ---------------------------------- -- clock-lanes: <0> - data-lanes: <1..n> -- remote-endpoint: A phandle to the bus receiver's endpoint node. Example @@ -48,7 +49,7 @@ Example &i2c2 { clock-frequency = <400000>; - smiapp_1: camera@10 { + camera-sensor@10 { compatible = "nokia,smia"; reg = <0x10>; reset-gpios = <&gpio3 20 0>; @@ -58,8 +59,7 @@ Example nokia,nvm-size = <512>; /* 8 * 64 */ link-frequencies = /bits/ 64 <199200000 210000000 499200000>; port { - smiapp_1_1: endpoint { - clock-lanes = <0>; + smiapp_ep: endpoint { data-lanes = <1 2>; remote-endpoint = <&csi2a_ep>; }; -- cgit v1.2.3 From a7bcae591f595a727feea9a5a389756015579072 Mon Sep 17 00:00:00 2001 From: Nishka Dasgupta Date: Thu, 15 Aug 2019 11:52:18 +0530 Subject: of: unittest: Add of_node_put() before return The local variable np in function of_unittest_platform_populate takes the return value of of_find_node_by_path, which gets a node but does not put it. If np is not put before return it may cause a memory leak. Hence put np before a return statement. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta Signed-off-by: Rob Herring --- drivers/of/unittest.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index e6b175370f2e..480a21e2ed39 100644 --- a/drivers/of/unittest.c +++ b/drivers/of/unittest.c @@ -1044,8 +1044,10 @@ static void __init of_unittest_platform_populate(void) test_bus = platform_device_register_full(&test_bus_info); rc = PTR_ERR_OR_ZERO(test_bus); unittest(!rc, "testbus registration failed; rc=%i\n", rc); - if (rc) + if (rc) { + of_node_put(np); return; + } test_bus->dev.of_node = np; /* -- cgit v1.2.3 From 2eccb5655660a2bcdf2eecbff7068bc22d478915 Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 21 Aug 2019 10:21:37 +0200 Subject: dt-bindings: irq: Convert Allwinner IRQ Controller to a schema The Allwinner SoCs have an interrupt controller supported in Linux, with a matching Device Tree binding. Now that we have the DT validation in place, let's convert the device tree bindings for that controller over to a YAML schemas. Signed-off-by: Maxime Ripard Signed-off-by: Rob Herring --- .../allwinner,sun4i-a10-ic.yaml | 47 ++++++++++++++++++++++ .../interrupt-controller/allwinner,sun4i-ic.txt | 20 --------- 2 files changed, 47 insertions(+), 20 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml new file mode 100644 index 000000000000..23a202d24e43 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-a10-ic.yaml @@ -0,0 +1,47 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun4i-a10-ic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A10 Interrupt Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + "#interrupt-cells": + const: 1 + + compatible: + enum: + - allwinner,sun4i-a10-ic + - allwinner,suniv-f1c100s-ic + + reg: + maxItems: 1 + + interrupt-controller: true + +required: + - "#interrupt-cells" + - compatible + - reg + - interrupt-controller + +additionalProperties: false + +examples: + - | + intc: interrupt-controller@1c20400 { + compatible = "allwinner,sun4i-a10-ic"; + reg = <0x01c20400 0x400>; + interrupt-controller; + #interrupt-cells = <1>; + }; + +... diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt deleted file mode 100644 index 404352524c3a..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun4i-ic.txt +++ /dev/null @@ -1,20 +0,0 @@ -Allwinner Sunxi Interrupt Controller - -Required properties: - -- compatible : should be one of the following: - "allwinner,sun4i-a10-ic" - "allwinner,suniv-f1c100s-ic" -- reg : Specifies base physical address and size of the registers. -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 1. - -Example: - -intc: interrupt-controller { - compatible = "allwinner,sun4i-a10-ic"; - reg = <0x01c20400 0x400>; - interrupt-controller; - #interrupt-cells = <1>; -}; -- cgit v1.2.3 From a45dddad3e2b360c5f21fdf12ac2bd32db77ea5c Mon Sep 17 00:00:00 2001 From: Maxime Ripard Date: Wed, 21 Aug 2019 10:21:38 +0200 Subject: dt-bindings: irq: Convert Allwinner NMI Controller to a schema The Allwinner SoCs have an interrupt controller called NMI supported in Linux, with a matching Device Tree binding. Now that we have the DT validation in place, let's convert the device tree bindings for that controller over to a YAML schemas. Signed-off-by: Maxime Ripard Signed-off-by: Rob Herring --- .../allwinner,sun7i-a20-sc-nmi.yaml | 70 ++++++++++++++++++++++ .../interrupt-controller/allwinner,sunxi-nmi.txt | 29 --------- 2 files changed, 70 insertions(+), 29 deletions(-) create mode 100644 Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml new file mode 100644 index 000000000000..0eccf5551786 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml @@ -0,0 +1,70 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/allwinner,sun7i-a20-sc-nmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Allwinner A20 Non-Maskable Interrupt Controller Device Tree Bindings + +maintainers: + - Chen-Yu Tsai + - Maxime Ripard + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + "#interrupt-cells": + const: 2 + description: + The first cell is the IRQ number, the second cell the trigger + type as defined in interrupt.txt in this directory. + + compatible: + oneOf: + - const: allwinner,sun6i-a31-r-intc + - const: allwinner,sun6i-a31-sc-nmi + deprecated: true + - const: allwinner,sun7i-a20-sc-nmi + - items: + - const: allwinner,sun8i-a83t-r-intc + - const: allwinner,sun6i-a31-r-intc + - const: allwinner,sun9i-a80-sc-nmi + - items: + - const: allwinner,sun50i-a64-r-intc + - const: allwinner,sun6i-a31-r-intc + - items: + - const: allwinner,sun50i-h6-r-intc + - const: allwinner,sun6i-a31-r-intc + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + interrupt-controller: true + +required: + - "#interrupt-cells" + - compatible + - reg + - interrupts + - interrupt-controller + +# FIXME: We should set it, but it would report all the generic +# properties as additional properties. +# additionalProperties: false + +examples: + - | + interrupt-controller@1c00030 { + compatible = "allwinner,sun7i-a20-sc-nmi"; + interrupt-controller; + #interrupt-cells = <2>; + reg = <0x01c00030 0x0c>; + interrupt-parent = <&gic>; + interrupts = <0 0 4>; + }; + +... diff --git a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt b/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt deleted file mode 100644 index 24beadf7ba83..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/allwinner,sunxi-nmi.txt +++ /dev/null @@ -1,29 +0,0 @@ -Allwinner Sunxi NMI Controller -============================== - -Required properties: - -- compatible : should be one of the following: - - "allwinner,sun7i-a20-sc-nmi" - - "allwinner,sun6i-a31-sc-nmi" (deprecated) - - "allwinner,sun6i-a31-r-intc" - - "allwinner,sun9i-a80-nmi" -- reg : Specifies base physical address and size of the registers. -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 2. The first cell is the IRQ number, the - second cell the trigger type as defined in interrupt.txt in this directory. -- interrupts: Specifies the interrupt line (NMI) which is handled by - the interrupt controller in the parent controller's notation. This value - shall be the NMI. - -Example: - -sc-nmi-intc@1c00030 { - compatible = "allwinner,sun7i-a20-sc-nmi"; - interrupt-controller; - #interrupt-cells = <2>; - reg = <0x01c00030 0x0c>; - interrupt-parent = <&gic>; - interrupts = <0 0 4>; -}; -- cgit v1.2.3 From 553cedf60056dc55366b060104cf9b694efe9bbf Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 16 Aug 2019 16:51:46 -0500 Subject: dt-bindings: Convert Arm Mali Midgard GPU to DT schema Convert the Arm Midgard GPU binding to DT schema format. The 'clocks' property is now required. This simplifies the schema as effectively all the users require 'clocks' already and the upstream driver requires at least one clock. Reviewed-by: Neil Armstrong Acked-by: Maxime Ripard Acked-by: Heiko Stuebner Signed-off-by: Rob Herring --- .../devicetree/bindings/gpu/arm,mali-midgard.txt | 119 --------------- .../devicetree/bindings/gpu/arm,mali-midgard.yaml | 165 +++++++++++++++++++++ 2 files changed, 165 insertions(+), 119 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt deleted file mode 100644 index 9b298edec5b2..000000000000 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.txt +++ /dev/null @@ -1,119 +0,0 @@ -ARM Mali Midgard GPU -==================== - -Required properties: - -- compatible : - * Must contain one of the following: - + "arm,mali-t604" - + "arm,mali-t624" - + "arm,mali-t628" - + "arm,mali-t720" - + "arm,mali-t760" - + "arm,mali-t820" - + "arm,mali-t830" - + "arm,mali-t860" - + "arm,mali-t880" - * which must be preceded by one of the following vendor specifics: - + "allwinner,sun50i-h6-mali" - + "amlogic,meson-gxm-mali" - + "samsung,exynos5433-mali" - + "rockchip,rk3288-mali" - + "rockchip,rk3399-mali" - -- reg : Physical base address of the device and length of the register area. - -- interrupts : Contains the three IRQ lines required by Mali Midgard devices. - -- interrupt-names : Contains the names of IRQ resources in the order they were - provided in the interrupts property. Must contain: "job", "mmu", "gpu". - - -Optional properties: - -- clocks : Phandle to clock for the Mali Midgard device. - -- clock-names : Specify the names of the clocks specified in clocks - when multiple clocks are present. - * core: clock driving the GPU itself (When only one clock is present, - assume it's this clock.) - * bus: bus clock for the GPU - -- mali-supply : Phandle to regulator for the Mali device. Refer to - Documentation/devicetree/bindings/regulator/regulator.txt for details. - -- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt - for details. - -- #cooling-cells: Refer to Documentation/devicetree/bindings/thermal/thermal.txt - for details. - -- resets : Phandle of the GPU reset line. - -Vendor-specific bindings ------------------------- - -The Mali GPU is integrated very differently from one SoC to -another. In order to accommodate those differences, you have the option -to specify one more vendor-specific compatible, among: - -- "allwinner,sun50i-h6-mali" - Required properties: - - clocks : phandles to core and bus clocks - - clock-names : must contain "core" and "bus" - - resets: phandle to GPU reset line - -- "amlogic,meson-gxm-mali" - Required properties: - - resets : Should contain phandles of : - + GPU reset line - + GPU APB glue reset line - -Example for a Mali-T760: - -gpu@ffa30000 { - compatible = "rockchip,rk3288-mali", "arm,mali-t760"; - reg = <0xffa30000 0x10000>; - interrupts = , - , - ; - interrupt-names = "job", "mmu", "gpu"; - clocks = <&cru ACLK_GPU>; - mali-supply = <&vdd_gpu>; - operating-points-v2 = <&gpu_opp_table>; - power-domains = <&power RK3288_PD_GPU>; - #cooling-cells = <2>; -}; - -gpu_opp_table: opp_table0 { - compatible = "operating-points-v2"; - - opp@533000000 { - opp-hz = /bits/ 64 <533000000>; - opp-microvolt = <1250000>; - }; - opp@450000000 { - opp-hz = /bits/ 64 <450000000>; - opp-microvolt = <1150000>; - }; - opp@400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <1125000>; - }; - opp@350000000 { - opp-hz = /bits/ 64 <350000000>; - opp-microvolt = <1075000>; - }; - opp@266000000 { - opp-hz = /bits/ 64 <266000000>; - opp-microvolt = <1025000>; - }; - opp@160000000 { - opp-hz = /bits/ 64 <160000000>; - opp-microvolt = <925000>; - }; - opp@100000000 { - opp-hz = /bits/ 64 <100000000>; - opp-microvolt = <912500>; - }; -}; diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml new file mode 100644 index 000000000000..b99a43bb471a --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -0,0 +1,165 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/arm,mali-midgard.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Mali Midgard GPU + +maintainers: + - Rob Herring + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + compatible: + oneOf: + - items: + - enum: + - allwinner,sun50i-h6-mali + - const: arm,mali-t720 + - items: + - enum: + - amlogic,meson-gxm-mali + - const: arm,mali-t820 + - items: + - enum: + - rockchip,rk3288-mali + - const: arm,mali-t760 + - items: + - enum: + - rockchip,rk3399-mali + - const: arm,mali-t860 + - items: + - enum: + - samsung,exynos5433-mali + - const: arm,mali-t760 + + # "arm,mali-t604" + # "arm,mali-t624" + # "arm,mali-t628" + # "arm,mali-t830" + # "arm,mali-t880" + + reg: + maxItems: 1 + + interrupts: + items: + - description: Job interrupt + - description: MMU interrupt + - description: GPU interrupt + + interrupt-names: + items: + - const: job + - const: mmu + - const: gpu + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + items: + - const: core + - const: bus + + mali-supply: + maxItems: 1 + + resets: + minItems: 1 + maxItems: 2 + + operating-points-v2: true + + "#cooling-cells": + const: 2 + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + +allOf: + - if: + properties: + compatible: + contains: + const: allwinner,sun50i-h6-mali + then: + properties: + clocks: + minItems: 2 + required: + - clock-names + - resets + - if: + properties: + compatible: + contains: + const: amlogic,meson-gxm-mali + then: + properties: + resets: + minItems: 2 + required: + - resets + +examples: + - | + #include + #include + + gpu@ffa30000 { + compatible = "rockchip,rk3288-mali", "arm,mali-t760"; + reg = <0xffa30000 0x10000>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&cru 0>; + mali-supply = <&vdd_gpu>; + operating-points-v2 = <&gpu_opp_table>; + power-domains = <&power 0>; + #cooling-cells = <2>; + }; + + gpu_opp_table: opp_table0 { + compatible = "operating-points-v2"; + + opp@533000000 { + opp-hz = /bits/ 64 <533000000>; + opp-microvolt = <1250000>; + }; + opp@450000000 { + opp-hz = /bits/ 64 <450000000>; + opp-microvolt = <1150000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1125000>; + }; + opp@350000000 { + opp-hz = /bits/ 64 <350000000>; + opp-microvolt = <1075000>; + }; + opp@266000000 { + opp-hz = /bits/ 64 <266000000>; + opp-microvolt = <1025000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <925000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <912500>; + }; + }; + +... -- cgit v1.2.3 From 842b4aecfff6acec2f1abcde920a22df20830447 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 20 Aug 2019 13:29:32 -0500 Subject: dt-bindings: Convert Arm Mali Bifrost GPU to DT schema Convert the Arm Bifrost GPU binding to DT schema format. The 'clocks' property is now required. This simplifies the schema as effectively all the users require 'clocks' already and the upstream driver requires at least one clock. Reviewed-by: Neil Armstrong Acked-by: Maxime Ripard Acked-by: Heiko Stuebner Signed-off-by: Rob Herring --- .../devicetree/bindings/gpu/arm,mali-bifrost.txt | 92 ---------------- .../devicetree/bindings/gpu/arm,mali-bifrost.yaml | 116 +++++++++++++++++++++ 2 files changed, 116 insertions(+), 92 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt deleted file mode 100644 index b8be9dbc68b4..000000000000 --- a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.txt +++ /dev/null @@ -1,92 +0,0 @@ -ARM Mali Bifrost GPU -==================== - -Required properties: - -- compatible : - * Since Mali Bifrost GPU model/revision is fully discoverable by reading - some determined registers, must contain the following: - + "arm,mali-bifrost" - * which must be preceded by one of the following vendor specifics: - + "amlogic,meson-g12a-mali" - -- reg : Physical base address of the device and length of the register area. - -- interrupts : Contains the three IRQ lines required by Mali Bifrost devices, - in the following defined order. - -- interrupt-names : Contains the names of IRQ resources in this exact defined - order: "job", "mmu", "gpu". - -Optional properties: - -- clocks : Phandle to clock for the Mali Bifrost device. - -- mali-supply : Phandle to regulator for the Mali device. Refer to - Documentation/devicetree/bindings/regulator/regulator.txt for details. - -- operating-points-v2 : Refer to Documentation/devicetree/bindings/opp/opp.txt - for details. - -- resets : Phandle of the GPU reset line. - -Vendor-specific bindings ------------------------- - -The Mali GPU is integrated very differently from one SoC to -another. In order to accommodate those differences, you have the option -to specify one more vendor-specific compatible, among: - -- "amlogic,meson-g12a-mali" - Required properties: - - resets : Should contain phandles of : - + GPU reset line - + GPU APB glue reset line - -Example for a Mali-G31: - -gpu@ffa30000 { - compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; - reg = <0xffe40000 0x10000>; - interrupts = , - , - ; - interrupt-names = "job", "mmu", "gpu"; - clocks = <&clk CLKID_MALI>; - mali-supply = <&vdd_gpu>; - operating-points-v2 = <&gpu_opp_table>; - resets = <&reset RESET_DVALIN_CAPB3>, <&reset RESET_DVALIN>; -}; - -gpu_opp_table: opp_table0 { - compatible = "operating-points-v2"; - - opp@533000000 { - opp-hz = /bits/ 64 <533000000>; - opp-microvolt = <1250000>; - }; - opp@450000000 { - opp-hz = /bits/ 64 <450000000>; - opp-microvolt = <1150000>; - }; - opp@400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-microvolt = <1125000>; - }; - opp@350000000 { - opp-hz = /bits/ 64 <350000000>; - opp-microvolt = <1075000>; - }; - opp@266000000 { - opp-hz = /bits/ 64 <266000000>; - opp-microvolt = <1025000>; - }; - opp@160000000 { - opp-hz = /bits/ 64 <160000000>; - opp-microvolt = <925000>; - }; - opp@100000000 { - opp-hz = /bits/ 64 <100000000>; - opp-microvolt = <912500>; - }; -}; diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml new file mode 100644 index 000000000000..5f1fd6d7ee0f --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/arm,mali-bifrost.yaml @@ -0,0 +1,116 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/arm,mali-bifrost.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Mali Bifrost GPU + +maintainers: + - Rob Herring + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + + compatible: + items: + - enum: + - amlogic,meson-g12a-mali + - const: arm,mali-bifrost # Mali Bifrost GPU model/revision is fully discoverable + + reg: + maxItems: 1 + + interrupts: + items: + - description: Job interrupt + - description: MMU interrupt + - description: GPU interrupt + + interrupt-names: + items: + - const: job + - const: mmu + - const: gpu + + clocks: + maxItems: 1 + + mali-supply: + maxItems: 1 + + operating-points-v2: true + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + +allOf: + - if: + properties: + compatible: + contains: + const: amlogic,meson-g12a-mali + then: + properties: + resets: + minItems: 2 + required: + - resets + +examples: + - | + #include + #include + + gpu@ffe40000 { + compatible = "amlogic,meson-g12a-mali", "arm,mali-bifrost"; + reg = <0xffe40000 0x10000>; + interrupts = , + , + ; + interrupt-names = "job", "mmu", "gpu"; + clocks = <&clk 1>; + mali-supply = <&vdd_gpu>; + operating-points-v2 = <&gpu_opp_table>; + resets = <&reset 0>, <&reset 1>; + }; + + gpu_opp_table: opp_table0 { + compatible = "operating-points-v2"; + + opp@533000000 { + opp-hz = /bits/ 64 <533000000>; + opp-microvolt = <1250000>; + }; + opp@450000000 { + opp-hz = /bits/ 64 <450000000>; + opp-microvolt = <1150000>; + }; + opp@400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-microvolt = <1125000>; + }; + opp@350000000 { + opp-hz = /bits/ 64 <350000000>; + opp-microvolt = <1075000>; + }; + opp@266000000 { + opp-hz = /bits/ 64 <266000000>; + opp-microvolt = <1025000>; + }; + opp@160000000 { + opp-hz = /bits/ 64 <160000000>; + opp-microvolt = <925000>; + }; + opp@100000000 { + opp-hz = /bits/ 64 <100000000>; + opp-microvolt = <912500>; + }; + }; + +... -- cgit v1.2.3 From 146fa39943b1cf4ac60f5e1f90cfec9367d9469a Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 20 Aug 2019 14:40:33 -0500 Subject: dt-bindings: Convert Arm Mali Utgard GPU to DT schema Convert the Arm Utgard GPU binding to DT schema format. 'allwinner,sun8i-a23-mali' compatible was not documented, so add it. The 'clocks' property is now required. This simplifies the schema as effectively all the users require 'clocks' already and the upstream driver requires clocks. Reviewed-by: Neil Armstrong Acked-by: Maxime Ripard Acked-by: Heiko Stuebner Signed-off-by: Rob Herring --- .../devicetree/bindings/gpu/arm,mali-utgard.txt | 129 ---------------- .../devicetree/bindings/gpu/arm,mali-utgard.yaml | 168 +++++++++++++++++++++ 2 files changed, 168 insertions(+), 129 deletions(-) delete mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt create mode 100644 Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt deleted file mode 100644 index ba895efe3039..000000000000 --- a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt +++ /dev/null @@ -1,129 +0,0 @@ -ARM Mali Utgard GPU -=================== - -Required properties: - - compatible - * Must be one of the following: - + "arm,mali-300" - + "arm,mali-400" - + "arm,mali-450" - * And, optionally, one of the vendor specific compatible: - + allwinner,sun4i-a10-mali - + allwinner,sun7i-a20-mali - + allwinner,sun8i-h3-mali - + allwinner,sun50i-a64-mali - + allwinner,sun50i-h5-mali - + amlogic,meson8-mali - + amlogic,meson8b-mali - + amlogic,meson-gxbb-mali - + amlogic,meson-gxl-mali - + samsung,exynos4210-mali - + rockchip,rk3036-mali - + rockchip,rk3066-mali - + rockchip,rk3188-mali - + rockchip,rk3228-mali - + rockchip,rk3328-mali - + stericsson,db8500-mali - + hisilicon,hi6220-mali - - - reg: Physical base address and length of the GPU registers - - - interrupts: an entry for each entry in interrupt-names. - See ../interrupt-controller/interrupts.txt for details. - - - interrupt-names: - * ppX: Pixel Processor X interrupt (X from 0 to 7) - * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7) - * pp: Pixel Processor broadcast interrupt (mali-450 only) - * gp: Geometry Processor interrupt - * gpmmu: Geometry Processor MMU interrupt - - - clocks: an entry for each entry in clock-names - - clock-names: - * bus: bus clock for the GPU - * core: clock driving the GPU itself - -Optional properties: - - interrupt-names and interrupts: - * pmu: Power Management Unit interrupt, if implemented in hardware - - - memory-region: - Memory region to allocate from, as defined in - Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt - - - mali-supply: - Phandle to regulator for the Mali device, as defined in - Documentation/devicetree/bindings/regulator/regulator.txt for details. - - - operating-points-v2: - Operating Points for the GPU, as defined in - Documentation/devicetree/bindings/opp/opp.txt - - - power-domains: - A power domain consumer specifier as defined in - Documentation/devicetree/bindings/power/power_domain.txt - -Vendor-specific bindings ------------------------- - -The Mali GPU is integrated very differently from one SoC to -another. In order to accomodate those differences, you have the option -to specify one more vendor-specific compatible, among: - - - allwinner,sun4i-a10-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - allwinner,sun7i-a20-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - allwinner,sun50i-a64-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - allwinner,sun50i-h5-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - amlogic,meson8-mali and amlogic,meson8b-mali - Required properties: - * resets: phandle to the reset line for the GPU - - - Rockchip variants: - Required properties: - * resets: phandle to the reset line for the GPU - - - stericsson,db8500-mali - Required properties: - * interrupt-names and interrupts: - + combined: combined interrupt of all of the above lines - - - hisilicon,hi6220-mali - Required properties: - * resets: phandles to the reset lines for the GPU - -Example: - -mali: gpu@1c40000 { - compatible = "allwinner,sun7i-a20-mali", "arm,mali-400"; - reg = <0x01c40000 0x10000>; - interrupts = , - , - , - , - , - , - ; - interrupt-names = "gp", - "gpmmu", - "pp0", - "ppmmu0", - "pp1", - "ppmmu1", - "pmu"; - clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>; - clock-names = "bus", "core"; - resets = <&ccu RST_BUS_GPU>; -}; - diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml new file mode 100644 index 000000000000..c5d93c5839d3 --- /dev/null +++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.yaml @@ -0,0 +1,168 @@ +# SPDX-License-Identifier: GPL-2.0-only +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: ARM Mali Utgard GPU + +maintainers: + - Rob Herring + - Maxime Ripard + - Heiko Stuebner + +properties: + $nodename: + pattern: '^gpu@[a-f0-9]+$' + compatible: + oneOf: + - items: + - const: allwinner,sun8i-a23-mali + - const: allwinner,sun7i-a20-mali + - const: arm,mali-400 + - items: + - enum: + - allwinner,sun4i-a10-mali + - allwinner,sun7i-a20-mali + - allwinner,sun8i-h3-mali + - allwinner,sun50i-a64-mali + - rockchip,rk3036-mali + - rockchip,rk3066-mali + - rockchip,rk3188-mali + - rockchip,rk3228-mali + - samsung,exynos4210-mali + - stericsson,db8500-mali + - const: arm,mali-400 + - items: + - enum: + - allwinner,sun50i-h5-mali + - amlogic,meson8-mali + - amlogic,meson8b-mali + - amlogic,meson-gxbb-mali + - amlogic,meson-gxl-mali + - hisilicon,hi6220-mali + - rockchip,rk3328-mali + - const: arm,mali-450 + + # "arm,mali-300" + + reg: + maxItems: 1 + + interrupts: + minItems: 4 + maxItems: 20 + + interrupt-names: + allOf: + - additionalItems: true + minItems: 4 + maxItems: 20 + items: + # At least enforce the first 2 interrupts + - const: gp + - const: gpmmu + - items: + # Not ideal as any order and combination are allowed + enum: + - gp # Geometry Processor interrupt + - gpmmu # Geometry Processor MMU interrupt + - pp # Pixel Processor broadcast interrupt (mali-450 only) + - pp0 # Pixel Processor X interrupt (X from 0 to 7) + - ppmmu0 # Pixel Processor X MMU interrupt (X from 0 to 7) + - pp1 + - ppmmu1 + - pp2 + - ppmmu2 + - pp3 + - ppmmu3 + - pp4 + - ppmmu4 + - pp5 + - ppmmu5 + - pp6 + - ppmmu6 + - pp7 + - ppmmu7 + - pmu # Power Management Unit interrupt (optional) + - combined # stericsson,db8500-mali only + + clocks: + maxItems: 2 + + clock-names: + items: + - const: bus + - const: core + + memory-region: true + + mali-supply: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + operating-points-v2: true + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + +allOf: + - if: + properties: + compatible: + contains: + enum: + - allwinner,sun4i-a10-mali + - allwinner,sun7i-a20-mali + - allwinner,sun50i-a64-mali + - allwinner,sun50i-h5-mali + - amlogic,meson8-mali + - amlogic,meson8b-mali + - hisilicon,hi6220-mali + - rockchip,rk3036-mali + - rockchip,rk3066-mali + - rockchip,rk3188-mali + - rockchip,rk3228-mali + - rockchip,rk3328-mali + then: + required: + - resets + +examples: + - | + #include + #include + + mali: gpu@1c40000 { + compatible = "allwinner,sun7i-a20-mali", "arm,mali-400"; + reg = <0x01c40000 0x10000>; + interrupts = , + , + , + , + , + , + ; + interrupt-names = "gp", + "gpmmu", + "pp0", + "ppmmu0", + "pp1", + "ppmmu1", + "pmu"; + clocks = <&ccu 1>, <&ccu 2>; + clock-names = "bus", "core"; + resets = <&ccu 1>; + }; + +... -- cgit v1.2.3 From 6df58e485fd002f61bbe219f0682c1345b823906 Mon Sep 17 00:00:00 2001 From: Stephen Boyd Date: Mon, 26 Aug 2019 19:55:11 -0700 Subject: dt-bindings: Clarify interrupts-extended usage Reading the description about when to use interrupts-extended leads some developers to think that it shouldn't be used unless a device has interrupts from more than one interrupt controller. This isn't true. We should encourage devicetree writers to use this property in situations where it isn't the inherited interrupt-parent so that we have less properties in a DT node by virtue of not having to specify an interrupt-parent and an interrupts property. Reported-by: Alexandru M Stan Signed-off-by: Stephen Boyd Signed-off-by: Rob Herring --- .../devicetree/bindings/interrupt-controller/interrupts.txt | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt index 8a3c40829899..4a3ee253f7f0 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/interrupts.txt @@ -22,10 +22,10 @@ controller node. This property is inherited, so it may be specified in an interrupt client node or in any of its parent nodes. Interrupts listed in the "interrupts" property are always in reference to the node's interrupt parent. -The "interrupts-extended" property is a special form for use when a node needs -to reference multiple interrupt parents. Each entry in this property contains -both the parent phandle and the interrupt specifier. "interrupts-extended" -should only be used when a device has multiple interrupt parents. +The "interrupts-extended" property is a special form; useful when a node needs +to reference multiple interrupt parents or a different interrupt parent than +the inherited one. Each entry in this property contains both the parent phandle +and the interrupt specifier. Example: interrupts-extended = <&intc1 5 1>, <&intc2 1 0>; -- cgit v1.2.3 From 08dc99e5407d2873801b36cae5d584e372a5f769 Mon Sep 17 00:00:00 2001 From: Peter Vernia Date: Wed, 28 Aug 2019 15:56:09 -0400 Subject: pinctrl-mcp23s08: Fix property-name in dt-example MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit The device-tree properties documentation-file specifies the property "microchip,spi-present-mask" as required for MCP23SXX chips. However, the device-tree-source example below it uses only "spi-present-mask". Without "microchip," on the front, the driver will print "missing spi-present-mask" when it initializes. Update the device-tree example with the correct property-name. Signed-off-by: Peter Vernia Reviewed-by: Jan Kundrát Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt b/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt index 625a22e2f211..8b94aa8f5971 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mcp23s08.txt @@ -82,7 +82,7 @@ gpiom1: gpio@0 { compatible = "microchip,mcp23s17"; gpio-controller; #gpio-cells = <2>; - spi-present-mask = <0x01>; + microchip,spi-present-mask = <0x01>; reg = <0>; spi-max-frequency = <1000000>; }; -- cgit v1.2.3 From fb2d23291bf1dc2351152f218eaf9513b4bad1e1 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 30 Aug 2019 17:02:58 +0200 Subject: dt-bindings: arm: idle-states: Use "e.g." and "i.e." consistently Replace abbreviations "eg" and "ie" by "e.g." resp. "i.e." for consistency. Signed-off-by: Geert Uytterhoeven Reviewed-by: Amit Kucheria Acked-by: Daniel Lezcano Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/idle-states.txt | 16 ++++++++-------- 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/idle-states.txt b/Documentation/devicetree/bindings/arm/idle-states.txt index 2d325bed37e5..610b16c28d99 100644 --- a/Documentation/devicetree/bindings/arm/idle-states.txt +++ b/Documentation/devicetree/bindings/arm/idle-states.txt @@ -28,7 +28,7 @@ PM implementation to put the processor in different idle states (which include states listed above; "off" state is not an idle state since it does not have wake-up capabilities, hence it is not considered in this document). -Idle state parameters (eg entry latency) are platform specific and need to be +Idle state parameters (e.g. entry latency) are platform specific and need to be characterized with bindings that provide the required information to OS PM code so that it can build the required tables and use them at runtime. @@ -90,20 +90,20 @@ These timing parameters can be used by an OS in different circumstances. An idle CPU requires the expected min-residency time to select the most appropriate idle state based on the expected expiry time of the next IRQ -(ie wake-up) that causes the CPU to return to the EXEC phase. +(i.e. wake-up) that causes the CPU to return to the EXEC phase. An operating system scheduler may need to compute the shortest wake-up delay for CPUs in the system by detecting how long will it take to get a CPU out -of an idle state, eg: +of an idle state, e.g.: wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0) In other words, the scheduler can make its scheduling decision by selecting -(eg waking-up) the CPU with the shortest wake-up latency. +(e.g. waking-up) the CPU with the shortest wake-up latency. The wake-up latency must take into account the entry latency if that period has not expired. The abortable nature of the PREP period can be ignored if it cannot be relied upon (e.g. the PREP deadline may occur much sooner than -the worst case since it depends on the CPU operating conditions, ie caches +the worst case since it depends on the CPU operating conditions, i.e. caches state). An OS has to reliably probe the wakeup-latency since some devices can enforce @@ -183,15 +183,15 @@ and IDLE2: Graph 2: idle states min-residency example In graph 2 above, that takes into account idle states entry/exit energy -costs, it is clear that if the idle state residency time (ie time till next +costs, it is clear that if the idle state residency time (i.e. time till next wake-up IRQ) is less than IDLE2-min-residency, IDLE1 is the better idle state choice energywise. This is mainly down to the fact that IDLE1 entry/exit energy costs are lower than IDLE2. -However, the lower power consumption (ie shallower energy curve slope) of idle -state IDLE2 implies that after a suitable time, IDLE2 becomes more energy +However, the lower power consumption (i.e. shallower energy curve slope) of +idle state IDLE2 implies that after a suitable time, IDLE2 becomes more energy efficient. The time at which IDLE2 becomes more energy efficient than IDLE1 (and other -- cgit v1.2.3 From 06c3145deee1cb8de536ca26c52851cc2fc31449 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 30 Aug 2019 17:02:59 +0200 Subject: dt-bindings: arm: idle-states: Correct references to wake-up delay The paragraph explains the use of wakup-delay, as defined above. Signed-off-by: Geert Uytterhoeven Reviewed-by: Amit Kucheria Acked-by: Daniel Lezcano Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/idle-states.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/idle-states.txt b/Documentation/devicetree/bindings/arm/idle-states.txt index 610b16c28d99..6e651b7e62c3 100644 --- a/Documentation/devicetree/bindings/arm/idle-states.txt +++ b/Documentation/devicetree/bindings/arm/idle-states.txt @@ -99,8 +99,8 @@ of an idle state, e.g.: wakeup-delay = exit-latency + max(entry-latency - (now - entry-timestamp), 0) In other words, the scheduler can make its scheduling decision by selecting -(e.g. waking-up) the CPU with the shortest wake-up latency. -The wake-up latency must take into account the entry latency if that period +(e.g. waking-up) the CPU with the shortest wake-up delay. +The wake-up delay must take into account the entry latency if that period has not expired. The abortable nature of the PREP period can be ignored if it cannot be relied upon (e.g. the PREP deadline may occur much sooner than the worst case since it depends on the CPU operating conditions, i.e. caches -- cgit v1.2.3 From 0801400709d5f8a53365b0874e03fecf8a14dbfb Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 30 Aug 2019 17:03:00 +0200 Subject: dt-bindings: arm: idle-states: Correct "constraint guarantees" Correct "constraints guarantees" to "constraint guarantees". Signed-off-by: Geert Uytterhoeven Reviewed-by: Amit Kucheria Acked-by: Daniel Lezcano Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/idle-states.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/arm/idle-states.txt b/Documentation/devicetree/bindings/arm/idle-states.txt index 6e651b7e62c3..4ef0de5c0c7f 100644 --- a/Documentation/devicetree/bindings/arm/idle-states.txt +++ b/Documentation/devicetree/bindings/arm/idle-states.txt @@ -107,7 +107,7 @@ the worst case since it depends on the CPU operating conditions, i.e. caches state). An OS has to reliably probe the wakeup-latency since some devices can enforce -latency constraints guarantees to work properly, so the OS has to detect the +latency constraint guarantees to work properly, so the OS has to detect the worst case wake-up latency it can incur if a CPU is allowed to enter an idle state, and possibly to prevent that to guarantee reliable device functioning. -- cgit v1.2.3 From 19155f56a149c7e9711bed400260a867462472bc Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 30 Aug 2019 17:03:01 +0200 Subject: dt-bindings: arm: idle-states: Add punctuation to improve readability Signed-off-by: Geert Uytterhoeven Reviewed-by: Amit Kucheria Acked-by: Daniel Lezcano Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/idle-states.txt | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/idle-states.txt b/Documentation/devicetree/bindings/arm/idle-states.txt index 4ef0de5c0c7f..eb9d725be7a9 100644 --- a/Documentation/devicetree/bindings/arm/idle-states.txt +++ b/Documentation/devicetree/bindings/arm/idle-states.txt @@ -214,8 +214,8 @@ processor idle states, defined as device tree nodes, are listed. Usage: Optional - On ARM systems, it is a container of processor idle states nodes. If the system does not provide CPU - power management capabilities or the processor just - supports idle_standby an idle-states node is not + power management capabilities, or the processor just + supports idle_standby, an idle-states node is not required. Description: idle-states node is a container node, where its @@ -342,8 +342,8 @@ follows: state. In addition to the properties listed above, a state node may require - additional properties specifics to the entry-method defined in the - idle-states node, please refer to the entry-method bindings + additional properties specific to the entry-method defined in the + idle-states node. Please refer to the entry-method bindings documentation for properties definitions. =========================================== -- cgit v1.2.3 From 791581e36df3a661ed9516b7506e28cf9b87ed1a Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Fri, 30 Aug 2019 17:03:02 +0200 Subject: dt-bindings: arm: idle-states: Move exit-latency-us explanation Move exit-latency-us explanation to exit-latency-us section. Signed-off-by: Geert Uytterhoeven Reviewed-by: Amit Kucheria Acked-by: Daniel Lezcano Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/idle-states.txt | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/arm/idle-states.txt b/Documentation/devicetree/bindings/arm/idle-states.txt index eb9d725be7a9..771f5d20ae18 100644 --- a/Documentation/devicetree/bindings/arm/idle-states.txt +++ b/Documentation/devicetree/bindings/arm/idle-states.txt @@ -287,14 +287,14 @@ follows: Value type: Definition: u32 value representing worst case latency in microseconds required to enter the idle state. - The exit-latency-us duration may be guaranteed - only after entry-latency-us has passed. - exit-latency-us Usage: Required Value type: Definition: u32 value representing worst case latency in microseconds required to exit the idle state. + The exit-latency-us duration may be guaranteed + only after entry-latency-us has passed. - min-residency-us Usage: Required -- cgit v1.2.3 From 1be5b54d26aefa1b42335a5d91e61b88e678b4ea Mon Sep 17 00:00:00 2001 From: Guillaume Gardet Date: Tue, 3 Sep 2019 09:33:00 +0200 Subject: dt-bindings: gpu: mali-midgard: Add samsung exynos5250 compatible Add "samsung,exynos5250-mali" binding. Signed-off-by: Guillaume Gardet Cc: Kukjin Kim Cc: Krzysztof Kozlowski Cc: Marek Szyprowski Cc: Rob Herring Cc: Mark Rutland Cc: devicetree@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org Reviewed-by: Krzysztof Kozlowski Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml index b99a43bb471a..47bc1ac36426 100644 --- a/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml +++ b/Documentation/devicetree/bindings/gpu/arm,mali-midgard.yaml @@ -30,12 +30,15 @@ properties: - enum: - rockchip,rk3399-mali - const: arm,mali-t860 + - items: + - enum: + - samsung,exynos5250-mali + - const: arm,mali-t604 - items: - enum: - samsung,exynos5433-mali - const: arm,mali-t760 - # "arm,mali-t604" # "arm,mali-t624" # "arm,mali-t628" # "arm,mali-t830" -- cgit v1.2.3 From 5e2c4ba20477283984e33b13bcc1450e5ab76245 Mon Sep 17 00:00:00 2001 From: "james.tai" Date: Thu, 5 Sep 2019 16:14:35 +0800 Subject: dt-bindings: cpu: Add a support cpu type for cortex-a55 Add arm cpu type cortex-a55. Signed-off-by: james.tai Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/cpus.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 032f759612af..9dfd3674f691 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -124,6 +124,7 @@ properties: - arm,cortex-a15 - arm,cortex-a17 - arm,cortex-a53 + - arm,cortex-a55 - arm,cortex-a57 - arm,cortex-a72 - arm,cortex-a73 -- cgit v1.2.3 From 43c63c15bda8b29bfc29a69636cb38811a7a0b67 Mon Sep 17 00:00:00 2001 From: Simon Horman Date: Fri, 6 Sep 2019 13:16:24 +0200 Subject: dt-bindings: Correct spelling in example schema Correct spelling of "identifier". Signed-off-by: Simon Horman Reviewed-by: Geert Uytterhoeven Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/example-schema.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/example-schema.yaml b/Documentation/devicetree/bindings/example-schema.yaml index 9175d67f355d..c43819c2783a 100644 --- a/Documentation/devicetree/bindings/example-schema.yaml +++ b/Documentation/devicetree/bindings/example-schema.yaml @@ -5,7 +5,7 @@ # All the top-level keys are standard json-schema keywords except for # 'maintainers' and 'select' -# $id is a unique idenifier based on the filename. There may or may not be a +# $id is a unique identifier based on the filename. There may or may not be a # file present at the URL. $id: "http://devicetree.org/schemas/example-schema.yaml#" # $schema is the meta-schema this schema should be validated with. -- cgit v1.2.3 From 1018f8b2992045587f2f4bf38e86ef7efc40f753 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 20 Mar 2018 04:48:47 -0500 Subject: dt-bindings: arm: Convert Actions Semi bindings to jsonschema MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert Actions Semi SoC bindings to DT schema format using json-schema. Cc: "Andreas Färber" Cc: Manivannan Sadhasivam Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/actions.txt | 56 ---------------------- Documentation/devicetree/bindings/arm/actions.yaml | 38 +++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 39 insertions(+), 57 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/actions.txt create mode 100644 Documentation/devicetree/bindings/arm/actions.yaml diff --git a/Documentation/devicetree/bindings/arm/actions.txt b/Documentation/devicetree/bindings/arm/actions.txt deleted file mode 100644 index d54f33c4e0da..000000000000 --- a/Documentation/devicetree/bindings/arm/actions.txt +++ /dev/null @@ -1,56 +0,0 @@ -Actions Semi platforms device tree bindings -------------------------------------------- - - -S500 SoC -======== - -Required root node properties: - - - compatible : must contain "actions,s500" - - -Modules: - -Root node property compatible must contain, depending on module: - - - LeMaker Guitar: "lemaker,guitar" - - -Boards: - -Root node property compatible must contain, depending on board: - - - Allo.com Sparky: "allo,sparky" - - Cubietech CubieBoard6: "cubietech,cubieboard6" - - LeMaker Guitar Base Board rev. B: "lemaker,guitar-bb-rev-b", "lemaker,guitar" - - -S700 SoC -======== - -Required root node properties: - -- compatible : must contain "actions,s700" - - -Boards: - -Root node property compatible must contain, depending on board: - - - Cubietech CubieBoard7: "cubietech,cubieboard7" - - -S900 SoC -======== - -Required root node properties: - -- compatible : must contain "actions,s900" - - -Boards: - -Root node property compatible must contain, depending on board: - - - uCRobotics Bubblegum-96: "ucrobotics,bubblegum-96" diff --git a/Documentation/devicetree/bindings/arm/actions.yaml b/Documentation/devicetree/bindings/arm/actions.yaml new file mode 100644 index 000000000000..ace3fdaa8396 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/actions.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/actions.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Actions Semi platforms device tree bindings + +maintainers: + - Andreas Färber + - Manivannan Sadhasivam + +properties: + compatible: + oneOf: + # The Actions Semi S500 is a quad-core ARM Cortex-A9 SoC. + - items: + - enum: + - allo,sparky # Allo.com Sparky + - cubietech,cubieboard6 # Cubietech CubieBoard6 + - const: actions,s500 + - items: + - enum: + - lemaker,guitar-bb-rev-b # LeMaker Guitar Base Board rev. B + - const: lemaker,guitar + - const: actions,s500 + + # The Actions Semi S700 is a quad-core ARM Cortex-A53 SoC. + - items: + - enum: + - cubietech,cubieboard7 # Cubietech CubieBoard7 + - const: actions,s700 + + # The Actions Semi S900 is a quad-core ARM Cortex-A53 SoC. + - items: + - enum: + - ucrobotics,bubblegum-96 # uCRobotics Bubblegum-96 + - const: actions,s900 diff --git a/MAINTAINERS b/MAINTAINERS index 6426db5198f0..67c904ddc769 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1379,7 +1379,7 @@ F: drivers/pinctrl/actions/* F: drivers/soc/actions/ F: include/dt-bindings/power/owl-* F: include/linux/soc/actions/ -F: Documentation/devicetree/bindings/arm/actions.txt +F: Documentation/devicetree/bindings/arm/actions.yaml F: Documentation/devicetree/bindings/clock/actions,owl-cmu.txt F: Documentation/devicetree/bindings/dma/owl-dma.txt F: Documentation/devicetree/bindings/i2c/i2c-owl.txt -- cgit v1.2.3 From 693af5f3eeaa46115c44f1d639dea4a8d8342a4b Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 14 May 2018 18:53:58 -0500 Subject: dt-bindings: arm: Convert Realtek board/soc bindings to json-schema MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Convert Realtek SoC bindings to DT schema format using json-schema. Andreas is the only author and we agreed in person on licensing to be GPL2+/BSD. Cc: "Andreas Färber" Cc: Mark Rutland Cc: linux-arm-kernel@lists.infradead.org Cc: devicetree@vger.kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/realtek.txt | 22 --------------------- Documentation/devicetree/bindings/arm/realtek.yaml | 23 ++++++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 24 insertions(+), 23 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/realtek.txt create mode 100644 Documentation/devicetree/bindings/arm/realtek.yaml diff --git a/Documentation/devicetree/bindings/arm/realtek.txt b/Documentation/devicetree/bindings/arm/realtek.txt deleted file mode 100644 index 95839e19ae92..000000000000 --- a/Documentation/devicetree/bindings/arm/realtek.txt +++ /dev/null @@ -1,22 +0,0 @@ -Realtek platforms device tree bindings --------------------------------------- - - -RTD1295 SoC -=========== - -Required root node properties: - - - compatible : must contain "realtek,rtd1295" - - -Root node property compatible must contain, depending on board: - - - MeLE V9: "mele,v9" - - ProBox2 AVA: "probox2,ava" - - Zidoo X9S: "zidoo,x9s" - - -Example: - - compatible = "zidoo,x9s", "realtek,rtd1295"; diff --git a/Documentation/devicetree/bindings/arm/realtek.yaml b/Documentation/devicetree/bindings/arm/realtek.yaml new file mode 100644 index 000000000000..3528b61963b4 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/realtek.yaml @@ -0,0 +1,23 @@ +# SPDX-License-Identifier: GPL-2.0-or-later OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/realtek.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek platforms device tree bindings + +maintainers: + - Andreas Färber + +properties: + $nodename: + const: '/' + compatible: + # RTD1295 SoC based boards + items: + - enum: + - mele,v9 + - probox2,ava + - zidoo,x9s + - const: realtek,rtd1295 +... diff --git a/MAINTAINERS b/MAINTAINERS index 67c904ddc769..d4cde9ad24c3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2151,7 +2151,7 @@ M: Andreas Färber L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: arch/arm64/boot/dts/realtek/ -F: Documentation/devicetree/bindings/arm/realtek.txt +F: Documentation/devicetree/bindings/arm/realtek.yaml ARM/RENESAS ARM64 ARCHITECTURE M: Simon Horman -- cgit v1.2.3 From c680e9abaade9145ef195f9b28afa1a3b975438b Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 24 Aug 2019 15:28:45 +0200 Subject: iommu: pass cell_count = -1 to of_for_each_phandle with cells_name MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently of_for_each_phandle ignores the cell_count parameter when a cells_name is given. I intend to change that and let the iterator fall back to a non-negative cell_count if the cells_name property is missing in the referenced node. To not change how existing of_for_each_phandle's users iterate, fix them to pass cell_count = -1 when also cells_name is given which yields the expected behaviour with and without my change. Signed-off-by: Uwe Kleine-König Acked-by: Joerg Roedel Signed-off-by: Rob Herring --- drivers/iommu/arm-smmu.c | 2 +- drivers/iommu/mtk_iommu_v1.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c index 64977c131ee6..81b7734654b3 100644 --- a/drivers/iommu/arm-smmu.c +++ b/drivers/iommu/arm-smmu.c @@ -333,7 +333,7 @@ static int __find_legacy_master_phandle(struct device *dev, void *data) int err; of_for_each_phandle(it, err, dev->of_node, "mmu-masters", - "#stream-id-cells", 0) + "#stream-id-cells", -1) if (it->node == np) { *(void **)data = dev; return 1; diff --git a/drivers/iommu/mtk_iommu_v1.c b/drivers/iommu/mtk_iommu_v1.c index abeeac488372..68d1de70de0c 100644 --- a/drivers/iommu/mtk_iommu_v1.c +++ b/drivers/iommu/mtk_iommu_v1.c @@ -426,7 +426,7 @@ static int mtk_iommu_add_device(struct device *dev) int err; of_for_each_phandle(&it, err, dev->of_node, "iommus", - "#iommu-cells", 0) { + "#iommu-cells", -1) { int count = of_phandle_iterator_args(&it, iommu_spec.args, MAX_PHANDLE_ARGS); iommu_spec.np = of_node_get(it.node); -- cgit v1.2.3 From e42ee61017f58cd91cb9e30001450be3981e0e83 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Sat, 24 Aug 2019 15:28:46 +0200 Subject: of: Let of_for_each_phandle fallback to non-negative cell_count MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Referencing device tree nodes from a property allows to pass arguments. This is for example used for referencing gpios. This looks as follows: gpio_ctrl: gpio-controller { #gpio-cells = <2> ... } someothernode { gpios = <&gpio_ctrl 5 0 &gpio_ctrl 3 0>; ... } To know the number of arguments this must be either fixed, or the referenced node is checked for a $cells_name (here: "#gpio-cells") property and with this information the start of the second reference can be determined. Currently regulators are referenced with no additional arguments. To allow some optional arguments without having to change all referenced nodes this change introduces a way to specify a default cell_count. So when a phandle is parsed we check for the $cells_name property and use it as before if present. If it is not present we fall back to cells_count if non-negative and only fail if cells_count is smaller than zero. Signed-off-by: Uwe Kleine-König Signed-off-by: Rob Herring --- drivers/of/base.c | 25 +++++++++++++++++-------- 1 file changed, 17 insertions(+), 8 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index 55e7f5bb0549..2f25d2dfecfa 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1335,11 +1335,20 @@ int of_phandle_iterator_next(struct of_phandle_iterator *it) if (of_property_read_u32(it->node, it->cells_name, &count)) { - pr_err("%pOF: could not get %s for %pOF\n", - it->parent, - it->cells_name, - it->node); - goto err; + /* + * If both cell_count and cells_name is given, + * fall back to cell_count in absence + * of the cells_name property + */ + if (it->cell_count >= 0) { + count = it->cell_count; + } else { + pr_err("%pOF: could not get %s for %pOF\n", + it->parent, + it->cells_name, + it->node); + goto err; + } } } else { count = it->cell_count; @@ -1505,7 +1514,7 @@ int of_parse_phandle_with_args(const struct device_node *np, const char *list_na { if (index < 0) return -EINVAL; - return __of_parse_phandle_with_args(np, list_name, cells_name, 0, + return __of_parse_phandle_with_args(np, list_name, cells_name, -1, index, out_args); } EXPORT_SYMBOL(of_parse_phandle_with_args); @@ -1588,7 +1597,7 @@ int of_parse_phandle_with_args_map(const struct device_node *np, if (!pass_name) goto free; - ret = __of_parse_phandle_with_args(np, list_name, cells_name, 0, index, + ret = __of_parse_phandle_with_args(np, list_name, cells_name, -1, index, out_args); if (ret) goto free; @@ -1756,7 +1765,7 @@ int of_count_phandle_with_args(const struct device_node *np, const char *list_na struct of_phandle_iterator it; int rc, cur_index = 0; - rc = of_phandle_iterator_init(&it, np, list_name, cells_name, 0); + rc = of_phandle_iterator_init(&it, np, list_name, cells_name, -1); if (rc) return rc; -- cgit v1.2.3 From e65e50ff8820de12932cf1e9554316199ae02d42 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Wed, 11 Sep 2019 16:39:47 +0100 Subject: bus: qcom: fix spelling mistake "ambigous" -> "ambiguous" There is a spelling mistake on the documentation. Fix it. Signed-off-by: Colin Ian King Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/bus/qcom,ebi2.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/bus/qcom,ebi2.txt b/Documentation/devicetree/bindings/bus/qcom,ebi2.txt index 5a7d567f6833..5058aa2c63b2 100644 --- a/Documentation/devicetree/bindings/bus/qcom,ebi2.txt +++ b/Documentation/devicetree/bindings/bus/qcom,ebi2.txt @@ -71,7 +71,7 @@ Optional subnodes: The following optional properties are properties that can be tagged onto any device subnode. We are assuming that there can be only ONE device per -chipselect subnode, else the properties will become ambigous. +chipselect subnode, else the properties will become ambiguous. Optional properties arrays for SLOW chip selects: - qcom,xmem-recovery-cycles: recovery cycles is the time the memory continues to -- cgit v1.2.3 From 59e9fcf8772bd97b6d681706fb8c9a972500c524 Mon Sep 17 00:00:00 2001 From: Uwe Kleine-König Date: Wed, 18 Sep 2019 10:47:48 +0200 Subject: of: restore old handling of cells_name=NULL in of_*_phandle_with_args() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Before commit e42ee61017f5 ("of: Let of_for_each_phandle fallback to non-negative cell_count") the iterator functions calling of_for_each_phandle assumed a cell count of 0 if cells_name was NULL. This corner case was missed when implementing the fallback logic in e42ee61017f5 and resulted in an endless loop. Restore the old behaviour of of_count_phandle_with_args() and of_parse_phandle_with_args() and add a check to of_phandle_iterator_init() to prevent a similar failure as a safety precaution. of_parse_phandle_with_args_map() doesn't need a similar fix as cells_name isn't NULL there. Affected drivers are: - drivers/base/power/domain.c - drivers/base/power/domain.c - drivers/clk/ti/clk-dra7-atl.c - drivers/hwmon/ibmpowernv.c - drivers/i2c/muxes/i2c-demux-pinctrl.c - drivers/iommu/mtk_iommu.c - drivers/net/ethernet/freescale/fman/mac.c - drivers/opp/of.c - drivers/perf/arm_dsu_pmu.c - drivers/regulator/of_regulator.c - drivers/remoteproc/imx_rproc.c - drivers/soc/rockchip/pm_domains.c - sound/soc/fsl/imx-audmix.c - sound/soc/fsl/imx-audmix.c - sound/soc/meson/axg-card.c - sound/soc/samsung/tm2_wm5110.c - sound/soc/samsung/tm2_wm5110.c Thanks to Geert Uytterhoeven for reporting the issue, Peter Rosin for helping pinpoint the actual problem and the testers for confirming this fix. Fixes: e42ee61017f5 ("of: Let of_for_each_phandle fallback to non-negative cell_count") Tested-by: Marek Szyprowski Tested-by: Geert Uytterhoeven Signed-off-by: Uwe Kleine-König Signed-off-by: Rob Herring --- drivers/of/base.c | 35 +++++++++++++++++++++++++++++++++-- 1 file changed, 33 insertions(+), 2 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index 2f25d2dfecfa..1d667eb730e1 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1286,6 +1286,13 @@ int of_phandle_iterator_init(struct of_phandle_iterator *it, memset(it, 0, sizeof(*it)); + /* + * one of cell_count or cells_name must be provided to determine the + * argument length. + */ + if (cell_count < 0 && !cells_name) + return -EINVAL; + list = of_get_property(np, list_name, &size); if (!list) return -ENOENT; @@ -1512,10 +1519,17 @@ int of_parse_phandle_with_args(const struct device_node *np, const char *list_na const char *cells_name, int index, struct of_phandle_args *out_args) { + int cell_count = -1; + if (index < 0) return -EINVAL; - return __of_parse_phandle_with_args(np, list_name, cells_name, -1, - index, out_args); + + /* If cells_name is NULL we assume a cell count of 0 */ + if (!cells_name) + cell_count = 0; + + return __of_parse_phandle_with_args(np, list_name, cells_name, + cell_count, index, out_args); } EXPORT_SYMBOL(of_parse_phandle_with_args); @@ -1765,6 +1779,23 @@ int of_count_phandle_with_args(const struct device_node *np, const char *list_na struct of_phandle_iterator it; int rc, cur_index = 0; + /* + * If cells_name is NULL we assume a cell count of 0. This makes + * counting the phandles trivial as each 32bit word in the list is a + * phandle and no arguments are to consider. So we don't iterate through + * the list but just use the length to determine the phandle count. + */ + if (!cells_name) { + const __be32 *list; + int size; + + list = of_get_property(np, list_name, &size); + if (!list) + return -ENOENT; + + return size / sizeof(*list); + } + rc = of_phandle_iterator_init(&it, np, list_name, cells_name, -1); if (rc) return rc; -- cgit v1.2.3