From d3f616346def161cfb0e4153692713f066755639 Mon Sep 17 00:00:00 2001 From: Paul Burton Date: Fri, 2 Jun 2017 12:29:59 -0700 Subject: MIPS: SEAD-3: Fix GIC interrupt specifiers The various interrupt specifiers in the device tree are not in a valid format for the MIPS GIC interrupt controller binding. Where each interrupt should provide 3 values - GIC_LOCAL or GIC_SHARED, the pin number & the type of interrupt - the device tree was only providing the pin number. This causes interrupts for those devices to not be used when a GIC is present. SEAD-3 systems without a GIC are unaffected since the DT fixup code generates interrupt specifiers that are valid for the CPU interrupt controller. Fix this by adding the GIC_SHARED & IRQ_TYPE_LEVEL_HIGH values to each interrupt specifier. Signed-off-by: Paul Burton Fixes: c11e3b48dbc3 ("MIPS: SEAD3: Probe UARTs using DT") Fixes: a34e93882de4 ("MIPS: SEAD3: Probe ethernet controller using DT") Fixes: 7afd2a5aec2e ("MIPS: SEAD3: Probe EHCI controller using DT") Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org # v4.9+ Patchwork: https://patchwork.linux-mips.org/patch/16189/ Signed-off-by: Ralf Baechle --- arch/mips/boot/dts/mti/sead3.dts | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/mips/boot/dts/mti/sead3.dts b/arch/mips/boot/dts/mti/sead3.dts index cabe256f9a68..4f8bc83c2960 100644 --- a/arch/mips/boot/dts/mti/sead3.dts +++ b/arch/mips/boot/dts/mti/sead3.dts @@ -60,7 +60,7 @@ reg = <0x1b200000 0x1000>; interrupt-parent = <&gic>; - interrupts = <0>; /* GIC 0 or CPU 6 */ + interrupts = ; /* GIC 0 or CPU 6 */ has-transaction-translator; }; @@ -223,7 +223,7 @@ clock-frequency = <14745600>; interrupt-parent = <&gic>; - interrupts = <3>; /* GIC 3 or CPU 4 */ + interrupts = ; /* GIC 3 or CPU 4 */ no-loopback-test; }; @@ -238,7 +238,7 @@ clock-frequency = <14745600>; interrupt-parent = <&gic>; - interrupts = <2>; /* GIC 2 or CPU 4 */ + interrupts = ; /* GIC 2 or CPU 4 */ no-loopback-test; }; @@ -249,7 +249,7 @@ reg-io-width = <4>; interrupt-parent = <&gic>; - interrupts = <0>; /* GIC 0 or CPU 6 */ + interrupts = ; /* GIC 0 or CPU 6 */ phy-mode = "mii"; smsc,irq-push-pull; -- cgit v1.2.3